1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | // |
3 | // rt1017-sdca-sdw.c -- rt1017 SDCA ALSA SoC amplifier audio driver |
4 | // |
5 | // Copyright(c) 2023 Realtek Semiconductor Corp. |
6 | // |
7 | // |
8 | #include <linux/delay.h> |
9 | #include <linux/device.h> |
10 | #include <linux/pm_runtime.h> |
11 | #include <linux/mod_devicetable.h> |
12 | #include <linux/module.h> |
13 | #include <linux/regmap.h> |
14 | #include <sound/core.h> |
15 | #include <sound/pcm.h> |
16 | #include <sound/pcm_params.h> |
17 | #include <sound/soc.h> |
18 | #include <sound/soc-dapm.h> |
19 | #include <sound/initval.h> |
20 | #include <sound/tlv.h> |
21 | |
22 | #include "rt1017-sdca-sdw.h" |
23 | |
24 | static bool rt1017_sdca_readable_register(struct device *dev, unsigned int reg) |
25 | { |
26 | switch (reg) { |
27 | case 0x2f55: |
28 | case 0x3206: |
29 | case 0xc000: |
30 | case 0xc001: |
31 | case 0xc022: |
32 | case 0xc030: |
33 | case 0xc104: |
34 | case 0xc10b: |
35 | case 0xc10c: |
36 | case 0xc110: |
37 | case 0xc112: |
38 | case 0xc300: |
39 | case 0xc301: |
40 | case 0xc318: |
41 | case 0xc325 ... 0xc328: |
42 | case 0xc331: |
43 | case 0xc340: |
44 | case 0xc350 ... 0xc351: |
45 | case 0xc500: |
46 | case 0xc502: |
47 | case 0xc504: |
48 | case 0xc507: |
49 | case 0xc509: |
50 | case 0xc510: |
51 | case 0xc512: |
52 | case 0xc518: |
53 | case 0xc51b: |
54 | case 0xc51d: |
55 | case 0xc520: |
56 | case 0xc540 ... 0xc542: |
57 | case 0xc550 ... 0xc552: |
58 | case 0xc600: |
59 | case 0xc602: |
60 | case 0xc612: |
61 | case 0xc622: |
62 | case 0xc632: |
63 | case 0xc642: |
64 | case 0xc651: |
65 | case 0xca00: |
66 | case 0xca09 ... 0xca0c: |
67 | case 0xca0e ... 0xca0f: |
68 | case 0xca10 ... 0xca11: |
69 | case 0xca16 ... 0xca17: |
70 | case 0xcb00: |
71 | case 0xcc00: |
72 | case 0xcc02: |
73 | case 0xd017: |
74 | case 0xd01a ... 0xd01c: |
75 | case 0xd101: |
76 | case 0xd20c: |
77 | case 0xd300: |
78 | case 0xd370: |
79 | case 0xd500: |
80 | case 0xd545 ... 0xd548: |
81 | case 0xd5a5 ... 0xd5a8: |
82 | case 0xd5aa ... 0xd5ad: |
83 | case 0xda04 ... 0xda07: |
84 | case 0xda09 ... 0xda0a: |
85 | case 0xda0c ... 0xda0f: |
86 | case 0xda11 ... 0xda14: |
87 | case 0xda16 ... 0xda19: |
88 | case 0xdab6 ... 0xdabb: |
89 | case 0xdb09 ... 0xdb0a: |
90 | case 0xdb14: |
91 | |
92 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21, |
93 | RT1017_SDCA_CTL_UDMPU_CLUSTER, 0): |
94 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_FU, |
95 | RT1017_SDCA_CTL_FU_MUTE, 0x01): |
96 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_XU22, |
97 | RT1017_SDCA_CTL_BYPASS, 0): |
98 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_SAPU29, |
99 | RT1017_SDCA_CTL_PROT_STAT, 0): |
100 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21, |
101 | RT1017_SDCA_CTL_FS_INDEX, 0): |
102 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23, |
103 | RT1017_SDCA_CTL_REQ_POWER_STATE, 0): |
104 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE22, |
105 | RT1017_SDCA_CTL_REQ_POWER_STATE, 0): |
106 | return true; |
107 | default: |
108 | return false; |
109 | } |
110 | } |
111 | |
112 | static bool rt1017_sdca_volatile_register(struct device *dev, unsigned int reg) |
113 | { |
114 | switch (reg) { |
115 | case 0x2f55: |
116 | case 0xc000: |
117 | case 0xc022: |
118 | case 0xc351: |
119 | case 0xc518: |
120 | case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_SAPU29, |
121 | RT1017_SDCA_CTL_PROT_STAT, 0): |
122 | return true; |
123 | default: |
124 | return false; |
125 | } |
126 | } |
127 | |
128 | static const struct reg_sequence rt1017_blind_write[] = { |
129 | { 0xc001, 0x43 }, |
130 | { 0x2f55, 0x02 }, |
131 | { 0x3206, 0x80 }, |
132 | { 0x005f, 0x7f }, |
133 | { 0xd101, 0xa0 }, |
134 | { 0xc112, 0xc0 }, |
135 | { 0xc104, 0xaa }, |
136 | { 0xc110, 0x59 }, |
137 | { 0xc112, 0xc0 }, |
138 | { 0xc340, 0x80 }, |
139 | { 0xd017, 0x2c }, |
140 | { 0xd01a, 0xc8 }, |
141 | { 0xd01b, 0xcf }, |
142 | { 0xd01c, 0x0c }, |
143 | { 0xd20c, 0x14 }, |
144 | { 0xdb09, 0x0f }, |
145 | { 0xdb0a, 0x7f }, |
146 | { 0xdb14, 0x03 }, |
147 | { 0xcb00, 0x31 }, |
148 | { 0xc318, 0x44 }, |
149 | { 0xc325, 0xce }, |
150 | { 0xc326, 0x13 }, |
151 | { 0xc327, 0x5f }, |
152 | { 0xc328, 0xf3 }, |
153 | { 0xc350, 0xe1 }, |
154 | { 0xc351, 0x88 }, |
155 | { 0xc030, 0x14 }, |
156 | { 0xc331, 0xf2 }, |
157 | { 0xc551, 0x0f }, |
158 | { 0xc552, 0xff }, |
159 | { 0xc651, 0xc0 }, |
160 | { 0xc550, 0xd0 }, |
161 | { 0xc612, 0x00 }, |
162 | { 0xc622, 0x00 }, |
163 | { 0xc632, 0x00 }, |
164 | { 0xc642, 0x00 }, |
165 | { 0xc602, 0xf0 }, |
166 | { 0xc600, 0xd0 }, |
167 | { 0xcc02, 0x78 }, |
168 | { 0xcc00, 0x90 }, |
169 | { 0xc300, 0x3f }, |
170 | { 0xc301, 0x1d }, |
171 | { 0xc10b, 0x2e }, |
172 | { 0xc10c, 0x36 }, |
173 | |
174 | { 0xd5a5, 0x00 }, |
175 | { 0xd5a6, 0x6a }, |
176 | { 0xd5a7, 0xaa }, |
177 | { 0xd5a8, 0xaa }, |
178 | { 0xd5aa, 0x00 }, |
179 | { 0xd5ab, 0x16 }, |
180 | { 0xd5ac, 0xdb }, |
181 | { 0xd5ad, 0x6d }, |
182 | { 0xd545, 0x09 }, |
183 | { 0xd546, 0x30 }, |
184 | { 0xd547, 0xf0 }, |
185 | { 0xd548, 0xf0 }, |
186 | { 0xd500, 0x20 }, |
187 | { 0xc504, 0x3f }, |
188 | { 0xc540, 0x00 }, |
189 | { 0xc541, 0x0a }, |
190 | { 0xc542, 0x1a }, |
191 | { 0xc512, 0x00 }, |
192 | { 0xc520, 0x40 }, |
193 | { 0xc51b, 0x7f }, |
194 | { 0xc51d, 0x0f }, |
195 | { 0xc500, 0x40 }, |
196 | { 0xc502, 0xde }, |
197 | { 0xc507, 0x05 }, |
198 | { 0xc509, 0x05 }, |
199 | { 0xc510, 0x40 }, |
200 | { 0xc518, 0xc0 }, |
201 | { 0xc500, 0xc0 }, |
202 | |
203 | { 0xda0c, 0x00 }, |
204 | { 0xda0d, 0x0b }, |
205 | { 0xda0e, 0x55 }, |
206 | { 0xda0f, 0x55 }, |
207 | { 0xda04, 0x00 }, |
208 | { 0xda05, 0x51 }, |
209 | { 0xda06, 0xeb }, |
210 | { 0xda07, 0x85 }, |
211 | { 0xca16, 0x0f }, |
212 | { 0xca17, 0x00 }, |
213 | { 0xda09, 0x5d }, |
214 | { 0xda0a, 0xc0 }, |
215 | { 0xda11, 0x26 }, |
216 | { 0xda12, 0x66 }, |
217 | { 0xda13, 0x66 }, |
218 | { 0xda14, 0x66 }, |
219 | { 0xda16, 0x79 }, |
220 | { 0xda17, 0x99 }, |
221 | { 0xda18, 0x99 }, |
222 | { 0xda19, 0x99 }, |
223 | { 0xca09, 0x00 }, |
224 | { 0xca0a, 0x07 }, |
225 | { 0xca0b, 0x89 }, |
226 | { 0xca0c, 0x61 }, |
227 | { 0xca0e, 0x00 }, |
228 | { 0xca0f, 0x03 }, |
229 | { 0xca10, 0xc4 }, |
230 | { 0xca11, 0xb0 }, |
231 | { 0xdab6, 0x00 }, |
232 | { 0xdab7, 0x01 }, |
233 | { 0xdab8, 0x00 }, |
234 | { 0xdab9, 0x00 }, |
235 | { 0xdaba, 0x00 }, |
236 | { 0xdabb, 0x00 }, |
237 | { 0xd017, 0x0e }, |
238 | { 0xca00, 0xcd }, |
239 | { 0xc022, 0x84 }, |
240 | }; |
241 | |
242 | #define RT1017_MAX_REG_NUM 0x4108ffff |
243 | |
244 | static const struct regmap_config rt1017_sdca_regmap = { |
245 | .reg_bits = 32, |
246 | .val_bits = 8, |
247 | .readable_reg = rt1017_sdca_readable_register, |
248 | .volatile_reg = rt1017_sdca_volatile_register, |
249 | .max_register = RT1017_MAX_REG_NUM, |
250 | .reg_defaults = rt1017_sdca_reg_defaults, |
251 | .num_reg_defaults = ARRAY_SIZE(rt1017_sdca_reg_defaults), |
252 | .cache_type = REGCACHE_MAPLE, |
253 | .use_single_read = true, |
254 | .use_single_write = true, |
255 | }; |
256 | |
257 | static int rt1017_sdca_read_prop(struct sdw_slave *slave) |
258 | { |
259 | struct sdw_slave_prop *prop = &slave->prop; |
260 | int nval; |
261 | int i, j; |
262 | u32 bit; |
263 | unsigned long addr; |
264 | struct sdw_dpn_prop *dpn; |
265 | |
266 | prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; |
267 | prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; |
268 | |
269 | prop->paging_support = true; |
270 | |
271 | /* first we need to allocate memory for set bits in port lists |
272 | * port = 1 for AMP playback |
273 | * port = 2 for IV capture |
274 | */ |
275 | prop->source_ports = BIT(2); /* BITMAP: 00000100 */ |
276 | prop->sink_ports = BIT(1); /* BITMAP: 00000010 */ |
277 | |
278 | nval = hweight32(prop->source_ports); |
279 | prop->src_dpn_prop = devm_kcalloc(dev: &slave->dev, n: nval, |
280 | size: sizeof(*prop->src_dpn_prop), GFP_KERNEL); |
281 | if (!prop->src_dpn_prop) |
282 | return -ENOMEM; |
283 | |
284 | i = 0; |
285 | dpn = prop->src_dpn_prop; |
286 | addr = prop->source_ports; |
287 | for_each_set_bit(bit, &addr, 32) { |
288 | dpn[i].num = bit; |
289 | dpn[i].type = SDW_DPN_FULL; |
290 | dpn[i].simple_ch_prep_sm = true; |
291 | dpn[i].ch_prep_timeout = 10; |
292 | i++; |
293 | } |
294 | |
295 | /* do this again for sink now */ |
296 | nval = hweight32(prop->sink_ports); |
297 | prop->sink_dpn_prop = devm_kcalloc(dev: &slave->dev, n: nval, |
298 | size: sizeof(*prop->sink_dpn_prop), GFP_KERNEL); |
299 | if (!prop->sink_dpn_prop) |
300 | return -ENOMEM; |
301 | |
302 | j = 0; |
303 | dpn = prop->sink_dpn_prop; |
304 | addr = prop->sink_ports; |
305 | for_each_set_bit(bit, &addr, 32) { |
306 | dpn[j].num = bit; |
307 | dpn[j].type = SDW_DPN_FULL; |
308 | dpn[j].simple_ch_prep_sm = true; |
309 | dpn[j].ch_prep_timeout = 10; |
310 | j++; |
311 | } |
312 | |
313 | /* set the timeout values */ |
314 | prop->clk_stop_timeout = 64; |
315 | |
316 | return 0; |
317 | } |
318 | |
319 | static int rt1017_sdca_io_init(struct device *dev, struct sdw_slave *slave) |
320 | { |
321 | struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev); |
322 | |
323 | if (rt1017->hw_init) |
324 | return 0; |
325 | |
326 | if (rt1017->first_hw_init) { |
327 | regcache_cache_only(map: rt1017->regmap, enable: false); |
328 | regcache_cache_bypass(map: rt1017->regmap, enable: true); |
329 | } else { |
330 | /* |
331 | * PM runtime is only enabled when a Slave reports as Attached |
332 | */ |
333 | |
334 | /* set autosuspend parameters */ |
335 | pm_runtime_set_autosuspend_delay(dev: &slave->dev, delay: 3000); |
336 | pm_runtime_use_autosuspend(dev: &slave->dev); |
337 | |
338 | /* update count of parent 'active' children */ |
339 | pm_runtime_set_active(dev: &slave->dev); |
340 | |
341 | /* make sure the device does not suspend immediately */ |
342 | pm_runtime_mark_last_busy(dev: &slave->dev); |
343 | |
344 | pm_runtime_enable(dev: &slave->dev); |
345 | } |
346 | |
347 | pm_runtime_get_noresume(dev: &slave->dev); |
348 | |
349 | /* sw reset */ |
350 | regmap_write(map: rt1017->regmap, reg: 0xc000, val: 0x02); |
351 | |
352 | /* initial settings - blind write */ |
353 | regmap_multi_reg_write(map: rt1017->regmap, regs: rt1017_blind_write, |
354 | ARRAY_SIZE(rt1017_blind_write)); |
355 | |
356 | if (rt1017->first_hw_init) { |
357 | regcache_cache_bypass(map: rt1017->regmap, enable: false); |
358 | regcache_mark_dirty(map: rt1017->regmap); |
359 | } else |
360 | rt1017->first_hw_init = true; |
361 | |
362 | /* Mark Slave initialization complete */ |
363 | rt1017->hw_init = true; |
364 | |
365 | pm_runtime_mark_last_busy(dev: &slave->dev); |
366 | pm_runtime_put_autosuspend(dev: &slave->dev); |
367 | |
368 | dev_dbg(&slave->dev, "hw_init complete\n" ); |
369 | return 0; |
370 | } |
371 | |
372 | static int rt1017_sdca_update_status(struct sdw_slave *slave, |
373 | enum sdw_slave_status status) |
374 | { |
375 | struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev: &slave->dev); |
376 | |
377 | if (status == SDW_SLAVE_UNATTACHED) |
378 | rt1017->hw_init = false; |
379 | |
380 | /* |
381 | * Perform initialization only if slave status is present and |
382 | * hw_init flag is false |
383 | */ |
384 | if (rt1017->hw_init || status != SDW_SLAVE_ATTACHED) |
385 | return 0; |
386 | |
387 | /* perform I/O transfers required for Slave initialization */ |
388 | return rt1017_sdca_io_init(dev: &slave->dev, slave); |
389 | } |
390 | |
391 | static const char * const rt1017_rx_data_ch_select[] = { |
392 | "Bypass" , |
393 | "CN1" , |
394 | "CN2" , |
395 | "CN3" , |
396 | "CN4" , |
397 | "(1+2)/2" , |
398 | "(1+3)/2" , |
399 | "(1+4)/2" , |
400 | "(2+3)/2" , |
401 | "(2+4)/2" , |
402 | "(3+4)/2" , |
403 | }; |
404 | |
405 | static SOC_ENUM_SINGLE_DECL(rt1017_rx_data_ch_enum, |
406 | SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_UDMPU21, |
407 | RT1017_SDCA_CTL_UDMPU_CLUSTER, 0), |
408 | 0, rt1017_rx_data_ch_select); |
409 | |
410 | static const struct snd_kcontrol_new rt1017_sdca_controls[] = { |
411 | /* UDMPU Cluster Selection */ |
412 | SOC_ENUM("RX Channel Select" , rt1017_rx_data_ch_enum), |
413 | }; |
414 | |
415 | static const struct snd_kcontrol_new rt1017_sto_dac = |
416 | SOC_DAPM_SINGLE("Switch" , |
417 | SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_FU, RT1017_SDCA_CTL_FU_MUTE, 0x1), |
418 | 0, 1, 1); |
419 | |
420 | static int rt1017_sdca_pde23_event(struct snd_soc_dapm_widget *w, |
421 | struct snd_kcontrol *kcontrol, int event) |
422 | { |
423 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
424 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
425 | unsigned char ps0 = 0x0, ps3 = 0x3; |
426 | |
427 | switch (event) { |
428 | case SND_SOC_DAPM_POST_PMU: |
429 | regmap_write(map: rt1017->regmap, |
430 | SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23, |
431 | RT1017_SDCA_CTL_REQ_POWER_STATE, 0), |
432 | val: ps0); |
433 | break; |
434 | case SND_SOC_DAPM_PRE_PMD: |
435 | regmap_write(map: rt1017->regmap, |
436 | SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_PDE23, |
437 | RT1017_SDCA_CTL_REQ_POWER_STATE, 0), |
438 | val: ps3); |
439 | break; |
440 | default: |
441 | break; |
442 | } |
443 | return 0; |
444 | } |
445 | |
446 | static int rt1017_sdca_classd_event(struct snd_soc_dapm_widget *w, |
447 | struct snd_kcontrol *kcontrol, int event) |
448 | { |
449 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
450 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
451 | |
452 | switch (event) { |
453 | case SND_SOC_DAPM_POST_PMU: |
454 | regmap_update_bits(map: rt1017->regmap, RT1017_PWM_TRIM_1, |
455 | RT1017_PWM_FREQ_CTL_SRC_SEL_MASK, RT1017_PWM_FREQ_CTL_SRC_SEL_REG); |
456 | regmap_write(map: rt1017->regmap, RT1017_CLASSD_INT_1, val: 0x10); |
457 | break; |
458 | default: |
459 | break; |
460 | } |
461 | |
462 | return 0; |
463 | } |
464 | |
465 | static int rt1017_sdca_feedback_event(struct snd_soc_dapm_widget *w, |
466 | struct snd_kcontrol *kcontrol, int event) |
467 | { |
468 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
469 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
470 | |
471 | switch (event) { |
472 | case SND_SOC_DAPM_PRE_PMU: |
473 | regmap_update_bits(map: rt1017->regmap, reg: 0xd017, mask: 0x1f, val: 0x08); |
474 | break; |
475 | case SND_SOC_DAPM_POST_PMD: |
476 | regmap_update_bits(map: rt1017->regmap, reg: 0xd017, mask: 0x1f, val: 0x09); |
477 | break; |
478 | default: |
479 | break; |
480 | } |
481 | |
482 | return 0; |
483 | } |
484 | |
485 | static const struct snd_soc_dapm_widget rt1017_sdca_dapm_widgets[] = { |
486 | /* Audio Interface */ |
487 | SND_SOC_DAPM_AIF_IN("DP1RX" , "DP1 Playback" , 0, SND_SOC_NOPM, 0, 0), |
488 | SND_SOC_DAPM_AIF_OUT_E("DP2TX" , "DP2 Capture" , 0, SND_SOC_NOPM, 0, 0, |
489 | rt1017_sdca_feedback_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
490 | |
491 | /* Digital Interface */ |
492 | SND_SOC_DAPM_SWITCH("DAC" , SND_SOC_NOPM, 0, 0, &rt1017_sto_dac), |
493 | |
494 | /* Output Lines */ |
495 | SND_SOC_DAPM_PGA_E("CLASS D" , SND_SOC_NOPM, 0, 0, NULL, 0, |
496 | rt1017_sdca_classd_event, SND_SOC_DAPM_POST_PMU), |
497 | SND_SOC_DAPM_OUTPUT("SPO" ), |
498 | |
499 | SND_SOC_DAPM_SUPPLY("PDE23" , SND_SOC_NOPM, 0, 0, |
500 | rt1017_sdca_pde23_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
501 | |
502 | SND_SOC_DAPM_PGA("I Sense" , SND_SOC_NOPM, 0, 0, NULL, 0), |
503 | SND_SOC_DAPM_PGA("V Sense" , SND_SOC_NOPM, 0, 0, NULL, 0), |
504 | SND_SOC_DAPM_SIGGEN("I Gen" ), |
505 | SND_SOC_DAPM_SIGGEN("V Gen" ), |
506 | }; |
507 | |
508 | static const struct snd_soc_dapm_route rt1017_sdca_dapm_routes[] = { |
509 | |
510 | { "DAC" , "Switch" , "DP1RX" }, |
511 | { "CLASS D" , NULL, "DAC" }, |
512 | { "CLASS D" , NULL, "PDE23" }, |
513 | { "SPO" , NULL, "CLASS D" }, |
514 | |
515 | { "I Sense" , NULL, "I Gen" }, |
516 | { "V Sense" , NULL, "V Gen" }, |
517 | { "I Sense" , NULL, "PDE23" }, |
518 | { "V Sense" , NULL, "PDE23" }, |
519 | { "DP2TX" , NULL, "I Sense" }, |
520 | { "DP2TX" , NULL, "V Sense" }, |
521 | }; |
522 | |
523 | static const struct sdw_slave_ops rt1017_sdca_slave_ops = { |
524 | .read_prop = rt1017_sdca_read_prop, |
525 | .update_status = rt1017_sdca_update_status, |
526 | }; |
527 | |
528 | static int rt1017_sdca_component_probe(struct snd_soc_component *component) |
529 | { |
530 | int ret; |
531 | |
532 | ret = pm_runtime_resume(dev: component->dev); |
533 | if (ret < 0 && ret != -EACCES) |
534 | return ret; |
535 | |
536 | return 0; |
537 | } |
538 | |
539 | static void rt1017_sdca_component_remove(struct snd_soc_component *component) |
540 | { |
541 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
542 | |
543 | regcache_cache_only(map: rt1017->regmap, enable: true); |
544 | } |
545 | |
546 | static const struct snd_soc_component_driver soc_sdca_component_rt1017 = { |
547 | .probe = rt1017_sdca_component_probe, |
548 | .remove = rt1017_sdca_component_remove, |
549 | .controls = rt1017_sdca_controls, |
550 | .num_controls = ARRAY_SIZE(rt1017_sdca_controls), |
551 | .dapm_widgets = rt1017_sdca_dapm_widgets, |
552 | .num_dapm_widgets = ARRAY_SIZE(rt1017_sdca_dapm_widgets), |
553 | .dapm_routes = rt1017_sdca_dapm_routes, |
554 | .num_dapm_routes = ARRAY_SIZE(rt1017_sdca_dapm_routes), |
555 | .endianness = 1, |
556 | }; |
557 | |
558 | static int rt1017_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, |
559 | int direction) |
560 | { |
561 | snd_soc_dai_dma_data_set(dai, stream: direction, data: sdw_stream); |
562 | |
563 | return 0; |
564 | } |
565 | |
566 | static void rt1017_sdca_shutdown(struct snd_pcm_substream *substream, |
567 | struct snd_soc_dai *dai) |
568 | { |
569 | snd_soc_dai_set_dma_data(dai, substream, NULL); |
570 | } |
571 | |
572 | static int rt1017_sdca_pcm_hw_params(struct snd_pcm_substream *substream, |
573 | struct snd_pcm_hw_params *params, |
574 | struct snd_soc_dai *dai) |
575 | { |
576 | struct snd_soc_component *component = dai->component; |
577 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
578 | struct sdw_stream_config stream_config; |
579 | struct sdw_port_config port_config; |
580 | enum sdw_data_direction direction; |
581 | struct sdw_stream_runtime *sdw_stream; |
582 | int retval, port, num_channels, ch_mask; |
583 | unsigned int sampling_rate; |
584 | |
585 | dev_dbg(dai->dev, "%s %s" , __func__, dai->name); |
586 | sdw_stream = snd_soc_dai_get_dma_data(dai, substream); |
587 | |
588 | if (!sdw_stream) |
589 | return -EINVAL; |
590 | |
591 | if (!rt1017->sdw_slave) |
592 | return -EINVAL; |
593 | |
594 | /* SoundWire specific configuration */ |
595 | /* port 1 for playback */ |
596 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
597 | direction = SDW_DATA_DIR_RX; |
598 | port = 1; |
599 | } else { |
600 | direction = SDW_DATA_DIR_TX; |
601 | port = 2; |
602 | } |
603 | |
604 | num_channels = params_channels(p: params); |
605 | ch_mask = (1 << num_channels) - 1; |
606 | |
607 | stream_config.frame_rate = params_rate(p: params); |
608 | stream_config.ch_count = num_channels; |
609 | stream_config.bps = snd_pcm_format_width(format: params_format(p: params)); |
610 | stream_config.direction = direction; |
611 | |
612 | port_config.ch_mask = ch_mask; |
613 | port_config.num = port; |
614 | |
615 | dev_dbg(dai->dev, "frame_rate %d, ch_count %d, bps %d, direction %d, ch_mask %d, port: %d\n" , |
616 | params_rate(params), num_channels, snd_pcm_format_width(params_format(params)), |
617 | direction, ch_mask, port); |
618 | |
619 | retval = sdw_stream_add_slave(slave: rt1017->sdw_slave, stream_config: &stream_config, |
620 | port_config: &port_config, num_ports: 1, stream: sdw_stream); |
621 | if (retval) { |
622 | dev_err(dai->dev, "Unable to configure port\n" ); |
623 | return retval; |
624 | } |
625 | |
626 | /* sampling rate configuration */ |
627 | switch (params_rate(p: params)) { |
628 | case 44100: |
629 | sampling_rate = RT1017_SDCA_RATE_44100HZ; |
630 | break; |
631 | case 48000: |
632 | sampling_rate = RT1017_SDCA_RATE_48000HZ; |
633 | break; |
634 | case 96000: |
635 | sampling_rate = RT1017_SDCA_RATE_96000HZ; |
636 | break; |
637 | case 192000: |
638 | sampling_rate = RT1017_SDCA_RATE_192000HZ; |
639 | break; |
640 | default: |
641 | dev_err(component->dev, "Rate %d is not supported\n" , |
642 | params_rate(params)); |
643 | return -EINVAL; |
644 | } |
645 | |
646 | /* set sampling frequency */ |
647 | regmap_write(map: rt1017->regmap, |
648 | SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, RT1017_SDCA_ENT_CS21, |
649 | RT1017_SDCA_CTL_FS_INDEX, 0), |
650 | val: sampling_rate); |
651 | |
652 | return 0; |
653 | } |
654 | |
655 | static int rt1017_sdca_pcm_hw_free(struct snd_pcm_substream *substream, |
656 | struct snd_soc_dai *dai) |
657 | { |
658 | struct snd_soc_component *component = dai->component; |
659 | struct rt1017_sdca_priv *rt1017 = snd_soc_component_get_drvdata(c: component); |
660 | struct sdw_stream_runtime *sdw_stream = |
661 | snd_soc_dai_get_dma_data(dai, substream); |
662 | |
663 | if (!rt1017->sdw_slave) |
664 | return -EINVAL; |
665 | |
666 | sdw_stream_remove_slave(slave: rt1017->sdw_slave, stream: sdw_stream); |
667 | return 0; |
668 | } |
669 | |
670 | static const struct snd_soc_dai_ops rt1017_sdca_ops = { |
671 | .hw_params = rt1017_sdca_pcm_hw_params, |
672 | .hw_free = rt1017_sdca_pcm_hw_free, |
673 | .set_stream = rt1017_sdca_set_sdw_stream, |
674 | .shutdown = rt1017_sdca_shutdown, |
675 | }; |
676 | |
677 | #define RT1017_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \ |
678 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) |
679 | #define RT1017_FORMATS (SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S16_LE | \ |
680 | SNDRV_PCM_FMTBIT_S24_LE) |
681 | |
682 | static struct snd_soc_dai_driver rt1017_sdca_dai[] = { |
683 | { |
684 | .name = "rt1017-aif" , |
685 | .playback = { |
686 | .stream_name = "DP1 Playback" , |
687 | .channels_min = 1, |
688 | .channels_max = 1, |
689 | .rates = RT1017_STEREO_RATES, |
690 | .formats = RT1017_FORMATS, |
691 | }, |
692 | .capture = { |
693 | .stream_name = "DP2 Capture" , |
694 | .channels_min = 1, |
695 | .channels_max = 1, |
696 | .rates = RT1017_STEREO_RATES, |
697 | .formats = RT1017_FORMATS, |
698 | }, |
699 | .ops = &rt1017_sdca_ops, |
700 | }, |
701 | }; |
702 | |
703 | static int rt1017_sdca_init(struct device *dev, struct regmap *regmap, |
704 | struct sdw_slave *slave) |
705 | { |
706 | struct rt1017_sdca_priv *rt1017; |
707 | int ret; |
708 | |
709 | rt1017 = devm_kzalloc(dev, size: sizeof(*rt1017), GFP_KERNEL); |
710 | if (!rt1017) |
711 | return -ENOMEM; |
712 | |
713 | dev_set_drvdata(dev, data: rt1017); |
714 | rt1017->sdw_slave = slave; |
715 | rt1017->regmap = regmap; |
716 | |
717 | /* |
718 | * Mark hw_init to false |
719 | * HW init will be performed when device reports present |
720 | */ |
721 | rt1017->hw_init = false; |
722 | rt1017->first_hw_init = false; |
723 | |
724 | ret = devm_snd_soc_register_component(dev, |
725 | component_driver: &soc_sdca_component_rt1017, |
726 | dai_drv: rt1017_sdca_dai, |
727 | ARRAY_SIZE(rt1017_sdca_dai)); |
728 | |
729 | return ret; |
730 | } |
731 | |
732 | static int rt1017_sdca_sdw_probe(struct sdw_slave *slave, |
733 | const struct sdw_device_id *id) |
734 | { |
735 | struct regmap *regmap; |
736 | |
737 | /* Regmap Initialization */ |
738 | regmap = devm_regmap_init_sdw(slave, &rt1017_sdca_regmap); |
739 | if (IS_ERR(ptr: regmap)) |
740 | return PTR_ERR(ptr: regmap); |
741 | |
742 | return rt1017_sdca_init(dev: &slave->dev, regmap, slave); |
743 | } |
744 | |
745 | static int rt1017_sdca_sdw_remove(struct sdw_slave *slave) |
746 | { |
747 | struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev: &slave->dev); |
748 | |
749 | if (rt1017->first_hw_init) |
750 | pm_runtime_disable(dev: &slave->dev); |
751 | |
752 | return 0; |
753 | } |
754 | |
755 | static const struct sdw_device_id rt1017_sdca_id[] = { |
756 | SDW_SLAVE_ENTRY_EXT(0x025d, 0x1017, 0x3, 0x1, 0), |
757 | {}, |
758 | }; |
759 | MODULE_DEVICE_TABLE(sdw, rt1017_sdca_id); |
760 | |
761 | static int __maybe_unused rt1017_sdca_dev_suspend(struct device *dev) |
762 | { |
763 | struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev); |
764 | |
765 | if (!rt1017->hw_init) |
766 | return 0; |
767 | |
768 | regcache_cache_only(map: rt1017->regmap, enable: true); |
769 | |
770 | return 0; |
771 | } |
772 | |
773 | #define RT1017_PROBE_TIMEOUT 5000 |
774 | |
775 | static int __maybe_unused rt1017_sdca_dev_resume(struct device *dev) |
776 | { |
777 | struct sdw_slave *slave = dev_to_sdw_dev(dev); |
778 | struct rt1017_sdca_priv *rt1017 = dev_get_drvdata(dev); |
779 | unsigned long time; |
780 | |
781 | if (!rt1017->first_hw_init) |
782 | return 0; |
783 | |
784 | if (!slave->unattach_request) |
785 | goto regmap_sync; |
786 | |
787 | time = wait_for_completion_timeout(x: &slave->initialization_complete, |
788 | timeout: msecs_to_jiffies(RT1017_PROBE_TIMEOUT)); |
789 | if (!time) { |
790 | dev_err(&slave->dev, "Initialization not complete, timed out\n" ); |
791 | sdw_show_ping_status(bus: slave->bus, sync_delay: true); |
792 | |
793 | return -ETIMEDOUT; |
794 | } |
795 | |
796 | regmap_sync: |
797 | slave->unattach_request = 0; |
798 | regcache_cache_only(map: rt1017->regmap, enable: false); |
799 | regcache_sync(map: rt1017->regmap); |
800 | |
801 | return 0; |
802 | } |
803 | |
804 | static const struct dev_pm_ops rt1017_sdca_pm = { |
805 | SET_SYSTEM_SLEEP_PM_OPS(rt1017_sdca_dev_suspend, rt1017_sdca_dev_resume) |
806 | SET_RUNTIME_PM_OPS(rt1017_sdca_dev_suspend, rt1017_sdca_dev_resume, NULL) |
807 | }; |
808 | |
809 | static struct sdw_driver rt1017_sdca_sdw_driver = { |
810 | .driver = { |
811 | .name = "rt1017-sdca" , |
812 | .owner = THIS_MODULE, |
813 | .pm = &rt1017_sdca_pm, |
814 | }, |
815 | .probe = rt1017_sdca_sdw_probe, |
816 | .remove = rt1017_sdca_sdw_remove, |
817 | .ops = &rt1017_sdca_slave_ops, |
818 | .id_table = rt1017_sdca_id, |
819 | }; |
820 | module_sdw_driver(rt1017_sdca_sdw_driver); |
821 | |
822 | MODULE_DESCRIPTION("ASoC RT1017 driver SDCA SDW" ); |
823 | MODULE_AUTHOR("Derek Fang <derek.fang@realtek.com>" ); |
824 | MODULE_LICENSE("GPL" ); |
825 | |