1//===--- RISCV.h - Declare RISC-V target feature support --------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares RISC-V TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
14#define LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
15
16#include "clang/Basic/TargetInfo.h"
17#include "clang/Basic/TargetOptions.h"
18#include "llvm/Support/Compiler.h"
19#include "llvm/TargetParser/RISCVISAInfo.h"
20#include "llvm/TargetParser/Triple.h"
21#include <optional>
22
23namespace clang {
24namespace targets {
25
26// RISC-V Target
27class RISCVTargetInfo : public TargetInfo {
28protected:
29 std::string ABI, CPU;
30 std::unique_ptr<llvm::RISCVISAInfo> ISAInfo;
31
32private:
33 bool FastUnalignedAccess;
34 bool HasExperimental = false;
35
36public:
37 RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
38 : TargetInfo(Triple) {
39 BFloat16Width = 16;
40 BFloat16Align = 16;
41 BFloat16Format = &llvm::APFloat::BFloat();
42 LongDoubleWidth = 128;
43 LongDoubleAlign = 128;
44 LongDoubleFormat = &llvm::APFloat::IEEEquad();
45 SuitableAlign = 128;
46 WCharType = SignedInt;
47 WIntType = UnsignedInt;
48 HasRISCVVTypes = true;
49 MCountName = "_mcount";
50 HasFloat16 = true;
51 HasStrictFP = true;
52 }
53
54 bool setCPU(const std::string &Name) override {
55 if (!isValidCPUName(Name))
56 return false;
57 CPU = Name;
58 return true;
59 }
60
61 StringRef getABI() const override { return ABI; }
62 void getTargetDefines(const LangOptions &Opts,
63 MacroBuilder &Builder) const override;
64
65 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
66
67 BuiltinVaListKind getBuiltinVaListKind() const override {
68 return TargetInfo::VoidPtrBuiltinVaList;
69 }
70
71 std::string_view getClobbers() const override { return ""; }
72
73 StringRef getConstraintRegister(StringRef Constraint,
74 StringRef Expression) const override {
75 return Expression;
76 }
77
78 ArrayRef<const char *> getGCCRegNames() const override;
79
80 int getEHDataRegisterNumber(unsigned RegNo) const override {
81 if (RegNo == 0)
82 return 10;
83 else if (RegNo == 1)
84 return 11;
85 else
86 return -1;
87 }
88
89 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
90
91 bool validateAsmConstraint(const char *&Name,
92 TargetInfo::ConstraintInfo &Info) const override;
93
94 std::string convertConstraint(const char *&Constraint) const override;
95
96 bool
97 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
98 StringRef CPU,
99 const std::vector<std::string> &FeaturesVec) const override;
100
101 std::optional<std::pair<unsigned, unsigned>>
102 getVScaleRange(const LangOptions &LangOpts) const override;
103
104 bool hasFeature(StringRef Feature) const override;
105
106 bool handleTargetFeatures(std::vector<std::string> &Features,
107 DiagnosticsEngine &Diags) override;
108
109 bool hasBitIntType() const override { return true; }
110
111 bool hasBFloat16Type() const override { return true; }
112
113 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override;
114
115 bool useFP16ConversionIntrinsics() const override {
116 return false;
117 }
118
119 bool isValidCPUName(StringRef Name) const override;
120 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
121 bool isValidTuneCPUName(StringRef Name) const override;
122 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
123 bool supportsTargetAttributeTune() const override { return true; }
124 ParsedTargetAttr parseTargetAttr(StringRef Str) const override;
125};
126class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
127public:
128 RISCV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
129 : RISCVTargetInfo(Triple, Opts) {
130 IntPtrType = SignedInt;
131 PtrDiffType = SignedInt;
132 SizeType = UnsignedInt;
133 resetDataLayout(DL: "e-m:e-p:32:32-i64:64-n32-S128");
134 }
135
136 bool setABI(const std::string &Name) override {
137 if (Name == "ilp32e") {
138 ABI = Name;
139 resetDataLayout(DL: "e-m:e-p:32:32-i64:64-n32-S32");
140 return true;
141 }
142
143 if (Name == "ilp32" || Name == "ilp32f" || Name == "ilp32d") {
144 ABI = Name;
145 return true;
146 }
147 return false;
148 }
149
150 void setMaxAtomicWidth() override {
151 MaxAtomicPromoteWidth = 128;
152
153 if (ISAInfo->hasExtension(Ext: "a"))
154 MaxAtomicInlineWidth = 32;
155 }
156};
157class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
158public:
159 RISCV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
160 : RISCVTargetInfo(Triple, Opts) {
161 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
162 IntMaxType = Int64Type = SignedLong;
163 resetDataLayout(DL: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
164 }
165
166 bool setABI(const std::string &Name) override {
167 if (Name == "lp64e") {
168 ABI = Name;
169 resetDataLayout(DL: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S64");
170 return true;
171 }
172
173 if (Name == "lp64" || Name == "lp64f" || Name == "lp64d") {
174 ABI = Name;
175 return true;
176 }
177 return false;
178 }
179
180 void setMaxAtomicWidth() override {
181 MaxAtomicPromoteWidth = 128;
182
183 if (ISAInfo->hasExtension(Ext: "a"))
184 MaxAtomicInlineWidth = 64;
185 }
186};
187} // namespace targets
188} // namespace clang
189
190#endif // LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
191

source code of clang/lib/Basic/Targets/RISCV.h