| 1 | //===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This file defines the interfaces that SPIR-V uses to lower LLVM code into a |
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| 10 | // selection DAG. |
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| 11 | // |
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| 12 | //===----------------------------------------------------------------------===// |
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| 13 | |
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| 14 | #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
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| 15 | #define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
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| 16 | |
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| 17 | #include "SPIRVGlobalRegistry.h" |
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| 18 | #include "llvm/CodeGen/TargetLowering.h" |
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| 19 | #include <set> |
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| 20 | |
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| 21 | namespace llvm { |
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| 22 | class SPIRVSubtarget; |
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| 23 | |
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| 24 | class SPIRVTargetLowering : public TargetLowering { |
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| 25 | const SPIRVSubtarget &STI; |
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| 26 | |
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| 27 | // Record of already processed machine functions |
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| 28 | mutable std::set<const MachineFunction *> ProcessedMF; |
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| 29 | |
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| 30 | public: |
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| 31 | explicit SPIRVTargetLowering(const TargetMachine &TM, |
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| 32 | const SPIRVSubtarget &ST) |
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| 33 | : TargetLowering(TM), STI(ST) {} |
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| 34 | |
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| 35 | // Stop IRTranslator breaking up FMA instrs to preserve types information. |
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| 36 | bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, |
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| 37 | EVT) const override { |
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| 38 | return true; |
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| 39 | } |
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| 40 | |
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| 41 | // prevent creation of jump tables |
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| 42 | bool areJTsAllowed(const Function *) const override { return false; } |
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| 43 | |
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| 44 | // This is to prevent sexts of non-i64 vector indices which are generated |
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| 45 | // within general IRTranslator hence type generation for it is omitted. |
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| 46 | MVT getVectorIdxTy(const DataLayout &DL) const override { |
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| 47 | return MVT::getIntegerVT(BitWidth: 32); |
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| 48 | } |
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| 49 | unsigned getNumRegistersForCallingConv(LLVMContext &Context, |
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| 50 | CallingConv::ID CC, |
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| 51 | EVT VT) const override; |
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| 52 | MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, |
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| 53 | EVT VT) const override; |
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| 54 | bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, |
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| 55 | MachineFunction &MF, |
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| 56 | unsigned Intrinsic) const override; |
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| 57 | |
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| 58 | // Call the default implementation and finalize target lowering by inserting |
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| 59 | // extra instructions required to preserve validity of SPIR-V code imposed by |
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| 60 | // the standard. |
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| 61 | void finalizeLowering(MachineFunction &MF) const override; |
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| 62 | }; |
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| 63 | } // namespace llvm |
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| 64 | |
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| 65 | #endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
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| 66 | |
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