1	/* Copyright (C) 1988-2024 Free Software Foundation, Inc.
2
3	This file is part of GCC.
4
5	GCC is free software; you can redistribute it and/or modify
6	it under the terms of the GNU General Public License as published by
7	the Free Software Foundation; either version 3, or (at your option)
8	any later version.
9
10	GCC is distributed in the hope that it will be useful,
11	but WITHOUT ANY WARRANTY; without even the implied warranty of
12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13	GNU General Public License for more details.
14
15	You should have received a copy of the GNU General Public License
16	along with GCC; see the file COPYING3. If not see
17	<http://www.gnu.org/licenses/>. */
18
19	#define IN_TARGET_CODE 1
20
21	#include "config.h"
22	#include "system.h"
23	#include "coretypes.h"
24	#include "backend.h"
25	#include "rtl.h"
26	#include "tree.h"
27	#include "memmodel.h"
28	#include "gimple.h"
29	#include "cfghooks.h"
30	#include "cfgloop.h"
31	#include "df.h"
32	#include "tm_p.h"
33	#include "stringpool.h"
34	#include "expmed.h"
35	#include "optabs.h"
36	#include "regs.h"
37	#include "emit-rtl.h"
38	#include "recog.h"
39	#include "cgraph.h"
40	#include "diagnostic.h"
41	#include "cfgbuild.h"
42	#include "alias.h"
43	#include "fold-const.h"
44	#include "attribs.h"
45	#include "calls.h"
46	#include "stor-layout.h"
47	#include "varasm.h"
48	#include "output.h"
49	#include "insn-attr.h"
50	#include "flags.h"
51	#include "except.h"
52	#include "explow.h"
53	#include "expr.h"
54	#include "cfgrtl.h"
55	#include "common/common-target.h"
56	#include "langhooks.h"
57	#include "reload.h"
58	#include "gimplify.h"
59	#include "dwarf2.h"
60	#include "tm-constrs.h"
61	#include "cselib.h"
62	#include "sched-int.h"
63	#include "opts.h"
64	#include "tree-pass.h"
65	#include "context.h"
66	#include "pass_manager.h"
67	#include "target-globals.h"
68	#include "gimple-iterator.h"
69	#include "shrink-wrap.h"
70	#include "builtins.h"
71	#include "rtl-iter.h"
72	#include "tree-iterator.h"
73	#include "dbgcnt.h"
74	#include "case-cfn-macros.h"
75	#include "dojump.h"
76	#include "fold-const-call.h"
77	#include "tree-vrp.h"
78	#include "tree-ssanames.h"
79	#include "selftest.h"
80	#include "selftest-rtl.h"
81	#include "print-rtl.h"
82	#include "intl.h"
83	#include "ifcvt.h"
84	#include "symbol-summary.h"
85	#include "sreal.h"
86	#include "ipa-cp.h"
87	#include "ipa-prop.h"
88	#include "ipa-fnsummary.h"
89	#include "wide-int-bitmask.h"
90	#include "tree-vector-builder.h"
91	#include "debug.h"
92	#include "dwarf2out.h"
93	#include "i386-builtins.h"
94	#include "common/config/i386/i386-isas.h"
95
96	#undef BDESC
97	#undef BDESC_FIRST
98	#undef BDESC_END
99
100	/* Macros for verification of enum ix86_builtins order. */
101	#define BDESC_VERIFY(x, y, z) \
102	gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z)))
103	#define BDESC_VERIFYS(x, y, z) \
104	STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z)))
105
106	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
107	IX86_BUILTIN__BDESC_COMI_LAST, 1);
108	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
109	IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1);
110	BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
111	IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1);
112	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
113	IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1);
114	BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST,
115	IX86_BUILTIN__BDESC_PURE_ARGS_LAST, 1);
116	BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
117	IX86_BUILTIN__BDESC_ARGS_LAST, 1);
118	BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
119	IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1);
120	BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST,
121	IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1);
122	BDESC_VERIFYS (IX86_BUILTIN_MAX,
123	IX86_BUILTIN__BDESC_CET_LAST, 1);
124
125
126	/* Table for the ix86 builtin non-function types. */
127	static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1];
128
129	tree ix86_float16_type_node = NULL_TREE;
130	tree ix86_bf16_type_node = NULL_TREE;
131
132	/* Retrieve an element from the above table, building some of
133	the types lazily. */
134
135	static tree
136	ix86_get_builtin_type (enum ix86_builtin_type tcode)
137	{
138	unsigned int index;
139	tree type, itype;
140
141	gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab));
142
143	type = ix86_builtin_type_tab[(int) tcode];
144	if (type != NULL)
145	return type;
146
147	gcc_assert (tcode > IX86_BT_LAST_PRIM);
148	if (tcode <= IX86_BT_LAST_VECT)
149	{
150	machine_mode mode;
151
152	index = tcode - IX86_BT_LAST_PRIM - 1;
153	itype = ix86_get_builtin_type (tcode: ix86_builtin_type_vect_base[index]);
154	mode = ix86_builtin_type_vect_mode[index];
155
156	type = build_vector_type_for_mode (itype, mode);
157	}
158	else
159	{
160	int quals;
161
162	index = tcode - IX86_BT_LAST_VECT - 1;
163	if (tcode <= IX86_BT_LAST_PTR)
164	quals = TYPE_UNQUALIFIED;
165	else
166	quals = TYPE_QUAL_CONST;
167
168	itype = ix86_get_builtin_type (tcode: ix86_builtin_type_ptr_base[index]);
169	if (quals != TYPE_UNQUALIFIED)
170	itype = build_qualified_type (itype, quals);
171
172	type = build_pointer_type (itype);
173	}
174
175	ix86_builtin_type_tab[(int) tcode] = type;
176	return type;
177	}
178
179	/* Table for the ix86 builtin function types. */
180	static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1];
181
182	/* Retrieve an element from the above table, building some of
183	the types lazily. */
184
185	static tree
186	ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode)
187	{
188	tree type;
189
190	gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab));
191
192	type = ix86_builtin_func_type_tab[(int) tcode];
193	if (type != NULL)
194	return type;
195
196	if (tcode <= IX86_BT_LAST_FUNC)
197	{
198	unsigned start = ix86_builtin_func_start[(int) tcode];
199	unsigned after = ix86_builtin_func_start[(int) tcode + 1];
200	tree rtype, atype, args = void_list_node;
201	unsigned i;
202
203	rtype = ix86_get_builtin_type (tcode: ix86_builtin_func_args[start]);
204	for (i = after - 1; i > start; --i)
205	{
206	atype = ix86_get_builtin_type (tcode: ix86_builtin_func_args[i]);
207	args = tree_cons (NULL, atype, args);
208	}
209
210	type = build_function_type (rtype, args);
211	}
212	else
213	{
214	unsigned index = tcode - IX86_BT_LAST_FUNC - 1;
215	enum ix86_builtin_func_type icode;
216
217	icode = ix86_builtin_func_alias_base[index];
218	type = ix86_get_builtin_func_type (tcode: icode);
219	}
220
221	ix86_builtin_func_type_tab[(int) tcode] = type;
222	return type;
223	}
224
225	/* Table for the ix86 builtin decls. */
226	static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX + 1];
227
228	struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX];
229
230	tree get_ix86_builtin (enum ix86_builtins c)
231	{
232	return ix86_builtins[c];
233	}
234
235	/* Bits that can still enable any inclusion of a builtin. */
236	HOST_WIDE_INT deferred_isa_values = 0;
237	HOST_WIDE_INT deferred_isa_values2 = 0;
238
239	/* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the
240	MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the
241	ix86_builtins_isa array. Stores the function decl in the ix86_builtins
242	array. Returns the function decl or NULL_TREE, if the builtin was not
243	added.
244
245	If the front end has a special hook for builtin functions, delay adding
246	builtin functions that aren't in the current ISA until the ISA is changed
247	with function specific optimization. Doing so, can save about 300K for the
248	default compiler. When the builtin is expanded, check at that time whether
249	it is valid.
250
251	If the front end doesn't have a special hook, record all builtins, even if
252	it isn't an instruction set in the current ISA in case the user uses
253	function specific options for a different ISA, so that we don't get scope
254	errors if a builtin is added in the middle of a function scope. */
255
256	static inline tree
257	def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2,
258	const char *name,
259	enum ix86_builtin_func_type tcode,
260	enum ix86_builtins code)
261	{
262	tree decl = NULL_TREE;
263
264	/* An instruction may be 64bit only regardless of ISAs. */
265	if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT)
266	{
267	ix86_builtins_isa[(int) code].isa = mask;
268	ix86_builtins_isa[(int) code].isa2 = mask2;
269
270	mask &= ~OPTION_MASK_ISA_64BIT;
271
272	/* Filter out the masks most often ored together with others. */
273	if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)
274	&& mask != OPTION_MASK_ISA_AVX512VL)
275	mask &= ~OPTION_MASK_ISA_AVX512VL;
276	if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW)
277	&& mask != OPTION_MASK_ISA_AVX512BW)
278	mask &= ~OPTION_MASK_ISA_AVX512BW;
279
280	if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0)
281	&& (mask == 0 || (mask & ix86_isa_flags) != 0))
282	|| ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
283	/* "Unified" builtin used by either AVXVNNI/AVXIFMA/AES intrinsics
284	or AVX512VNNIVL/AVX512IFMAVL/VAESVL non-mask intrinsics should be
285	defined whenever avxvnni/avxifma/aes or avx512vnni/avx512ifma/vaes
286	&& avx512vl exist. */
287	|| (mask2 == OPTION_MASK_ISA2_AVXVNNI)
288	|| (mask2 == OPTION_MASK_ISA2_AVXIFMA)
289	|| (mask2 == (OPTION_MASK_ISA2_AVXNECONVERT
290	| OPTION_MASK_ISA2_AVX512BF16))
291	|| ((mask2 & OPTION_MASK_ISA2_VAES) != 0)
292	|| (lang_hooks.builtin_function
293	== lang_hooks.builtin_function_ext_scope))
294	{
295	tree type = ix86_get_builtin_func_type (tcode);
296	decl = add_builtin_function (name, type, function_code: code, cl: BUILT_IN_MD,
297	NULL, NULL_TREE);
298	ix86_builtins[(int) code] = decl;
299	ix86_builtins_isa[(int) code].set_and_not_built_p = false;
300	if (!flag_non_call_exceptions)
301	TREE_NOTHROW (decl) = 1;
302	if (ix86_builtins[(int) IX86_BUILTIN_MAX] == NULL_TREE)
303	ix86_builtins[(int) IX86_BUILTIN_MAX]
304	= build_tree_list (get_identifier ("leaf"), NULL_TREE);
305	DECL_ATTRIBUTES (decl) = ix86_builtins[(int) IX86_BUILTIN_MAX];
306	}
307	else
308	{
309	/* Just MASK and MASK2 where set_and_not_built_p == true can potentially
310	include a builtin. */
311	deferred_isa_values |= mask;
312	deferred_isa_values2 |= mask2;
313	ix86_builtins[(int) code] = NULL_TREE;
314	ix86_builtins_isa[(int) code].tcode = tcode;
315	ix86_builtins_isa[(int) code].name = name;
316	ix86_builtins_isa[(int) code].const_p = false;
317	ix86_builtins_isa[(int) code].pure_p = false;
318	ix86_builtins_isa[(int) code].set_and_not_built_p = true;
319	}
320	}
321
322	return decl;
323	}
324
325	/* Like def_builtin, but also marks the function decl "const". */
326
327	static inline tree
328	def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
329	enum ix86_builtin_func_type tcode, enum ix86_builtins code)
330	{
331	tree decl = def_builtin (mask, mask2, name, tcode, code);
332	if (decl)
333	TREE_READONLY (decl) = 1;
334	else
335	ix86_builtins_isa[(int) code].const_p = true;
336
337	return decl;
338	}
339
340	/* Like def_builtin, but also marks the function decl "pure". */
341
342	static inline tree
343	def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name,
344	enum ix86_builtin_func_type tcode, enum ix86_builtins code)
345	{
346	tree decl = def_builtin (mask, mask2, name, tcode, code);
347	if (decl)
348	DECL_PURE_P (decl) = 1;
349	else
350	ix86_builtins_isa[(int) code].pure_p = true;
351
352	return decl;
353	}
354
355	/* Add any new builtin functions for a given ISA that may not have been
356	declared. This saves a bit of space compared to adding all of the
357	declarations to the tree, even if we didn't use them. */
358
359	void
360	ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2)
361	{
362	isa &= ~OPTION_MASK_ISA_64BIT;
363
364	if ((isa & deferred_isa_values) == 0
365	&& (isa2 & deferred_isa_values2) == 0
366	&& ((deferred_isa_values & OPTION_MASK_ISA_MMX) == 0
367	|| !(TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)))
368	return;
369
370	/* Bits in ISA value can be removed from potential isa values. */
371	deferred_isa_values &= ~isa;
372	deferred_isa_values2 &= ~isa2;
373	if (TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0)
374	deferred_isa_values &= ~OPTION_MASK_ISA_MMX;
375
376	int i;
377	tree saved_current_target_pragma = current_target_pragma;
378	current_target_pragma = NULL_TREE;
379
380	for (i = 0; i < (int)IX86_BUILTIN_MAX; i++)
381	{
382	if (((ix86_builtins_isa[i].isa & isa) != 0
383	|| (ix86_builtins_isa[i].isa2 & isa2) != 0
384	|| ((ix86_builtins_isa[i].isa & OPTION_MASK_ISA_MMX) != 0
385	&& TARGET_64BIT
386	&& (isa & OPTION_MASK_ISA_SSE2) != 0))
387	&& ix86_builtins_isa[i].set_and_not_built_p)
388	{
389	tree decl, type;
390
391	/* Don't define the builtin again. */
392	ix86_builtins_isa[i].set_and_not_built_p = false;
393
394	type = ix86_get_builtin_func_type (tcode: ix86_builtins_isa[i].tcode);
395	decl = add_builtin_function_ext_scope (name: ix86_builtins_isa[i].name,
396	type, function_code: i, cl: BUILT_IN_MD, NULL,
397	NULL_TREE);
398
399	ix86_builtins[i] = decl;
400	if (ix86_builtins_isa[i].const_p)
401	TREE_READONLY (decl) = 1;
402	if (ix86_builtins_isa[i].pure_p)
403	DECL_PURE_P (decl) = 1;
404	if (!flag_non_call_exceptions)
405	TREE_NOTHROW (decl) = 1;
406	if (ix86_builtins[(int) IX86_BUILTIN_MAX] == NULL_TREE)
407	ix86_builtins[(int) IX86_BUILTIN_MAX]
408	= build_tree_list (get_identifier ("leaf"), NULL_TREE);
409	DECL_ATTRIBUTES (decl) = ix86_builtins[(int) IX86_BUILTIN_MAX];
410	}
411	}
412
413	current_target_pragma = saved_current_target_pragma;
414	}
415
416	/* TM vector builtins. */
417
418	/* Reuse the existing x86-specific `struct builtin_description' cause
419	we're lazy. Add casts to make them fit. */
420	static const struct builtin_description bdesc_tm[] =
421	{
422	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
423	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
424	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM64", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV2SI_V2SI },
425	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
426	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
427	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
428	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, .comparison: UNKNOWN, .flag: V2SI_FTYPE_PCV2SI },
429
430	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
431	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
432	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM128", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV4SF_V4SF },
433	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
434	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
435	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
436	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, .comparison: UNKNOWN, .flag: V4SF_FTYPE_PCV4SF },
437
438	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
439	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaRM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
440	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_WaWM256", .code: (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PV8SF_V8SF },
441	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
442	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaRM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
443	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RaWM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
444	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_RfWM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, .comparison: UNKNOWN, .flag: V8SF_FTYPE_PCV8SF },
445
446	{ OPTION_MASK_ISA_MMX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM64", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M64, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
447	{ OPTION_MASK_ISA_SSE, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM128", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M128, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
448	{ OPTION_MASK_ISA_AVX, .mask2: 0, .icode: CODE_FOR_nothing, .name: "__builtin__ITM_LM256", .code: (enum ix86_builtins) BUILT_IN_TM_LOG_M256, .comparison: UNKNOWN, .flag: VOID_FTYPE_PCVOID },
449	};
450
451	/* Initialize the transactional memory vector load/store builtins. */
452
453	static void
454	ix86_init_tm_builtins (void)
455	{
456	enum ix86_builtin_func_type ftype;
457	const struct builtin_description *d;
458	size_t i;
459	tree decl;
460	tree attrs_load, attrs_type_load, attrs_store, attrs_type_store;
461	tree attrs_log, attrs_type_log;
462
463	if (!flag_tm)
464	return;
465
466	/* If there are no builtins defined, we must be compiling in a
467	language without trans-mem support. */
468	if (!builtin_decl_explicit_p (fncode: BUILT_IN_TM_LOAD_1))
469	return;
470
471	/* Use whatever attributes a normal TM load has. */
472	decl = builtin_decl_explicit (fncode: BUILT_IN_TM_LOAD_1);
473	attrs_load = DECL_ATTRIBUTES (decl);
474	attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl));
475	/* Use whatever attributes a normal TM store has. */
476	decl = builtin_decl_explicit (fncode: BUILT_IN_TM_STORE_1);
477	attrs_store = DECL_ATTRIBUTES (decl);
478	attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl));
479	/* Use whatever attributes a normal TM log has. */
480	decl = builtin_decl_explicit (fncode: BUILT_IN_TM_LOG);
481	attrs_log = DECL_ATTRIBUTES (decl);
482	attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl));
483
484	for (i = 0, d = bdesc_tm;
485	i < ARRAY_SIZE (bdesc_tm);
486	i++, d++)
487	{
488	if ((d->mask & ix86_isa_flags) != 0
489	|| ((d->mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE)
490	|| (lang_hooks.builtin_function
491	== lang_hooks.builtin_function_ext_scope))
492	{
493	tree type, attrs, attrs_type;
494	enum built_in_function code = (enum built_in_function) d->code;
495
496	ftype = (enum ix86_builtin_func_type) d->flag;
497	type = ix86_get_builtin_func_type (tcode: ftype);
498
499	if (BUILTIN_TM_LOAD_P (code))
500	{
501	attrs = attrs_load;
502	attrs_type = attrs_type_load;
503	}
504	else if (BUILTIN_TM_STORE_P (code))
505	{
506	attrs = attrs_store;
507	attrs_type = attrs_type_store;
508	}
509	else
510	{
511	attrs = attrs_log;
512	attrs_type = attrs_type_log;
513	}
514	decl = add_builtin_function (name: d->name, type, function_code: code, cl: BUILT_IN_NORMAL,
515	/* The builtin without the prefix for
516	calling it directly. */
517	library_name: d->name + strlen (s: "__builtin_"),
518	attrs);
519	/* add_builtin_function() will set the DECL_ATTRIBUTES, now
520	set the TYPE_ATTRIBUTES. */
521	decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN);
522
523	set_builtin_decl (fncode: code, decl, implicit_p: false);
524	}
525	}
526	}
527
528	/* Set up all the MMX/SSE builtins, even builtins for instructions that are not
529	in the current target ISA to allow the user to compile particular modules
530	with different target specific options that differ from the command line
531	options. */
532	static void
533	ix86_init_mmx_sse_builtins (void)
534	{
535	const struct builtin_description * d;
536	enum ix86_builtin_func_type ftype;
537	size_t i;
538
539	/* Add all special builtins with variable number of operands. */
540	for (i = 0, d = bdesc_special_args;
541	i < ARRAY_SIZE (bdesc_special_args);
542	i++, d++)
543	{
544	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i);
545	if (d->name == 0)
546	continue;
547
548	ftype = (enum ix86_builtin_func_type) d->flag;
549	def_builtin (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
550	}
551	BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST,
552	IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST,
553	ARRAY_SIZE (bdesc_special_args) - 1);
554
555	/* Add all pure builtins with variable number of operands. */
556	for (i = 0, d = bdesc_pure_args;
557	i < ARRAY_SIZE (bdesc_pure_args);
558	i++, d++)
559	{
560	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PURE_ARGS_FIRST, i);
561	if (d->name == 0)
562	continue;
563
564	ftype = (enum ix86_builtin_func_type) d->flag;
565	def_builtin_pure (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
566	}
567	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PURE_ARGS_LAST,
568	IX86_BUILTIN__BDESC_PURE_ARGS_FIRST,
569	ARRAY_SIZE (bdesc_pure_args) - 1);
570
571	/* Add all const builtins with variable number of operands. */
572	for (i = 0, d = bdesc_args;
573	i < ARRAY_SIZE (bdesc_args);
574	i++, d++)
575	{
576	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i);
577	if (d->name == 0)
578	continue;
579
580	ftype = (enum ix86_builtin_func_type) d->flag;
581	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
582	}
583	BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST,
584	IX86_BUILTIN__BDESC_ARGS_FIRST,
585	ARRAY_SIZE (bdesc_args) - 1);
586
587	/* Add all builtins with rounding. */
588	for (i = 0, d = bdesc_round_args;
589	i < ARRAY_SIZE (bdesc_round_args);
590	i++, d++)
591	{
592	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i);
593	if (d->name == 0)
594	continue;
595
596	ftype = (enum ix86_builtin_func_type) d->flag;
597	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
598	}
599	BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST,
600	IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST,
601	ARRAY_SIZE (bdesc_round_args) - 1);
602
603	/* pcmpestr[im] insns. */
604	for (i = 0, d = bdesc_pcmpestr;
605	i < ARRAY_SIZE (bdesc_pcmpestr);
606	i++, d++)
607	{
608	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i);
609	if (d->code == IX86_BUILTIN_PCMPESTRM128)
610	ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT;
611	else
612	ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT;
613	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
614	}
615	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST,
616	IX86_BUILTIN__BDESC_PCMPESTR_FIRST,
617	ARRAY_SIZE (bdesc_pcmpestr) - 1);
618
619	/* pcmpistr[im] insns. */
620	for (i = 0, d = bdesc_pcmpistr;
621	i < ARRAY_SIZE (bdesc_pcmpistr);
622	i++, d++)
623	{
624	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i);
625	if (d->code == IX86_BUILTIN_PCMPISTRM128)
626	ftype = V16QI_FTYPE_V16QI_V16QI_INT;
627	else
628	ftype = INT_FTYPE_V16QI_V16QI_INT;
629	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
630	}
631	BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST,
632	IX86_BUILTIN__BDESC_PCMPISTR_FIRST,
633	ARRAY_SIZE (bdesc_pcmpistr) - 1);
634
635	/* comi/ucomi insns. */
636	for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++)
637	{
638	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i);
639	if (d->mask == OPTION_MASK_ISA_SSE2)
640	ftype = INT_FTYPE_V2DF_V2DF;
641	else
642	ftype = INT_FTYPE_V4SF_V4SF;
643	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
644	}
645	BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST,
646	IX86_BUILTIN__BDESC_COMI_FIRST,
647	ARRAY_SIZE (bdesc_comi) - 1);
648
649	/* SSE */
650	def_builtin (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_ldmxcsr",
651	tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_LDMXCSR);
652	def_builtin_pure (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_stmxcsr",
653	tcode: UNSIGNED_FTYPE_VOID, code: IX86_BUILTIN_STMXCSR);
654
655	/* SSE or 3DNow!A */
656	def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
657	/* As it uses V4HImode, we have to require -mmmx too. */
658	| OPTION_MASK_ISA_MMX, mask2: 0,
659	name: "__builtin_ia32_maskmovq", tcode: VOID_FTYPE_V8QI_V8QI_PCHAR,
660	code: IX86_BUILTIN_MASKMOVQ);
661
662	/* SSE2 */
663	def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_maskmovdqu",
664	tcode: VOID_FTYPE_V16QI_V16QI_PCHAR, code: IX86_BUILTIN_MASKMOVDQU);
665
666	def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_clflush",
667	tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLFLUSH);
668	x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_mfence",
669	tcode: VOID_FTYPE_VOID, code: IX86_BUILTIN_MFENCE);
670
671	/* SSE3. */
672	def_builtin (mask: 0, OPTION_MASK_ISA2_MWAIT, name: "__builtin_ia32_monitor",
673	tcode: VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MONITOR);
674	def_builtin (mask: 0, OPTION_MASK_ISA2_MWAIT, name: "__builtin_ia32_mwait",
675	tcode: VOID_FTYPE_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MWAIT);
676
677	/* AES */
678	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
679	| OPTION_MASK_ISA_AVX512VL,
680	OPTION_MASK_ISA2_VAES,
681	name: "__builtin_ia32_aesenc128",
682	tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESENC128);
683	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
684	| OPTION_MASK_ISA_AVX512VL,
685	OPTION_MASK_ISA2_VAES,
686	name: "__builtin_ia32_aesenclast128",
687	tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESENCLAST128);
688	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
689	| OPTION_MASK_ISA_AVX512VL,
690	OPTION_MASK_ISA2_VAES,
691	name: "__builtin_ia32_aesdec128",
692	tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESDEC128);
693	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2
694	| OPTION_MASK_ISA_AVX512VL,
695	OPTION_MASK_ISA2_VAES,
696	name: "__builtin_ia32_aesdeclast128",
697	tcode: V2DI_FTYPE_V2DI_V2DI, code: IX86_BUILTIN_AESDECLAST128);
698	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, mask2: 0,
699	name: "__builtin_ia32_aesimc128",
700	tcode: V2DI_FTYPE_V2DI, code: IX86_BUILTIN_AESIMC128);
701	def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, mask2: 0,
702	name: "__builtin_ia32_aeskeygenassist128",
703	tcode: V2DI_FTYPE_V2DI_INT, code: IX86_BUILTIN_AESKEYGENASSIST128);
704
705	/* PCLMUL */
706	def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, mask2: 0,
707	name: "__builtin_ia32_pclmulqdq128",
708	tcode: V2DI_FTYPE_V2DI_V2DI_INT, code: IX86_BUILTIN_PCLMULQDQ128);
709
710	/* RDRND */
711	def_builtin (OPTION_MASK_ISA_RDRND, mask2: 0, name: "__builtin_ia32_rdrand16_step",
712	tcode: INT_FTYPE_PUSHORT, code: IX86_BUILTIN_RDRAND16_STEP);
713	def_builtin (OPTION_MASK_ISA_RDRND, mask2: 0, name: "__builtin_ia32_rdrand32_step",
714	tcode: INT_FTYPE_PUNSIGNED, code: IX86_BUILTIN_RDRAND32_STEP);
715	def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, mask2: 0,
716	name: "__builtin_ia32_rdrand64_step", tcode: INT_FTYPE_PULONGLONG,
717	code: IX86_BUILTIN_RDRAND64_STEP);
718
719	/* AVX2 */
720	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv2df",
721	tcode: V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
722	code: IX86_BUILTIN_GATHERSIV2DF);
723
724	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4df",
725	tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
726	code: IX86_BUILTIN_GATHERSIV4DF);
727
728	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv2df",
729	tcode: V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
730	code: IX86_BUILTIN_GATHERDIV2DF);
731
732	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4df",
733	tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
734	code: IX86_BUILTIN_GATHERDIV4DF);
735
736	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4sf",
737	tcode: V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
738	code: IX86_BUILTIN_GATHERSIV4SF);
739
740	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv8sf",
741	tcode: V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
742	code: IX86_BUILTIN_GATHERSIV8SF);
743
744	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4sf",
745	tcode: V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
746	code: IX86_BUILTIN_GATHERDIV4SF);
747
748	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4sf256",
749	tcode: V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
750	code: IX86_BUILTIN_GATHERDIV8SF);
751
752	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv2di",
753	tcode: V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
754	code: IX86_BUILTIN_GATHERSIV2DI);
755
756	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4di",
757	tcode: V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
758	code: IX86_BUILTIN_GATHERSIV4DI);
759
760	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv2di",
761	tcode: V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
762	code: IX86_BUILTIN_GATHERDIV2DI);
763
764	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4di",
765	tcode: V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
766	code: IX86_BUILTIN_GATHERDIV4DI);
767
768	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv4si",
769	tcode: V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
770	code: IX86_BUILTIN_GATHERSIV4SI);
771
772	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gathersiv8si",
773	tcode: V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
774	code: IX86_BUILTIN_GATHERSIV8SI);
775
776	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4si",
777	tcode: V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
778	code: IX86_BUILTIN_GATHERDIV4SI);
779
780	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatherdiv4si256",
781	tcode: V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
782	code: IX86_BUILTIN_GATHERDIV8SI);
783
784	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltsiv4df ",
785	tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT,
786	code: IX86_BUILTIN_GATHERALTSIV4DF);
787
788	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltdiv8sf ",
789	tcode: V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT,
790	code: IX86_BUILTIN_GATHERALTDIV8SF);
791
792	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltsiv4di ",
793	tcode: V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT,
794	code: IX86_BUILTIN_GATHERALTSIV4DI);
795
796	def_builtin_pure (OPTION_MASK_ISA_AVX2, mask2: 0, name: "__builtin_ia32_gatheraltdiv8si ",
797	tcode: V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT,
798	code: IX86_BUILTIN_GATHERALTDIV8SI);
799
800	/* AVX512F */
801	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
802	name: "__builtin_ia32_gathersiv16sf",
803	tcode: V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT,
804	code: IX86_BUILTIN_GATHER3SIV16SF);
805
806	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
807	name: "__builtin_ia32_gathersiv8df",
808	tcode: V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT,
809	code: IX86_BUILTIN_GATHER3SIV8DF);
810
811	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
812	name: "__builtin_ia32_gatherdiv16sf",
813	tcode: V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT,
814	code: IX86_BUILTIN_GATHER3DIV16SF);
815
816	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
817	name: "__builtin_ia32_gatherdiv8df",
818	tcode: V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT,
819	code: IX86_BUILTIN_GATHER3DIV8DF);
820
821	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
822	name: "__builtin_ia32_gathersiv16si",
823	tcode: V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT,
824	code: IX86_BUILTIN_GATHER3SIV16SI);
825
826	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
827	name: "__builtin_ia32_gathersiv8di",
828	tcode: V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT,
829	code: IX86_BUILTIN_GATHER3SIV8DI);
830
831	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
832	name: "__builtin_ia32_gatherdiv16si",
833	tcode: V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT,
834	code: IX86_BUILTIN_GATHER3DIV16SI);
835
836	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
837	name: "__builtin_ia32_gatherdiv8di",
838	tcode: V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT,
839	code: IX86_BUILTIN_GATHER3DIV8DI);
840
841	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
842	name: "__builtin_ia32_gather3altsiv8df ",
843	tcode: V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
844	code: IX86_BUILTIN_GATHER3ALTSIV8DF);
845
846	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
847	name: "__builtin_ia32_gather3altdiv16sf ",
848	tcode: V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
849	code: IX86_BUILTIN_GATHER3ALTDIV16SF);
850
851	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
852	name: "__builtin_ia32_gather3altsiv8di ",
853	tcode: V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
854	code: IX86_BUILTIN_GATHER3ALTSIV8DI);
855
856	def_builtin_pure (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
857	name: "__builtin_ia32_gather3altdiv16si ",
858	tcode: V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
859	code: IX86_BUILTIN_GATHER3ALTDIV16SI);
860
861	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
862	name: "__builtin_ia32_scattersiv16sf",
863	tcode: VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT,
864	code: IX86_BUILTIN_SCATTERSIV16SF);
865
866	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
867	name: "__builtin_ia32_scattersiv8df",
868	tcode: VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT,
869	code: IX86_BUILTIN_SCATTERSIV8DF);
870
871	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
872	name: "__builtin_ia32_scatterdiv16sf",
873	tcode: VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT,
874	code: IX86_BUILTIN_SCATTERDIV16SF);
875
876	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
877	name: "__builtin_ia32_scatterdiv8df",
878	tcode: VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT,
879	code: IX86_BUILTIN_SCATTERDIV8DF);
880
881	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
882	name: "__builtin_ia32_scattersiv16si",
883	tcode: VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT,
884	code: IX86_BUILTIN_SCATTERSIV16SI);
885
886	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
887	name: "__builtin_ia32_scattersiv8di",
888	tcode: VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT,
889	code: IX86_BUILTIN_SCATTERSIV8DI);
890
891	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
892	name: "__builtin_ia32_scatterdiv16si",
893	tcode: VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT,
894	code: IX86_BUILTIN_SCATTERDIV16SI);
895
896	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
897	name: "__builtin_ia32_scatterdiv8di",
898	tcode: VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT,
899	code: IX86_BUILTIN_SCATTERDIV8DI);
900
901	/* AVX512VL */
902	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv2df",
903	tcode: V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT,
904	code: IX86_BUILTIN_GATHER3SIV2DF);
905
906	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4df",
907	tcode: V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT,
908	code: IX86_BUILTIN_GATHER3SIV4DF);
909
910	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div2df",
911	tcode: V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT,
912	code: IX86_BUILTIN_GATHER3DIV2DF);
913
914	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4df",
915	tcode: V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT,
916	code: IX86_BUILTIN_GATHER3DIV4DF);
917
918	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4sf",
919	tcode: V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT,
920	code: IX86_BUILTIN_GATHER3SIV4SF);
921
922	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv8sf",
923	tcode: V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT,
924	code: IX86_BUILTIN_GATHER3SIV8SF);
925
926	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4sf",
927	tcode: V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT,
928	code: IX86_BUILTIN_GATHER3DIV4SF);
929
930	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div8sf",
931	tcode: V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT,
932	code: IX86_BUILTIN_GATHER3DIV8SF);
933
934	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv2di",
935	tcode: V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT,
936	code: IX86_BUILTIN_GATHER3SIV2DI);
937
938	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4di",
939	tcode: V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT,
940	code: IX86_BUILTIN_GATHER3SIV4DI);
941
942	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div2di",
943	tcode: V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT,
944	code: IX86_BUILTIN_GATHER3DIV2DI);
945
946	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4di",
947	tcode: V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT,
948	code: IX86_BUILTIN_GATHER3DIV4DI);
949
950	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv4si",
951	tcode: V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT,
952	code: IX86_BUILTIN_GATHER3SIV4SI);
953
954	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3siv8si",
955	tcode: V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT,
956	code: IX86_BUILTIN_GATHER3SIV8SI);
957
958	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div4si",
959	tcode: V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT,
960	code: IX86_BUILTIN_GATHER3DIV4SI);
961
962	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3div8si",
963	tcode: V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT,
964	code: IX86_BUILTIN_GATHER3DIV8SI);
965
966	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altsiv4df ",
967	tcode: V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT,
968	code: IX86_BUILTIN_GATHER3ALTSIV4DF);
969
970	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altdiv8sf ",
971	tcode: V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT,
972	code: IX86_BUILTIN_GATHER3ALTDIV8SF);
973
974	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altsiv4di ",
975	tcode: V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT,
976	code: IX86_BUILTIN_GATHER3ALTSIV4DI);
977
978	def_builtin_pure (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_gather3altdiv8si ",
979	tcode: V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT,
980	code: IX86_BUILTIN_GATHER3ALTDIV8SI);
981
982	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv8sf",
983	tcode: VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT,
984	code: IX86_BUILTIN_SCATTERSIV8SF);
985
986	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4sf",
987	tcode: VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT,
988	code: IX86_BUILTIN_SCATTERSIV4SF);
989
990	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4df",
991	tcode: VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT,
992	code: IX86_BUILTIN_SCATTERSIV4DF);
993
994	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv2df",
995	tcode: VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT,
996	code: IX86_BUILTIN_SCATTERSIV2DF);
997
998	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv8sf",
999	tcode: VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT,
1000	code: IX86_BUILTIN_SCATTERDIV8SF);
1001
1002	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4sf",
1003	tcode: VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT,
1004	code: IX86_BUILTIN_SCATTERDIV4SF);
1005
1006	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4df",
1007	tcode: VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT,
1008	code: IX86_BUILTIN_SCATTERDIV4DF);
1009
1010	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv2df",
1011	tcode: VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT,
1012	code: IX86_BUILTIN_SCATTERDIV2DF);
1013
1014	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv8si",
1015	tcode: VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT,
1016	code: IX86_BUILTIN_SCATTERSIV8SI);
1017
1018	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4si",
1019	tcode: VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT,
1020	code: IX86_BUILTIN_SCATTERSIV4SI);
1021
1022	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv4di",
1023	tcode: VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT,
1024	code: IX86_BUILTIN_SCATTERSIV4DI);
1025
1026	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scattersiv2di",
1027	tcode: VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT,
1028	code: IX86_BUILTIN_SCATTERSIV2DI);
1029
1030	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv8si",
1031	tcode: VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT,
1032	code: IX86_BUILTIN_SCATTERDIV8SI);
1033
1034	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4si",
1035	tcode: VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT,
1036	code: IX86_BUILTIN_SCATTERDIV4SI);
1037
1038	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv4di",
1039	tcode: VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT,
1040	code: IX86_BUILTIN_SCATTERDIV4DI);
1041
1042	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatterdiv2di",
1043	tcode: VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT,
1044	code: IX86_BUILTIN_SCATTERDIV2DI);
1045
1046	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1047	name: "__builtin_ia32_scatteraltsiv8df ",
1048	tcode: VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT,
1049	code: IX86_BUILTIN_SCATTERALTSIV8DF);
1050
1051	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1052	name: "__builtin_ia32_scatteraltdiv16sf ",
1053	tcode: VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT,
1054	code: IX86_BUILTIN_SCATTERALTDIV16SF);
1055
1056	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1057	name: "__builtin_ia32_scatteraltsiv8di ",
1058	tcode: VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT,
1059	code: IX86_BUILTIN_SCATTERALTSIV8DI);
1060
1061	def_builtin (OPTION_MASK_ISA_AVX512F, OPTION_MASK_ISA2_EVEX512,
1062	name: "__builtin_ia32_scatteraltdiv16si ",
1063	tcode: VOID_FTYPE_PINT_HI_V8DI_V16SI_INT,
1064	code: IX86_BUILTIN_SCATTERALTDIV16SI);
1065
1066	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv4df ",
1067	tcode: VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT,
1068	code: IX86_BUILTIN_SCATTERALTSIV4DF);
1069
1070	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv8sf ",
1071	tcode: VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT,
1072	code: IX86_BUILTIN_SCATTERALTDIV8SF);
1073
1074	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv4di ",
1075	tcode: VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT,
1076	code: IX86_BUILTIN_SCATTERALTSIV4DI);
1077
1078	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv8si ",
1079	tcode: VOID_FTYPE_PINT_QI_V4DI_V8SI_INT,
1080	code: IX86_BUILTIN_SCATTERALTDIV8SI);
1081
1082	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv2df ",
1083	tcode: VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT,
1084	code: IX86_BUILTIN_SCATTERALTSIV2DF);
1085
1086	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv4sf ",
1087	tcode: VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT,
1088	code: IX86_BUILTIN_SCATTERALTDIV4SF);
1089
1090	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltsiv2di ",
1091	tcode: VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT,
1092	code: IX86_BUILTIN_SCATTERALTSIV2DI);
1093
1094	def_builtin (OPTION_MASK_ISA_AVX512VL, mask2: 0, name: "__builtin_ia32_scatteraltdiv4si ",
1095	tcode: VOID_FTYPE_PINT_QI_V2DI_V4SI_INT,
1096	code: IX86_BUILTIN_SCATTERALTDIV4SI);
1097
1098	/* AVX512PF */
1099	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfdpd",
1100	tcode: VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1101	code: IX86_BUILTIN_GATHERPFDPD);
1102	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfdps",
1103	tcode: VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1104	code: IX86_BUILTIN_GATHERPFDPS);
1105	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfqpd",
1106	tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1107	code: IX86_BUILTIN_GATHERPFQPD);
1108	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_gatherpfqps",
1109	tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1110	code: IX86_BUILTIN_GATHERPFQPS);
1111	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfdpd",
1112	tcode: VOID_FTYPE_QI_V8SI_PCVOID_INT_INT,
1113	code: IX86_BUILTIN_SCATTERPFDPD);
1114	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfdps",
1115	tcode: VOID_FTYPE_HI_V16SI_PCVOID_INT_INT,
1116	code: IX86_BUILTIN_SCATTERPFDPS);
1117	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfqpd",
1118	tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1119	code: IX86_BUILTIN_SCATTERPFQPD);
1120	def_builtin (OPTION_MASK_ISA_AVX512PF, mask2: 0, name: "__builtin_ia32_scatterpfqps",
1121	tcode: VOID_FTYPE_QI_V8DI_PCVOID_INT_INT,
1122	code: IX86_BUILTIN_SCATTERPFQPS);
1123
1124	/* SHA */
1125	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1msg1",
1126	tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1MSG1);
1127	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1msg2",
1128	tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1MSG2);
1129	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1nexte",
1130	tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA1NEXTE);
1131	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha1rnds4",
1132	tcode: V4SI_FTYPE_V4SI_V4SI_INT, code: IX86_BUILTIN_SHA1RNDS4);
1133	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256msg1",
1134	tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA256MSG1);
1135	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256msg2",
1136	tcode: V4SI_FTYPE_V4SI_V4SI, code: IX86_BUILTIN_SHA256MSG2);
1137	def_builtin_const (OPTION_MASK_ISA_SHA, mask2: 0, name: "__builtin_ia32_sha256rnds2",
1138	tcode: V4SI_FTYPE_V4SI_V4SI_V4SI, code: IX86_BUILTIN_SHA256RNDS2);
1139
1140	/* RTM. */
1141	def_builtin (OPTION_MASK_ISA_RTM, mask2: 0, name: "__builtin_ia32_xabort",
1142	tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_XABORT);
1143
1144	/* MMX access to the vec_init patterns. */
1145	def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1146	name: "__builtin_ia32_vec_init_v2si",
1147	tcode: V2SI_FTYPE_INT_INT, code: IX86_BUILTIN_VEC_INIT_V2SI);
1148
1149	def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1150	name: "__builtin_ia32_vec_init_v4hi",
1151	tcode: V4HI_FTYPE_HI_HI_HI_HI,
1152	code: IX86_BUILTIN_VEC_INIT_V4HI);
1153
1154	def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1155	name: "__builtin_ia32_vec_init_v8qi",
1156	tcode: V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI,
1157	code: IX86_BUILTIN_VEC_INIT_V8QI);
1158
1159	/* Access to the vec_extract patterns. */
1160	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v2df",
1161	tcode: DOUBLE_FTYPE_V2DF_INT, code: IX86_BUILTIN_VEC_EXT_V2DF);
1162	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v2di",
1163	tcode: DI_FTYPE_V2DI_INT, code: IX86_BUILTIN_VEC_EXT_V2DI);
1164	def_builtin_const (OPTION_MASK_ISA_SSE, mask2: 0, name: "__builtin_ia32_vec_ext_v4sf",
1165	tcode: FLOAT_FTYPE_V4SF_INT, code: IX86_BUILTIN_VEC_EXT_V4SF);
1166	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v4si",
1167	tcode: SI_FTYPE_V4SI_INT, code: IX86_BUILTIN_VEC_EXT_V4SI);
1168	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v8hi",
1169	tcode: HI_FTYPE_V8HI_INT, code: IX86_BUILTIN_VEC_EXT_V8HI);
1170
1171	def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1172	/* As it uses V4HImode, we have to require -mmmx too. */
1173	| OPTION_MASK_ISA_MMX, mask2: 0,
1174	name: "__builtin_ia32_vec_ext_v4hi",
1175	tcode: HI_FTYPE_V4HI_INT, code: IX86_BUILTIN_VEC_EXT_V4HI);
1176
1177	def_builtin_const (OPTION_MASK_ISA_MMX, mask2: 0,
1178	name: "__builtin_ia32_vec_ext_v2si",
1179	tcode: SI_FTYPE_V2SI_INT, code: IX86_BUILTIN_VEC_EXT_V2SI);
1180
1181	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_ext_v16qi",
1182	tcode: QI_FTYPE_V16QI_INT, code: IX86_BUILTIN_VEC_EXT_V16QI);
1183
1184	/* Access to the vec_set patterns. */
1185	def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, mask2: 0,
1186	name: "__builtin_ia32_vec_set_v2di",
1187	tcode: V2DI_FTYPE_V2DI_DI_INT, code: IX86_BUILTIN_VEC_SET_V2DI);
1188
1189	def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v4sf",
1190	tcode: V4SF_FTYPE_V4SF_FLOAT_INT, code: IX86_BUILTIN_VEC_SET_V4SF);
1191
1192	def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v4si",
1193	tcode: V4SI_FTYPE_V4SI_SI_INT, code: IX86_BUILTIN_VEC_SET_V4SI);
1194
1195	def_builtin_const (OPTION_MASK_ISA_SSE2, mask2: 0, name: "__builtin_ia32_vec_set_v8hi",
1196	tcode: V8HI_FTYPE_V8HI_HI_INT, code: IX86_BUILTIN_VEC_SET_V8HI);
1197
1198	def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
1199	/* As it uses V4HImode, we have to require -mmmx too. */
1200	| OPTION_MASK_ISA_MMX, mask2: 0,
1201	name: "__builtin_ia32_vec_set_v4hi",
1202	tcode: V4HI_FTYPE_V4HI_HI_INT, code: IX86_BUILTIN_VEC_SET_V4HI);
1203
1204	def_builtin_const (OPTION_MASK_ISA_SSE4_1, mask2: 0, name: "__builtin_ia32_vec_set_v16qi",
1205	tcode: V16QI_FTYPE_V16QI_QI_INT, code: IX86_BUILTIN_VEC_SET_V16QI);
1206
1207	/* RDSEED */
1208	def_builtin (OPTION_MASK_ISA_RDSEED, mask2: 0, name: "__builtin_ia32_rdseed_hi_step",
1209	tcode: INT_FTYPE_PUSHORT, code: IX86_BUILTIN_RDSEED16_STEP);
1210	def_builtin (OPTION_MASK_ISA_RDSEED, mask2: 0, name: "__builtin_ia32_rdseed_si_step",
1211	tcode: INT_FTYPE_PUNSIGNED, code: IX86_BUILTIN_RDSEED32_STEP);
1212	def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, mask2: 0,
1213	name: "__builtin_ia32_rdseed_di_step",
1214	tcode: INT_FTYPE_PULONGLONG, code: IX86_BUILTIN_RDSEED64_STEP);
1215
1216	/* ADCX */
1217	def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_addcarryx_u32",
1218	tcode: UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, code: IX86_BUILTIN_ADDCARRYX32);
1219	def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0,
1220	name: "__builtin_ia32_addcarryx_u64",
1221	tcode: UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1222	code: IX86_BUILTIN_ADDCARRYX64);
1223
1224	/* SBB */
1225	def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_sbb_u32",
1226	tcode: UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, code: IX86_BUILTIN_SBB32);
1227	def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0,
1228	name: "__builtin_ia32_sbb_u64",
1229	tcode: UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG,
1230	code: IX86_BUILTIN_SBB64);
1231
1232	/* Read/write FLAGS. */
1233	if (TARGET_64BIT)
1234	{
1235	def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0, name: "__builtin_ia32_readeflags_u64",
1236	tcode: UINT64_FTYPE_VOID, code: IX86_BUILTIN_READ_FLAGS);
1237	def_builtin (OPTION_MASK_ISA_64BIT, mask2: 0, name: "__builtin_ia32_writeeflags_u64",
1238	tcode: VOID_FTYPE_UINT64, code: IX86_BUILTIN_WRITE_FLAGS);
1239	}
1240	else
1241	{
1242	def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_readeflags_u32",
1243	tcode: UNSIGNED_FTYPE_VOID, code: IX86_BUILTIN_READ_FLAGS);
1244	def_builtin (mask: 0, mask2: 0, name: "__builtin_ia32_writeeflags_u32",
1245	tcode: VOID_FTYPE_UNSIGNED, code: IX86_BUILTIN_WRITE_FLAGS);
1246	}
1247
1248	/* CLFLUSHOPT. */
1249	def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, mask2: 0, name: "__builtin_ia32_clflushopt",
1250	tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLFLUSHOPT);
1251
1252	/* CLWB. */
1253	def_builtin (OPTION_MASK_ISA_CLWB, mask2: 0, name: "__builtin_ia32_clwb",
1254	tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLWB);
1255
1256	/* MONITORX and MWAITX. */
1257	def_builtin (mask: 0, OPTION_MASK_ISA2_MWAITX, name: "__builtin_ia32_monitorx",
1258	tcode: VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MONITORX);
1259	def_builtin (mask: 0, OPTION_MASK_ISA2_MWAITX, name: "__builtin_ia32_mwaitx",
1260	tcode: VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, code: IX86_BUILTIN_MWAITX);
1261
1262	/* CLZERO. */
1263	def_builtin (mask: 0, OPTION_MASK_ISA2_CLZERO, name: "__builtin_ia32_clzero",
1264	tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLZERO);
1265
1266	/* WAITPKG. */
1267	def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_umonitor",
1268	tcode: VOID_FTYPE_PVOID, code: IX86_BUILTIN_UMONITOR);
1269	def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_umwait",
1270	tcode: UINT8_FTYPE_UNSIGNED_UINT64, code: IX86_BUILTIN_UMWAIT);
1271	def_builtin (mask: 0, OPTION_MASK_ISA2_WAITPKG, name: "__builtin_ia32_tpause",
1272	tcode: UINT8_FTYPE_UNSIGNED_UINT64, code: IX86_BUILTIN_TPAUSE);
1273
1274	/* UINTR. */
1275	def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_UINTR,
1276	name: "__builtin_ia32_testui",
1277	tcode: UINT8_FTYPE_VOID, code: IX86_BUILTIN_TESTUI);
1278
1279	/* USER_MSR. */
1280	def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_USER_MSR,
1281	name: "__builtin_ia32_urdmsr", tcode: UINT64_FTYPE_UINT64,
1282	code: IX86_BUILTIN_URDMSR);
1283	def_builtin (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_USER_MSR,
1284	name: "__builtin_ia32_uwrmsr", tcode: VOID_FTYPE_UINT64_UINT64,
1285	code: IX86_BUILTIN_UWRMSR);
1286
1287	/* CLDEMOTE. */
1288	def_builtin (mask: 0, OPTION_MASK_ISA2_CLDEMOTE, name: "__builtin_ia32_cldemote",
1289	tcode: VOID_FTYPE_PCVOID, code: IX86_BUILTIN_CLDEMOTE);
1290
1291	/* Add FMA4 multi-arg argument instructions */
1292	for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++)
1293	{
1294	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i);
1295	if (d->name == 0)
1296	continue;
1297
1298	ftype = (enum ix86_builtin_func_type) d->flag;
1299	def_builtin_const (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
1300	}
1301	BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST,
1302	IX86_BUILTIN__BDESC_MULTI_ARG_FIRST,
1303	ARRAY_SIZE (bdesc_multi_arg) - 1);
1304
1305	/* Add CET inrinsics. */
1306	for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++)
1307	{
1308	BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i);
1309	if (d->name == 0)
1310	continue;
1311
1312	ftype = (enum ix86_builtin_func_type) d->flag;
1313	def_builtin (mask: d->mask, mask2: d->mask2, name: d->name, tcode: ftype, code: d->code);
1314	}
1315	BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST,
1316	IX86_BUILTIN__BDESC_CET_FIRST,
1317	ARRAY_SIZE (bdesc_cet) - 1);
1318	}
1319
1320	#undef BDESC_VERIFY
1321	#undef BDESC_VERIFYS
1322
1323	/* Make builtins to detect cpu type and features supported. NAME is
1324	the builtin name, CODE is the builtin code, and FTYPE is the function
1325	type of the builtin. */
1326
1327	static void
1328	make_cpu_type_builtin (const char* name, int code,
1329	enum ix86_builtin_func_type ftype, bool is_const)
1330	{
1331	tree decl;
1332	tree type;
1333
1334	type = ix86_get_builtin_func_type (tcode: ftype);
1335	decl = add_builtin_function (name, type, function_code: code, cl: BUILT_IN_MD,
1336	NULL, NULL_TREE);
1337	gcc_assert (decl != NULL_TREE);
1338	ix86_builtins[(int) code] = decl;
1339	TREE_READONLY (decl) = is_const;
1340	}
1341
1342	/* Make builtins to get CPU type and features supported. The created
1343	builtins are :
1344
1345	__builtin_cpu_init (), to detect cpu type and features,
1346	__builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>,
1347	__builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE>
1348	*/
1349
1350	static void
1351	ix86_init_platform_type_builtins (void)
1352	{
1353	make_cpu_type_builtin (name: "__builtin_cpu_init", code: IX86_BUILTIN_CPU_INIT,
1354	ftype: INT_FTYPE_VOID, is_const: false);
1355	make_cpu_type_builtin (name: "__builtin_cpu_is", code: IX86_BUILTIN_CPU_IS,
1356	ftype: INT_FTYPE_PCCHAR, is_const: true);
1357	make_cpu_type_builtin (name: "__builtin_cpu_supports", code: IX86_BUILTIN_CPU_SUPPORTS,
1358	ftype: INT_FTYPE_PCCHAR, is_const: true);
1359	}
1360
1361	/* Internal method for ix86_init_builtins. */
1362
1363	static void
1364	ix86_init_builtins_va_builtins_abi (void)
1365	{
1366	tree ms_va_ref, sysv_va_ref;
1367	tree fnvoid_va_end_ms, fnvoid_va_end_sysv;
1368	tree fnvoid_va_start_ms, fnvoid_va_start_sysv;
1369	tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv;
1370	tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE;
1371
1372	if (!TARGET_64BIT)
1373	return;
1374	fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE);
1375	fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE);
1376	ms_va_ref = build_reference_type (ms_va_list_type_node);
1377	sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node));
1378
1379	fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref,
1380	NULL_TREE);
1381	fnvoid_va_start_ms
1382	= build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE);
1383	fnvoid_va_end_sysv
1384	= build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE);
1385	fnvoid_va_start_sysv
1386	= build_varargs_function_type_list (void_type_node, sysv_va_ref,
1387	NULL_TREE);
1388	fnvoid_va_copy_ms
1389	= build_function_type_list (void_type_node, ms_va_ref,
1390	ms_va_list_type_node, NULL_TREE);
1391	fnvoid_va_copy_sysv
1392	= build_function_type_list (void_type_node, sysv_va_ref,
1393	sysv_va_ref, NULL_TREE);
1394
1395	add_builtin_function (name: "__builtin_ms_va_start", type: fnvoid_va_start_ms,
1396	function_code: BUILT_IN_VA_START, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1397	add_builtin_function (name: "__builtin_ms_va_end", type: fnvoid_va_end_ms,
1398	function_code: BUILT_IN_VA_END, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1399	add_builtin_function (name: "__builtin_ms_va_copy", type: fnvoid_va_copy_ms,
1400	function_code: BUILT_IN_VA_COPY, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_ms);
1401	add_builtin_function (name: "__builtin_sysv_va_start", type: fnvoid_va_start_sysv,
1402	function_code: BUILT_IN_VA_START, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1403	add_builtin_function (name: "__builtin_sysv_va_end", type: fnvoid_va_end_sysv,
1404	function_code: BUILT_IN_VA_END, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1405	add_builtin_function (name: "__builtin_sysv_va_copy", type: fnvoid_va_copy_sysv,
1406	function_code: BUILT_IN_VA_COPY, cl: BUILT_IN_NORMAL, NULL, attrs: fnattr_sysv);
1407	}
1408
1409	static void
1410	ix86_register_float16_builtin_type (void)
1411	{
1412	/* Provide the _Float16 type and float16_type_node if needed so that
1413	it can be used in AVX512FP16 intrinsics and builtins. */
1414	if (!float16_type_node)
1415	{
1416	ix86_float16_type_node = make_node (REAL_TYPE);
1417	TYPE_PRECISION (ix86_float16_type_node) = 16;
1418	SET_TYPE_MODE (ix86_float16_type_node, HFmode);
1419	layout_type (ix86_float16_type_node);
1420	}
1421	else
1422	ix86_float16_type_node = float16_type_node;
1423
1424	if (!maybe_get_identifier ("_Float16"))
1425	lang_hooks.types.register_builtin_type (ix86_float16_type_node,
1426	"_Float16");
1427	}
1428
1429	static void
1430	ix86_register_bf16_builtin_type (void)
1431	{
1432	if (bfloat16_type_node == NULL_TREE)
1433	{
1434	ix86_bf16_type_node = make_node (REAL_TYPE);
1435	TYPE_PRECISION (ix86_bf16_type_node) = 16;
1436	SET_TYPE_MODE (ix86_bf16_type_node, BFmode);
1437	layout_type (ix86_bf16_type_node);
1438	}
1439	else
1440	ix86_bf16_type_node = bfloat16_type_node;
1441
1442	if (!maybe_get_identifier ("__bf16"))
1443	lang_hooks.types.register_builtin_type (ix86_bf16_type_node, "__bf16");
1444	}
1445
1446	static void
1447	ix86_init_builtin_types (void)
1448	{
1449	tree float80_type_node, const_string_type_node;
1450
1451	/* The __float80 type. */
1452	float80_type_node = long_double_type_node;
1453	if (TYPE_MODE (float80_type_node) != XFmode)
1454	{
1455	if (float64x_type_node != NULL_TREE
1456	&& TYPE_MODE (float64x_type_node) == XFmode)
1457	float80_type_node = float64x_type_node;
1458	else
1459	{
1460	/* The __float80 type. */
1461	float80_type_node = make_node (REAL_TYPE);
1462
1463	TYPE_PRECISION (float80_type_node) = 80;
1464	layout_type (float80_type_node);
1465	}
1466	}
1467	lang_hooks.types.register_builtin_type (float80_type_node, "__float80");
1468
1469	/* The __float128 type. The node has already been created as
1470	_Float128, so for C we only need to register the __float128 name for
1471	it. For C++, we create a distinct type which will mangle differently
1472	(g) vs. _Float128 (DF128_) and behave backwards compatibly. */
1473	if (float128t_type_node == NULL_TREE)
1474	{
1475	float128t_type_node = make_node (REAL_TYPE);
1476	TYPE_PRECISION (float128t_type_node)
1477	= TYPE_PRECISION (float128_type_node);
1478	SET_TYPE_MODE (float128t_type_node, TYPE_MODE (float128_type_node));
1479	layout_type (float128t_type_node);
1480	}
1481	lang_hooks.types.register_builtin_type (float128t_type_node, "__float128");
1482
1483	ix86_register_float16_builtin_type ();
1484
1485	ix86_register_bf16_builtin_type ();
1486
1487	const_string_type_node
1488	= build_pointer_type (build_qualified_type
1489	(char_type_node, TYPE_QUAL_CONST));
1490
1491	/* This macro is built by i386-builtin-types.awk. */
1492	DEFINE_BUILTIN_PRIMITIVE_TYPES;
1493	}
1494
1495	void
1496	ix86_init_builtins (void)
1497	{
1498	tree ftype, decl;
1499
1500	ix86_init_builtin_types ();
1501
1502	/* Builtins to get CPU type and features. */
1503	ix86_init_platform_type_builtins ();
1504
1505	/* TFmode support builtins. */
1506	def_builtin_const (mask: 0, mask2: 0, name: "__builtin_infq",
1507	tcode: FLOAT128_FTYPE_VOID, code: IX86_BUILTIN_INFQ);
1508	def_builtin_const (mask: 0, mask2: 0, name: "__builtin_huge_valq",
1509	tcode: FLOAT128_FTYPE_VOID, code: IX86_BUILTIN_HUGE_VALQ);
1510
1511	ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_CONST_STRING);
1512	decl = add_builtin_function (name: "__builtin_nanq", type: ftype, function_code: IX86_BUILTIN_NANQ,
1513	cl: BUILT_IN_MD, library_name: "nanq", NULL_TREE);
1514	TREE_READONLY (decl) = 1;
1515	ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl;
1516
1517	decl = add_builtin_function (name: "__builtin_nansq", type: ftype, function_code: IX86_BUILTIN_NANSQ,
1518	cl: BUILT_IN_MD, library_name: "nansq", NULL_TREE);
1519	TREE_READONLY (decl) = 1;
1520	ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl;
1521
1522	/* We will expand them to normal call if SSE isn't available since
1523	they are used by libgcc. */
1524	ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_FLOAT128);
1525	decl = add_builtin_function (name: "__builtin_fabsq", type: ftype, function_code: IX86_BUILTIN_FABSQ,
1526	cl: BUILT_IN_MD, library_name: "__fabstf2", NULL_TREE);
1527	TREE_READONLY (decl) = 1;
1528	ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl;
1529
1530	ftype = ix86_get_builtin_func_type (tcode: FLOAT128_FTYPE_FLOAT128_FLOAT128);
1531	decl = add_builtin_function (name: "__builtin_copysignq", type: ftype,
1532	function_code: IX86_BUILTIN_COPYSIGNQ, cl: BUILT_IN_MD,
1533	library_name: "__copysigntf3", NULL_TREE);
1534	TREE_READONLY (decl) = 1;
1535	ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl;
1536
1537	ix86_init_tm_builtins ();
1538	ix86_init_mmx_sse_builtins ();
1539
1540	if (TARGET_LP64)
1541	ix86_init_builtins_va_builtins_abi ();
1542
1543	#ifdef SUBTARGET_INIT_BUILTINS
1544	SUBTARGET_INIT_BUILTINS;
1545	#endif
1546	}
1547
1548	/* Return the ix86 builtin for CODE. */
1549
1550	tree
1551	ix86_builtin_decl (unsigned code, bool)
1552	{
1553	if (code >= IX86_BUILTIN_MAX)
1554	return error_mark_node;
1555
1556	return ix86_builtins[code];
1557	}
1558
1559	/* This returns the target-specific builtin with code CODE if
1560	current_function_decl has visibility on this builtin, which is checked
1561	using isa flags. Returns NULL_TREE otherwise. */
1562
1563	static tree ix86_get_builtin (enum ix86_builtins code)
1564	{
1565	struct cl_target_option *opts;
1566	tree target_tree = NULL_TREE;
1567
1568	/* Determine the isa flags of current_function_decl. */
1569
1570	if (current_function_decl)
1571	target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl);
1572
1573	if (target_tree == NULL)
1574	target_tree = target_option_default_node;
1575
1576	opts = TREE_TARGET_OPTION (target_tree);
1577
1578	if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags)
1579	|| (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2))
1580	return ix86_builtin_decl (code, true);
1581	else
1582	return NULL_TREE;
1583	}
1584
1585	/* Vectorization library interface and handlers. */
1586	tree (*ix86_veclib_handler) (combined_fn, tree, tree);
1587
1588	/* Returns a function decl for a vectorized version of the combined function
1589	with combined_fn code FN and the result vector type TYPE, or NULL_TREE
1590	if it is not available. */
1591
1592	tree
1593	ix86_builtin_vectorized_function (unsigned int fn, tree type_out,
1594	tree type_in)
1595	{
1596	machine_mode in_mode, out_mode;
1597	int in_n, out_n;
1598
1599	if (TREE_CODE (type_out) != VECTOR_TYPE
1600	|| TREE_CODE (type_in) != VECTOR_TYPE)
1601	return NULL_TREE;
1602
1603	out_mode = TYPE_MODE (TREE_TYPE (type_out));
1604	out_n = TYPE_VECTOR_SUBPARTS (node: type_out);
1605	in_mode = TYPE_MODE (TREE_TYPE (type_in));
1606	in_n = TYPE_VECTOR_SUBPARTS (node: type_in);
1607
1608	switch (fn)
1609	{
1610	CASE_CFN_IFLOOR:
1611	CASE_CFN_LFLOOR:
1612	/* The round insn does not trap on denormals. */
1613	if (flag_trapping_math || !TARGET_SSE4_1)
1614	break;
1615
1616	/* PR106910, currently vectorizer doesn't go direct internal fn way
1617	when out_n != in_n, so let's still keep this.
1618	Otherwise, it relies on expander of
1619	lceilmn2/lfloormn2/lroundmn2/lrintmn2. */
1620	if (out_mode == SImode && in_mode == DFmode)
1621	{
1622	if (out_n == 4 && in_n == 2)
1623	return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX);
1624	else if (out_n == 8 && in_n == 4)
1625	return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256);
1626	else if (out_n == 16 && in_n == 8)
1627	return ix86_get_builtin (code: IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512);
1628	}
1629	break;
1630
1631	CASE_CFN_ICEIL:
1632	CASE_CFN_LCEIL:
1633	/* The round insn does not trap on denormals. */
1634	if (flag_trapping_math || !TARGET_SSE4_1)
1635	break;
1636
1637	if (out_mode == SImode && in_mode == DFmode)
1638	{
1639	if (out_n == 4 && in_n == 2)
1640	return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX);
1641	else if (out_n == 8 && in_n == 4)
1642	return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256);
1643	else if (out_n == 16 && in_n == 8)
1644	return ix86_get_builtin (code: IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512);
1645	}
1646	break;
1647
1648	CASE_CFN_IRINT:
1649	CASE_CFN_LRINT:
1650	if (out_mode == SImode && in_mode == DFmode)
1651	{
1652	if (out_n == 4 && in_n == 2)
1653	return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX);
1654	else if (out_n == 8 && in_n == 4)
1655	return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX256);
1656	else if (out_n == 16 && in_n == 8)
1657	return ix86_get_builtin (code: IX86_BUILTIN_VEC_PACK_SFIX512);
1658	}
1659	break;
1660
1661	CASE_CFN_IROUND:
1662	CASE_CFN_LROUND:
1663	/* The round insn does not trap on denormals. */
1664	if (flag_trapping_math || !TARGET_SSE4_1)
1665	break;
1666
1667	if (out_mode == SImode && in_mode == DFmode)
1668	{
1669	if (out_n == 4 && in_n == 2)
1670	return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX);
1671	else if (out_n == 8 && in_n == 4)
1672	return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256);
1673	else if (out_n == 16 && in_n == 8)
1674	return ix86_get_builtin (code: IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512);
1675	}
1676	break;
1677
1678
1679	default:
1680	break;
1681	}
1682
1683	/* Dispatch to a handler for a vectorization library. */
1684	if (ix86_veclib_handler)
1685	return ix86_veclib_handler (combined_fn (fn), type_out, type_in);
1686
1687	return NULL_TREE;
1688	}
1689
1690	/* Returns a decl of a function that implements gather load with
1691	memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE.
1692	Return NULL_TREE if it is not available. */
1693
1694	tree
1695	ix86_vectorize_builtin_gather (const_tree mem_vectype,
1696	const_tree index_type, int scale)
1697	{
1698	bool si;
1699	enum ix86_builtins code;
1700	const machine_mode mode = TYPE_MODE (TREE_TYPE (mem_vectype));
1701
1702	if ((!TARGET_AVX512F || !TARGET_EVEX512) && GET_MODE_SIZE (mode) == 64)
1703	return NULL_TREE;
1704
1705	if (! TARGET_AVX2
1706	|| (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 2u)
1707	? !TARGET_USE_GATHER_2PARTS
1708	: (known_eq (TYPE_VECTOR_SUBPARTS (mem_vectype), 4u)
1709	? !TARGET_USE_GATHER_4PARTS
1710	: !TARGET_USE_GATHER_8PARTS)))
1711	return NULL_TREE;
1712
1713	if ((TREE_CODE (index_type) != INTEGER_TYPE
1714	&& !POINTER_TYPE_P (index_type))
1715	|| (TYPE_MODE (index_type) != SImode
1716	&& TYPE_MODE (index_type) != DImode))
1717	return NULL_TREE;
1718
1719	if (TYPE_PRECISION (index_type) > POINTER_SIZE)
1720	return NULL_TREE;
1721
1722	/* v*gather* insn sign extends index to pointer mode. */
1723	if (TYPE_PRECISION (index_type) < POINTER_SIZE
1724	&& TYPE_UNSIGNED (index_type))
1725	return NULL_TREE;
1726
1727	if (scale <= 0
1728	|| scale > 8
1729	|| (scale & (scale - 1)) != 0)
1730	return NULL_TREE;
1731
1732	si = TYPE_MODE (index_type) == SImode;
1733	switch (TYPE_MODE (mem_vectype))
1734	{
1735	case E_V2DFmode:
1736	if (TARGET_AVX512VL)
1737	code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF;
1738	else
1739	code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF;
1740	break;
1741	case E_V4DFmode:
1742	if (TARGET_AVX512VL)
1743	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF;
1744	else
1745	code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF;
1746	break;
1747	case E_V2DImode:
1748	if (TARGET_AVX512VL)
1749	code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI;
1750	else
1751	code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI;
1752	break;
1753	case E_V4DImode:
1754	if (TARGET_AVX512VL)
1755	code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI;
1756	else
1757	code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI;
1758	break;
1759	case E_V4SFmode:
1760	if (TARGET_AVX512VL)
1761	code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF;
1762	else
1763	code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF;
1764	break;
1765	case E_V8SFmode:
1766	if (TARGET_AVX512VL)
1767	code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF;
1768	else
1769	code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF;
1770	break;
1771	case E_V4SImode:
1772	if (TARGET_AVX512VL)
1773	code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI;
1774	else
1775	code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI;
1776	break;
1777	case E_V8SImode:
1778	if (TARGET_AVX512VL)
1779	code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI;
1780	else
1781	code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
1782	break;
1783	case E_V8DFmode:
1784	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
1785	break;
1786	case E_V8DImode:
1787	code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
1788	break;
1789	case E_V16SFmode:
1790	code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF;
1791	break;
1792	case E_V16SImode:
1793	code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI;
1794	break;
1795	default:
1796	return NULL_TREE;
1797	}
1798
1799	return ix86_get_builtin (code);
1800	}
1801
1802	/* Returns a code for a target-specific builtin that implements
1803	reciprocal of the function, or NULL_TREE if not available. */
1804
1805	tree
1806	ix86_builtin_reciprocal (tree fndecl)
1807	{
1808	enum ix86_builtins fn_code
1809	= (enum ix86_builtins) DECL_MD_FUNCTION_CODE (decl: fndecl);
1810	switch (fn_code)
1811	{
1812	/* Vectorized version of sqrt to rsqrt conversion. */
1813	case IX86_BUILTIN_SQRTPS_NR:
1814	return ix86_get_builtin (code: IX86_BUILTIN_RSQRTPS_NR);
1815
1816	case IX86_BUILTIN_SQRTPS_NR256:
1817	return ix86_get_builtin (code: IX86_BUILTIN_RSQRTPS_NR256);
1818
1819	default:
1820	return NULL_TREE;
1821	}
1822	}
1823
1824	/* This parses the attribute arguments to target in DECL and determines
1825	the right builtin to use to match the platform specification.
1826	It returns the priority value for this version decl. If PREDICATE_LIST
1827	is not NULL, it stores the list of cpu features that need to be checked
1828	before dispatching this function. */
1829
1830	unsigned int
1831	get_builtin_code_for_version (tree decl, tree *predicate_list)
1832	{
1833	tree attrs;
1834	struct cl_target_option cur_target;
1835	tree target_node;
1836	struct cl_target_option *new_target;
1837	const char *arg_str = NULL;
1838	const char *attrs_str = NULL;
1839	char *tok_str = NULL;
1840	char *token;
1841
1842	enum feature_priority priority = P_NONE;
1843
1844	static unsigned int NUM_FEATURES = ARRAY_SIZE (isa_names_table);
1845
1846	unsigned int i;
1847
1848	tree predicate_chain = NULL_TREE;
1849	tree predicate_decl, predicate_arg;
1850
1851	attrs = lookup_attribute (attr_name: "target", DECL_ATTRIBUTES (decl));
1852	gcc_assert (attrs != NULL);
1853
1854	attrs = TREE_VALUE (TREE_VALUE (attrs));
1855
1856	gcc_assert (TREE_CODE (attrs) == STRING_CST);
1857	attrs_str = TREE_STRING_POINTER (attrs);
1858
1859	/* Return priority zero for default function. */
1860	if (strcmp (s1: attrs_str, s2: "default") == 0)
1861	return 0;
1862
1863	/* Handle arch= if specified. For priority, set it to be 1 more than
1864	the best instruction set the processor can handle. For instance, if
1865	there is a version for atom and a version for ssse3 (the highest ISA
1866	priority for atom), the atom version must be checked for dispatch
1867	before the ssse3 version. */
1868	if (strstr (haystack: attrs_str, needle: "arch=") != NULL)
1869	{
1870	cl_target_option_save (&cur_target, &global_options,
1871	&global_options_set);
1872	target_node
1873	= ix86_valid_target_attribute_tree (decl, attrs, &global_options,
1874	&global_options_set, 0);
1875
1876	gcc_assert (target_node);
1877	if (target_node == error_mark_node)
1878	return 0;
1879	new_target = TREE_TARGET_OPTION (target_node);
1880	gcc_assert (new_target);
1881	enum ix86_builtins builtin_fn = IX86_BUILTIN_CPU_IS;
1882
1883	/* Special case x86-64 micro-level architectures. */
1884	const char *arch_name = attrs_str + strlen (s: "arch=");
1885	if (startswith (str: arch_name, prefix: "x86-64"))
1886	{
1887	arg_str = arch_name;
1888	builtin_fn = IX86_BUILTIN_CPU_SUPPORTS;
1889	if (strcmp (s1: arch_name, s2: "x86-64") == 0)
1890	priority = P_X86_64_BASELINE;
1891	else if (strcmp (s1: arch_name, s2: "x86-64-v2") == 0)
1892	priority = P_X86_64_V2;
1893	else if (strcmp (s1: arch_name, s2: "x86-64-v3") == 0)
1894	priority = P_X86_64_V3;
1895	else if (strcmp (s1: arch_name, s2: "x86-64-v4") == 0)
1896	priority = P_X86_64_V4;
1897	}
1898	else if (new_target->arch_specified && new_target->arch > 0)
1899	for (i = 0; i < pta_size; i++)
1900	if (processor_alias_table[i].processor == new_target->arch)
1901	{
1902	const pta *arch_info = &processor_alias_table[i];
1903	switch (arch_info->priority)
1904	{
1905	default:
1906	arg_str = arch_info->name;
1907	priority = arch_info->priority;
1908	break;
1909	case P_PROC_DYNAMIC:
1910	switch (new_target->arch)
1911	{
1912	case PROCESSOR_NEHALEM:
1913	if (TARGET_PCLMUL_P (new_target->x_ix86_isa_flags))
1914	{
1915	arg_str = "westmere";
1916	priority = P_PCLMUL;
1917	}
1918	else
1919	{
1920	/* We translate "arch=corei7" and "arch=nehalem"
1921	to "corei7" so that it will be mapped to
1922	M_INTEL_COREI7 as cpu type to cover all
1923	M_INTEL_COREI7_XXXs. */
1924	arg_str = "corei7";
1925	priority = P_PROC_SSE4_2;
1926	}
1927	break;
1928	case PROCESSOR_SANDYBRIDGE:
1929	if (TARGET_F16C_P (new_target->x_ix86_isa_flags))
1930	arg_str = "ivybridge";
1931	else
1932	arg_str = "sandybridge";
1933	priority = P_PROC_AVX;
1934	break;
1935	case PROCESSOR_HASWELL:
1936	if (TARGET_ADX_P (new_target->x_ix86_isa_flags))
1937	arg_str = "broadwell";
1938	else
1939	arg_str = "haswell";
1940	priority = P_PROC_AVX2;
1941	break;
1942	case PROCESSOR_AMDFAM10:
1943	arg_str = "amdfam10h";
1944	priority = P_PROC_SSE4_A;
1945	break;
1946	default:
1947	gcc_unreachable ();
1948	}
1949	break;
1950	case P_NONE:
1951	break;
1952	}
1953	break;
1954	}
1955
1956	cl_target_option_restore (&global_options, &global_options_set,
1957	&cur_target);
1958
1959	if (predicate_list && arg_str == NULL)
1960	{
1961	error_at (DECL_SOURCE_LOCATION (decl),
1962	"no dispatcher found for the versioning attributes");
1963	return 0;
1964	}
1965
1966	if (predicate_list)
1967	{
1968	predicate_decl = ix86_builtins [(int) builtin_fn];
1969	/* For a C string literal the length includes the trailing NULL. */
1970	predicate_arg = build_string_literal (strlen (s: arg_str) + 1, arg_str);
1971	predicate_chain = tree_cons (predicate_decl, predicate_arg,
1972	predicate_chain);
1973	}
1974	}
1975
1976	/* Process feature name. */
1977	tok_str = (char *) xmalloc (strlen (s: attrs_str) + 1);
1978	strcpy (dest: tok_str, src: attrs_str);
1979	token = strtok (s: tok_str, delim: ",");
1980	predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS];
1981
1982	while (token != NULL)
1983	{
1984	/* Do not process "arch=" */
1985	if (startswith (str: token, prefix: "arch="))
1986	{
1987	token = strtok (NULL, delim: ",");
1988	continue;
1989	}
1990	for (i = 0; i < NUM_FEATURES; ++i)
1991	{
1992	if (strcmp (s1: token, s2: isa_names_table[i].name) == 0)
1993	{
1994	if (predicate_list)
1995	{
1996	predicate_arg = build_string_literal (
1997	strlen (s: isa_names_table[i].name) + 1,
1998	isa_names_table[i].name);
1999	predicate_chain = tree_cons (predicate_decl, predicate_arg,
2000	predicate_chain);
2001	}
2002	/* Find the maximum priority feature. */
2003	if (isa_names_table[i].priority > priority)
2004	priority = isa_names_table[i].priority;
2005
2006	break;
2007	}
2008	}
2009	if (predicate_list && priority == P_NONE)
2010	{
2011	error_at (DECL_SOURCE_LOCATION (decl),
2012	"ISA %qs is not supported in %<target%> attribute, "
2013	"use %<arch=%> syntax", token);
2014	return 0;
2015	}
2016	token = strtok (NULL, delim: ",");
2017	}
2018	free (ptr: tok_str);
2019
2020	if (predicate_list && predicate_chain == NULL_TREE)
2021	{
2022	error_at (DECL_SOURCE_LOCATION (decl),
2023	"no dispatcher found for the versioning attributes: %s",
2024	attrs_str);
2025	return 0;
2026	}
2027	else if (predicate_list)
2028	{
2029	predicate_chain = nreverse (predicate_chain);
2030	*predicate_list = predicate_chain;
2031	}
2032
2033	return priority;
2034	}
2035
2036	/* This builds the processor_model struct type defined in
2037	libgcc/config/i386/cpuinfo.c */
2038
2039	static tree
2040	build_processor_model_struct (void)
2041	{
2042	const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype",
2043	"__cpu_features"};
2044	tree field = NULL_TREE, field_chain = NULL_TREE;
2045	int i;
2046	tree type = make_node (RECORD_TYPE);
2047
2048	/* The first 3 fields are unsigned int. */
2049	for (i = 0; i < 3; ++i)
2050	{
2051	field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2052	get_identifier (field_name[i]), unsigned_type_node);
2053	if (field_chain != NULL_TREE)
2054	DECL_CHAIN (field) = field_chain;
2055	field_chain = field;
2056	}
2057
2058	/* The last field is an array of unsigned integers of size one. */
2059	field = build_decl (UNKNOWN_LOCATION, FIELD_DECL,
2060	get_identifier (field_name[3]),
2061	build_array_type (unsigned_type_node,
2062	build_index_type (size_one_node)));
2063	if (field_chain != NULL_TREE)
2064	DECL_CHAIN (field) = field_chain;
2065	field_chain = field;
2066
2067	finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE);
2068	return type;
2069	}
2070
2071	/* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */
2072
2073	static tree
2074	make_var_decl (tree type, const char *name)
2075	{
2076	tree new_decl;
2077
2078	new_decl = build_decl (UNKNOWN_LOCATION,
2079	VAR_DECL,
2080	get_identifier(name),
2081	type);
2082
2083	DECL_EXTERNAL (new_decl) = 1;
2084	TREE_STATIC (new_decl) = 1;
2085	TREE_PUBLIC (new_decl) = 1;
2086	DECL_INITIAL (new_decl) = 0;
2087	DECL_ARTIFICIAL (new_decl) = 0;
2088	DECL_PRESERVE_P (new_decl) = 1;
2089
2090	make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl));
2091	assemble_variable (new_decl, 0, 0, 0);
2092
2093	return new_decl;
2094	}
2095
2096	static GTY(()) tree ix86_cpu_model_type_node;
2097	static GTY(()) tree ix86_cpu_model_var;
2098	static GTY(()) tree ix86_cpu_features2_type_node;
2099	static GTY(()) tree ix86_cpu_features2_var;
2100
2101	/* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded
2102	into an integer defined in libgcc/config/i386/cpuinfo.c */
2103
2104	tree
2105	fold_builtin_cpu (tree fndecl, tree *args)
2106	{
2107	unsigned int i;
2108	enum ix86_builtins fn_code
2109	= (enum ix86_builtins) DECL_MD_FUNCTION_CODE (decl: fndecl);
2110	tree param_string_cst = NULL;
2111
2112	if (ix86_cpu_model_var == nullptr)
2113	{
2114	/* Build a single __cpu_model variable for all references to
2115	__cpu_model so that GIMPLE level optimizers can CSE the loads
2116	of __cpu_model and optimize bit-operations properly. */
2117	ix86_cpu_model_type_node = build_processor_model_struct ();
2118	ix86_cpu_model_var = make_var_decl (type: ix86_cpu_model_type_node,
2119	name: "__cpu_model");
2120	varpool_node::add (decl: ix86_cpu_model_var);
2121	}
2122
2123	gcc_assert ((args != NULL) && (*args != NULL));
2124
2125	param_string_cst = *args;
2126	while (param_string_cst
2127	&& TREE_CODE (param_string_cst) != STRING_CST)
2128	{
2129	/* *args must be a expr that can contain other EXPRS leading to a
2130	STRING_CST. */
2131	if (!EXPR_P (param_string_cst))
2132	{
2133	error ("parameter to builtin must be a string constant or literal");
2134	return integer_zero_node;
2135	}
2136	param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0);
2137	}
2138
2139	gcc_assert (param_string_cst);
2140
2141	if (fn_code == IX86_BUILTIN_CPU_IS)
2142	{
2143	tree ref;
2144	tree field;
2145	tree final;
2146
2147	unsigned int field_val = 0;
2148
2149	for (i = 0; i < num_arch_names; i++)
2150	if (processor_alias_table[i].model != 0
2151	&& strcmp (s1: processor_alias_table[i].name,
2152	TREE_STRING_POINTER (param_string_cst)) == 0)
2153	break;
2154
2155	if (i == num_arch_names)
2156	{
2157	error ("parameter to builtin not valid: %s",
2158	TREE_STRING_POINTER (param_string_cst));
2159	return integer_zero_node;
2160	}
2161
2162	field = TYPE_FIELDS (ix86_cpu_model_type_node);
2163	field_val = processor_alias_table[i].model;
2164
2165	/* CPU types are stored in the next field. */
2166	if (field_val > M_CPU_TYPE_START
2167	&& field_val < M_CPU_SUBTYPE_START)
2168	{
2169	field = DECL_CHAIN (field);
2170	field_val -= M_CPU_TYPE_START;
2171	}
2172
2173	/* CPU subtypes are stored in the next field. */
2174	if (field_val > M_CPU_SUBTYPE_START)
2175	{
2176	field = DECL_CHAIN ( DECL_CHAIN (field));
2177	field_val -= M_CPU_SUBTYPE_START;
2178	}
2179
2180	/* Get the appropriate field in __cpu_model. */
2181	ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2182	field, NULL_TREE);
2183
2184	/* Check the value. */
2185	final = build2 (EQ_EXPR, unsigned_type_node, ref,
2186	build_int_cstu (unsigned_type_node, field_val));
2187	return build1 (NOP_EXPR, integer_type_node, final);
2188	}
2189	else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS)
2190	{
2191	tree ref;
2192	tree array_elt;
2193	tree field;
2194	tree final;
2195
2196	unsigned int field_val = 0;
2197	unsigned int NUM_ISA_NAMES = ARRAY_SIZE (isa_names_table);
2198
2199	for (i = 0; i < NUM_ISA_NAMES; i++)
2200	if (strcmp (s1: isa_names_table[i].name,
2201	TREE_STRING_POINTER (param_string_cst)) == 0)
2202	break;
2203
2204	if (i == NUM_ISA_NAMES)
2205	{
2206	error ("parameter to builtin not valid: %s",
2207	TREE_STRING_POINTER (param_string_cst));
2208	return integer_zero_node;
2209	}
2210
2211	unsigned feature = isa_names_table[i].feature;
2212	if (feature >= INT_TYPE_SIZE)
2213	{
2214	if (ix86_cpu_features2_var == nullptr)
2215	{
2216	/* Build a single __cpu_features2 variable for all
2217	references to __cpu_features2 so that GIMPLE level
2218	optimizers can CSE the loads of __cpu_features2 and
2219	optimize bit-operations properly. */
2220	tree index_type
2221	= build_index_type (size_int (SIZE_OF_CPU_FEATURES));
2222	ix86_cpu_features2_type_node
2223	= build_array_type (unsigned_type_node, index_type);
2224	ix86_cpu_features2_var
2225	= make_var_decl (type: ix86_cpu_features2_type_node,
2226	name: "__cpu_features2");
2227	varpool_node::add (decl: ix86_cpu_features2_var);
2228	}
2229
2230	/* Skip __cpu_features[0]. */
2231	feature -= INT_TYPE_SIZE;
2232	tree index = size_int (feature / INT_TYPE_SIZE);
2233	feature = feature % INT_TYPE_SIZE;
2234	array_elt = build4 (ARRAY_REF, unsigned_type_node,
2235	ix86_cpu_features2_var,
2236	index, NULL_TREE, NULL_TREE);
2237	/* Return __cpu_features2[index] & field_val */
2238	}
2239	else
2240	{
2241	field = TYPE_FIELDS (ix86_cpu_model_type_node);
2242	/* Get the last field, which is __cpu_features. */
2243	while (DECL_CHAIN (field))
2244	field = DECL_CHAIN (field);
2245
2246	/* Get the appropriate field: __cpu_model.__cpu_features */
2247	ref = build3 (COMPONENT_REF, TREE_TYPE (field), ix86_cpu_model_var,
2248	field, NULL_TREE);
2249
2250	/* Access the 0th element of __cpu_features array. */
2251	array_elt = build4 (ARRAY_REF, unsigned_type_node, ref,
2252	integer_zero_node, NULL_TREE, NULL_TREE);
2253
2254	/* Return __cpu_model.__cpu_features[0] & field_val */
2255	}
2256
2257	field_val = 1U << feature;
2258	final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt,
2259	build_int_cstu (unsigned_type_node, field_val));
2260	if (feature == INT_TYPE_SIZE - 1)
2261	return build2 (NE_EXPR, integer_type_node, final,
2262	build_int_cst (unsigned_type_node, 0));
2263	else
2264	return build1 (NOP_EXPR, integer_type_node, final);
2265	}
2266	gcc_unreachable ();
2267	}
2268
2269	#include "gt-i386-builtins.h"
2270