| 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
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| 2 | /* |
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| 3 | * Copyright 2011-2012 Calxeda, Inc. |
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| 4 | * Copyright (C) 2012-2013 Altera Corporation <www.altera.com> |
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| 5 | * |
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| 6 | * Based from clk-highbank.c |
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| 7 | */ |
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| 8 | #include <linux/of.h> |
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| 9 | |
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| 10 | #include "clk.h" |
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| 11 | |
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| 12 | CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock" , socfpga_pll_init); |
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| 13 | CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk" , socfpga_periph_init); |
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| 14 | CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk" , socfpga_gate_init); |
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| 15 | CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock" , |
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| 16 | socfpga_a10_pll_init); |
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| 17 | CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk" , |
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| 18 | socfpga_a10_periph_init); |
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| 19 | CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk" , |
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| 20 | socfpga_a10_gate_init); |
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| 21 | |
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