1/*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Li Peng <peng.li@intel.com>
25 */
26
27#include <linux/export.h>
28#include <linux/mutex.h>
29#include <linux/pci.h>
30#include <linux/i2c.h>
31#include <linux/interrupt.h>
32#include <linux/delay.h>
33#include "psb_drv.h"
34
35#define HDMI_READ(reg) readl(hdmi_dev->regs + (reg))
36#define HDMI_WRITE(reg, val) writel(val, hdmi_dev->regs + (reg))
37
38#define HDMI_HCR 0x1000
39#define HCR_DETECT_HDP (1 << 6)
40#define HCR_ENABLE_HDCP (1 << 5)
41#define HCR_ENABLE_AUDIO (1 << 2)
42#define HCR_ENABLE_PIXEL (1 << 1)
43#define HCR_ENABLE_TMDS (1 << 0)
44#define HDMI_HICR 0x1004
45#define HDMI_INTR_I2C_ERROR (1 << 4)
46#define HDMI_INTR_I2C_FULL (1 << 3)
47#define HDMI_INTR_I2C_DONE (1 << 2)
48#define HDMI_INTR_HPD (1 << 0)
49#define HDMI_HSR 0x1008
50#define HDMI_HISR 0x100C
51#define HDMI_HI2CRDB0 0x1200
52#define HDMI_HI2CHCR 0x1240
53#define HI2C_HDCP_WRITE (0 << 2)
54#define HI2C_HDCP_RI_READ (1 << 2)
55#define HI2C_HDCP_READ (2 << 2)
56#define HI2C_EDID_READ (3 << 2)
57#define HI2C_READ_CONTINUE (1 << 1)
58#define HI2C_ENABLE_TRANSACTION (1 << 0)
59
60#define HDMI_ICRH 0x1100
61#define HDMI_HI2CTDR0 0x1244
62#define HDMI_HI2CTDR1 0x1248
63
64#define I2C_STAT_INIT 0
65#define I2C_READ_DONE 1
66#define I2C_TRANSACTION_DONE 2
67
68struct hdmi_i2c_dev {
69 struct i2c_adapter *adap;
70 struct mutex i2c_lock;
71 struct completion complete;
72 int status;
73 struct i2c_msg *msg;
74 int buf_offset;
75};
76
77static void hdmi_i2c_irq_enable(struct oaktrail_hdmi_dev *hdmi_dev)
78{
79 u32 temp;
80
81 temp = HDMI_READ(HDMI_HICR);
82 temp |= (HDMI_INTR_I2C_ERROR | HDMI_INTR_I2C_FULL | HDMI_INTR_I2C_DONE);
83 HDMI_WRITE(HDMI_HICR, temp);
84 HDMI_READ(HDMI_HICR);
85}
86
87static void hdmi_i2c_irq_disable(struct oaktrail_hdmi_dev *hdmi_dev)
88{
89 HDMI_WRITE(HDMI_HICR, 0x0);
90 HDMI_READ(HDMI_HICR);
91}
92
93static int xfer_read(struct i2c_adapter *adap, struct i2c_msg *pmsg)
94{
95 struct oaktrail_hdmi_dev *hdmi_dev = i2c_get_adapdata(adap);
96 struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
97 u32 temp;
98
99 i2c_dev->status = I2C_STAT_INIT;
100 i2c_dev->msg = pmsg;
101 i2c_dev->buf_offset = 0;
102 reinit_completion(x: &i2c_dev->complete);
103
104 /* Enable I2C transaction */
105 temp = ((pmsg->len) << 20) | HI2C_EDID_READ | HI2C_ENABLE_TRANSACTION;
106 HDMI_WRITE(HDMI_HI2CHCR, temp);
107 HDMI_READ(HDMI_HI2CHCR);
108
109 while (i2c_dev->status != I2C_TRANSACTION_DONE)
110 wait_for_completion_interruptible_timeout(x: &i2c_dev->complete,
111 timeout: 10 * HZ);
112
113 return 0;
114}
115
116static int xfer_write(struct i2c_adapter *adap, struct i2c_msg *pmsg)
117{
118 /*
119 * XXX: i2c write seems isn't useful for EDID probe, don't do anything
120 */
121 return 0;
122}
123
124static int oaktrail_hdmi_i2c_access(struct i2c_adapter *adap,
125 struct i2c_msg *pmsg,
126 int num)
127{
128 struct oaktrail_hdmi_dev *hdmi_dev = i2c_get_adapdata(adap);
129 struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
130 int i;
131
132 mutex_lock(&i2c_dev->i2c_lock);
133
134 /* Enable i2c unit */
135 HDMI_WRITE(HDMI_ICRH, 0x00008760);
136
137 /* Enable irq */
138 hdmi_i2c_irq_enable(hdmi_dev);
139 for (i = 0; i < num; i++) {
140 if (pmsg->len && pmsg->buf) {
141 if (pmsg->flags & I2C_M_RD)
142 xfer_read(adap, pmsg);
143 else
144 xfer_write(adap, pmsg);
145 }
146 pmsg++; /* next message */
147 }
148
149 /* Disable irq */
150 hdmi_i2c_irq_disable(hdmi_dev);
151
152 mutex_unlock(lock: &i2c_dev->i2c_lock);
153
154 return i;
155}
156
157static u32 oaktrail_hdmi_i2c_func(struct i2c_adapter *adapter)
158{
159 return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
160}
161
162static const struct i2c_algorithm oaktrail_hdmi_i2c_algorithm = {
163 .master_xfer = oaktrail_hdmi_i2c_access,
164 .functionality = oaktrail_hdmi_i2c_func,
165};
166
167static struct i2c_adapter oaktrail_hdmi_i2c_adapter = {
168 .name = "oaktrail_hdmi_i2c",
169 .nr = 3,
170 .owner = THIS_MODULE,
171 .algo = &oaktrail_hdmi_i2c_algorithm,
172};
173
174static void hdmi_i2c_read(struct oaktrail_hdmi_dev *hdmi_dev)
175{
176 struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
177 struct i2c_msg *msg = i2c_dev->msg;
178 u8 *buf = msg->buf;
179 u32 temp;
180 int i, offset;
181
182 offset = i2c_dev->buf_offset;
183 for (i = 0; i < 0x10; i++) {
184 temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4));
185 memcpy(buf + (offset + i * 4), &temp, 4);
186 }
187 i2c_dev->buf_offset += (0x10 * 4);
188
189 /* clearing read buffer full intr */
190 temp = HDMI_READ(HDMI_HISR);
191 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_FULL);
192 HDMI_READ(HDMI_HISR);
193
194 /* continue read transaction */
195 temp = HDMI_READ(HDMI_HI2CHCR);
196 HDMI_WRITE(HDMI_HI2CHCR, temp | HI2C_READ_CONTINUE);
197 HDMI_READ(HDMI_HI2CHCR);
198
199 i2c_dev->status = I2C_READ_DONE;
200 return;
201}
202
203static void hdmi_i2c_transaction_done(struct oaktrail_hdmi_dev *hdmi_dev)
204{
205 struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
206 u32 temp;
207
208 /* clear transaction done intr */
209 temp = HDMI_READ(HDMI_HISR);
210 HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_DONE);
211 HDMI_READ(HDMI_HISR);
212
213
214 temp = HDMI_READ(HDMI_HI2CHCR);
215 HDMI_WRITE(HDMI_HI2CHCR, temp & ~HI2C_ENABLE_TRANSACTION);
216 HDMI_READ(HDMI_HI2CHCR);
217
218 i2c_dev->status = I2C_TRANSACTION_DONE;
219 return;
220}
221
222static irqreturn_t oaktrail_hdmi_i2c_handler(int this_irq, void *dev)
223{
224 struct oaktrail_hdmi_dev *hdmi_dev = dev;
225 struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
226 u32 stat;
227
228 stat = HDMI_READ(HDMI_HISR);
229
230 if (stat & HDMI_INTR_HPD) {
231 HDMI_WRITE(HDMI_HISR, stat | HDMI_INTR_HPD);
232 HDMI_READ(HDMI_HISR);
233 }
234
235 if (stat & HDMI_INTR_I2C_FULL)
236 hdmi_i2c_read(hdmi_dev);
237
238 if (stat & HDMI_INTR_I2C_DONE)
239 hdmi_i2c_transaction_done(hdmi_dev);
240
241 complete(&i2c_dev->complete);
242
243 return IRQ_HANDLED;
244}
245
246/*
247 * choose alternate function 2 of GPIO pin 52, 53,
248 * which is used by HDMI I2C logic
249 */
250static void oaktrail_hdmi_i2c_gpio_fix(void)
251{
252 void __iomem *base;
253 unsigned int gpio_base = 0xff12c000;
254 int gpio_len = 0x1000;
255 u32 temp;
256
257 base = ioremap(offset: (resource_size_t)gpio_base, size: gpio_len);
258 if (base == NULL) {
259 DRM_ERROR("gpio ioremap fail\n");
260 return;
261 }
262
263 temp = readl(addr: base + 0x44);
264 DRM_DEBUG_DRIVER("old gpio val %x\n", temp);
265 writel(val: (temp | 0x00000a00), addr: (base + 0x44));
266 temp = readl(addr: base + 0x44);
267 DRM_DEBUG_DRIVER("new gpio val %x\n", temp);
268
269 iounmap(addr: base);
270}
271
272int oaktrail_hdmi_i2c_init(struct pci_dev *dev)
273{
274 struct oaktrail_hdmi_dev *hdmi_dev;
275 struct hdmi_i2c_dev *i2c_dev;
276 int ret;
277
278 hdmi_dev = pci_get_drvdata(pdev: dev);
279
280 i2c_dev = kzalloc(size: sizeof(struct hdmi_i2c_dev), GFP_KERNEL);
281 if (!i2c_dev)
282 return -ENOMEM;
283
284 i2c_dev->adap = &oaktrail_hdmi_i2c_adapter;
285 i2c_dev->status = I2C_STAT_INIT;
286 init_completion(x: &i2c_dev->complete);
287 mutex_init(&i2c_dev->i2c_lock);
288 i2c_set_adapdata(adap: &oaktrail_hdmi_i2c_adapter, data: hdmi_dev);
289 hdmi_dev->i2c_dev = i2c_dev;
290
291 /* Enable HDMI I2C function on gpio */
292 oaktrail_hdmi_i2c_gpio_fix();
293
294 /* request irq */
295 ret = request_irq(irq: dev->irq, handler: oaktrail_hdmi_i2c_handler, IRQF_SHARED,
296 name: oaktrail_hdmi_i2c_adapter.name, dev: hdmi_dev);
297 if (ret) {
298 DRM_ERROR("Failed to request IRQ for I2C controller\n");
299 goto free_dev;
300 }
301
302 /* Adapter registration */
303 ret = i2c_add_numbered_adapter(adap: &oaktrail_hdmi_i2c_adapter);
304 if (ret) {
305 DRM_ERROR("Failed to add I2C adapter\n");
306 goto free_irq;
307 }
308
309 return 0;
310
311free_irq:
312 free_irq(dev->irq, hdmi_dev);
313free_dev:
314 kfree(objp: i2c_dev);
315
316 return ret;
317}
318
319void oaktrail_hdmi_i2c_exit(struct pci_dev *dev)
320{
321 struct oaktrail_hdmi_dev *hdmi_dev;
322 struct hdmi_i2c_dev *i2c_dev;
323
324 hdmi_dev = pci_get_drvdata(pdev: dev);
325 i2c_del_adapter(adap: &oaktrail_hdmi_i2c_adapter);
326
327 i2c_dev = hdmi_dev->i2c_dev;
328 kfree(objp: i2c_dev);
329 free_irq(dev->irq, hdmi_dev);
330}
331

source code of linux/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c