1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright © 2006-2007 Intel Corporation |
4 | * |
5 | * Authors: |
6 | * Eric Anholt <eric@anholt.net> |
7 | * Dave Airlie <airlied@linux.ie> |
8 | * Jesse Barnes <jesse.barnes@intel.com> |
9 | */ |
10 | |
11 | #include <linux/i2c.h> |
12 | #include <linux/pm_runtime.h> |
13 | |
14 | #include <drm/drm_crtc_helper.h> |
15 | #include <drm/drm_modeset_helper_vtables.h> |
16 | #include <drm/drm_simple_kms_helper.h> |
17 | |
18 | #include "intel_bios.h" |
19 | #include "power.h" |
20 | #include "psb_drv.h" |
21 | #include "psb_intel_drv.h" |
22 | #include "psb_intel_reg.h" |
23 | |
24 | /* |
25 | * LVDS I2C backlight control macros |
26 | */ |
27 | #define BRIGHTNESS_MAX_LEVEL 100 |
28 | #define BRIGHTNESS_MASK 0xFF |
29 | #define BLC_I2C_TYPE 0x01 |
30 | #define BLC_PWM_TYPT 0x02 |
31 | |
32 | #define BLC_POLARITY_NORMAL 0 |
33 | #define BLC_POLARITY_INVERSE 1 |
34 | |
35 | #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE) |
36 | #define PSB_BLC_MIN_PWM_REG_FREQ (0x2) |
37 | #define PSB_BLC_PWM_PRECISION_FACTOR (10) |
38 | #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) |
39 | #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) |
40 | |
41 | struct psb_intel_lvds_priv { |
42 | /* |
43 | * Saved LVDO output states |
44 | */ |
45 | uint32_t savePP_ON; |
46 | uint32_t savePP_OFF; |
47 | uint32_t saveLVDS; |
48 | uint32_t savePP_CONTROL; |
49 | uint32_t savePP_CYCLE; |
50 | uint32_t savePFIT_CONTROL; |
51 | uint32_t savePFIT_PGM_RATIOS; |
52 | uint32_t saveBLC_PWM_CTL; |
53 | |
54 | struct gma_i2c_chan *i2c_bus; |
55 | }; |
56 | |
57 | |
58 | /* |
59 | * Returns the maximum level of the backlight duty cycle field. |
60 | */ |
61 | static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev) |
62 | { |
63 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
64 | u32 ret; |
65 | |
66 | if (gma_power_begin(dev, force: false)) { |
67 | ret = REG_READ(BLC_PWM_CTL); |
68 | gma_power_end(dev); |
69 | } else /* Powered off, use the saved value */ |
70 | ret = dev_priv->regs.saveBLC_PWM_CTL; |
71 | |
72 | /* Top 15bits hold the frequency mask */ |
73 | ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >> |
74 | BACKLIGHT_MODULATION_FREQ_SHIFT; |
75 | |
76 | ret *= 2; /* Return a 16bit range as needed for setting */ |
77 | if (ret == 0) |
78 | dev_err(dev->dev, "BL bug: Reg %08x save %08X\n" , |
79 | REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); |
80 | return ret; |
81 | } |
82 | |
83 | /* |
84 | * Set LVDS backlight level by I2C command |
85 | * |
86 | * FIXME: at some point we need to both track this for PM and also |
87 | * disable runtime pm on MRST if the brightness is nil (ie blanked) |
88 | */ |
89 | static int psb_lvds_i2c_set_brightness(struct drm_device *dev, |
90 | unsigned int level) |
91 | { |
92 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
93 | |
94 | struct gma_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus; |
95 | u8 out_buf[2]; |
96 | unsigned int blc_i2c_brightness; |
97 | |
98 | struct i2c_msg msgs[] = { |
99 | { |
100 | .addr = lvds_i2c_bus->slave_addr, |
101 | .flags = 0, |
102 | .len = 2, |
103 | .buf = out_buf, |
104 | } |
105 | }; |
106 | |
107 | blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level * |
108 | BRIGHTNESS_MASK / |
109 | BRIGHTNESS_MAX_LEVEL); |
110 | |
111 | if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) |
112 | blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness; |
113 | |
114 | out_buf[0] = dev_priv->lvds_bl->brightnesscmd; |
115 | out_buf[1] = (u8)blc_i2c_brightness; |
116 | |
117 | if (i2c_transfer(adap: &lvds_i2c_bus->base, msgs, num: 1) == 1) { |
118 | dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n" , |
119 | dev_priv->lvds_bl->brightnesscmd, |
120 | blc_i2c_brightness); |
121 | return 0; |
122 | } |
123 | |
124 | dev_err(dev->dev, "I2C transfer error\n" ); |
125 | return -1; |
126 | } |
127 | |
128 | |
129 | static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level) |
130 | { |
131 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
132 | |
133 | u32 max_pwm_blc; |
134 | u32 blc_pwm_duty_cycle; |
135 | |
136 | max_pwm_blc = psb_intel_lvds_get_max_backlight(dev); |
137 | |
138 | /*BLC_PWM_CTL Should be initiated while backlight device init*/ |
139 | BUG_ON(max_pwm_blc == 0); |
140 | |
141 | blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL; |
142 | |
143 | if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) |
144 | blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle; |
145 | |
146 | blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; |
147 | REG_WRITE(BLC_PWM_CTL, |
148 | (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) | |
149 | (blc_pwm_duty_cycle)); |
150 | |
151 | dev_info(dev->dev, "Backlight lvds set brightness %08x\n" , |
152 | (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) | |
153 | (blc_pwm_duty_cycle)); |
154 | |
155 | return 0; |
156 | } |
157 | |
158 | /* |
159 | * Set LVDS backlight level either by I2C or PWM |
160 | */ |
161 | void psb_intel_lvds_set_brightness(struct drm_device *dev, int level) |
162 | { |
163 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
164 | |
165 | dev_dbg(dev->dev, "backlight level is %d\n" , level); |
166 | |
167 | if (!dev_priv->lvds_bl) { |
168 | dev_err(dev->dev, "NO LVDS backlight info\n" ); |
169 | return; |
170 | } |
171 | |
172 | if (dev_priv->lvds_bl->type == BLC_I2C_TYPE) |
173 | psb_lvds_i2c_set_brightness(dev, level); |
174 | else |
175 | psb_lvds_pwm_set_brightness(dev, level); |
176 | } |
177 | |
178 | /* |
179 | * Sets the backlight level. |
180 | * |
181 | * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight(). |
182 | */ |
183 | static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level) |
184 | { |
185 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
186 | u32 blc_pwm_ctl; |
187 | |
188 | if (gma_power_begin(dev, force: false)) { |
189 | blc_pwm_ctl = REG_READ(BLC_PWM_CTL); |
190 | blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; |
191 | REG_WRITE(BLC_PWM_CTL, |
192 | (blc_pwm_ctl | |
193 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); |
194 | dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | |
195 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); |
196 | gma_power_end(dev); |
197 | } else { |
198 | blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL & |
199 | ~BACKLIGHT_DUTY_CYCLE_MASK; |
200 | dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | |
201 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); |
202 | } |
203 | } |
204 | |
205 | /* |
206 | * Sets the power state for the panel. |
207 | */ |
208 | static void psb_intel_lvds_set_power(struct drm_device *dev, bool on) |
209 | { |
210 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
211 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
212 | u32 pp_status; |
213 | |
214 | if (!gma_power_begin(dev, force: true)) { |
215 | dev_err(dev->dev, "set power, chip off!\n" ); |
216 | return; |
217 | } |
218 | |
219 | if (on) { |
220 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | |
221 | POWER_TARGET_ON); |
222 | do { |
223 | pp_status = REG_READ(PP_STATUS); |
224 | } while ((pp_status & PP_ON) == 0); |
225 | |
226 | psb_intel_lvds_set_backlight(dev, |
227 | level: mode_dev->backlight_duty_cycle); |
228 | } else { |
229 | psb_intel_lvds_set_backlight(dev, level: 0); |
230 | |
231 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & |
232 | ~POWER_TARGET_ON); |
233 | do { |
234 | pp_status = REG_READ(PP_STATUS); |
235 | } while (pp_status & PP_ON); |
236 | } |
237 | |
238 | gma_power_end(dev); |
239 | } |
240 | |
241 | static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode) |
242 | { |
243 | struct drm_device *dev = encoder->dev; |
244 | |
245 | if (mode == DRM_MODE_DPMS_ON) |
246 | psb_intel_lvds_set_power(dev, on: true); |
247 | else |
248 | psb_intel_lvds_set_power(dev, on: false); |
249 | |
250 | /* XXX: We never power down the LVDS pairs. */ |
251 | } |
252 | |
253 | static void psb_intel_lvds_save(struct drm_connector *connector) |
254 | { |
255 | struct drm_device *dev = connector->dev; |
256 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
257 | struct gma_encoder *gma_encoder = gma_attached_encoder(connector); |
258 | struct psb_intel_lvds_priv *lvds_priv = |
259 | (struct psb_intel_lvds_priv *)gma_encoder->dev_priv; |
260 | |
261 | lvds_priv->savePP_ON = REG_READ(LVDSPP_ON); |
262 | lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF); |
263 | lvds_priv->saveLVDS = REG_READ(LVDS); |
264 | lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL); |
265 | lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE); |
266 | /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/ |
267 | lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); |
268 | lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); |
269 | lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS); |
270 | |
271 | /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/ |
272 | dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL & |
273 | BACKLIGHT_DUTY_CYCLE_MASK); |
274 | |
275 | /* |
276 | * If the light is off at server startup, |
277 | * just make it full brightness |
278 | */ |
279 | if (dev_priv->backlight_duty_cycle == 0) |
280 | dev_priv->backlight_duty_cycle = |
281 | psb_intel_lvds_get_max_backlight(dev); |
282 | |
283 | dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n" , |
284 | lvds_priv->savePP_ON, |
285 | lvds_priv->savePP_OFF, |
286 | lvds_priv->saveLVDS, |
287 | lvds_priv->savePP_CONTROL, |
288 | lvds_priv->savePP_CYCLE, |
289 | lvds_priv->saveBLC_PWM_CTL); |
290 | } |
291 | |
292 | static void psb_intel_lvds_restore(struct drm_connector *connector) |
293 | { |
294 | struct drm_device *dev = connector->dev; |
295 | u32 pp_status; |
296 | struct gma_encoder *gma_encoder = gma_attached_encoder(connector); |
297 | struct psb_intel_lvds_priv *lvds_priv = |
298 | (struct psb_intel_lvds_priv *)gma_encoder->dev_priv; |
299 | |
300 | dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n" , |
301 | lvds_priv->savePP_ON, |
302 | lvds_priv->savePP_OFF, |
303 | lvds_priv->saveLVDS, |
304 | lvds_priv->savePP_CONTROL, |
305 | lvds_priv->savePP_CYCLE, |
306 | lvds_priv->saveBLC_PWM_CTL); |
307 | |
308 | REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); |
309 | REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); |
310 | REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS); |
311 | REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON); |
312 | REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF); |
313 | /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/ |
314 | REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE); |
315 | REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL); |
316 | REG_WRITE(LVDS, lvds_priv->saveLVDS); |
317 | |
318 | if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) { |
319 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | |
320 | POWER_TARGET_ON); |
321 | do { |
322 | pp_status = REG_READ(PP_STATUS); |
323 | } while ((pp_status & PP_ON) == 0); |
324 | } else { |
325 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & |
326 | ~POWER_TARGET_ON); |
327 | do { |
328 | pp_status = REG_READ(PP_STATUS); |
329 | } while (pp_status & PP_ON); |
330 | } |
331 | } |
332 | |
333 | enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector, |
334 | struct drm_display_mode *mode) |
335 | { |
336 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev: connector->dev); |
337 | struct gma_encoder *gma_encoder = gma_attached_encoder(connector); |
338 | struct drm_display_mode *fixed_mode = |
339 | dev_priv->mode_dev.panel_fixed_mode; |
340 | |
341 | if (gma_encoder->type == INTEL_OUTPUT_MIPI2) |
342 | fixed_mode = dev_priv->mode_dev.panel_fixed_mode2; |
343 | |
344 | /* just in case */ |
345 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
346 | return MODE_NO_DBLESCAN; |
347 | |
348 | /* just in case */ |
349 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
350 | return MODE_NO_INTERLACE; |
351 | |
352 | if (fixed_mode) { |
353 | if (mode->hdisplay > fixed_mode->hdisplay) |
354 | return MODE_PANEL; |
355 | if (mode->vdisplay > fixed_mode->vdisplay) |
356 | return MODE_PANEL; |
357 | } |
358 | return MODE_OK; |
359 | } |
360 | |
361 | bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder, |
362 | const struct drm_display_mode *mode, |
363 | struct drm_display_mode *adjusted_mode) |
364 | { |
365 | struct drm_device *dev = encoder->dev; |
366 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
367 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
368 | struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); |
369 | struct drm_encoder *tmp_encoder; |
370 | struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode; |
371 | struct gma_encoder *gma_encoder = to_gma_encoder(encoder); |
372 | |
373 | if (gma_encoder->type == INTEL_OUTPUT_MIPI2) |
374 | panel_fixed_mode = mode_dev->panel_fixed_mode2; |
375 | |
376 | /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */ |
377 | if (!IS_MRST(dev) && gma_crtc->pipe == 0) { |
378 | pr_err("Can't support LVDS on pipe A\n" ); |
379 | return false; |
380 | } |
381 | if (IS_MRST(dev) && gma_crtc->pipe != 0) { |
382 | pr_err("Must use PIPE A\n" ); |
383 | return false; |
384 | } |
385 | /* Should never happen!! */ |
386 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, |
387 | head) { |
388 | if (tmp_encoder != encoder |
389 | && tmp_encoder->crtc == encoder->crtc) { |
390 | pr_err("Can't enable LVDS and another encoder on the same pipe\n" ); |
391 | return false; |
392 | } |
393 | } |
394 | |
395 | /* |
396 | * If we have timings from the BIOS for the panel, put them in |
397 | * to the adjusted mode. The CRTC will be set up for this mode, |
398 | * with the panel scaling set up to source from the H/VDisplay |
399 | * of the original mode. |
400 | */ |
401 | if (panel_fixed_mode != NULL) { |
402 | adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; |
403 | adjusted_mode->hsync_start = panel_fixed_mode->hsync_start; |
404 | adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; |
405 | adjusted_mode->htotal = panel_fixed_mode->htotal; |
406 | adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; |
407 | adjusted_mode->vsync_start = panel_fixed_mode->vsync_start; |
408 | adjusted_mode->vsync_end = panel_fixed_mode->vsync_end; |
409 | adjusted_mode->vtotal = panel_fixed_mode->vtotal; |
410 | adjusted_mode->clock = panel_fixed_mode->clock; |
411 | drm_mode_set_crtcinfo(p: adjusted_mode, |
412 | CRTC_INTERLACE_HALVE_V); |
413 | } |
414 | |
415 | /* |
416 | * XXX: It would be nice to support lower refresh rates on the |
417 | * panels to reduce power consumption, and perhaps match the |
418 | * user's requested refresh rate. |
419 | */ |
420 | |
421 | return true; |
422 | } |
423 | |
424 | static void psb_intel_lvds_prepare(struct drm_encoder *encoder) |
425 | { |
426 | struct drm_device *dev = encoder->dev; |
427 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
428 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
429 | |
430 | if (!gma_power_begin(dev, force: true)) |
431 | return; |
432 | |
433 | mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); |
434 | mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL & |
435 | BACKLIGHT_DUTY_CYCLE_MASK); |
436 | |
437 | psb_intel_lvds_set_power(dev, on: false); |
438 | |
439 | gma_power_end(dev); |
440 | } |
441 | |
442 | static void psb_intel_lvds_commit(struct drm_encoder *encoder) |
443 | { |
444 | struct drm_device *dev = encoder->dev; |
445 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
446 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
447 | |
448 | if (mode_dev->backlight_duty_cycle == 0) |
449 | mode_dev->backlight_duty_cycle = |
450 | psb_intel_lvds_get_max_backlight(dev); |
451 | |
452 | psb_intel_lvds_set_power(dev, on: true); |
453 | } |
454 | |
455 | static void psb_intel_lvds_mode_set(struct drm_encoder *encoder, |
456 | struct drm_display_mode *mode, |
457 | struct drm_display_mode *adjusted_mode) |
458 | { |
459 | struct drm_device *dev = encoder->dev; |
460 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
461 | u32 pfit_control; |
462 | |
463 | /* |
464 | * The LVDS pin pair will already have been turned on in the |
465 | * psb_intel_crtc_mode_set since it has a large impact on the DPLL |
466 | * settings. |
467 | */ |
468 | |
469 | /* |
470 | * Enable automatic panel scaling so that non-native modes fill the |
471 | * screen. Should be enabled before the pipe is enabled, according to |
472 | * register description and PRM. |
473 | */ |
474 | if (mode->hdisplay != adjusted_mode->hdisplay || |
475 | mode->vdisplay != adjusted_mode->vdisplay) |
476 | pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | |
477 | HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR | |
478 | HORIZ_INTERP_BILINEAR); |
479 | else |
480 | pfit_control = 0; |
481 | |
482 | if (dev_priv->lvds_dither) |
483 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
484 | |
485 | REG_WRITE(PFIT_CONTROL, pfit_control); |
486 | } |
487 | |
488 | /* |
489 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
490 | */ |
491 | static int psb_intel_lvds_get_modes(struct drm_connector *connector) |
492 | { |
493 | struct drm_device *dev = connector->dev; |
494 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
495 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
496 | int ret = 0; |
497 | |
498 | if (!IS_MRST(dev)) |
499 | ret = psb_intel_ddc_get_modes(connector, adapter: connector->ddc); |
500 | |
501 | if (ret) |
502 | return ret; |
503 | |
504 | if (mode_dev->panel_fixed_mode != NULL) { |
505 | struct drm_display_mode *mode = |
506 | drm_mode_duplicate(dev, mode: mode_dev->panel_fixed_mode); |
507 | drm_mode_probed_add(connector, mode); |
508 | return 1; |
509 | } |
510 | |
511 | return 0; |
512 | } |
513 | |
514 | void psb_intel_lvds_destroy(struct drm_connector *connector) |
515 | { |
516 | struct gma_connector *gma_connector = to_gma_connector(connector); |
517 | struct gma_i2c_chan *ddc_bus = to_gma_i2c_chan(connector->ddc); |
518 | |
519 | gma_i2c_destroy(chan: ddc_bus); |
520 | drm_connector_cleanup(connector); |
521 | kfree(objp: gma_connector); |
522 | } |
523 | |
524 | int psb_intel_lvds_set_property(struct drm_connector *connector, |
525 | struct drm_property *property, |
526 | uint64_t value) |
527 | { |
528 | struct drm_encoder *encoder = connector->encoder; |
529 | |
530 | if (!encoder) |
531 | return -1; |
532 | |
533 | if (!strcmp(property->name, "scaling mode" )) { |
534 | struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); |
535 | uint64_t curval; |
536 | |
537 | if (!crtc) |
538 | goto set_prop_error; |
539 | |
540 | switch (value) { |
541 | case DRM_MODE_SCALE_FULLSCREEN: |
542 | break; |
543 | case DRM_MODE_SCALE_NO_SCALE: |
544 | break; |
545 | case DRM_MODE_SCALE_ASPECT: |
546 | break; |
547 | default: |
548 | goto set_prop_error; |
549 | } |
550 | |
551 | if (drm_object_property_get_value(obj: &connector->base, |
552 | property, |
553 | value: &curval)) |
554 | goto set_prop_error; |
555 | |
556 | if (curval == value) |
557 | goto set_prop_done; |
558 | |
559 | if (drm_object_property_set_value(obj: &connector->base, |
560 | property, |
561 | val: value)) |
562 | goto set_prop_error; |
563 | |
564 | if (crtc->saved_mode.hdisplay != 0 && |
565 | crtc->saved_mode.vdisplay != 0) { |
566 | if (!drm_crtc_helper_set_mode(crtc: encoder->crtc, |
567 | mode: &crtc->saved_mode, |
568 | x: encoder->crtc->x, |
569 | y: encoder->crtc->y, |
570 | old_fb: encoder->crtc->primary->fb)) |
571 | goto set_prop_error; |
572 | } |
573 | } else if (!strcmp(property->name, "backlight" )) { |
574 | if (drm_object_property_set_value(obj: &connector->base, |
575 | property, |
576 | val: value)) |
577 | goto set_prop_error; |
578 | else |
579 | gma_backlight_set(dev: encoder->dev, v: value); |
580 | } else if (!strcmp(property->name, "DPMS" )) { |
581 | const struct drm_encoder_helper_funcs *hfuncs |
582 | = encoder->helper_private; |
583 | hfuncs->dpms(encoder, value); |
584 | } |
585 | |
586 | set_prop_done: |
587 | return 0; |
588 | set_prop_error: |
589 | return -1; |
590 | } |
591 | |
592 | static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = { |
593 | .dpms = psb_intel_lvds_encoder_dpms, |
594 | .mode_fixup = psb_intel_lvds_mode_fixup, |
595 | .prepare = psb_intel_lvds_prepare, |
596 | .mode_set = psb_intel_lvds_mode_set, |
597 | .commit = psb_intel_lvds_commit, |
598 | }; |
599 | |
600 | const struct drm_connector_helper_funcs |
601 | psb_intel_lvds_connector_helper_funcs = { |
602 | .get_modes = psb_intel_lvds_get_modes, |
603 | .mode_valid = psb_intel_lvds_mode_valid, |
604 | .best_encoder = gma_best_encoder, |
605 | }; |
606 | |
607 | const struct drm_connector_funcs psb_intel_lvds_connector_funcs = { |
608 | .dpms = drm_helper_connector_dpms, |
609 | .fill_modes = drm_helper_probe_single_connector_modes, |
610 | .set_property = psb_intel_lvds_set_property, |
611 | .destroy = psb_intel_lvds_destroy, |
612 | }; |
613 | |
614 | /** |
615 | * psb_intel_lvds_init - setup LVDS connectors on this device |
616 | * @dev: drm device |
617 | * @mode_dev: mode device |
618 | * |
619 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
620 | * modes we can display on the LVDS panel (if present). |
621 | */ |
622 | void psb_intel_lvds_init(struct drm_device *dev, |
623 | struct psb_intel_mode_device *mode_dev) |
624 | { |
625 | struct gma_encoder *gma_encoder; |
626 | struct gma_connector *gma_connector; |
627 | struct psb_intel_lvds_priv *lvds_priv; |
628 | struct drm_connector *connector; |
629 | struct drm_encoder *encoder; |
630 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
631 | struct drm_crtc *crtc; |
632 | struct drm_psb_private *dev_priv = to_drm_psb_private(dev); |
633 | struct gma_i2c_chan *ddc_bus; |
634 | u32 lvds; |
635 | int pipe; |
636 | int ret; |
637 | |
638 | gma_encoder = kzalloc(size: sizeof(struct gma_encoder), GFP_KERNEL); |
639 | if (!gma_encoder) { |
640 | dev_err(dev->dev, "gma_encoder allocation error\n" ); |
641 | return; |
642 | } |
643 | encoder = &gma_encoder->base; |
644 | |
645 | gma_connector = kzalloc(size: sizeof(struct gma_connector), GFP_KERNEL); |
646 | if (!gma_connector) { |
647 | dev_err(dev->dev, "gma_connector allocation error\n" ); |
648 | goto err_free_encoder; |
649 | } |
650 | |
651 | lvds_priv = kzalloc(size: sizeof(struct psb_intel_lvds_priv), GFP_KERNEL); |
652 | if (!lvds_priv) { |
653 | dev_err(dev->dev, "LVDS private allocation error\n" ); |
654 | goto err_free_connector; |
655 | } |
656 | |
657 | gma_encoder->dev_priv = lvds_priv; |
658 | |
659 | connector = &gma_connector->base; |
660 | gma_connector->save = psb_intel_lvds_save; |
661 | gma_connector->restore = psb_intel_lvds_restore; |
662 | |
663 | /* Set up the DDC bus. */ |
664 | ddc_bus = gma_i2c_create(dev, GPIOC, name: "LVDSDDC_C" ); |
665 | if (!ddc_bus) { |
666 | dev_printk(KERN_ERR, dev->dev, |
667 | "DDC bus registration " "failed.\n" ); |
668 | goto err_free_lvds_priv; |
669 | } |
670 | |
671 | ret = drm_connector_init_with_ddc(dev, connector, |
672 | funcs: &psb_intel_lvds_connector_funcs, |
673 | DRM_MODE_CONNECTOR_LVDS, |
674 | ddc: &ddc_bus->base); |
675 | if (ret) |
676 | goto err_ddc_destroy; |
677 | |
678 | ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS); |
679 | if (ret) |
680 | goto err_connector_cleanup; |
681 | |
682 | gma_connector_attach_encoder(connector: gma_connector, encoder: gma_encoder); |
683 | gma_encoder->type = INTEL_OUTPUT_LVDS; |
684 | |
685 | drm_encoder_helper_add(encoder, funcs: &psb_intel_lvds_helper_funcs); |
686 | drm_connector_helper_add(connector, |
687 | funcs: &psb_intel_lvds_connector_helper_funcs); |
688 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
689 | connector->interlace_allowed = false; |
690 | connector->doublescan_allowed = false; |
691 | |
692 | /*Attach connector properties*/ |
693 | drm_object_attach_property(obj: &connector->base, |
694 | property: dev->mode_config.scaling_mode_property, |
695 | DRM_MODE_SCALE_FULLSCREEN); |
696 | drm_object_attach_property(obj: &connector->base, |
697 | property: dev_priv->backlight_property, |
698 | BRIGHTNESS_MAX_LEVEL); |
699 | |
700 | /* |
701 | * Set up I2C bus |
702 | * FIXME: distroy i2c_bus when exit |
703 | */ |
704 | lvds_priv->i2c_bus = gma_i2c_create(dev, GPIOB, name: "LVDSBLC_B" ); |
705 | if (!lvds_priv->i2c_bus) { |
706 | dev_printk(KERN_ERR, |
707 | dev->dev, "I2C bus registration failed.\n" ); |
708 | goto err_encoder_cleanup; |
709 | } |
710 | lvds_priv->i2c_bus->slave_addr = 0x2C; |
711 | dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus; |
712 | |
713 | /* |
714 | * LVDS discovery: |
715 | * 1) check for EDID on DDC |
716 | * 2) check for VBT data |
717 | * 3) check to see if LVDS is already on |
718 | * if none of the above, no panel |
719 | * 4) make sure lid is open |
720 | * if closed, act like it's not there for now |
721 | */ |
722 | |
723 | /* |
724 | * Attempt to get the fixed panel mode from DDC. Assume that the |
725 | * preferred mode is the right one. |
726 | */ |
727 | mutex_lock(&dev->mode_config.mutex); |
728 | psb_intel_ddc_get_modes(connector, adapter: &ddc_bus->base); |
729 | |
730 | list_for_each_entry(scan, &connector->probed_modes, head) { |
731 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
732 | mode_dev->panel_fixed_mode = |
733 | drm_mode_duplicate(dev, mode: scan); |
734 | DRM_DEBUG_KMS("Using mode from DDC\n" ); |
735 | goto out; /* FIXME: check for quirks */ |
736 | } |
737 | } |
738 | |
739 | /* Failed to get EDID, what about VBT? do we need this? */ |
740 | if (dev_priv->lfp_lvds_vbt_mode) { |
741 | mode_dev->panel_fixed_mode = |
742 | drm_mode_duplicate(dev, mode: dev_priv->lfp_lvds_vbt_mode); |
743 | |
744 | if (mode_dev->panel_fixed_mode) { |
745 | mode_dev->panel_fixed_mode->type |= |
746 | DRM_MODE_TYPE_PREFERRED; |
747 | DRM_DEBUG_KMS("Using mode from VBT\n" ); |
748 | goto out; |
749 | } |
750 | } |
751 | |
752 | /* |
753 | * If we didn't get EDID, try checking if the panel is already turned |
754 | * on. If so, assume that whatever is currently programmed is the |
755 | * correct mode. |
756 | */ |
757 | lvds = REG_READ(LVDS); |
758 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
759 | crtc = psb_intel_get_crtc_from_pipe(dev, pipe); |
760 | |
761 | if (crtc && (lvds & LVDS_PORT_EN)) { |
762 | mode_dev->panel_fixed_mode = |
763 | psb_intel_crtc_mode_get(dev, crtc); |
764 | if (mode_dev->panel_fixed_mode) { |
765 | mode_dev->panel_fixed_mode->type |= |
766 | DRM_MODE_TYPE_PREFERRED; |
767 | DRM_DEBUG_KMS("Using pre-programmed mode\n" ); |
768 | goto out; /* FIXME: check for quirks */ |
769 | } |
770 | } |
771 | |
772 | /* If we still don't have a mode after all that, give up. */ |
773 | if (!mode_dev->panel_fixed_mode) { |
774 | dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n" ); |
775 | goto err_unlock; |
776 | } |
777 | |
778 | /* |
779 | * Blacklist machines with BIOSes that list an LVDS panel without |
780 | * actually having one. |
781 | */ |
782 | out: |
783 | mutex_unlock(lock: &dev->mode_config.mutex); |
784 | return; |
785 | |
786 | err_unlock: |
787 | mutex_unlock(lock: &dev->mode_config.mutex); |
788 | gma_i2c_destroy(chan: lvds_priv->i2c_bus); |
789 | err_encoder_cleanup: |
790 | drm_encoder_cleanup(encoder); |
791 | err_connector_cleanup: |
792 | drm_connector_cleanup(connector); |
793 | err_ddc_destroy: |
794 | gma_i2c_destroy(chan: ddc_bus); |
795 | err_free_lvds_priv: |
796 | kfree(objp: lvds_priv); |
797 | err_free_connector: |
798 | kfree(objp: gma_connector); |
799 | err_free_encoder: |
800 | kfree(objp: gma_encoder); |
801 | } |
802 | |
803 | |