1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7#include <linux/bitfield.h>
8#include <linux/mtd/spi-nor.h>
9#include <linux/slab.h>
10#include <linux/sort.h>
11
12#include "core.h"
13
14#define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
15#define SFDP_PARAM_HEADER_PTP(p) \
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19#define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
20
21#define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */
22#define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
23#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
24#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
25#define SFDP_SCCR_MAP_ID 0xff87 /*
26 * Status, Control and Configuration
27 * Register Map.
28 */
29#define SFDP_SCCR_MAP_MC_ID 0xff88 /*
30 * Status, Control and Configuration
31 * Register Map Offsets for Multi-Chip
32 * SPI Memory Devices.
33 */
34
35#define SFDP_SIGNATURE 0x50444653U
36
37struct sfdp_header {
38 u32 signature; /* Ox50444653U <=> "SFDP" */
39 u8 minor;
40 u8 major;
41 u8 nph; /* 0-base number of parameter headers */
42 u8 unused;
43
44 /* Basic Flash Parameter Table. */
45 struct sfdp_parameter_header bfpt_header;
46};
47
48/* Fast Read settings. */
49struct sfdp_bfpt_read {
50 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
51 u32 hwcaps;
52
53 /*
54 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
55 * whether the Fast Read x-y-z command is supported.
56 */
57 u32 supported_dword;
58 u32 supported_bit;
59
60 /*
61 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
62 * encodes the op code, the number of mode clocks and the number of wait
63 * states to be used by Fast Read x-y-z command.
64 */
65 u32 settings_dword;
66 u32 settings_shift;
67
68 /* The SPI protocol for this Fast Read x-y-z command. */
69 enum spi_nor_protocol proto;
70};
71
72struct sfdp_bfpt_erase {
73 /*
74 * The half-word at offset <shift> in DWORD <dword> encodes the
75 * op code and erase sector size to be used by Sector Erase commands.
76 */
77 u32 dword;
78 u32 shift;
79};
80
81#define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22)
82#define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22)
83#define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22)
84#define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22)
85#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22)
86
87#define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16)
88#define SMPT_CMD_READ_DUMMY_SHIFT 16
89#define SMPT_CMD_READ_DUMMY(_cmd) \
90 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)
91#define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL
92
93#define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24)
94#define SMPT_CMD_READ_DATA_SHIFT 24
95#define SMPT_CMD_READ_DATA(_cmd) \
96 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)
97
98#define SMPT_CMD_OPCODE_MASK GENMASK(15, 8)
99#define SMPT_CMD_OPCODE_SHIFT 8
100#define SMPT_CMD_OPCODE(_cmd) \
101 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)
102
103#define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16)
104#define SMPT_MAP_REGION_COUNT_SHIFT 16
105#define SMPT_MAP_REGION_COUNT(_header) \
106 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \
107 SMPT_MAP_REGION_COUNT_SHIFT) + 1)
108
109#define SMPT_MAP_ID_MASK GENMASK(15, 8)
110#define SMPT_MAP_ID_SHIFT 8
111#define SMPT_MAP_ID(_header) \
112 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)
113
114#define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8)
115#define SMPT_MAP_REGION_SIZE_SHIFT 8
116#define SMPT_MAP_REGION_SIZE(_region) \
117 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \
118 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)
119
120#define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0)
121#define SMPT_MAP_REGION_ERASE_TYPE(_region) \
122 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)
123
124#define SMPT_DESC_TYPE_MAP BIT(1)
125#define SMPT_DESC_END BIT(0)
126
127#define SFDP_4BAIT_DWORD_MAX 2
128
129struct sfdp_4bait {
130 /* The hardware capability. */
131 u32 hwcaps;
132
133 /*
134 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether
135 * the associated 4-byte address op code is supported.
136 */
137 u32 supported_bit;
138};
139
140/**
141 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,
142 * addr_nbytes and read_dummy members of the struct spi_nor
143 * should be previously set.
144 * @nor: pointer to a 'struct spi_nor'
145 * @addr: offset in the serial flash memory
146 * @len: number of bytes to read
147 * @buf: buffer where the data is copied into (dma-safe memory)
148 *
149 * Return: 0 on success, -errno otherwise.
150 */
151static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
152{
153 ssize_t ret;
154
155 while (len) {
156 ret = spi_nor_read_data(nor, from: addr, len, buf);
157 if (ret < 0)
158 return ret;
159 if (!ret || ret > len)
160 return -EIO;
161
162 buf += ret;
163 addr += ret;
164 len -= ret;
165 }
166 return 0;
167}
168
169/**
170 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
171 * @nor: pointer to a 'struct spi_nor'
172 * @addr: offset in the SFDP area to start reading data from
173 * @len: number of bytes to read
174 * @buf: buffer where the SFDP data are copied into (dma-safe memory)
175 *
176 * Whatever the actual numbers of bytes for address and dummy cycles are
177 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
178 * followed by a 3-byte address and 8 dummy clock cycles.
179 *
180 * Return: 0 on success, -errno otherwise.
181 */
182static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
183 size_t len, void *buf)
184{
185 u8 addr_nbytes, read_opcode, read_dummy;
186 int ret;
187
188 read_opcode = nor->read_opcode;
189 addr_nbytes = nor->addr_nbytes;
190 read_dummy = nor->read_dummy;
191
192 nor->read_opcode = SPINOR_OP_RDSFDP;
193 nor->addr_nbytes = 3;
194 nor->read_dummy = 8;
195
196 ret = spi_nor_read_raw(nor, addr, len, buf);
197
198 nor->read_opcode = read_opcode;
199 nor->addr_nbytes = addr_nbytes;
200 nor->read_dummy = read_dummy;
201
202 return ret;
203}
204
205/**
206 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
207 * @nor: pointer to a 'struct spi_nor'
208 * @addr: offset in the SFDP area to start reading data from
209 * @len: number of bytes to read
210 * @buf: buffer where the SFDP data are copied into
211 *
212 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
213 * guaranteed to be dma-safe.
214 *
215 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
216 * otherwise.
217 */
218static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
219 size_t len, void *buf)
220{
221 void *dma_safe_buf;
222 int ret;
223
224 dma_safe_buf = kmalloc(size: len, GFP_KERNEL);
225 if (!dma_safe_buf)
226 return -ENOMEM;
227
228 ret = spi_nor_read_sfdp(nor, addr, len, buf: dma_safe_buf);
229 memcpy(buf, dma_safe_buf, len);
230 kfree(objp: dma_safe_buf);
231
232 return ret;
233}
234
235static void
236spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
237 u16 half,
238 enum spi_nor_protocol proto)
239{
240 read->num_mode_clocks = (half >> 5) & 0x07;
241 read->num_wait_states = (half >> 0) & 0x1f;
242 read->opcode = (half >> 8) & 0xff;
243 read->proto = proto;
244}
245
246static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
247 /* Fast Read 1-1-2 */
248 {
249 SNOR_HWCAPS_READ_1_1_2,
250 SFDP_DWORD(1), BIT(16), /* Supported bit */
251 SFDP_DWORD(4), 0, /* Settings */
252 SNOR_PROTO_1_1_2,
253 },
254
255 /* Fast Read 1-2-2 */
256 {
257 SNOR_HWCAPS_READ_1_2_2,
258 SFDP_DWORD(1), BIT(20), /* Supported bit */
259 SFDP_DWORD(4), 16, /* Settings */
260 SNOR_PROTO_1_2_2,
261 },
262
263 /* Fast Read 2-2-2 */
264 {
265 SNOR_HWCAPS_READ_2_2_2,
266 SFDP_DWORD(5), BIT(0), /* Supported bit */
267 SFDP_DWORD(6), 16, /* Settings */
268 SNOR_PROTO_2_2_2,
269 },
270
271 /* Fast Read 1-1-4 */
272 {
273 SNOR_HWCAPS_READ_1_1_4,
274 SFDP_DWORD(1), BIT(22), /* Supported bit */
275 SFDP_DWORD(3), 16, /* Settings */
276 SNOR_PROTO_1_1_4,
277 },
278
279 /* Fast Read 1-4-4 */
280 {
281 SNOR_HWCAPS_READ_1_4_4,
282 SFDP_DWORD(1), BIT(21), /* Supported bit */
283 SFDP_DWORD(3), 0, /* Settings */
284 SNOR_PROTO_1_4_4,
285 },
286
287 /* Fast Read 4-4-4 */
288 {
289 SNOR_HWCAPS_READ_4_4_4,
290 SFDP_DWORD(5), BIT(4), /* Supported bit */
291 SFDP_DWORD(7), 16, /* Settings */
292 SNOR_PROTO_4_4_4,
293 },
294};
295
296static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
297 /* Erase Type 1 in DWORD8 bits[15:0] */
298 {SFDP_DWORD(8), 0},
299
300 /* Erase Type 2 in DWORD8 bits[31:16] */
301 {SFDP_DWORD(8), 16},
302
303 /* Erase Type 3 in DWORD9 bits[15:0] */
304 {SFDP_DWORD(9), 0},
305
306 /* Erase Type 4 in DWORD9 bits[31:16] */
307 {SFDP_DWORD(9), 16},
308};
309
310/**
311 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
312 * @erase: pointer to a structure that describes a SPI NOR erase type
313 * @size: the size of the sector/block erased by the erase type
314 * @opcode: the SPI command op code to erase the sector/block
315 * @i: erase type index as sorted in the Basic Flash Parameter Table
316 *
317 * The supported Erase Types will be sorted at init in ascending order, with
318 * the smallest Erase Type size being the first member in the erase_type array
319 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in
320 * the Basic Flash Parameter Table since it will be used later on to
321 * synchronize with the supported Erase Types defined in SFDP optional tables.
322 */
323static void
324spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,
325 u32 size, u8 opcode, u8 i)
326{
327 erase->idx = i;
328 spi_nor_set_erase_type(erase, size, opcode);
329}
330
331/**
332 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size
333 * @l: member in the left half of the map's erase_type array
334 * @r: member in the right half of the map's erase_type array
335 *
336 * Comparison function used in the sort() call to sort in ascending order the
337 * map's erase types, the smallest erase type size being the first member in the
338 * sorted erase_type array.
339 *
340 * Return: the result of @l->size - @r->size
341 */
342static int spi_nor_map_cmp_erase_type(const void *l, const void *r)
343{
344 const struct spi_nor_erase_type *left = l, *right = r;
345
346 return left->size - right->size;
347}
348
349/**
350 * spi_nor_sort_erase_mask() - sort erase mask
351 * @map: the erase map of the SPI NOR
352 * @erase_mask: the erase type mask to be sorted
353 *
354 * Replicate the sort done for the map's erase types in BFPT: sort the erase
355 * mask in ascending order with the smallest erase type size starting from
356 * BIT(0) in the sorted erase mask.
357 *
358 * Return: sorted erase mask.
359 */
360static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)
361{
362 struct spi_nor_erase_type *erase_type = map->erase_type;
363 int i;
364 u8 sorted_erase_mask = 0;
365
366 if (!erase_mask)
367 return 0;
368
369 /* Replicate the sort done for the map's erase types. */
370 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
371 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))
372 sorted_erase_mask |= BIT(i);
373
374 return sorted_erase_mask;
375}
376
377/**
378 * spi_nor_regions_sort_erase_types() - sort erase types in each region
379 * @map: the erase map of the SPI NOR
380 *
381 * Function assumes that the erase types defined in the erase map are already
382 * sorted in ascending order, with the smallest erase type size being the first
383 * member in the erase_type array. It replicates the sort done for the map's
384 * erase types. Each region's erase bitmask will indicate which erase types are
385 * supported from the sorted erase types defined in the erase map.
386 * Sort the all region's erase type at init in order to speed up the process of
387 * finding the best erase command at runtime.
388 */
389static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
390{
391 struct spi_nor_erase_region *region = map->regions;
392 u8 region_erase_mask, sorted_erase_mask;
393
394 while (region) {
395 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK;
396
397 sorted_erase_mask = spi_nor_sort_erase_mask(map,
398 erase_mask: region_erase_mask);
399
400 /* Overwrite erase mask. */
401 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) |
402 sorted_erase_mask;
403
404 region = spi_nor_region_next(region);
405 }
406}
407
408/**
409 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
410 * @nor: pointer to a 'struct spi_nor'
411 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing
412 * the Basic Flash Parameter Table length and version
413 *
414 * The Basic Flash Parameter Table is the main and only mandatory table as
415 * defined by the SFDP (JESD216) specification.
416 * It provides us with the total size (memory density) of the data array and
417 * the number of address bytes for Fast Read, Page Program and Sector Erase
418 * commands.
419 * For Fast READ commands, it also gives the number of mode clock cycles and
420 * wait states (regrouped in the number of dummy clock cycles) for each
421 * supported instruction op code.
422 * For Page Program, the page size is now available since JESD216 rev A, however
423 * the supported instruction op codes are still not provided.
424 * For Sector Erase commands, this table stores the supported instruction op
425 * codes and the associated sector sizes.
426 * Finally, the Quad Enable Requirements (QER) are also available since JESD216
427 * rev A. The QER bits encode the manufacturer dependent procedure to be
428 * executed to set the Quad Enable (QE) bit in some internal register of the
429 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
430 * sending any Quad SPI command to the memory. Actually, setting the QE bit
431 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
432 * and IO3 hence enabling 4 (Quad) I/O lines.
433 *
434 * Return: 0 on success, -errno otherwise.
435 */
436static int spi_nor_parse_bfpt(struct spi_nor *nor,
437 const struct sfdp_parameter_header *bfpt_header)
438{
439 struct spi_nor_flash_parameter *params = nor->params;
440 struct spi_nor_erase_map *map = &params->erase_map;
441 struct spi_nor_erase_type *erase_type = map->erase_type;
442 struct sfdp_bfpt bfpt;
443 size_t len;
444 int i, cmd, err;
445 u32 addr, val;
446 u32 dword;
447 u16 half;
448 u8 erase_mask;
449
450 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
451 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
452 return -EINVAL;
453
454 /* Read the Basic Flash Parameter Table. */
455 len = min_t(size_t, sizeof(bfpt),
456 bfpt_header->length * sizeof(u32));
457 addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
458 memset(&bfpt, 0, sizeof(bfpt));
459 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, buf: &bfpt);
460 if (err < 0)
461 return err;
462
463 /* Fix endianness of the BFPT DWORDs. */
464 le32_to_cpu_array(buf: bfpt.dwords, BFPT_DWORD_MAX);
465
466 /* Number of address bytes. */
467 switch (bfpt.dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
468 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
469 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
470 params->addr_nbytes = 3;
471 params->addr_mode_nbytes = 3;
472 break;
473
474 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
475 params->addr_nbytes = 4;
476 params->addr_mode_nbytes = 4;
477 break;
478
479 default:
480 break;
481 }
482
483 /* Flash Memory Density (in bits). */
484 val = bfpt.dwords[SFDP_DWORD(2)];
485 if (val & BIT(31)) {
486 val &= ~BIT(31);
487
488 /*
489 * Prevent overflows on params->size. Anyway, a NOR of 2^64
490 * bits is unlikely to exist so this error probably means
491 * the BFPT we are reading is corrupted/wrong.
492 */
493 if (val > 63)
494 return -EINVAL;
495
496 params->size = 1ULL << val;
497 } else {
498 params->size = val + 1;
499 }
500 params->size >>= 3; /* Convert to bytes. */
501
502 /* Fast Read settings. */
503 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
504 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
505 struct spi_nor_read_command *read;
506
507 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
508 params->hwcaps.mask &= ~rd->hwcaps;
509 continue;
510 }
511
512 params->hwcaps.mask |= rd->hwcaps;
513 cmd = spi_nor_hwcaps_read2cmd(hwcaps: rd->hwcaps);
514 read = &params->reads[cmd];
515 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
516 spi_nor_set_read_settings_from_bfpt(read, half, proto: rd->proto);
517 }
518
519 /*
520 * Sector Erase settings. Reinitialize the uniform erase map using the
521 * Erase Types defined in the bfpt table.
522 */
523 erase_mask = 0;
524 memset(&params->erase_map, 0, sizeof(params->erase_map));
525 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
526 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
527 u32 erasesize;
528 u8 opcode;
529
530 half = bfpt.dwords[er->dword] >> er->shift;
531 erasesize = half & 0xff;
532
533 /* erasesize == 0 means this Erase Type is not supported. */
534 if (!erasesize)
535 continue;
536
537 erasesize = 1U << erasesize;
538 opcode = (half >> 8) & 0xff;
539 erase_mask |= BIT(i);
540 spi_nor_set_erase_settings_from_bfpt(erase: &erase_type[i], size: erasesize,
541 opcode, i);
542 }
543 spi_nor_init_uniform_erase_map(map, erase_mask, flash_size: params->size);
544 /*
545 * Sort all the map's Erase Types in ascending order with the smallest
546 * erase size being the first member in the erase_type array.
547 */
548 sort(base: erase_type, SNOR_ERASE_TYPE_MAX, size: sizeof(erase_type[0]),
549 cmp_func: spi_nor_map_cmp_erase_type, NULL);
550 /*
551 * Sort the erase types in the uniform region in order to update the
552 * uniform_erase_type bitmask. The bitmask will be used later on when
553 * selecting the uniform erase.
554 */
555 spi_nor_regions_sort_erase_types(map);
556 map->uniform_erase_type = map->uniform_region.offset &
557 SNOR_ERASE_TYPE_MASK;
558
559 /* Stop here if not JESD216 rev A or later. */
560 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
561 return spi_nor_post_bfpt_fixups(nor, bfpt_header, bfpt: &bfpt);
562
563 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */
564 val = bfpt.dwords[SFDP_DWORD(11)];
565 val &= BFPT_DWORD11_PAGE_SIZE_MASK;
566 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
567 params->page_size = 1U << val;
568
569 /* Quad Enable Requirements. */
570 switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
571 case BFPT_DWORD15_QER_NONE:
572 params->quad_enable = NULL;
573 break;
574
575 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
576 /*
577 * Writing only one byte to the Status Register has the
578 * side-effect of clearing Status Register 2.
579 */
580 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
581 /*
582 * Read Configuration Register (35h) instruction is not
583 * supported.
584 */
585 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;
586 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
587 break;
588
589 case BFPT_DWORD15_QER_SR1_BIT6:
590 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
591 params->quad_enable = spi_nor_sr1_bit6_quad_enable;
592 break;
593
594 case BFPT_DWORD15_QER_SR2_BIT7:
595 nor->flags &= ~SNOR_F_HAS_16BIT_SR;
596 params->quad_enable = spi_nor_sr2_bit7_quad_enable;
597 break;
598
599 case BFPT_DWORD15_QER_SR2_BIT1:
600 /*
601 * JESD216 rev B or later does not specify if writing only one
602 * byte to the Status Register clears or not the Status
603 * Register 2, so let's be cautious and keep the default
604 * assumption of a 16-bit Write Status (01h) command.
605 */
606 nor->flags |= SNOR_F_HAS_16BIT_SR;
607
608 params->quad_enable = spi_nor_sr2_bit1_quad_enable;
609 break;
610
611 default:
612 dev_dbg(nor->dev, "BFPT QER reserved value used\n");
613 break;
614 }
615
616 dword = bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK;
617 if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR))
618 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_brwr;
619 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_WREN_EN4B_EX4B))
620 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_wren_en4b_ex4b;
621 else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_EN4B_EX4B))
622 params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_en4b_ex4b;
623 else
624 dev_dbg(nor->dev, "BFPT: 4-Byte Address Mode method is not recognized or not implemented\n");
625
626 /* Soft Reset support. */
627 if (bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)
628 nor->flags |= SNOR_F_SOFT_RESET;
629
630 /* Stop here if not JESD216 rev C or later. */
631 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
632 return spi_nor_post_bfpt_fixups(nor, bfpt_header, bfpt: &bfpt);
633
634 /* 8D-8D-8D command extension. */
635 switch (bfpt.dwords[SFDP_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
636 case BFPT_DWORD18_CMD_EXT_REP:
637 nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
638 break;
639
640 case BFPT_DWORD18_CMD_EXT_INV:
641 nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
642 break;
643
644 case BFPT_DWORD18_CMD_EXT_RES:
645 dev_dbg(nor->dev, "Reserved command extension used\n");
646 break;
647
648 case BFPT_DWORD18_CMD_EXT_16B:
649 dev_dbg(nor->dev, "16-bit opcodes not supported\n");
650 return -EOPNOTSUPP;
651 }
652
653 return spi_nor_post_bfpt_fixups(nor, bfpt_header, bfpt: &bfpt);
654}
655
656/**
657 * spi_nor_smpt_addr_nbytes() - return the number of address bytes used in the
658 * configuration detection command.
659 * @nor: pointer to a 'struct spi_nor'
660 * @settings: configuration detection command descriptor, dword1
661 */
662static u8 spi_nor_smpt_addr_nbytes(const struct spi_nor *nor, const u32 settings)
663{
664 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {
665 case SMPT_CMD_ADDRESS_LEN_0:
666 return 0;
667 case SMPT_CMD_ADDRESS_LEN_3:
668 return 3;
669 case SMPT_CMD_ADDRESS_LEN_4:
670 return 4;
671 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
672 default:
673 return nor->params->addr_mode_nbytes;
674 }
675}
676
677/**
678 * spi_nor_smpt_read_dummy() - return the configuration detection command read
679 * latency, in clock cycles.
680 * @nor: pointer to a 'struct spi_nor'
681 * @settings: configuration detection command descriptor, dword1
682 *
683 * Return: the number of dummy cycles for an SMPT read
684 */
685static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)
686{
687 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);
688
689 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE)
690 return nor->read_dummy;
691 return read_dummy;
692}
693
694/**
695 * spi_nor_get_map_in_use() - get the configuration map in use
696 * @nor: pointer to a 'struct spi_nor'
697 * @smpt: pointer to the sector map parameter table
698 * @smpt_len: sector map parameter table length
699 *
700 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.
701 */
702static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,
703 u8 smpt_len)
704{
705 const u32 *ret;
706 u8 *buf;
707 u32 addr;
708 int err;
709 u8 i;
710 u8 addr_nbytes, read_opcode, read_dummy;
711 u8 read_data_mask, map_id;
712
713 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
714 buf = kmalloc(size: sizeof(*buf), GFP_KERNEL);
715 if (!buf)
716 return ERR_PTR(error: -ENOMEM);
717
718 addr_nbytes = nor->addr_nbytes;
719 read_dummy = nor->read_dummy;
720 read_opcode = nor->read_opcode;
721
722 map_id = 0;
723 /* Determine if there are any optional Detection Command Descriptors */
724 for (i = 0; i < smpt_len; i += 2) {
725 if (smpt[i] & SMPT_DESC_TYPE_MAP)
726 break;
727
728 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);
729 nor->addr_nbytes = spi_nor_smpt_addr_nbytes(nor, settings: smpt[i]);
730 nor->read_dummy = spi_nor_smpt_read_dummy(nor, settings: smpt[i]);
731 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);
732 addr = smpt[i + 1];
733
734 err = spi_nor_read_raw(nor, addr, len: 1, buf);
735 if (err) {
736 ret = ERR_PTR(error: err);
737 goto out;
738 }
739
740 /*
741 * Build an index value that is used to select the Sector Map
742 * Configuration that is currently in use.
743 */
744 map_id = map_id << 1 | !!(*buf & read_data_mask);
745 }
746
747 /*
748 * If command descriptors are provided, they always precede map
749 * descriptors in the table. There is no need to start the iteration
750 * over smpt array all over again.
751 *
752 * Find the matching configuration map.
753 */
754 ret = ERR_PTR(error: -EINVAL);
755 while (i < smpt_len) {
756 if (SMPT_MAP_ID(smpt[i]) == map_id) {
757 ret = smpt + i;
758 break;
759 }
760
761 /*
762 * If there are no more configuration map descriptors and no
763 * configuration ID matched the configuration identifier, the
764 * sector address map is unknown.
765 */
766 if (smpt[i] & SMPT_DESC_END)
767 break;
768
769 /* increment the table index to the next map */
770 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;
771 }
772
773 /* fall through */
774out:
775 kfree(objp: buf);
776 nor->addr_nbytes = addr_nbytes;
777 nor->read_dummy = read_dummy;
778 nor->read_opcode = read_opcode;
779 return ret;
780}
781
782static void spi_nor_region_mark_end(struct spi_nor_erase_region *region)
783{
784 region->offset |= SNOR_LAST_REGION;
785}
786
787static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
788{
789 region->offset |= SNOR_OVERLAID_REGION;
790}
791
792/**
793 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
794 * @region: pointer to a structure that describes a SPI NOR erase region
795 * @erase: pointer to a structure that describes a SPI NOR erase type
796 * @erase_type: erase type bitmask
797 */
798static void
799spi_nor_region_check_overlay(struct spi_nor_erase_region *region,
800 const struct spi_nor_erase_type *erase,
801 const u8 erase_type)
802{
803 int i;
804
805 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
806 if (!(erase[i].size && erase_type & BIT(erase[i].idx)))
807 continue;
808 if (region->size & erase[i].size_mask) {
809 spi_nor_region_mark_overlay(region);
810 return;
811 }
812 }
813}
814
815/**
816 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map
817 * @nor: pointer to a 'struct spi_nor'
818 * @smpt: pointer to the sector map parameter table
819 *
820 * Return: 0 on success, -errno otherwise.
821 */
822static int spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,
823 const u32 *smpt)
824{
825 struct spi_nor_erase_map *map = &nor->params->erase_map;
826 struct spi_nor_erase_type *erase = map->erase_type;
827 struct spi_nor_erase_region *region;
828 u64 offset;
829 u32 region_count;
830 int i, j;
831 u8 uniform_erase_type, save_uniform_erase_type;
832 u8 erase_type, regions_erase_type;
833
834 region_count = SMPT_MAP_REGION_COUNT(*smpt);
835 /*
836 * The regions will be freed when the driver detaches from the
837 * device.
838 */
839 region = devm_kcalloc(dev: nor->dev, n: region_count, size: sizeof(*region),
840 GFP_KERNEL);
841 if (!region)
842 return -ENOMEM;
843 map->regions = region;
844
845 uniform_erase_type = 0xff;
846 regions_erase_type = 0;
847 offset = 0;
848 /* Populate regions. */
849 for (i = 0; i < region_count; i++) {
850 j = i + 1; /* index for the region dword */
851 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);
852 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);
853 region[i].offset = offset | erase_type;
854
855 spi_nor_region_check_overlay(region: &region[i], erase, erase_type);
856
857 /*
858 * Save the erase types that are supported in all regions and
859 * can erase the entire flash memory.
860 */
861 uniform_erase_type &= erase_type;
862
863 /*
864 * regions_erase_type mask will indicate all the erase types
865 * supported in this configuration map.
866 */
867 regions_erase_type |= erase_type;
868
869 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) +
870 region[i].size;
871 }
872 spi_nor_region_mark_end(region: &region[i - 1]);
873
874 save_uniform_erase_type = map->uniform_erase_type;
875 map->uniform_erase_type = spi_nor_sort_erase_mask(map,
876 erase_mask: uniform_erase_type);
877
878 if (!regions_erase_type) {
879 /*
880 * Roll back to the previous uniform_erase_type mask, SMPT is
881 * broken.
882 */
883 map->uniform_erase_type = save_uniform_erase_type;
884 return -EINVAL;
885 }
886
887 /*
888 * BFPT advertises all the erase types supported by all the possible
889 * map configurations. Mask out the erase types that are not supported
890 * by the current map configuration.
891 */
892 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
893 if (!(regions_erase_type & BIT(erase[i].idx)))
894 spi_nor_mask_erase_type(erase: &erase[i]);
895
896 return 0;
897}
898
899/**
900 * spi_nor_parse_smpt() - parse Sector Map Parameter Table
901 * @nor: pointer to a 'struct spi_nor'
902 * @smpt_header: sector map parameter table header
903 *
904 * This table is optional, but when available, we parse it to identify the
905 * location and size of sectors within the main data array of the flash memory
906 * device and to identify which Erase Types are supported by each sector.
907 *
908 * Return: 0 on success, -errno otherwise.
909 */
910static int spi_nor_parse_smpt(struct spi_nor *nor,
911 const struct sfdp_parameter_header *smpt_header)
912{
913 const u32 *sector_map;
914 u32 *smpt;
915 size_t len;
916 u32 addr;
917 int ret;
918
919 /* Read the Sector Map Parameter Table. */
920 len = smpt_header->length * sizeof(*smpt);
921 smpt = kmalloc(size: len, GFP_KERNEL);
922 if (!smpt)
923 return -ENOMEM;
924
925 addr = SFDP_PARAM_HEADER_PTP(smpt_header);
926 ret = spi_nor_read_sfdp(nor, addr, len, buf: smpt);
927 if (ret)
928 goto out;
929
930 /* Fix endianness of the SMPT DWORDs. */
931 le32_to_cpu_array(buf: smpt, words: smpt_header->length);
932
933 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_len: smpt_header->length);
934 if (IS_ERR(ptr: sector_map)) {
935 ret = PTR_ERR(ptr: sector_map);
936 goto out;
937 }
938
939 ret = spi_nor_init_non_uniform_erase_map(nor, smpt: sector_map);
940 if (ret)
941 goto out;
942
943 spi_nor_regions_sort_erase_types(map: &nor->params->erase_map);
944 /* fall through */
945out:
946 kfree(objp: smpt);
947 return ret;
948}
949
950/**
951 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table
952 * @nor: pointer to a 'struct spi_nor'.
953 * @param_header: pointer to the 'struct sfdp_parameter_header' describing
954 * the 4-Byte Address Instruction Table length and version.
955 *
956 * Return: 0 on success, -errno otherwise.
957 */
958static int spi_nor_parse_4bait(struct spi_nor *nor,
959 const struct sfdp_parameter_header *param_header)
960{
961 static const struct sfdp_4bait reads[] = {
962 { SNOR_HWCAPS_READ, BIT(0) },
963 { SNOR_HWCAPS_READ_FAST, BIT(1) },
964 { SNOR_HWCAPS_READ_1_1_2, BIT(2) },
965 { SNOR_HWCAPS_READ_1_2_2, BIT(3) },
966 { SNOR_HWCAPS_READ_1_1_4, BIT(4) },
967 { SNOR_HWCAPS_READ_1_4_4, BIT(5) },
968 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
969 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
970 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
971 };
972 static const struct sfdp_4bait programs[] = {
973 { SNOR_HWCAPS_PP, BIT(6) },
974 { SNOR_HWCAPS_PP_1_1_4, BIT(7) },
975 { SNOR_HWCAPS_PP_1_4_4, BIT(8) },
976 };
977 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
978 { 0u /* not used */, BIT(9) },
979 { 0u /* not used */, BIT(10) },
980 { 0u /* not used */, BIT(11) },
981 { 0u /* not used */, BIT(12) },
982 };
983 struct spi_nor_flash_parameter *params = nor->params;
984 struct spi_nor_pp_command *params_pp = params->page_programs;
985 struct spi_nor_erase_map *map = &params->erase_map;
986 struct spi_nor_erase_type *erase_type = map->erase_type;
987 u32 *dwords;
988 size_t len;
989 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;
990 int i, ret;
991
992 if (param_header->major != SFDP_JESD216_MAJOR ||
993 param_header->length < SFDP_4BAIT_DWORD_MAX)
994 return -EINVAL;
995
996 /* Read the 4-byte Address Instruction Table. */
997 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;
998
999 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
1000 dwords = kmalloc(size: len, GFP_KERNEL);
1001 if (!dwords)
1002 return -ENOMEM;
1003
1004 addr = SFDP_PARAM_HEADER_PTP(param_header);
1005 ret = spi_nor_read_sfdp(nor, addr, len, buf: dwords);
1006 if (ret)
1007 goto out;
1008
1009 /* Fix endianness of the 4BAIT DWORDs. */
1010 le32_to_cpu_array(buf: dwords, SFDP_4BAIT_DWORD_MAX);
1011
1012 /*
1013 * Compute the subset of (Fast) Read commands for which the 4-byte
1014 * version is supported.
1015 */
1016 discard_hwcaps = 0;
1017 read_hwcaps = 0;
1018 for (i = 0; i < ARRAY_SIZE(reads); i++) {
1019 const struct sfdp_4bait *read = &reads[i];
1020
1021 discard_hwcaps |= read->hwcaps;
1022 if ((params->hwcaps.mask & read->hwcaps) &&
1023 (dwords[SFDP_DWORD(1)] & read->supported_bit))
1024 read_hwcaps |= read->hwcaps;
1025 }
1026
1027 /*
1028 * Compute the subset of Page Program commands for which the 4-byte
1029 * version is supported.
1030 */
1031 pp_hwcaps = 0;
1032 for (i = 0; i < ARRAY_SIZE(programs); i++) {
1033 const struct sfdp_4bait *program = &programs[i];
1034
1035 /*
1036 * The 4 Byte Address Instruction (Optional) Table is the only
1037 * SFDP table that indicates support for Page Program Commands.
1038 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest
1039 * authority for specifying Page Program support.
1040 */
1041 discard_hwcaps |= program->hwcaps;
1042 if (dwords[SFDP_DWORD(1)] & program->supported_bit)
1043 pp_hwcaps |= program->hwcaps;
1044 }
1045
1046 /*
1047 * Compute the subset of Sector Erase commands for which the 4-byte
1048 * version is supported.
1049 */
1050 erase_mask = 0;
1051 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1052 const struct sfdp_4bait *erase = &erases[i];
1053
1054 if (dwords[SFDP_DWORD(1)] & erase->supported_bit)
1055 erase_mask |= BIT(i);
1056 }
1057
1058 /* Replicate the sort done for the map's erase types in BFPT. */
1059 erase_mask = spi_nor_sort_erase_mask(map, erase_mask);
1060
1061 /*
1062 * We need at least one 4-byte op code per read, program and erase
1063 * operation; the .read(), .write() and .erase() hooks share the
1064 * nor->addr_nbytes value.
1065 */
1066 if (!read_hwcaps || !pp_hwcaps || !erase_mask)
1067 goto out;
1068
1069 /*
1070 * Discard all operations from the 4-byte instruction set which are
1071 * not supported by this memory.
1072 */
1073 params->hwcaps.mask &= ~discard_hwcaps;
1074 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);
1075
1076 /* Use the 4-byte address instruction set. */
1077 for (i = 0; i < SNOR_CMD_READ_MAX; i++) {
1078 struct spi_nor_read_command *read_cmd = &params->reads[i];
1079
1080 read_cmd->opcode = spi_nor_convert_3to4_read(opcode: read_cmd->opcode);
1081 }
1082
1083 /* 4BAIT is the only SFDP table that indicates page program support. */
1084 if (pp_hwcaps & SNOR_HWCAPS_PP) {
1085 spi_nor_set_pp_settings(pp: &params_pp[SNOR_CMD_PP],
1086 SPINOR_OP_PP_4B, proto: SNOR_PROTO_1_1_1);
1087 /*
1088 * Since xSPI Page Program opcode is backward compatible with
1089 * Legacy SPI, use Legacy SPI opcode there as well.
1090 */
1091 spi_nor_set_pp_settings(pp: &params_pp[SNOR_CMD_PP_8_8_8_DTR],
1092 SPINOR_OP_PP_4B, proto: SNOR_PROTO_8_8_8_DTR);
1093 }
1094 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)
1095 spi_nor_set_pp_settings(pp: &params_pp[SNOR_CMD_PP_1_1_4],
1096 SPINOR_OP_PP_1_1_4_4B,
1097 proto: SNOR_PROTO_1_1_4);
1098 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)
1099 spi_nor_set_pp_settings(pp: &params_pp[SNOR_CMD_PP_1_4_4],
1100 SPINOR_OP_PP_1_4_4_4B,
1101 proto: SNOR_PROTO_1_4_4);
1102
1103 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1104 if (erase_mask & BIT(i))
1105 erase_type[i].opcode = (dwords[SFDP_DWORD(2)] >>
1106 erase_type[i].idx * 8) & 0xFF;
1107 else
1108 spi_nor_mask_erase_type(erase: &erase_type[i]);
1109 }
1110
1111 /*
1112 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()
1113 * later because we already did the conversion to 4byte opcodes. Also,
1114 * this latest function implements a legacy quirk for the erase size of
1115 * Spansion memory. However this quirk is no longer needed with new
1116 * SFDP compliant memories.
1117 */
1118 params->addr_nbytes = 4;
1119 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
1120
1121 /* fall through */
1122out:
1123 kfree(objp: dwords);
1124 return ret;
1125}
1126
1127#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29)
1128#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28)
1129#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8)
1130#define PROFILE1_DWORD4_DUMMY_200MHZ GENMASK(11, 7)
1131#define PROFILE1_DWORD5_DUMMY_166MHZ GENMASK(31, 27)
1132#define PROFILE1_DWORD5_DUMMY_133MHZ GENMASK(21, 17)
1133#define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7)
1134
1135/**
1136 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table
1137 * @nor: pointer to a 'struct spi_nor'
1138 * @profile1_header: pointer to the 'struct sfdp_parameter_header' describing
1139 * the Profile 1.0 Table length and version.
1140 *
1141 * Return: 0 on success, -errno otherwise.
1142 */
1143static int spi_nor_parse_profile1(struct spi_nor *nor,
1144 const struct sfdp_parameter_header *profile1_header)
1145{
1146 u32 *dwords, addr;
1147 size_t len;
1148 int ret;
1149 u8 dummy, opcode;
1150
1151 len = profile1_header->length * sizeof(*dwords);
1152 dwords = kmalloc(size: len, GFP_KERNEL);
1153 if (!dwords)
1154 return -ENOMEM;
1155
1156 addr = SFDP_PARAM_HEADER_PTP(profile1_header);
1157 ret = spi_nor_read_sfdp(nor, addr, len, buf: dwords);
1158 if (ret)
1159 goto out;
1160
1161 le32_to_cpu_array(buf: dwords, words: profile1_header->length);
1162
1163 /* Get 8D-8D-8D fast read opcode and dummy cycles. */
1164 opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, dwords[SFDP_DWORD(1)]);
1165
1166 /* Set the Read Status Register dummy cycles and dummy address bytes. */
1167 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_DUMMY)
1168 nor->params->rdsr_dummy = 8;
1169 else
1170 nor->params->rdsr_dummy = 4;
1171
1172 if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)
1173 nor->params->rdsr_addr_nbytes = 4;
1174 else
1175 nor->params->rdsr_addr_nbytes = 0;
1176
1177 /*
1178 * We don't know what speed the controller is running at. Find the
1179 * dummy cycles for the fastest frequency the flash can run at to be
1180 * sure we are never short of dummy cycles. A value of 0 means the
1181 * frequency is not supported.
1182 *
1183 * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let
1184 * flashes set the correct value if needed in their fixup hooks.
1185 */
1186 dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[SFDP_DWORD(4)]);
1187 if (!dummy)
1188 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ,
1189 dwords[SFDP_DWORD(5)]);
1190 if (!dummy)
1191 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ,
1192 dwords[SFDP_DWORD(5)]);
1193 if (!dummy)
1194 dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ,
1195 dwords[SFDP_DWORD(5)]);
1196 if (!dummy)
1197 dev_dbg(nor->dev,
1198 "Can't find dummy cycles from Profile 1.0 table\n");
1199
1200 /* Round up to an even value to avoid tripping controllers up. */
1201 dummy = round_up(dummy, 2);
1202
1203 /* Update the fast read settings. */
1204 nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
1205 spi_nor_set_read_settings(read: &nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],
1206 num_mode_clocks: 0, num_wait_states: dummy, opcode,
1207 proto: SNOR_PROTO_8_8_8_DTR);
1208
1209 /*
1210 * Page Program is "Required Command" in the xSPI Profile 1.0. Update
1211 * the params->hwcaps.mask here.
1212 */
1213 nor->params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR;
1214
1215out:
1216 kfree(objp: dwords);
1217 return ret;
1218}
1219
1220#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE BIT(31)
1221
1222/**
1223 * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register
1224 * Map.
1225 * @nor: pointer to a 'struct spi_nor'
1226 * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing
1227 * the SCCR Map table length and version.
1228 *
1229 * Return: 0 on success, -errno otherwise.
1230 */
1231static int spi_nor_parse_sccr(struct spi_nor *nor,
1232 const struct sfdp_parameter_header *sccr_header)
1233{
1234 struct spi_nor_flash_parameter *params = nor->params;
1235 u32 *dwords, addr;
1236 size_t len;
1237 int ret;
1238
1239 len = sccr_header->length * sizeof(*dwords);
1240 dwords = kmalloc(size: len, GFP_KERNEL);
1241 if (!dwords)
1242 return -ENOMEM;
1243
1244 addr = SFDP_PARAM_HEADER_PTP(sccr_header);
1245 ret = spi_nor_read_sfdp(nor, addr, len, buf: dwords);
1246 if (ret)
1247 goto out;
1248
1249 le32_to_cpu_array(buf: dwords, words: sccr_header->length);
1250
1251 /* Address offset for volatile registers (die 0) */
1252 if (!params->vreg_offset) {
1253 params->vreg_offset = devm_kmalloc(dev: nor->dev, size: sizeof(*dwords),
1254 GFP_KERNEL);
1255 if (!params->vreg_offset) {
1256 ret = -ENOMEM;
1257 goto out;
1258 }
1259 }
1260 params->vreg_offset[0] = dwords[SFDP_DWORD(1)];
1261 params->n_dice = 1;
1262
1263 if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,
1264 dwords[SFDP_DWORD(22)]))
1265 nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
1266
1267out:
1268 kfree(objp: dwords);
1269 return ret;
1270}
1271
1272/**
1273 * spi_nor_parse_sccr_mc() - Parse the Status, Control and Configuration
1274 * Register Map Offsets for Multi-Chip SPI Memory
1275 * Devices.
1276 * @nor: pointer to a 'struct spi_nor'
1277 * @sccr_mc_header: pointer to the 'struct sfdp_parameter_header' describing
1278 * the SCCR Map offsets table length and version.
1279 *
1280 * Return: 0 on success, -errno otherwise.
1281 */
1282static int spi_nor_parse_sccr_mc(struct spi_nor *nor,
1283 const struct sfdp_parameter_header *sccr_mc_header)
1284{
1285 struct spi_nor_flash_parameter *params = nor->params;
1286 u32 *dwords, addr;
1287 u8 i, n_dice;
1288 size_t len;
1289 int ret;
1290
1291 len = sccr_mc_header->length * sizeof(*dwords);
1292 dwords = kmalloc(size: len, GFP_KERNEL);
1293 if (!dwords)
1294 return -ENOMEM;
1295
1296 addr = SFDP_PARAM_HEADER_PTP(sccr_mc_header);
1297 ret = spi_nor_read_sfdp(nor, addr, len, buf: dwords);
1298 if (ret)
1299 goto out;
1300
1301 le32_to_cpu_array(buf: dwords, words: sccr_mc_header->length);
1302
1303 /*
1304 * Pair of DOWRDs (volatile and non-volatile register offsets) per
1305 * additional die. Hence, length = 2 * (number of additional dice).
1306 */
1307 n_dice = 1 + sccr_mc_header->length / 2;
1308
1309 /* Address offset for volatile registers of additional dice */
1310 params->vreg_offset =
1311 devm_krealloc(dev: nor->dev, ptr: params->vreg_offset,
1312 size: n_dice * sizeof(*dwords),
1313 GFP_KERNEL);
1314 if (!params->vreg_offset) {
1315 ret = -ENOMEM;
1316 goto out;
1317 }
1318
1319 for (i = 1; i < n_dice; i++)
1320 params->vreg_offset[i] = dwords[SFDP_DWORD(i) * 2];
1321
1322 params->n_dice = n_dice;
1323
1324out:
1325 kfree(objp: dwords);
1326 return ret;
1327}
1328
1329/**
1330 * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings
1331 * after SFDP has been parsed. Called only for flashes that define JESD216 SFDP
1332 * tables.
1333 * @nor: pointer to a 'struct spi_nor'
1334 *
1335 * Used to tweak various flash parameters when information provided by the SFDP
1336 * tables are wrong.
1337 */
1338static int spi_nor_post_sfdp_fixups(struct spi_nor *nor)
1339{
1340 int ret;
1341
1342 if (nor->manufacturer && nor->manufacturer->fixups &&
1343 nor->manufacturer->fixups->post_sfdp) {
1344 ret = nor->manufacturer->fixups->post_sfdp(nor);
1345 if (ret)
1346 return ret;
1347 }
1348
1349 if (nor->info->fixups && nor->info->fixups->post_sfdp)
1350 return nor->info->fixups->post_sfdp(nor);
1351
1352 return 0;
1353}
1354
1355/**
1356 * spi_nor_check_sfdp_signature() - check for a valid SFDP signature
1357 * @nor: pointer to a 'struct spi_nor'
1358 *
1359 * Used to detect if the flash supports the RDSFDP command as well as the
1360 * presence of a valid SFDP table.
1361 *
1362 * Return: 0 on success, -errno otherwise.
1363 */
1364int spi_nor_check_sfdp_signature(struct spi_nor *nor)
1365{
1366 u32 signature;
1367 int err;
1368
1369 /* Get the SFDP header. */
1370 err = spi_nor_read_sfdp_dma_unsafe(nor, addr: 0, len: sizeof(signature),
1371 buf: &signature);
1372 if (err < 0)
1373 return err;
1374
1375 /* Check the SFDP signature. */
1376 if (le32_to_cpu(signature) != SFDP_SIGNATURE)
1377 return -EINVAL;
1378
1379 return 0;
1380}
1381
1382/**
1383 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
1384 * @nor: pointer to a 'struct spi_nor'
1385 *
1386 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
1387 * specification. This is a standard which tends to supported by almost all
1388 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
1389 * runtime the main parameters needed to perform basic SPI flash operations such
1390 * as Fast Read, Page Program or Sector Erase commands.
1391 *
1392 * Return: 0 on success, -errno otherwise.
1393 */
1394int spi_nor_parse_sfdp(struct spi_nor *nor)
1395{
1396 const struct sfdp_parameter_header *param_header, *bfpt_header;
1397 struct sfdp_parameter_header *param_headers = NULL;
1398 struct sfdp_header header;
1399 struct device *dev = nor->dev;
1400 struct sfdp *sfdp;
1401 size_t sfdp_size;
1402 size_t psize;
1403 int i, err;
1404
1405 /* Get the SFDP header. */
1406 err = spi_nor_read_sfdp_dma_unsafe(nor, addr: 0, len: sizeof(header), buf: &header);
1407 if (err < 0)
1408 return err;
1409
1410 /* Check the SFDP header version. */
1411 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
1412 header.major != SFDP_JESD216_MAJOR)
1413 return -EINVAL;
1414
1415 /*
1416 * Verify that the first and only mandatory parameter header is a
1417 * Basic Flash Parameter Table header as specified in JESD216.
1418 */
1419 bfpt_header = &header.bfpt_header;
1420 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
1421 bfpt_header->major != SFDP_JESD216_MAJOR)
1422 return -EINVAL;
1423
1424 sfdp_size = SFDP_PARAM_HEADER_PTP(bfpt_header) +
1425 SFDP_PARAM_HEADER_PARAM_LEN(bfpt_header);
1426
1427 /*
1428 * Allocate memory then read all parameter headers with a single
1429 * Read SFDP command. These parameter headers will actually be parsed
1430 * twice: a first time to get the latest revision of the basic flash
1431 * parameter table, then a second time to handle the supported optional
1432 * tables.
1433 * Hence we read the parameter headers once for all to reduce the
1434 * processing time. Also we use kmalloc() instead of devm_kmalloc()
1435 * because we don't need to keep these parameter headers: the allocated
1436 * memory is always released with kfree() before exiting this function.
1437 */
1438 if (header.nph) {
1439 psize = header.nph * sizeof(*param_headers);
1440
1441 param_headers = kmalloc(size: psize, GFP_KERNEL);
1442 if (!param_headers)
1443 return -ENOMEM;
1444
1445 err = spi_nor_read_sfdp(nor, addr: sizeof(header),
1446 len: psize, buf: param_headers);
1447 if (err < 0) {
1448 dev_dbg(dev, "failed to read SFDP parameter headers\n");
1449 goto exit;
1450 }
1451 }
1452
1453 /*
1454 * Cache the complete SFDP data. It is not (easily) possible to fetch
1455 * SFDP after probe time and we need it for the sysfs access.
1456 */
1457 for (i = 0; i < header.nph; i++) {
1458 param_header = &param_headers[i];
1459 sfdp_size = max_t(size_t, sfdp_size,
1460 SFDP_PARAM_HEADER_PTP(param_header) +
1461 SFDP_PARAM_HEADER_PARAM_LEN(param_header));
1462 }
1463
1464 /*
1465 * Limit the total size to a reasonable value to avoid allocating too
1466 * much memory just of because the flash returned some insane values.
1467 */
1468 if (sfdp_size > PAGE_SIZE) {
1469 dev_dbg(dev, "SFDP data (%zu) too big, truncating\n",
1470 sfdp_size);
1471 sfdp_size = PAGE_SIZE;
1472 }
1473
1474 sfdp = devm_kzalloc(dev, size: sizeof(*sfdp), GFP_KERNEL);
1475 if (!sfdp) {
1476 err = -ENOMEM;
1477 goto exit;
1478 }
1479
1480 /*
1481 * The SFDP is organized in chunks of DWORDs. Thus, in theory, the
1482 * sfdp_size should be a multiple of DWORDs. But in case a flash
1483 * is not spec compliant, make sure that we have enough space to store
1484 * the complete SFDP data.
1485 */
1486 sfdp->num_dwords = DIV_ROUND_UP(sfdp_size, sizeof(*sfdp->dwords));
1487 sfdp->dwords = devm_kcalloc(dev, n: sfdp->num_dwords,
1488 size: sizeof(*sfdp->dwords), GFP_KERNEL);
1489 if (!sfdp->dwords) {
1490 err = -ENOMEM;
1491 devm_kfree(dev, p: sfdp);
1492 goto exit;
1493 }
1494
1495 err = spi_nor_read_sfdp(nor, addr: 0, len: sfdp_size, buf: sfdp->dwords);
1496 if (err < 0) {
1497 dev_dbg(dev, "failed to read SFDP data\n");
1498 devm_kfree(dev, p: sfdp->dwords);
1499 devm_kfree(dev, p: sfdp);
1500 goto exit;
1501 }
1502
1503 nor->sfdp = sfdp;
1504
1505 /*
1506 * Check other parameter headers to get the latest revision of
1507 * the basic flash parameter table.
1508 */
1509 for (i = 0; i < header.nph; i++) {
1510 param_header = &param_headers[i];
1511
1512 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
1513 param_header->major == SFDP_JESD216_MAJOR &&
1514 (param_header->minor > bfpt_header->minor ||
1515 (param_header->minor == bfpt_header->minor &&
1516 param_header->length > bfpt_header->length)))
1517 bfpt_header = param_header;
1518 }
1519
1520 err = spi_nor_parse_bfpt(nor, bfpt_header);
1521 if (err)
1522 goto exit;
1523
1524 /* Parse optional parameter tables. */
1525 for (i = 0; i < header.nph; i++) {
1526 param_header = &param_headers[i];
1527
1528 switch (SFDP_PARAM_HEADER_ID(param_header)) {
1529 case SFDP_SECTOR_MAP_ID:
1530 err = spi_nor_parse_smpt(nor, smpt_header: param_header);
1531 break;
1532
1533 case SFDP_4BAIT_ID:
1534 err = spi_nor_parse_4bait(nor, param_header);
1535 break;
1536
1537 case SFDP_PROFILE1_ID:
1538 err = spi_nor_parse_profile1(nor, profile1_header: param_header);
1539 break;
1540
1541 case SFDP_SCCR_MAP_ID:
1542 err = spi_nor_parse_sccr(nor, sccr_header: param_header);
1543 break;
1544
1545 case SFDP_SCCR_MAP_MC_ID:
1546 err = spi_nor_parse_sccr_mc(nor, sccr_mc_header: param_header);
1547 break;
1548
1549 default:
1550 break;
1551 }
1552
1553 if (err) {
1554 dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
1555 SFDP_PARAM_HEADER_ID(param_header));
1556 /*
1557 * Let's not drop all information we extracted so far
1558 * if optional table parsers fail. In case of failing,
1559 * each optional parser is responsible to roll back to
1560 * the previously known spi_nor data.
1561 */
1562 err = 0;
1563 }
1564 }
1565
1566 err = spi_nor_post_sfdp_fixups(nor);
1567exit:
1568 kfree(objp: param_headers);
1569 return err;
1570}
1571

source code of linux/drivers/mtd/spi-nor/sfdp.c