| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Marvell 88E6xxx PHY access |
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| 4 | * |
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| 5 | * Copyright (c) 2008 Marvell Semiconductor |
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| 6 | * |
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| 7 | * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch> |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef _MV88E6XXX_PHY_H |
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| 11 | #define _MV88E6XXX_PHY_H |
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| 12 | |
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| 13 | #define MV88E6XXX_PHY_PAGE 0x16 |
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| 14 | #define MV88E6XXX_PHY_PAGE_COPPER 0x00 |
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| 15 | |
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| 16 | /* PHY Registers accesses implementations */ |
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| 17 | int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, |
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| 18 | int addr, int reg, u16 *val); |
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| 19 | int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, |
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| 20 | int addr, int reg, u16 val); |
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| 21 | int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, |
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| 22 | int addr, int reg, u16 *val); |
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| 23 | int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, |
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| 24 | int addr, int reg, u16 val); |
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| 25 | |
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| 26 | /* Generic PHY operations */ |
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| 27 | int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, |
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| 28 | int reg, u16 *val); |
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| 29 | int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, |
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| 30 | int reg, u16 val); |
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| 31 | int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad, |
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| 32 | int reg, u16 *val); |
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| 33 | int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad, |
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| 34 | int reg, u16 val); |
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| 35 | int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy, |
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| 36 | u8 page, int reg, u16 *val); |
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| 37 | int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy, |
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| 38 | u8 page, int reg, u16 val); |
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| 39 | void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip); |
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| 40 | void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip); |
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| 41 | int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip); |
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| 42 | |
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| 43 | #endif /*_MV88E6XXX_PHY_H */ |
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| 44 | |
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