1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* Atlantic Network Driver |
3 | * |
4 | * Copyright (C) 2014-2019 aQuantia Corporation |
5 | * Copyright (C) 2019-2020 Marvell International Ltd. |
6 | */ |
7 | |
8 | /* File aq_common.h: Basic includes for all files in project. */ |
9 | |
10 | #ifndef AQ_COMMON_H |
11 | #define AQ_COMMON_H |
12 | |
13 | #include <linux/etherdevice.h> |
14 | #include <linux/pci.h> |
15 | #include <linux/if_vlan.h> |
16 | #include "aq_cfg.h" |
17 | #include "aq_utils.h" |
18 | |
19 | #define PCI_VENDOR_ID_AQUANTIA 0x1D6A |
20 | |
21 | #define AQ_DEVICE_ID_0001 0x0001 |
22 | #define AQ_DEVICE_ID_D100 0xD100 |
23 | #define AQ_DEVICE_ID_D107 0xD107 |
24 | #define AQ_DEVICE_ID_D108 0xD108 |
25 | #define AQ_DEVICE_ID_D109 0xD109 |
26 | |
27 | #define AQ_DEVICE_ID_AQC100 0x00B1 |
28 | #define AQ_DEVICE_ID_AQC107 0x07B1 |
29 | #define AQ_DEVICE_ID_AQC108 0x08B1 |
30 | #define AQ_DEVICE_ID_AQC109 0x09B1 |
31 | #define AQ_DEVICE_ID_AQC111 0x11B1 |
32 | #define AQ_DEVICE_ID_AQC112 0x12B1 |
33 | |
34 | #define AQ_DEVICE_ID_AQC100S 0x80B1 |
35 | #define AQ_DEVICE_ID_AQC107S 0x87B1 |
36 | #define AQ_DEVICE_ID_AQC108S 0x88B1 |
37 | #define AQ_DEVICE_ID_AQC109S 0x89B1 |
38 | #define AQ_DEVICE_ID_AQC111S 0x91B1 |
39 | #define AQ_DEVICE_ID_AQC112S 0x92B1 |
40 | |
41 | #define AQ_DEVICE_ID_AQC113DEV 0x00C0 |
42 | #define AQ_DEVICE_ID_AQC113CS 0x94C0 |
43 | #define AQ_DEVICE_ID_AQC113CA 0x34C0 |
44 | #define AQ_DEVICE_ID_AQC114CS 0x93C0 |
45 | #define AQ_DEVICE_ID_AQC113 0x04C0 |
46 | #define AQ_DEVICE_ID_AQC113C 0x14C0 |
47 | #define AQ_DEVICE_ID_AQC115C 0x12C0 |
48 | #define AQ_DEVICE_ID_AQC116C 0x11C0 |
49 | |
50 | #define HW_ATL_NIC_NAME "Marvell (aQuantia) AQtion 10Gbit Network Adapter" |
51 | |
52 | #define AQ_HWREV_ANY 0 |
53 | #define AQ_HWREV_1 1 |
54 | #define AQ_HWREV_2 2 |
55 | |
56 | #define AQ_NIC_RATE_10G BIT(0) |
57 | #define AQ_NIC_RATE_5G BIT(1) |
58 | #define AQ_NIC_RATE_2G5 BIT(2) |
59 | #define AQ_NIC_RATE_1G BIT(3) |
60 | #define AQ_NIC_RATE_100M BIT(4) |
61 | #define AQ_NIC_RATE_10M BIT(5) |
62 | #define AQ_NIC_RATE_1G_HALF BIT(6) |
63 | #define AQ_NIC_RATE_100M_HALF BIT(7) |
64 | #define AQ_NIC_RATE_10M_HALF BIT(8) |
65 | |
66 | #define AQ_NIC_RATE_EEE_10G BIT(9) |
67 | #define AQ_NIC_RATE_EEE_5G BIT(10) |
68 | #define AQ_NIC_RATE_EEE_2G5 BIT(11) |
69 | #define AQ_NIC_RATE_EEE_1G BIT(12) |
70 | #define AQ_NIC_RATE_EEE_100M BIT(13) |
71 | #define AQ_NIC_RATE_EEE_MSK (AQ_NIC_RATE_EEE_10G |\ |
72 | AQ_NIC_RATE_EEE_5G |\ |
73 | AQ_NIC_RATE_EEE_2G5 |\ |
74 | AQ_NIC_RATE_EEE_1G |\ |
75 | AQ_NIC_RATE_EEE_100M) |
76 | |
77 | #endif /* AQ_COMMON_H */ |
78 | |