1	// SPDX-License-Identifier: GPL-2.0-or-later
2	/*
3	* Copyright(c) 2007 Atheros Corporation. All rights reserved.
4	*
5	* Derived from Intel e1000 driver
6	* Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7	*/
8
9	#include "atl1e.h"
10
11	char atl1e_driver_name[] = "ATL1E";
12	#define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
13	/*
14	* atl1e_pci_tbl - PCI Device ID Table
15	*
16	* Wildcard entries (PCI_ANY_ID) should come last
17	* Last entry must be all 0s
18	*
19	* { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20	* Class, Class Mask, private data (not used) }
21	*/
22	static const struct pci_device_id atl1e_pci_tbl[] = {
23	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
24	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
25	/* required last entry */
26	{ 0 }
27	};
28	MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
29
30	MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
31	MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
32	MODULE_LICENSE("GPL");
33
34	static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
35
36	static const u16
37	atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
38	{
39	{REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
40	{REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
41	{REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
42	{REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
43	};
44
45	static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
46	{
47	REG_RXF0_BASE_ADDR_HI,
48	REG_RXF1_BASE_ADDR_HI,
49	REG_RXF2_BASE_ADDR_HI,
50	REG_RXF3_BASE_ADDR_HI
51	};
52
53	static const u16
54	atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55	{
56	{REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
57	{REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
58	{REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
59	{REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
60	};
61
62	static const u16
63	atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
64	{
65	{REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
66	{REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
67	{REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
68	{REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
69	};
70
71	static const u16 atl1e_pay_load_size[] = {
72	128, 256, 512, 1024, 2048, 4096,
73	};
74
75	/**
76	* atl1e_irq_enable - Enable default interrupt generation settings
77	* @adapter: board private structure
78	*/
79	static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
80	{
81	if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
82	AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
83	AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
84	AT_WRITE_FLUSH(&adapter->hw);
85	}
86	}
87
88	/**
89	* atl1e_irq_disable - Mask off interrupt generation on the NIC
90	* @adapter: board private structure
91	*/
92	static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
93	{
94	atomic_inc(v: &adapter->irq_sem);
95	AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
96	AT_WRITE_FLUSH(&adapter->hw);
97	synchronize_irq(irq: adapter->pdev->irq);
98	}
99
100	/**
101	* atl1e_irq_reset - reset interrupt confiure on the NIC
102	* @adapter: board private structure
103	*/
104	static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
105	{
106	atomic_set(v: &adapter->irq_sem, i: 0);
107	AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
108	AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
109	AT_WRITE_FLUSH(&adapter->hw);
110	}
111
112	/**
113	* atl1e_phy_config - Timer Call-back
114	* @t: timer list containing pointer to netdev cast into an unsigned long
115	*/
116	static void atl1e_phy_config(struct timer_list *t)
117	{
118	struct atl1e_adapter *adapter = from_timer(adapter, t,
119	phy_config_timer);
120	struct atl1e_hw *hw = &adapter->hw;
121	unsigned long flags;
122
123	spin_lock_irqsave(&adapter->mdio_lock, flags);
124	atl1e_restart_autoneg(hw);
125	spin_unlock_irqrestore(lock: &adapter->mdio_lock, flags);
126	}
127
128	void atl1e_reinit_locked(struct atl1e_adapter *adapter)
129	{
130	while (test_and_set_bit(__AT_RESETTING, addr: &adapter->flags))
131	msleep(msecs: 1);
132	atl1e_down(adapter);
133	atl1e_up(adapter);
134	clear_bit(__AT_RESETTING, addr: &adapter->flags);
135	}
136
137	static void atl1e_reset_task(struct work_struct *work)
138	{
139	struct atl1e_adapter *adapter;
140	adapter = container_of(work, struct atl1e_adapter, reset_task);
141
142	atl1e_reinit_locked(adapter);
143	}
144
145	static int atl1e_check_link(struct atl1e_adapter *adapter)
146	{
147	struct atl1e_hw *hw = &adapter->hw;
148	struct net_device *netdev = adapter->netdev;
149	int err = 0;
150	u16 speed, duplex, phy_data;
151
152	/* MII_BMSR must read twice */
153	atl1e_read_phy_reg(hw, MII_BMSR, phy_data: &phy_data);
154	atl1e_read_phy_reg(hw, MII_BMSR, phy_data: &phy_data);
155	if ((phy_data & BMSR_LSTATUS) == 0) {
156	/* link down */
157	if (netif_carrier_ok(dev: netdev)) { /* old link state: Up */
158	u32 value;
159	/* disable rx */
160	value = AT_READ_REG(hw, REG_MAC_CTRL);
161	value &= ~MAC_CTRL_RX_EN;
162	AT_WRITE_REG(hw, REG_MAC_CTRL, value);
163	adapter->link_speed = SPEED_0;
164	netif_carrier_off(dev: netdev);
165	netif_stop_queue(dev: netdev);
166	}
167	} else {
168	/* Link Up */
169	err = atl1e_get_speed_and_duplex(hw, speed: &speed, duplex: &duplex);
170	if (unlikely(err))
171	return err;
172
173	/* link result is our setting */
174	if (adapter->link_speed != speed ||
175	adapter->link_duplex != duplex) {
176	adapter->link_speed = speed;
177	adapter->link_duplex = duplex;
178	atl1e_setup_mac_ctrl(adapter);
179	netdev_info(dev: netdev,
180	format: "NIC Link is Up <%d Mbps %s Duplex>\n",
181	adapter->link_speed,
182	adapter->link_duplex == FULL_DUPLEX ?
183	"Full" : "Half");
184	}
185
186	if (!netif_carrier_ok(dev: netdev)) {
187	/* Link down -> Up */
188	netif_carrier_on(dev: netdev);
189	netif_wake_queue(dev: netdev);
190	}
191	}
192	return 0;
193	}
194
195	/**
196	* atl1e_link_chg_task - deal with link change event Out of interrupt context
197	* @work: work struct with driver info
198	*/
199	static void atl1e_link_chg_task(struct work_struct *work)
200	{
201	struct atl1e_adapter *adapter;
202	unsigned long flags;
203
204	adapter = container_of(work, struct atl1e_adapter, link_chg_task);
205	spin_lock_irqsave(&adapter->mdio_lock, flags);
206	atl1e_check_link(adapter);
207	spin_unlock_irqrestore(lock: &adapter->mdio_lock, flags);
208	}
209
210	static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
211	{
212	struct net_device *netdev = adapter->netdev;
213	u16 phy_data = 0;
214	u16 link_up = 0;
215
216	spin_lock(lock: &adapter->mdio_lock);
217	atl1e_read_phy_reg(hw: &adapter->hw, MII_BMSR, phy_data: &phy_data);
218	atl1e_read_phy_reg(hw: &adapter->hw, MII_BMSR, phy_data: &phy_data);
219	spin_unlock(lock: &adapter->mdio_lock);
220	link_up = phy_data & BMSR_LSTATUS;
221	/* notify upper layer link down ASAP */
222	if (!link_up) {
223	if (netif_carrier_ok(dev: netdev)) {
224	/* old link state: Up */
225	netdev_info(dev: netdev, format: "NIC Link is Down\n");
226	adapter->link_speed = SPEED_0;
227	netif_stop_queue(dev: netdev);
228	}
229	}
230	schedule_work(work: &adapter->link_chg_task);
231	}
232
233	static void atl1e_del_timer(struct atl1e_adapter *adapter)
234	{
235	del_timer_sync(timer: &adapter->phy_config_timer);
236	}
237
238	static void atl1e_cancel_work(struct atl1e_adapter *adapter)
239	{
240	cancel_work_sync(work: &adapter->reset_task);
241	cancel_work_sync(work: &adapter->link_chg_task);
242	}
243
244	/**
245	* atl1e_tx_timeout - Respond to a Tx Hang
246	* @netdev: network interface device structure
247	* @txqueue: the index of the hanging queue
248	*/
249	static void atl1e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
250	{
251	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
252
253	/* Do the reset outside of interrupt context */
254	schedule_work(work: &adapter->reset_task);
255	}
256
257	/**
258	* atl1e_set_multi - Multicast and Promiscuous mode set
259	* @netdev: network interface device structure
260	*
261	* The set_multi entry point is called whenever the multicast address
262	* list or the network interface flags are updated. This routine is
263	* responsible for configuring the hardware for proper multicast,
264	* promiscuous mode, and all-multi behavior.
265	*/
266	static void atl1e_set_multi(struct net_device *netdev)
267	{
268	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
269	struct atl1e_hw *hw = &adapter->hw;
270	struct netdev_hw_addr *ha;
271	u32 mac_ctrl_data = 0;
272	u32 hash_value;
273
274	/* Check for Promiscuous and All Multicast modes */
275	mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
276
277	if (netdev->flags & IFF_PROMISC) {
278	mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
279	} else if (netdev->flags & IFF_ALLMULTI) {
280	mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
281	mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
282	} else {
283	mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
284	}
285
286	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
287
288	/* clear the old settings from the multicast hash table */
289	AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
290	AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
291
292	/* comoute mc addresses' hash value ,and put it into hash table */
293	netdev_for_each_mc_addr(ha, netdev) {
294	hash_value = atl1e_hash_mc_addr(hw, mc_addr: ha->addr);
295	atl1e_hash_set(hw, hash_value);
296	}
297	}
298
299	static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data)
300	{
301
302	if (features & NETIF_F_RXALL) {
303	/* enable RX of ALL frames */
304	*mac_ctrl_data |= MAC_CTRL_DBG;
305	} else {
306	/* disable RX of ALL frames */
307	*mac_ctrl_data &= ~MAC_CTRL_DBG;
308	}
309	}
310
311	static void atl1e_rx_mode(struct net_device *netdev,
312	netdev_features_t features)
313	{
314	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
315	u32 mac_ctrl_data = 0;
316
317	netdev_dbg(adapter->netdev, "%s\n", __func__);
318
319	atl1e_irq_disable(adapter);
320	mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
321	__atl1e_rx_mode(features, mac_ctrl_data: &mac_ctrl_data);
322	AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
323	atl1e_irq_enable(adapter);
324	}
325
326
327	static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
328	{
329	if (features & NETIF_F_HW_VLAN_CTAG_RX) {
330	/* enable VLAN tag insert/strip */
331	*mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
332	} else {
333	/* disable VLAN tag insert/strip */
334	*mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
335	}
336	}
337
338	static void atl1e_vlan_mode(struct net_device *netdev,
339	netdev_features_t features)
340	{
341	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
342	u32 mac_ctrl_data = 0;
343
344	netdev_dbg(adapter->netdev, "%s\n", __func__);
345
346	atl1e_irq_disable(adapter);
347	mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
348	__atl1e_vlan_mode(features, mac_ctrl_data: &mac_ctrl_data);
349	AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
350	atl1e_irq_enable(adapter);
351	}
352
353	static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
354	{
355	netdev_dbg(adapter->netdev, "%s\n", __func__);
356	atl1e_vlan_mode(netdev: adapter->netdev, features: adapter->netdev->features);
357	}
358
359	/**
360	* atl1e_set_mac_addr - Change the Ethernet Address of the NIC
361	* @netdev: network interface device structure
362	* @p: pointer to an address structure
363	*
364	* Returns 0 on success, negative on failure
365	*/
366	static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
367	{
368	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
369	struct sockaddr *addr = p;
370
371	if (!is_valid_ether_addr(addr: addr->sa_data))
372	return -EADDRNOTAVAIL;
373
374	if (netif_running(dev: netdev))
375	return -EBUSY;
376
377	eth_hw_addr_set(dev: netdev, addr: addr->sa_data);
378	memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
379
380	atl1e_hw_set_mac_addr(hw: &adapter->hw);
381
382	return 0;
383	}
384
385	static netdev_features_t atl1e_fix_features(struct net_device *netdev,
386	netdev_features_t features)
387	{
388	/*
389	* Since there is no support for separate rx/tx vlan accel
390	* enable/disable make sure tx flag is always in same state as rx.
391	*/
392	if (features & NETIF_F_HW_VLAN_CTAG_RX)
393	features |= NETIF_F_HW_VLAN_CTAG_TX;
394	else
395	features &= ~NETIF_F_HW_VLAN_CTAG_TX;
396
397	return features;
398	}
399
400	static int atl1e_set_features(struct net_device *netdev,
401	netdev_features_t features)
402	{
403	netdev_features_t changed = netdev->features ^ features;
404
405	if (changed & NETIF_F_HW_VLAN_CTAG_RX)
406	atl1e_vlan_mode(netdev, features);
407
408	if (changed & NETIF_F_RXALL)
409	atl1e_rx_mode(netdev, features);
410
411
412	return 0;
413	}
414
415	/**
416	* atl1e_change_mtu - Change the Maximum Transfer Unit
417	* @netdev: network interface device structure
418	* @new_mtu: new value for maximum frame size
419	*
420	* Returns 0 on success, negative on failure
421	*/
422	static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
423	{
424	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
425	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
426
427	/* set MTU */
428	if (netif_running(dev: netdev)) {
429	while (test_and_set_bit(__AT_RESETTING, addr: &adapter->flags))
430	msleep(msecs: 1);
431	netdev->mtu = new_mtu;
432	adapter->hw.max_frame_size = new_mtu;
433	adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
434	atl1e_down(adapter);
435	atl1e_up(adapter);
436	clear_bit(__AT_RESETTING, addr: &adapter->flags);
437	}
438	return 0;
439	}
440
441	/*
442	* caller should hold mdio_lock
443	*/
444	static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
445	{
446	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
447	u16 result;
448
449	atl1e_read_phy_reg(hw: &adapter->hw, reg_addr: reg_num & MDIO_REG_ADDR_MASK, phy_data: &result);
450	return result;
451	}
452
453	static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
454	int reg_num, int val)
455	{
456	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
457
458	if (atl1e_write_phy_reg(hw: &adapter->hw,
459	reg_addr: reg_num & MDIO_REG_ADDR_MASK, phy_data: val))
460	netdev_err(dev: netdev, format: "write phy register failed\n");
461	}
462
463	static int atl1e_mii_ioctl(struct net_device *netdev,
464	struct ifreq *ifr, int cmd)
465	{
466	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
467	struct mii_ioctl_data *data = if_mii(rq: ifr);
468	unsigned long flags;
469	int retval = 0;
470
471	if (!netif_running(dev: netdev))
472	return -EINVAL;
473
474	spin_lock_irqsave(&adapter->mdio_lock, flags);
475	switch (cmd) {
476	case SIOCGMIIPHY:
477	data->phy_id = 0;
478	break;
479
480	case SIOCGMIIREG:
481	if (atl1e_read_phy_reg(hw: &adapter->hw, reg_addr: data->reg_num & 0x1F,
482	phy_data: &data->val_out)) {
483	retval = -EIO;
484	goto out;
485	}
486	break;
487
488	case SIOCSMIIREG:
489	if (data->reg_num & ~(0x1F)) {
490	retval = -EFAULT;
491	goto out;
492	}
493
494	netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
495	data->reg_num, data->val_in);
496	if (atl1e_write_phy_reg(hw: &adapter->hw,
497	reg_addr: data->reg_num, phy_data: data->val_in)) {
498	retval = -EIO;
499	goto out;
500	}
501	break;
502
503	default:
504	retval = -EOPNOTSUPP;
505	break;
506	}
507	out:
508	spin_unlock_irqrestore(lock: &adapter->mdio_lock, flags);
509	return retval;
510
511	}
512
513	static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
514	{
515	switch (cmd) {
516	case SIOCGMIIPHY:
517	case SIOCGMIIREG:
518	case SIOCSMIIREG:
519	return atl1e_mii_ioctl(netdev, ifr, cmd);
520	default:
521	return -EOPNOTSUPP;
522	}
523	}
524
525	static void atl1e_setup_pcicmd(struct pci_dev *pdev)
526	{
527	u16 cmd;
528
529	pci_read_config_word(dev: pdev, PCI_COMMAND, val: &cmd);
530	cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
531	cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
532	pci_write_config_word(dev: pdev, PCI_COMMAND, val: cmd);
533
534	/*
535	* some motherboards BIOS(PXE/EFI) driver may set PME
536	* while they transfer control to OS (Windows/Linux)
537	* so we should clear this bit before NIC work normally
538	*/
539	pci_write_config_dword(dev: pdev, REG_PM_CTRLSTAT, val: 0);
540	msleep(msecs: 1);
541	}
542
543	/**
544	* atl1e_alloc_queues - Allocate memory for all rings
545	* @adapter: board private structure to initialize
546	*
547	*/
548	static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
549	{
550	return 0;
551	}
552
553	/**
554	* atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
555	* @adapter: board private structure to initialize
556	*
557	* atl1e_sw_init initializes the Adapter private data structure.
558	* Fields are initialized based on PCI device information and
559	* OS network device settings (MTU size).
560	*/
561	static int atl1e_sw_init(struct atl1e_adapter *adapter)
562	{
563	struct atl1e_hw *hw = &adapter->hw;
564	struct pci_dev *pdev = adapter->pdev;
565	u32 phy_status_data = 0;
566
567	adapter->wol = 0;
568	adapter->link_speed = SPEED_0; /* hardware init */
569	adapter->link_duplex = FULL_DUPLEX;
570	adapter->num_rx_queues = 1;
571
572	/* PCI config space info */
573	hw->vendor_id = pdev->vendor;
574	hw->device_id = pdev->device;
575	hw->subsystem_vendor_id = pdev->subsystem_vendor;
576	hw->subsystem_id = pdev->subsystem_device;
577	hw->revision_id = pdev->revision;
578
579	pci_read_config_word(dev: pdev, PCI_COMMAND, val: &hw->pci_cmd_word);
580
581	phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
582	/* nic type */
583	if (hw->revision_id >= 0xF0) {
584	hw->nic_type = athr_l2e_revB;
585	} else {
586	if (phy_status_data & PHY_STATUS_100M)
587	hw->nic_type = athr_l1e;
588	else
589	hw->nic_type = athr_l2e_revA;
590	}
591
592	phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
593
594	if (phy_status_data & PHY_STATUS_EMI_CA)
595	hw->emi_ca = true;
596	else
597	hw->emi_ca = false;
598
599	hw->phy_configured = false;
600	hw->preamble_len = 7;
601	hw->max_frame_size = adapter->netdev->mtu;
602	hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
603	VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
604
605	hw->rrs_type = atl1e_rrs_disable;
606	hw->indirect_tab = 0;
607	hw->base_cpu = 0;
608
609	/* need confirm */
610
611	hw->ict = 50000; /* 100ms */
612	hw->smb_timer = 200000; /* 200ms */
613	hw->tpd_burst = 5;
614	hw->rrd_thresh = 1;
615	hw->tpd_thresh = adapter->tx_ring.count / 2;
616	hw->rx_count_down = 4; /* 2us resolution */
617	hw->tx_count_down = hw->imt * 4 / 3;
618	hw->dmar_block = atl1e_dma_req_1024;
619	hw->dmaw_block = atl1e_dma_req_1024;
620	hw->dmar_dly_cnt = 15;
621	hw->dmaw_dly_cnt = 4;
622
623	if (atl1e_alloc_queues(adapter)) {
624	netdev_err(dev: adapter->netdev, format: "Unable to allocate memory for queues\n");
625	return -ENOMEM;
626	}
627
628	atomic_set(v: &adapter->irq_sem, i: 1);
629	spin_lock_init(&adapter->mdio_lock);
630
631	set_bit(__AT_DOWN, addr: &adapter->flags);
632
633	return 0;
634	}
635
636	/**
637	* atl1e_clean_tx_ring - Free Tx-skb
638	* @adapter: board private structure
639	*/
640	static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
641	{
642	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
643	struct atl1e_tx_buffer *tx_buffer = NULL;
644	struct pci_dev *pdev = adapter->pdev;
645	u16 index, ring_count;
646
647	if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
648	return;
649
650	ring_count = tx_ring->count;
651	/* first unmmap dma */
652	for (index = 0; index < ring_count; index++) {
653	tx_buffer = &tx_ring->tx_buffer[index];
654	if (tx_buffer->dma) {
655	if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
656	dma_unmap_single(&pdev->dev, tx_buffer->dma,
657	tx_buffer->length,
658	DMA_TO_DEVICE);
659	else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
660	dma_unmap_page(&pdev->dev, tx_buffer->dma,
661	tx_buffer->length,
662	DMA_TO_DEVICE);
663	tx_buffer->dma = 0;
664	}
665	}
666	/* second free skb */
667	for (index = 0; index < ring_count; index++) {
668	tx_buffer = &tx_ring->tx_buffer[index];
669	if (tx_buffer->skb) {
670	dev_kfree_skb_any(skb: tx_buffer->skb);
671	tx_buffer->skb = NULL;
672	}
673	}
674	/* Zero out Tx-buffers */
675	memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
676	ring_count);
677	memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
678	ring_count);
679	}
680
681	/**
682	* atl1e_clean_rx_ring - Free rx-reservation skbs
683	* @adapter: board private structure
684	*/
685	static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
686	{
687	struct atl1e_rx_ring *rx_ring =
688	&adapter->rx_ring;
689	struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
690	u16 i, j;
691
692
693	if (adapter->ring_vir_addr == NULL)
694	return;
695	/* Zero out the descriptor ring */
696	for (i = 0; i < adapter->num_rx_queues; i++) {
697	for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
698	if (rx_page_desc[i].rx_page[j].addr != NULL) {
699	memset(rx_page_desc[i].rx_page[j].addr, 0,
700	rx_ring->real_page_size);
701	}
702	}
703	}
704	}
705
706	static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
707	{
708	*ring_size = ((u32)(adapter->tx_ring.count *
709	sizeof(struct atl1e_tpd_desc) + 7
710	/* tx ring, qword align */
711	+ adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
712	adapter->num_rx_queues + 31
713	/* rx ring, 32 bytes align */
714	+ (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
715	sizeof(u32) + 3));
716	/* tx, rx cmd, dword align */
717	}
718
719	static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
720	{
721	struct atl1e_rx_ring *rx_ring = NULL;
722
723	rx_ring = &adapter->rx_ring;
724
725	rx_ring->real_page_size = adapter->rx_ring.page_size
726	+ adapter->hw.max_frame_size
727	+ ETH_HLEN + VLAN_HLEN
728	+ ETH_FCS_LEN;
729	rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
730	atl1e_cal_ring_size(adapter, ring_size: &adapter->ring_size);
731
732	adapter->ring_vir_addr = NULL;
733	adapter->rx_ring.desc = NULL;
734	rwlock_init(&adapter->tx_ring.tx_lock);
735	}
736
737	/*
738	* Read / Write Ptr Initialize:
739	*/
740	static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
741	{
742	struct atl1e_tx_ring *tx_ring = NULL;
743	struct atl1e_rx_ring *rx_ring = NULL;
744	struct atl1e_rx_page_desc *rx_page_desc = NULL;
745	int i, j;
746
747	tx_ring = &adapter->tx_ring;
748	rx_ring = &adapter->rx_ring;
749	rx_page_desc = rx_ring->rx_page_desc;
750
751	tx_ring->next_to_use = 0;
752	atomic_set(v: &tx_ring->next_to_clean, i: 0);
753
754	for (i = 0; i < adapter->num_rx_queues; i++) {
755	rx_page_desc[i].rx_using = 0;
756	rx_page_desc[i].rx_nxseq = 0;
757	for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
758	*rx_page_desc[i].rx_page[j].write_offset_addr = 0;
759	rx_page_desc[i].rx_page[j].read_offset = 0;
760	}
761	}
762	}
763
764	/**
765	* atl1e_free_ring_resources - Free Tx / RX descriptor Resources
766	* @adapter: board private structure
767	*
768	* Free all transmit software resources
769	*/
770	static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
771	{
772	struct pci_dev *pdev = adapter->pdev;
773
774	atl1e_clean_tx_ring(adapter);
775	atl1e_clean_rx_ring(adapter);
776
777	if (adapter->ring_vir_addr) {
778	dma_free_coherent(dev: &pdev->dev, size: adapter->ring_size,
779	cpu_addr: adapter->ring_vir_addr, dma_handle: adapter->ring_dma);
780	adapter->ring_vir_addr = NULL;
781	}
782
783	if (adapter->tx_ring.tx_buffer) {
784	kfree(objp: adapter->tx_ring.tx_buffer);
785	adapter->tx_ring.tx_buffer = NULL;
786	}
787	}
788
789	/**
790	* atl1e_setup_ring_resources - allocate Tx / RX descriptor resources
791	* @adapter: board private structure
792	*
793	* Return 0 on success, negative on failure
794	*/
795	static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
796	{
797	struct pci_dev *pdev = adapter->pdev;
798	struct atl1e_tx_ring *tx_ring;
799	struct atl1e_rx_ring *rx_ring;
800	struct atl1e_rx_page_desc *rx_page_desc;
801	int size, i, j;
802	u32 offset = 0;
803	int err = 0;
804
805	if (adapter->ring_vir_addr != NULL)
806	return 0; /* alloced already */
807
808	tx_ring = &adapter->tx_ring;
809	rx_ring = &adapter->rx_ring;
810
811	/* real ring DMA buffer */
812
813	size = adapter->ring_size;
814	adapter->ring_vir_addr = dma_alloc_coherent(dev: &pdev->dev,
815	size: adapter->ring_size,
816	dma_handle: &adapter->ring_dma, GFP_KERNEL);
817	if (adapter->ring_vir_addr == NULL) {
818	netdev_err(dev: adapter->netdev,
819	format: "dma_alloc_coherent failed, size = D%d\n", size);
820	return -ENOMEM;
821	}
822
823	rx_page_desc = rx_ring->rx_page_desc;
824
825	/* Init TPD Ring */
826	tx_ring->dma = roundup(adapter->ring_dma, 8);
827	offset = tx_ring->dma - adapter->ring_dma;
828	tx_ring->desc = adapter->ring_vir_addr + offset;
829	size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
830	tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
831	if (tx_ring->tx_buffer == NULL) {
832	err = -ENOMEM;
833	goto failed;
834	}
835
836	/* Init RXF-Pages */
837	offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
838	offset = roundup(offset, 32);
839
840	for (i = 0; i < adapter->num_rx_queues; i++) {
841	for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
842	rx_page_desc[i].rx_page[j].dma =
843	adapter->ring_dma + offset;
844	rx_page_desc[i].rx_page[j].addr =
845	adapter->ring_vir_addr + offset;
846	offset += rx_ring->real_page_size;
847	}
848	}
849
850	/* Init CMB dma address */
851	tx_ring->cmb_dma = adapter->ring_dma + offset;
852	tx_ring->cmb = adapter->ring_vir_addr + offset;
853	offset += sizeof(u32);
854
855	for (i = 0; i < adapter->num_rx_queues; i++) {
856	for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
857	rx_page_desc[i].rx_page[j].write_offset_dma =
858	adapter->ring_dma + offset;
859	rx_page_desc[i].rx_page[j].write_offset_addr =
860	adapter->ring_vir_addr + offset;
861	offset += sizeof(u32);
862	}
863	}
864
865	if (unlikely(offset > adapter->ring_size)) {
866	netdev_err(dev: adapter->netdev, format: "offset(%d) > ring size(%d) !!\n",
867	offset, adapter->ring_size);
868	err = -1;
869	goto free_buffer;
870	}
871
872	return 0;
873	free_buffer:
874	kfree(objp: tx_ring->tx_buffer);
875	tx_ring->tx_buffer = NULL;
876	failed:
877	if (adapter->ring_vir_addr != NULL) {
878	dma_free_coherent(dev: &pdev->dev, size: adapter->ring_size,
879	cpu_addr: adapter->ring_vir_addr, dma_handle: adapter->ring_dma);
880	adapter->ring_vir_addr = NULL;
881	}
882	return err;
883	}
884
885	static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
886	{
887
888	struct atl1e_hw *hw = &adapter->hw;
889	struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
890	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
891	struct atl1e_rx_page_desc *rx_page_desc = NULL;
892	int i, j;
893
894	AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
895	(u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
896	AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
897	(u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
898	AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
899	AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
900	(u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
901
902	rx_page_desc = rx_ring->rx_page_desc;
903	/* RXF Page Physical address / Page Length */
904	for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
905	AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
906	(u32)((adapter->ring_dma &
907	AT_DMA_HI_ADDR_MASK) >> 32));
908	for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
909	u32 page_phy_addr;
910	u32 offset_phy_addr;
911
912	page_phy_addr = rx_page_desc[i].rx_page[j].dma;
913	offset_phy_addr =
914	rx_page_desc[i].rx_page[j].write_offset_dma;
915
916	AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
917	page_phy_addr & AT_DMA_LO_ADDR_MASK);
918	AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
919	offset_phy_addr & AT_DMA_LO_ADDR_MASK);
920	AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
921	}
922	}
923	/* Page Length */
924	AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
925	/* Load all of base address above */
926	AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
927	}
928
929	static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
930	{
931	struct atl1e_hw *hw = &adapter->hw;
932	u32 dev_ctrl_data = 0;
933	u32 max_pay_load = 0;
934	u32 jumbo_thresh = 0;
935	u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
936
937	/* configure TXQ param */
938	if (hw->nic_type != athr_l2e_revB) {
939	extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
940	if (hw->max_frame_size <= 1500) {
941	jumbo_thresh = hw->max_frame_size + extra_size;
942	} else if (hw->max_frame_size < 6*1024) {
943	jumbo_thresh =
944	(hw->max_frame_size + extra_size) * 2 / 3;
945	} else {
946	jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
947	}
948	AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
949	}
950
951	dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
952
953	max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
954	DEVICE_CTRL_MAX_PAYLOAD_MASK;
955
956	hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
957
958	max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
959	DEVICE_CTRL_MAX_RREQ_SZ_MASK;
960	hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
961
962	if (hw->nic_type != athr_l2e_revB)
963	AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
964	atl1e_pay_load_size[hw->dmar_block]);
965	/* enable TXQ */
966	AT_WRITE_REGW(hw, REG_TXQ_CTRL,
967	(((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
968	<< TXQ_CTRL_NUM_TPD_BURST_SHIFT)
969	| TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
970	}
971
972	static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
973	{
974	struct atl1e_hw *hw = &adapter->hw;
975	u32 rxf_len = 0;
976	u32 rxf_low = 0;
977	u32 rxf_high = 0;
978	u32 rxf_thresh_data = 0;
979	u32 rxq_ctrl_data = 0;
980
981	if (hw->nic_type != athr_l2e_revB) {
982	AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
983	(u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
984	RXQ_JMBOSZ_TH_SHIFT |
985	(1 & RXQ_JMBO_LKAH_MASK) <<
986	RXQ_JMBO_LKAH_SHIFT));
987
988	rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
989	rxf_high = rxf_len * 4 / 5;
990	rxf_low = rxf_len / 5;
991	rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
992	<< RXQ_RXF_PAUSE_TH_HI_SHIFT) |
993	((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
994	<< RXQ_RXF_PAUSE_TH_LO_SHIFT);
995
996	AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
997	}
998
999	/* RRS */
1000	AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1001	AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1002
1003	if (hw->rrs_type & atl1e_rrs_ipv4)
1004	rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1005
1006	if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1007	rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1008
1009	if (hw->rrs_type & atl1e_rrs_ipv6)
1010	rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1011
1012	if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1013	rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1014
1015	if (hw->rrs_type != atl1e_rrs_disable)
1016	rxq_ctrl_data |=
1017	(RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1018
1019	rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1020	RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1021
1022	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1023	}
1024
1025	static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1026	{
1027	struct atl1e_hw *hw = &adapter->hw;
1028	u32 dma_ctrl_data = 0;
1029
1030	dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1031	dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1032	<< DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1033	dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1034	<< DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1035	dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1036	dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1037	<< DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1038	dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1039	<< DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1040
1041	AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1042	}
1043
1044	static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1045	{
1046	u32 value;
1047	struct atl1e_hw *hw = &adapter->hw;
1048	struct net_device *netdev = adapter->netdev;
1049
1050	/* Config MAC CTRL Register */
1051	value = MAC_CTRL_TX_EN |
1052	MAC_CTRL_RX_EN ;
1053
1054	if (FULL_DUPLEX == adapter->link_duplex)
1055	value |= MAC_CTRL_DUPLX;
1056
1057	value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1058	MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1059	MAC_CTRL_SPEED_SHIFT);
1060	value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1061
1062	value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1063	value |= (((u32)adapter->hw.preamble_len &
1064	MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1065
1066	__atl1e_vlan_mode(features: netdev->features, mac_ctrl_data: &value);
1067
1068	value |= MAC_CTRL_BC_EN;
1069	if (netdev->flags & IFF_PROMISC)
1070	value |= MAC_CTRL_PROMIS_EN;
1071	if (netdev->flags & IFF_ALLMULTI)
1072	value |= MAC_CTRL_MC_ALL_EN;
1073	if (netdev->features & NETIF_F_RXALL)
1074	value |= MAC_CTRL_DBG;
1075	AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1076	}
1077
1078	/**
1079	* atl1e_configure - Configure Transmit&Receive Unit after Reset
1080	* @adapter: board private structure
1081	*
1082	* Configure the Tx /Rx unit of the MAC after a reset.
1083	*/
1084	static int atl1e_configure(struct atl1e_adapter *adapter)
1085	{
1086	struct atl1e_hw *hw = &adapter->hw;
1087
1088	u32 intr_status_data = 0;
1089
1090	/* clear interrupt status */
1091	AT_WRITE_REG(hw, REG_ISR, ~0);
1092
1093	/* 1. set MAC Address */
1094	atl1e_hw_set_mac_addr(hw);
1095
1096	/* 2. Init the Multicast HASH table done by set_muti */
1097
1098	/* 3. Clear any WOL status */
1099	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1100
1101	/* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1102	* TPD Ring/SMB/RXF0 Page CMBs, they use the same
1103	* High 32bits memory */
1104	atl1e_configure_des_ring(adapter);
1105
1106	/* 5. set Interrupt Moderator Timer */
1107	AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1108	AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1109	AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1110	MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1111
1112	/* 6. rx/tx threshold to trig interrupt */
1113	AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1114	AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1115	AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1116	AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1117
1118	/* 7. set Interrupt Clear Timer */
1119	AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1120
1121	/* 8. set MTU */
1122	AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1123	VLAN_HLEN + ETH_FCS_LEN);
1124
1125	/* 9. config TXQ early tx threshold */
1126	atl1e_configure_tx(adapter);
1127
1128	/* 10. config RXQ */
1129	atl1e_configure_rx(adapter);
1130
1131	/* 11. config DMA Engine */
1132	atl1e_configure_dma(adapter);
1133
1134	/* 12. smb timer to trig interrupt */
1135	AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1136
1137	intr_status_data = AT_READ_REG(hw, REG_ISR);
1138	if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1139	netdev_err(dev: adapter->netdev,
1140	format: "atl1e_configure failed, PCIE phy link down\n");
1141	return -1;
1142	}
1143
1144	AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1145	return 0;
1146	}
1147
1148	/**
1149	* atl1e_get_stats - Get System Network Statistics
1150	* @netdev: network interface device structure
1151	*
1152	* Returns the address of the device statistics structure.
1153	* The statistics are actually updated from the timer callback.
1154	*/
1155	static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1156	{
1157	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
1158	struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1159	struct net_device_stats *net_stats = &netdev->stats;
1160
1161	net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1162	net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1163	net_stats->multicast = hw_stats->rx_mcast;
1164	net_stats->collisions = hw_stats->tx_1_col +
1165	hw_stats->tx_2_col +
1166	hw_stats->tx_late_col +
1167	hw_stats->tx_abort_col;
1168
1169	net_stats->rx_errors = hw_stats->rx_frag +
1170	hw_stats->rx_fcs_err +
1171	hw_stats->rx_len_err +
1172	hw_stats->rx_sz_ov +
1173	hw_stats->rx_rrd_ov +
1174	hw_stats->rx_align_err +
1175	hw_stats->rx_rxf_ov;
1176
1177	net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1178	net_stats->rx_length_errors = hw_stats->rx_len_err;
1179	net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1180	net_stats->rx_frame_errors = hw_stats->rx_align_err;
1181	net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1182
1183	net_stats->tx_errors = hw_stats->tx_late_col +
1184	hw_stats->tx_abort_col +
1185	hw_stats->tx_underrun +
1186	hw_stats->tx_trunc;
1187
1188	net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1189	net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1190	net_stats->tx_window_errors = hw_stats->tx_late_col;
1191
1192	net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1193	net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1194
1195	return net_stats;
1196	}
1197
1198	static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1199	{
1200	u16 hw_reg_addr = 0;
1201	unsigned long *stats_item = NULL;
1202
1203	/* update rx status */
1204	hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1205	stats_item = &adapter->hw_stats.rx_ok;
1206	while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1207	*stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1208	stats_item++;
1209	hw_reg_addr += 4;
1210	}
1211	/* update tx status */
1212	hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1213	stats_item = &adapter->hw_stats.tx_ok;
1214	while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1215	*stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1216	stats_item++;
1217	hw_reg_addr += 4;
1218	}
1219	}
1220
1221	static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1222	{
1223	u16 phy_data;
1224
1225	spin_lock(lock: &adapter->mdio_lock);
1226	atl1e_read_phy_reg(hw: &adapter->hw, MII_INT_STATUS, phy_data: &phy_data);
1227	spin_unlock(lock: &adapter->mdio_lock);
1228	}
1229
1230	static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1231	{
1232	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1233	struct atl1e_tx_buffer *tx_buffer = NULL;
1234	u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1235	u16 next_to_clean = atomic_read(v: &tx_ring->next_to_clean);
1236
1237	while (next_to_clean != hw_next_to_clean) {
1238	tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1239	if (tx_buffer->dma) {
1240	if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1241	dma_unmap_single(&adapter->pdev->dev,
1242	tx_buffer->dma,
1243	tx_buffer->length,
1244	DMA_TO_DEVICE);
1245	else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1246	dma_unmap_page(&adapter->pdev->dev,
1247	tx_buffer->dma,
1248	tx_buffer->length,
1249	DMA_TO_DEVICE);
1250	tx_buffer->dma = 0;
1251	}
1252
1253	if (tx_buffer->skb) {
1254	dev_consume_skb_irq(skb: tx_buffer->skb);
1255	tx_buffer->skb = NULL;
1256	}
1257
1258	if (++next_to_clean == tx_ring->count)
1259	next_to_clean = 0;
1260	}
1261
1262	atomic_set(v: &tx_ring->next_to_clean, i: next_to_clean);
1263
1264	if (netif_queue_stopped(dev: adapter->netdev) &&
1265	netif_carrier_ok(dev: adapter->netdev)) {
1266	netif_wake_queue(dev: adapter->netdev);
1267	}
1268
1269	return true;
1270	}
1271
1272	/**
1273	* atl1e_intr - Interrupt Handler
1274	* @irq: interrupt number
1275	* @data: pointer to a network interface device structure
1276	*/
1277	static irqreturn_t atl1e_intr(int irq, void *data)
1278	{
1279	struct net_device *netdev = data;
1280	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
1281	struct atl1e_hw *hw = &adapter->hw;
1282	int max_ints = AT_MAX_INT_WORK;
1283	int handled = IRQ_NONE;
1284	u32 status;
1285
1286	do {
1287	status = AT_READ_REG(hw, REG_ISR);
1288	if ((status & IMR_NORMAL_MASK) == 0 ||
1289	(status & ISR_DIS_INT) != 0) {
1290	if (max_ints != AT_MAX_INT_WORK)
1291	handled = IRQ_HANDLED;
1292	break;
1293	}
1294	/* link event */
1295	if (status & ISR_GPHY)
1296	atl1e_clear_phy_int(adapter);
1297	/* Ack ISR */
1298	AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1299
1300	handled = IRQ_HANDLED;
1301	/* check if PCIE PHY Link down */
1302	if (status & ISR_PHY_LINKDOWN) {
1303	netdev_err(dev: adapter->netdev,
1304	format: "pcie phy linkdown %x\n", status);
1305	if (netif_running(dev: adapter->netdev)) {
1306	/* reset MAC */
1307	atl1e_irq_reset(adapter);
1308	schedule_work(work: &adapter->reset_task);
1309	break;
1310	}
1311	}
1312
1313	/* check if DMA read/write error */
1314	if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1315	netdev_err(dev: adapter->netdev,
1316	format: "PCIE DMA RW error (status = 0x%x)\n",
1317	status);
1318	atl1e_irq_reset(adapter);
1319	schedule_work(work: &adapter->reset_task);
1320	break;
1321	}
1322
1323	if (status & ISR_SMB)
1324	atl1e_update_hw_stats(adapter);
1325
1326	/* link event */
1327	if (status & (ISR_GPHY | ISR_MANUAL)) {
1328	netdev->stats.tx_carrier_errors++;
1329	atl1e_link_chg_event(adapter);
1330	break;
1331	}
1332
1333	/* transmit event */
1334	if (status & ISR_TX_EVENT)
1335	atl1e_clean_tx_irq(adapter);
1336
1337	if (status & ISR_RX_EVENT) {
1338	/*
1339	* disable rx interrupts, without
1340	* the synchronize_irq bit
1341	*/
1342	AT_WRITE_REG(hw, REG_IMR,
1343	IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1344	AT_WRITE_FLUSH(hw);
1345	if (likely(napi_schedule_prep(
1346	&adapter->napi)))
1347	__napi_schedule(n: &adapter->napi);
1348	}
1349	} while (--max_ints > 0);
1350	/* re-enable Interrupt*/
1351	AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1352
1353	return handled;
1354	}
1355
1356	static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1357	struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1358	{
1359	u8 *packet = (u8 *)(prrs + 1);
1360	struct iphdr *iph;
1361	u16 head_len = ETH_HLEN;
1362	u16 pkt_flags;
1363	u16 err_flags;
1364
1365	skb_checksum_none_assert(skb);
1366	pkt_flags = prrs->pkt_flag;
1367	err_flags = prrs->err_flag;
1368	if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1369	((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1370	if (pkt_flags & RRS_IS_IPV4) {
1371	if (pkt_flags & RRS_IS_802_3)
1372	head_len += 8;
1373	iph = (struct iphdr *) (packet + head_len);
1374	if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1375	goto hw_xsum;
1376	}
1377	if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1378	skb->ip_summed = CHECKSUM_UNNECESSARY;
1379	return;
1380	}
1381	}
1382
1383	hw_xsum :
1384	return;
1385	}
1386
1387	static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1388	u8 que)
1389	{
1390	struct atl1e_rx_page_desc *rx_page_desc =
1391	(struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1392	u8 rx_using = rx_page_desc[que].rx_using;
1393
1394	return &(rx_page_desc[que].rx_page[rx_using]);
1395	}
1396
1397	static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1398	int *work_done, int work_to_do)
1399	{
1400	struct net_device *netdev = adapter->netdev;
1401	struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1402	struct atl1e_rx_page_desc *rx_page_desc =
1403	(struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1404	struct sk_buff *skb = NULL;
1405	struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1406	u32 packet_size, write_offset;
1407	struct atl1e_recv_ret_status *prrs;
1408
1409	write_offset = *(rx_page->write_offset_addr);
1410	if (likely(rx_page->read_offset < write_offset)) {
1411	do {
1412	if (*work_done >= work_to_do)
1413	break;
1414	(*work_done)++;
1415	/* get new packet's rrs */
1416	prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1417	rx_page->read_offset);
1418	/* check sequence number */
1419	if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1420	netdev_err(dev: netdev,
1421	format: "rx sequence number error (rx=%d) (expect=%d)\n",
1422	prrs->seq_num,
1423	rx_page_desc[que].rx_nxseq);
1424	rx_page_desc[que].rx_nxseq++;
1425	/* just for debug use */
1426	AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1427	(((u32)prrs->seq_num) << 16) |
1428	rx_page_desc[que].rx_nxseq);
1429	goto fatal_err;
1430	}
1431	rx_page_desc[que].rx_nxseq++;
1432
1433	/* error packet */
1434	if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) &&
1435	!(netdev->features & NETIF_F_RXALL)) {
1436	if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1437	RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1438	RRS_ERR_TRUNC)) {
1439	/* hardware error, discard this packet*/
1440	netdev_err(dev: netdev,
1441	format: "rx packet desc error %x\n",
1442	*((u32 *)prrs + 1));
1443	goto skip_pkt;
1444	}
1445	}
1446
1447	packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1448	RRS_PKT_SIZE_MASK);
1449	if (likely(!(netdev->features & NETIF_F_RXFCS)))
1450	packet_size -= 4; /* CRC */
1451
1452	skb = netdev_alloc_skb_ip_align(dev: netdev, length: packet_size);
1453	if (skb == NULL)
1454	goto skip_pkt;
1455
1456	memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1457	skb_put(skb, len: packet_size);
1458	skb->protocol = eth_type_trans(skb, dev: netdev);
1459	atl1e_rx_checksum(adapter, skb, prrs);
1460
1461	if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1462	u16 vlan_tag = (prrs->vtag >> 4) |
1463	((prrs->vtag & 7) << 13) |
1464	((prrs->vtag & 8) << 9);
1465	netdev_dbg(netdev,
1466	"RXD VLAN TAG<RRD>=0x%04x\n",
1467	prrs->vtag);
1468	__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci: vlan_tag);
1469	}
1470	napi_gro_receive(napi: &adapter->napi, skb);
1471
1472	skip_pkt:
1473	/* skip current packet whether it's ok or not. */
1474	rx_page->read_offset +=
1475	(((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1476	RRS_PKT_SIZE_MASK) +
1477	sizeof(struct atl1e_recv_ret_status) + 31) &
1478	0xFFFFFFE0);
1479
1480	if (rx_page->read_offset >= rx_ring->page_size) {
1481	/* mark this page clean */
1482	u16 reg_addr;
1483	u8 rx_using;
1484
1485	rx_page->read_offset =
1486	*(rx_page->write_offset_addr) = 0;
1487	rx_using = rx_page_desc[que].rx_using;
1488	reg_addr =
1489	atl1e_rx_page_vld_regs[que][rx_using];
1490	AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1491	rx_page_desc[que].rx_using ^= 1;
1492	rx_page = atl1e_get_rx_page(adapter, que);
1493	}
1494	write_offset = *(rx_page->write_offset_addr);
1495	} while (rx_page->read_offset < write_offset);
1496	}
1497
1498	return;
1499
1500	fatal_err:
1501	if (!test_bit(__AT_DOWN, &adapter->flags))
1502	schedule_work(work: &adapter->reset_task);
1503	}
1504
1505	/**
1506	* atl1e_clean - NAPI Rx polling callback
1507	* @napi: napi info
1508	* @budget: number of packets to clean
1509	*/
1510	static int atl1e_clean(struct napi_struct *napi, int budget)
1511	{
1512	struct atl1e_adapter *adapter =
1513	container_of(napi, struct atl1e_adapter, napi);
1514	u32 imr_data;
1515	int work_done = 0;
1516
1517	/* Keep link state information with original netdev */
1518	if (!netif_carrier_ok(dev: adapter->netdev))
1519	goto quit_polling;
1520
1521	atl1e_clean_rx_irq(adapter, que: 0, work_done: &work_done, work_to_do: budget);
1522
1523	/* If no Tx and not enough Rx work done, exit the polling mode */
1524	if (work_done < budget) {
1525	quit_polling:
1526	napi_complete_done(n: napi, work_done);
1527	imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1528	AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1529	/* test debug */
1530	if (test_bit(__AT_DOWN, &adapter->flags)) {
1531	atomic_dec(v: &adapter->irq_sem);
1532	netdev_err(dev: adapter->netdev,
1533	format: "atl1e_clean is called when AT_DOWN\n");
1534	}
1535	/* reenable RX intr */
1536	/*atl1e_irq_enable(adapter); */
1537
1538	}
1539	return work_done;
1540	}
1541
1542	#ifdef CONFIG_NET_POLL_CONTROLLER
1543
1544	/*
1545	* Polling 'interrupt' - used by things like netconsole to send skbs
1546	* without having to re-enable interrupts. It's not called while
1547	* the interrupt routine is executing.
1548	*/
1549	static void atl1e_netpoll(struct net_device *netdev)
1550	{
1551	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
1552
1553	disable_irq(irq: adapter->pdev->irq);
1554	atl1e_intr(irq: adapter->pdev->irq, data: netdev);
1555	enable_irq(irq: adapter->pdev->irq);
1556	}
1557	#endif
1558
1559	static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1560	{
1561	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1562	u16 next_to_use = 0;
1563	u16 next_to_clean = 0;
1564
1565	next_to_clean = atomic_read(v: &tx_ring->next_to_clean);
1566	next_to_use = tx_ring->next_to_use;
1567
1568	return (u16)(next_to_clean > next_to_use) ?
1569	(next_to_clean - next_to_use - 1) :
1570	(tx_ring->count + next_to_clean - next_to_use - 1);
1571	}
1572
1573	/*
1574	* get next usable tpd
1575	* Note: should call atl1e_tdp_avail to make sure
1576	* there is enough tpd to use
1577	*/
1578	static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1579	{
1580	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1581	u16 next_to_use = 0;
1582
1583	next_to_use = tx_ring->next_to_use;
1584	if (++tx_ring->next_to_use == tx_ring->count)
1585	tx_ring->next_to_use = 0;
1586
1587	memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1588	return &tx_ring->desc[next_to_use];
1589	}
1590
1591	static struct atl1e_tx_buffer *
1592	atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1593	{
1594	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1595
1596	return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1597	}
1598
1599	/* Calculate the transmit packet descript needed*/
1600	static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1601	{
1602	int i = 0;
1603	u16 tpd_req = 1;
1604	u16 fg_size = 0;
1605	u16 proto_hdr_len = 0;
1606
1607	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1608	fg_size = skb_frag_size(frag: &skb_shinfo(skb)->frags[i]);
1609	tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1610	}
1611
1612	if (skb_is_gso(skb)) {
1613	if (skb->protocol == htons(ETH_P_IP) ||
1614	(skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1615	proto_hdr_len = skb_tcp_all_headers(skb);
1616	if (proto_hdr_len < skb_headlen(skb)) {
1617	tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1618	MAX_TX_BUF_LEN - 1) >>
1619	MAX_TX_BUF_SHIFT);
1620	}
1621	}
1622
1623	}
1624	return tpd_req;
1625	}
1626
1627	static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1628	struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1629	{
1630	unsigned short offload_type;
1631	u8 hdr_len;
1632	u32 real_len;
1633
1634	if (skb_is_gso(skb)) {
1635	int err;
1636
1637	err = skb_cow_head(skb, headroom: 0);
1638	if (err < 0)
1639	return err;
1640
1641	offload_type = skb_shinfo(skb)->gso_type;
1642
1643	if (offload_type & SKB_GSO_TCPV4) {
1644	real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1645	+ ntohs(ip_hdr(skb)->tot_len));
1646
1647	if (real_len < skb->len) {
1648	err = pskb_trim(skb, len: real_len);
1649	if (err)
1650	return err;
1651	}
1652
1653	hdr_len = skb_tcp_all_headers(skb);
1654	if (unlikely(skb->len == hdr_len)) {
1655	/* only xsum need */
1656	netdev_warn(dev: adapter->netdev,
1657	format: "IPV4 tso with zero data??\n");
1658	goto check_sum;
1659	} else {
1660	ip_hdr(skb)->check = 0;
1661	ip_hdr(skb)->tot_len = 0;
1662	tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1663	saddr: ip_hdr(skb)->saddr,
1664	daddr: ip_hdr(skb)->daddr,
1665	len: 0, IPPROTO_TCP, sum: 0);
1666	tpd->word3 |= (ip_hdr(skb)->ihl &
1667	TDP_V4_IPHL_MASK) <<
1668	TPD_V4_IPHL_SHIFT;
1669	tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1670	TPD_TCPHDRLEN_MASK) <<
1671	TPD_TCPHDRLEN_SHIFT;
1672	tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1673	TPD_MSS_MASK) << TPD_MSS_SHIFT;
1674	tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1675	}
1676	return 0;
1677	}
1678	}
1679
1680	check_sum:
1681	if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1682	u8 css, cso;
1683
1684	cso = skb_checksum_start_offset(skb);
1685	if (unlikely(cso & 0x1)) {
1686	netdev_err(dev: adapter->netdev,
1687	format: "payload offset should not ant event number\n");
1688	return -1;
1689	} else {
1690	css = cso + skb->csum_offset;
1691	tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1692	TPD_PLOADOFFSET_SHIFT;
1693	tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1694	TPD_CCSUMOFFSET_SHIFT;
1695	tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1696	}
1697	}
1698
1699	return 0;
1700	}
1701
1702	static int atl1e_tx_map(struct atl1e_adapter *adapter,
1703	struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1704	{
1705	struct atl1e_tpd_desc *use_tpd = NULL;
1706	struct atl1e_tx_buffer *tx_buffer = NULL;
1707	u16 buf_len = skb_headlen(skb);
1708	u16 map_len = 0;
1709	u16 mapped_len = 0;
1710	u16 hdr_len = 0;
1711	u16 nr_frags;
1712	u16 f;
1713	int segment;
1714	int ring_start = adapter->tx_ring.next_to_use;
1715	int ring_end;
1716
1717	nr_frags = skb_shinfo(skb)->nr_frags;
1718	segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1719	if (segment) {
1720	/* TSO */
1721	hdr_len = skb_tcp_all_headers(skb);
1722	map_len = hdr_len;
1723	use_tpd = tpd;
1724
1725	tx_buffer = atl1e_get_tx_buffer(adapter, tpd: use_tpd);
1726	tx_buffer->length = map_len;
1727	tx_buffer->dma = dma_map_single(&adapter->pdev->dev,
1728	skb->data, hdr_len,
1729	DMA_TO_DEVICE);
1730	if (dma_mapping_error(dev: &adapter->pdev->dev, dma_addr: tx_buffer->dma))
1731	return -ENOSPC;
1732
1733	ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1734	mapped_len += map_len;
1735	use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1736	use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1737	((cpu_to_le32(tx_buffer->length) &
1738	TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1739	}
1740
1741	while (mapped_len < buf_len) {
1742	/* mapped_len == 0, means we should use the first tpd,
1743	which is given by caller */
1744	if (mapped_len == 0) {
1745	use_tpd = tpd;
1746	} else {
1747	use_tpd = atl1e_get_tpd(adapter);
1748	memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1749	}
1750	tx_buffer = atl1e_get_tx_buffer(adapter, tpd: use_tpd);
1751	tx_buffer->skb = NULL;
1752
1753	tx_buffer->length = map_len =
1754	((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1755	MAX_TX_BUF_LEN : (buf_len - mapped_len);
1756	tx_buffer->dma =
1757	dma_map_single(&adapter->pdev->dev,
1758	skb->data + mapped_len, map_len,
1759	DMA_TO_DEVICE);
1760
1761	if (dma_mapping_error(dev: &adapter->pdev->dev, dma_addr: tx_buffer->dma)) {
1762	/* We need to unwind the mappings we've done */
1763	ring_end = adapter->tx_ring.next_to_use;
1764	adapter->tx_ring.next_to_use = ring_start;
1765	while (adapter->tx_ring.next_to_use != ring_end) {
1766	tpd = atl1e_get_tpd(adapter);
1767	tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1768	dma_unmap_single(&adapter->pdev->dev,
1769	tx_buffer->dma,
1770	tx_buffer->length,
1771	DMA_TO_DEVICE);
1772	}
1773	/* Reset the tx rings next pointer */
1774	adapter->tx_ring.next_to_use = ring_start;
1775	return -ENOSPC;
1776	}
1777
1778	ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1779	mapped_len += map_len;
1780	use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1781	use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1782	((cpu_to_le32(tx_buffer->length) &
1783	TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1784	}
1785
1786	for (f = 0; f < nr_frags; f++) {
1787	const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1788	u16 i;
1789	u16 seg_num;
1790
1791	buf_len = skb_frag_size(frag);
1792
1793	seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1794	for (i = 0; i < seg_num; i++) {
1795	use_tpd = atl1e_get_tpd(adapter);
1796	memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1797
1798	tx_buffer = atl1e_get_tx_buffer(adapter, tpd: use_tpd);
1799	BUG_ON(tx_buffer->skb);
1800
1801	tx_buffer->skb = NULL;
1802	tx_buffer->length =
1803	(buf_len > MAX_TX_BUF_LEN) ?
1804	MAX_TX_BUF_LEN : buf_len;
1805	buf_len -= tx_buffer->length;
1806
1807	tx_buffer->dma = skb_frag_dma_map(dev: &adapter->pdev->dev,
1808	frag,
1809	offset: (i * MAX_TX_BUF_LEN),
1810	size: tx_buffer->length,
1811	dir: DMA_TO_DEVICE);
1812
1813	if (dma_mapping_error(dev: &adapter->pdev->dev, dma_addr: tx_buffer->dma)) {
1814	/* We need to unwind the mappings we've done */
1815	ring_end = adapter->tx_ring.next_to_use;
1816	adapter->tx_ring.next_to_use = ring_start;
1817	while (adapter->tx_ring.next_to_use != ring_end) {
1818	tpd = atl1e_get_tpd(adapter);
1819	tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1820	dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1821	tx_buffer->length, DMA_TO_DEVICE);
1822	}
1823
1824	/* Reset the ring next to use pointer */
1825	adapter->tx_ring.next_to_use = ring_start;
1826	return -ENOSPC;
1827	}
1828
1829	ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1830	use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1831	use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1832	((cpu_to_le32(tx_buffer->length) &
1833	TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1834	}
1835	}
1836
1837	if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1838	/* note this one is a tcp header */
1839	tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1840	/* The last tpd */
1841
1842	use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1843	/* The last buffer info contain the skb address,
1844	so it will be free after unmap */
1845	tx_buffer->skb = skb;
1846	return 0;
1847	}
1848
1849	static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1850	struct atl1e_tpd_desc *tpd)
1851	{
1852	struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1853	/* Force memory writes to complete before letting h/w
1854	* know there are new descriptors to fetch. (Only
1855	* applicable for weak-ordered memory model archs,
1856	* such as IA-64). */
1857	wmb();
1858	AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1859	}
1860
1861	static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1862	struct net_device *netdev)
1863	{
1864	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
1865	u16 tpd_req = 1;
1866	struct atl1e_tpd_desc *tpd;
1867
1868	if (test_bit(__AT_DOWN, &adapter->flags)) {
1869	dev_kfree_skb_any(skb);
1870	return NETDEV_TX_OK;
1871	}
1872
1873	if (unlikely(skb->len <= 0)) {
1874	dev_kfree_skb_any(skb);
1875	return NETDEV_TX_OK;
1876	}
1877	tpd_req = atl1e_cal_tdp_req(skb);
1878
1879	if (atl1e_tpd_avail(adapter) < tpd_req) {
1880	/* no enough descriptor, just stop queue */
1881	netif_stop_queue(dev: netdev);
1882	return NETDEV_TX_BUSY;
1883	}
1884
1885	tpd = atl1e_get_tpd(adapter);
1886
1887	if (skb_vlan_tag_present(skb)) {
1888	u16 vlan_tag = skb_vlan_tag_get(skb);
1889	u16 atl1e_vlan_tag;
1890
1891	tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1892	AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1893	tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1894	TPD_VLAN_SHIFT;
1895	}
1896
1897	if (skb->protocol == htons(ETH_P_8021Q))
1898	tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1899
1900	if (skb_network_offset(skb) != ETH_HLEN)
1901	tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1902
1903	/* do TSO and check sum */
1904	if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1905	dev_kfree_skb_any(skb);
1906	return NETDEV_TX_OK;
1907	}
1908
1909	if (atl1e_tx_map(adapter, skb, tpd)) {
1910	dev_kfree_skb_any(skb);
1911	goto out;
1912	}
1913
1914	atl1e_tx_queue(adapter, count: tpd_req, tpd);
1915	out:
1916	return NETDEV_TX_OK;
1917	}
1918
1919	static void atl1e_free_irq(struct atl1e_adapter *adapter)
1920	{
1921	struct net_device *netdev = adapter->netdev;
1922
1923	free_irq(adapter->pdev->irq, netdev);
1924	}
1925
1926	static int atl1e_request_irq(struct atl1e_adapter *adapter)
1927	{
1928	struct pci_dev *pdev = adapter->pdev;
1929	struct net_device *netdev = adapter->netdev;
1930	int err = 0;
1931
1932	err = request_irq(irq: pdev->irq, handler: atl1e_intr, IRQF_SHARED, name: netdev->name,
1933	dev: netdev);
1934	if (err) {
1935	netdev_dbg(adapter->netdev,
1936	"Unable to allocate interrupt Error: %d\n", err);
1937	return err;
1938	}
1939	netdev_dbg(netdev, "atl1e_request_irq OK\n");
1940	return err;
1941	}
1942
1943	int atl1e_up(struct atl1e_adapter *adapter)
1944	{
1945	struct net_device *netdev = adapter->netdev;
1946	int err = 0;
1947	u32 val;
1948
1949	/* hardware has been reset, we need to reload some things */
1950	err = atl1e_init_hw(hw: &adapter->hw);
1951	if (err) {
1952	err = -EIO;
1953	return err;
1954	}
1955	atl1e_init_ring_ptrs(adapter);
1956	atl1e_set_multi(netdev);
1957	atl1e_restore_vlan(adapter);
1958
1959	if (atl1e_configure(adapter)) {
1960	err = -EIO;
1961	goto err_up;
1962	}
1963
1964	clear_bit(__AT_DOWN, addr: &adapter->flags);
1965	napi_enable(n: &adapter->napi);
1966	atl1e_irq_enable(adapter);
1967	val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1968	AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1969	val | MASTER_CTRL_MANUAL_INT);
1970
1971	err_up:
1972	return err;
1973	}
1974
1975	void atl1e_down(struct atl1e_adapter *adapter)
1976	{
1977	struct net_device *netdev = adapter->netdev;
1978
1979	/* signal that we're down so the interrupt handler does not
1980	* reschedule our watchdog timer */
1981	set_bit(__AT_DOWN, addr: &adapter->flags);
1982
1983	netif_stop_queue(dev: netdev);
1984
1985	/* reset MAC to disable all RX/TX */
1986	atl1e_reset_hw(hw: &adapter->hw);
1987	msleep(msecs: 1);
1988
1989	napi_disable(n: &adapter->napi);
1990	atl1e_del_timer(adapter);
1991	atl1e_irq_disable(adapter);
1992
1993	netif_carrier_off(dev: netdev);
1994	adapter->link_speed = SPEED_0;
1995	adapter->link_duplex = -1;
1996	atl1e_clean_tx_ring(adapter);
1997	atl1e_clean_rx_ring(adapter);
1998	}
1999
2000	/**
2001	* atl1e_open - Called when a network interface is made active
2002	* @netdev: network interface device structure
2003	*
2004	* Returns 0 on success, negative value on failure
2005	*
2006	* The open entry point is called when a network interface is made
2007	* active by the system (IFF_UP). At this point all resources needed
2008	* for transmit and receive operations are allocated, the interrupt
2009	* handler is registered with the OS, the watchdog timer is started,
2010	* and the stack is notified that the interface is ready.
2011	*/
2012	static int atl1e_open(struct net_device *netdev)
2013	{
2014	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2015	int err;
2016
2017	/* disallow open during test */
2018	if (test_bit(__AT_TESTING, &adapter->flags))
2019	return -EBUSY;
2020
2021	/* allocate rx/tx dma buffer & descriptors */
2022	atl1e_init_ring_resources(adapter);
2023	err = atl1e_setup_ring_resources(adapter);
2024	if (unlikely(err))
2025	return err;
2026
2027	err = atl1e_request_irq(adapter);
2028	if (unlikely(err))
2029	goto err_req_irq;
2030
2031	err = atl1e_up(adapter);
2032	if (unlikely(err))
2033	goto err_up;
2034
2035	return 0;
2036
2037	err_up:
2038	atl1e_free_irq(adapter);
2039	err_req_irq:
2040	atl1e_free_ring_resources(adapter);
2041	atl1e_reset_hw(hw: &adapter->hw);
2042
2043	return err;
2044	}
2045
2046	/**
2047	* atl1e_close - Disables a network interface
2048	* @netdev: network interface device structure
2049	*
2050	* Returns 0, this is not allowed to fail
2051	*
2052	* The close entry point is called when an interface is de-activated
2053	* by the OS. The hardware is still under the drivers control, but
2054	* needs to be disabled. A global MAC reset is issued to stop the
2055	* hardware, and all transmit and receive resources are freed.
2056	*/
2057	static int atl1e_close(struct net_device *netdev)
2058	{
2059	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2060
2061	WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2062	atl1e_down(adapter);
2063	atl1e_free_irq(adapter);
2064	atl1e_free_ring_resources(adapter);
2065
2066	return 0;
2067	}
2068
2069	static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2070	{
2071	struct net_device *netdev = pci_get_drvdata(pdev);
2072	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2073	struct atl1e_hw *hw = &adapter->hw;
2074	u32 ctrl = 0;
2075	u32 mac_ctrl_data = 0;
2076	u32 wol_ctrl_data = 0;
2077	u16 mii_advertise_data = 0;
2078	u16 mii_bmsr_data = 0;
2079	u16 mii_intr_status_data = 0;
2080	u32 wufc = adapter->wol;
2081	u32 i;
2082	#ifdef CONFIG_PM
2083	int retval = 0;
2084	#endif
2085
2086	if (netif_running(dev: netdev)) {
2087	WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2088	atl1e_down(adapter);
2089	}
2090	netif_device_detach(dev: netdev);
2091
2092	#ifdef CONFIG_PM
2093	retval = pci_save_state(dev: pdev);
2094	if (retval)
2095	return retval;
2096	#endif
2097
2098	if (wufc) {
2099	/* get link status */
2100	atl1e_read_phy_reg(hw, MII_BMSR, phy_data: &mii_bmsr_data);
2101	atl1e_read_phy_reg(hw, MII_BMSR, phy_data: &mii_bmsr_data);
2102
2103	mii_advertise_data = ADVERTISE_10HALF;
2104
2105	if ((atl1e_write_phy_reg(hw, MII_CTRL1000, phy_data: 0) != 0) ||
2106	(atl1e_write_phy_reg(hw,
2107	MII_ADVERTISE, phy_data: mii_advertise_data) != 0) ||
2108	(atl1e_phy_commit(hw)) != 0) {
2109	netdev_dbg(adapter->netdev, "set phy register failed\n");
2110	goto wol_dis;
2111	}
2112
2113	hw->phy_configured = false; /* re-init PHY when resume */
2114
2115	/* turn on magic packet wol */
2116	if (wufc & AT_WUFC_MAG)
2117	wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2118
2119	if (wufc & AT_WUFC_LNKC) {
2120	/* if orignal link status is link, just wait for retrive link */
2121	if (mii_bmsr_data & BMSR_LSTATUS) {
2122	for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2123	msleep(msecs: 100);
2124	atl1e_read_phy_reg(hw, MII_BMSR,
2125	phy_data: &mii_bmsr_data);
2126	if (mii_bmsr_data & BMSR_LSTATUS)
2127	break;
2128	}
2129
2130	if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2131	netdev_dbg(adapter->netdev,
2132	"Link may change when suspend\n");
2133	}
2134	wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2135	/* only link up can wake up */
2136	if (atl1e_write_phy_reg(hw, MII_INT_CTRL, phy_data: 0x400) != 0) {
2137	netdev_dbg(adapter->netdev,
2138	"read write phy register failed\n");
2139	goto wol_dis;
2140	}
2141	}
2142	/* clear phy interrupt */
2143	atl1e_read_phy_reg(hw, MII_INT_STATUS, phy_data: &mii_intr_status_data);
2144	/* Config MAC Ctrl register */
2145	mac_ctrl_data = MAC_CTRL_RX_EN;
2146	/* set to 10/100M halt duplex */
2147	mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2148	mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2149	MAC_CTRL_PRMLEN_MASK) <<
2150	MAC_CTRL_PRMLEN_SHIFT);
2151
2152	__atl1e_vlan_mode(features: netdev->features, mac_ctrl_data: &mac_ctrl_data);
2153
2154	/* magic packet maybe Broadcast&multicast&Unicast frame */
2155	if (wufc & AT_WUFC_MAG)
2156	mac_ctrl_data |= MAC_CTRL_BC_EN;
2157
2158	netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2159	mac_ctrl_data);
2160
2161	AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2162	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2163	/* pcie patch */
2164	ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2165	ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2166	AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2167	pci_enable_wake(dev: pdev, state: pci_choose_state(dev: pdev, state), enable: 1);
2168	goto suspend_exit;
2169	}
2170	wol_dis:
2171
2172	/* WOL disabled */
2173	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2174
2175	/* pcie patch */
2176	ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2177	ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2178	AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2179
2180	atl1e_force_ps(hw);
2181	hw->phy_configured = false; /* re-init PHY when resume */
2182
2183	pci_enable_wake(dev: pdev, state: pci_choose_state(dev: pdev, state), enable: 0);
2184
2185	suspend_exit:
2186
2187	if (netif_running(dev: netdev))
2188	atl1e_free_irq(adapter);
2189
2190	pci_disable_device(dev: pdev);
2191
2192	pci_set_power_state(dev: pdev, state: pci_choose_state(dev: pdev, state));
2193
2194	return 0;
2195	}
2196
2197	#ifdef CONFIG_PM
2198	static int atl1e_resume(struct pci_dev *pdev)
2199	{
2200	struct net_device *netdev = pci_get_drvdata(pdev);
2201	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2202	u32 err;
2203
2204	pci_set_power_state(dev: pdev, PCI_D0);
2205	pci_restore_state(dev: pdev);
2206
2207	err = pci_enable_device(dev: pdev);
2208	if (err) {
2209	netdev_err(dev: adapter->netdev,
2210	format: "Cannot enable PCI device from suspend\n");
2211	return err;
2212	}
2213
2214	pci_set_master(dev: pdev);
2215
2216	AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2217
2218	pci_enable_wake(dev: pdev, PCI_D3hot, enable: 0);
2219	pci_enable_wake(dev: pdev, PCI_D3cold, enable: 0);
2220
2221	AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2222
2223	if (netif_running(dev: netdev)) {
2224	err = atl1e_request_irq(adapter);
2225	if (err)
2226	return err;
2227	}
2228
2229	atl1e_reset_hw(hw: &adapter->hw);
2230
2231	if (netif_running(dev: netdev))
2232	atl1e_up(adapter);
2233
2234	netif_device_attach(dev: netdev);
2235
2236	return 0;
2237	}
2238	#endif
2239
2240	static void atl1e_shutdown(struct pci_dev *pdev)
2241	{
2242	atl1e_suspend(pdev, PMSG_SUSPEND);
2243	}
2244
2245	static const struct net_device_ops atl1e_netdev_ops = {
2246	.ndo_open = atl1e_open,
2247	.ndo_stop = atl1e_close,
2248	.ndo_start_xmit = atl1e_xmit_frame,
2249	.ndo_get_stats = atl1e_get_stats,
2250	.ndo_set_rx_mode = atl1e_set_multi,
2251	.ndo_validate_addr = eth_validate_addr,
2252	.ndo_set_mac_address = atl1e_set_mac_addr,
2253	.ndo_fix_features = atl1e_fix_features,
2254	.ndo_set_features = atl1e_set_features,
2255	.ndo_change_mtu = atl1e_change_mtu,
2256	.ndo_eth_ioctl = atl1e_ioctl,
2257	.ndo_tx_timeout = atl1e_tx_timeout,
2258	#ifdef CONFIG_NET_POLL_CONTROLLER
2259	.ndo_poll_controller = atl1e_netpoll,
2260	#endif
2261
2262	};
2263
2264	static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2265	{
2266	SET_NETDEV_DEV(netdev, &pdev->dev);
2267	pci_set_drvdata(pdev, data: netdev);
2268
2269	netdev->netdev_ops = &atl1e_netdev_ops;
2270
2271	netdev->watchdog_timeo = AT_TX_WATCHDOG;
2272	/* MTU range: 42 - 8170 */
2273	netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2274	netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
2275	(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
2276	atl1e_set_ethtool_ops(netdev);
2277
2278	netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2279	NETIF_F_HW_VLAN_CTAG_RX;
2280	netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX;
2281	/* not enabled by default */
2282	netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
2283	return 0;
2284	}
2285
2286	/**
2287	* atl1e_probe - Device Initialization Routine
2288	* @pdev: PCI device information struct
2289	* @ent: entry in atl1e_pci_tbl
2290	*
2291	* Returns 0 on success, negative on failure
2292	*
2293	* atl1e_probe initializes an adapter identified by a pci_dev structure.
2294	* The OS initialization, configuring of the adapter private structure,
2295	* and a hardware reset occur.
2296	*/
2297	static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2298	{
2299	struct net_device *netdev;
2300	struct atl1e_adapter *adapter = NULL;
2301	static int cards_found;
2302
2303	int err = 0;
2304
2305	err = pci_enable_device(dev: pdev);
2306	if (err)
2307	return dev_err_probe(dev: &pdev->dev, err, fmt: "cannot enable PCI device\n");
2308
2309	/*
2310	* The atl1e chip can DMA to 64-bit addresses, but it uses a single
2311	* shared register for the high 32 bits, so only a single, aligned,
2312	* 4 GB physical address range can be used at a time.
2313	*
2314	* Supporting 64-bit DMA on this hardware is more trouble than it's
2315	* worth. It is far easier to limit to 32-bit DMA than update
2316	* various kernel subsystems to support the mechanics required by a
2317	* fixed-high-32-bit system.
2318	*/
2319	err = dma_set_mask_and_coherent(dev: &pdev->dev, DMA_BIT_MASK(32));
2320	if (err) {
2321	dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2322	goto err_dma;
2323	}
2324
2325	err = pci_request_regions(pdev, atl1e_driver_name);
2326	if (err) {
2327	dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2328	goto err_pci_reg;
2329	}
2330
2331	pci_set_master(dev: pdev);
2332
2333	netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2334	if (netdev == NULL) {
2335	err = -ENOMEM;
2336	goto err_alloc_etherdev;
2337	}
2338
2339	err = atl1e_init_netdev(netdev, pdev);
2340	if (err) {
2341	netdev_err(dev: netdev, format: "init netdevice failed\n");
2342	goto err_init_netdev;
2343	}
2344	adapter = netdev_priv(dev: netdev);
2345	adapter->bd_number = cards_found;
2346	adapter->netdev = netdev;
2347	adapter->pdev = pdev;
2348	adapter->hw.adapter = adapter;
2349	adapter->hw.hw_addr = pci_iomap(dev: pdev, BAR_0, max: 0);
2350	if (!adapter->hw.hw_addr) {
2351	err = -EIO;
2352	netdev_err(dev: netdev, format: "cannot map device registers\n");
2353	goto err_ioremap;
2354	}
2355
2356	/* init mii data */
2357	adapter->mii.dev = netdev;
2358	adapter->mii.mdio_read = atl1e_mdio_read;
2359	adapter->mii.mdio_write = atl1e_mdio_write;
2360	adapter->mii.phy_id_mask = 0x1f;
2361	adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2362
2363	netif_napi_add(dev: netdev, napi: &adapter->napi, poll: atl1e_clean);
2364
2365	timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0);
2366
2367	/* get user settings */
2368	atl1e_check_options(adapter);
2369	/*
2370	* Mark all PCI regions associated with PCI device
2371	* pdev as being reserved by owner atl1e_driver_name
2372	* Enables bus-mastering on the device and calls
2373	* pcibios_set_master to do the needed arch specific settings
2374	*/
2375	atl1e_setup_pcicmd(pdev);
2376	/* setup the private structure */
2377	err = atl1e_sw_init(adapter);
2378	if (err) {
2379	netdev_err(dev: netdev, format: "net device private data init failed\n");
2380	goto err_sw_init;
2381	}
2382
2383	/* Init GPHY as early as possible due to power saving issue */
2384	atl1e_phy_init(hw: &adapter->hw);
2385	/* reset the controller to
2386	* put the device in a known good starting state */
2387	err = atl1e_reset_hw(hw: &adapter->hw);
2388	if (err) {
2389	err = -EIO;
2390	goto err_reset;
2391	}
2392
2393	if (atl1e_read_mac_addr(hw: &adapter->hw) != 0) {
2394	err = -EIO;
2395	netdev_err(dev: netdev, format: "get mac address failed\n");
2396	goto err_eeprom;
2397	}
2398
2399	eth_hw_addr_set(dev: netdev, addr: adapter->hw.mac_addr);
2400	netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2401
2402	INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2403	INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2404	netif_set_tso_max_size(dev: netdev, MAX_TSO_SEG_SIZE);
2405	err = register_netdev(dev: netdev);
2406	if (err) {
2407	netdev_err(dev: netdev, format: "register netdevice failed\n");
2408	goto err_register;
2409	}
2410
2411	/* assume we have no link for now */
2412	netif_stop_queue(dev: netdev);
2413	netif_carrier_off(dev: netdev);
2414
2415	cards_found++;
2416
2417	return 0;
2418
2419	err_reset:
2420	err_register:
2421	err_sw_init:
2422	err_eeprom:
2423	pci_iounmap(dev: pdev, adapter->hw.hw_addr);
2424	err_init_netdev:
2425	err_ioremap:
2426	free_netdev(dev: netdev);
2427	err_alloc_etherdev:
2428	pci_release_regions(pdev);
2429	err_pci_reg:
2430	err_dma:
2431	pci_disable_device(dev: pdev);
2432	return err;
2433	}
2434
2435	/**
2436	* atl1e_remove - Device Removal Routine
2437	* @pdev: PCI device information struct
2438	*
2439	* atl1e_remove is called by the PCI subsystem to alert the driver
2440	* that it should release a PCI device. The could be caused by a
2441	* Hot-Plug event, or because the driver is going to be removed from
2442	* memory.
2443	*/
2444	static void atl1e_remove(struct pci_dev *pdev)
2445	{
2446	struct net_device *netdev = pci_get_drvdata(pdev);
2447	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2448
2449	/*
2450	* flush_scheduled work may reschedule our watchdog task, so
2451	* explicitly disable watchdog tasks from being rescheduled
2452	*/
2453	set_bit(__AT_DOWN, addr: &adapter->flags);
2454
2455	atl1e_del_timer(adapter);
2456	atl1e_cancel_work(adapter);
2457
2458	unregister_netdev(dev: netdev);
2459	atl1e_free_ring_resources(adapter);
2460	atl1e_force_ps(hw: &adapter->hw);
2461	pci_iounmap(dev: pdev, adapter->hw.hw_addr);
2462	pci_release_regions(pdev);
2463	free_netdev(dev: netdev);
2464	pci_disable_device(dev: pdev);
2465	}
2466
2467	/**
2468	* atl1e_io_error_detected - called when PCI error is detected
2469	* @pdev: Pointer to PCI device
2470	* @state: The current pci connection state
2471	*
2472	* This function is called after a PCI bus error affecting
2473	* this device has been detected.
2474	*/
2475	static pci_ers_result_t
2476	atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2477	{
2478	struct net_device *netdev = pci_get_drvdata(pdev);
2479	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2480
2481	netif_device_detach(dev: netdev);
2482
2483	if (state == pci_channel_io_perm_failure)
2484	return PCI_ERS_RESULT_DISCONNECT;
2485
2486	if (netif_running(dev: netdev))
2487	atl1e_down(adapter);
2488
2489	pci_disable_device(dev: pdev);
2490
2491	/* Request a slot reset. */
2492	return PCI_ERS_RESULT_NEED_RESET;
2493	}
2494
2495	/**
2496	* atl1e_io_slot_reset - called after the pci bus has been reset.
2497	* @pdev: Pointer to PCI device
2498	*
2499	* Restart the card from scratch, as if from a cold-boot. Implementation
2500	* resembles the first-half of the e1000_resume routine.
2501	*/
2502	static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2503	{
2504	struct net_device *netdev = pci_get_drvdata(pdev);
2505	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2506
2507	if (pci_enable_device(dev: pdev)) {
2508	netdev_err(dev: adapter->netdev,
2509	format: "Cannot re-enable PCI device after reset\n");
2510	return PCI_ERS_RESULT_DISCONNECT;
2511	}
2512	pci_set_master(dev: pdev);
2513
2514	pci_enable_wake(dev: pdev, PCI_D3hot, enable: 0);
2515	pci_enable_wake(dev: pdev, PCI_D3cold, enable: 0);
2516
2517	atl1e_reset_hw(hw: &adapter->hw);
2518
2519	return PCI_ERS_RESULT_RECOVERED;
2520	}
2521
2522	/**
2523	* atl1e_io_resume - called when traffic can start flowing again.
2524	* @pdev: Pointer to PCI device
2525	*
2526	* This callback is called when the error recovery driver tells us that
2527	* its OK to resume normal operation. Implementation resembles the
2528	* second-half of the atl1e_resume routine.
2529	*/
2530	static void atl1e_io_resume(struct pci_dev *pdev)
2531	{
2532	struct net_device *netdev = pci_get_drvdata(pdev);
2533	struct atl1e_adapter *adapter = netdev_priv(dev: netdev);
2534
2535	if (netif_running(dev: netdev)) {
2536	if (atl1e_up(adapter)) {
2537	netdev_err(dev: adapter->netdev,
2538	format: "can't bring device back up after reset\n");
2539	return;
2540	}
2541	}
2542
2543	netif_device_attach(dev: netdev);
2544	}
2545
2546	static const struct pci_error_handlers atl1e_err_handler = {
2547	.error_detected = atl1e_io_error_detected,
2548	.slot_reset = atl1e_io_slot_reset,
2549	.resume = atl1e_io_resume,
2550	};
2551
2552	static struct pci_driver atl1e_driver = {
2553	.name = atl1e_driver_name,
2554	.id_table = atl1e_pci_tbl,
2555	.probe = atl1e_probe,
2556	.remove = atl1e_remove,
2557	/* Power Management Hooks */
2558	#ifdef CONFIG_PM
2559	.suspend = atl1e_suspend,
2560	.resume = atl1e_resume,
2561	#endif
2562	.shutdown = atl1e_shutdown,
2563	.err_handler = &atl1e_err_handler
2564	};
2565
2566	module_pci_driver(atl1e_driver);
2567