1 | /* SPDX-License-Identifier: ISC */ |
2 | /* |
3 | * Copyright (c) 2005-2011 Atheros Communications Inc. |
4 | * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. |
5 | * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. |
6 | * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. |
7 | */ |
8 | |
9 | #ifndef _CORE_H_ |
10 | #define _CORE_H_ |
11 | |
12 | #include <linux/completion.h> |
13 | #include <linux/if_ether.h> |
14 | #include <linux/types.h> |
15 | #include <linux/pci.h> |
16 | #include <linux/uuid.h> |
17 | #include <linux/time.h> |
18 | |
19 | #include "htt.h" |
20 | #include "htc.h" |
21 | #include "hw.h" |
22 | #include "targaddrs.h" |
23 | #include "wmi.h" |
24 | #include "../ath.h" |
25 | #include "../regd.h" |
26 | #include "../dfs_pattern_detector.h" |
27 | #include "spectral.h" |
28 | #include "thermal.h" |
29 | #include "wow.h" |
30 | #include "swap.h" |
31 | |
32 | #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) |
33 | #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) |
34 | #define WO(_f) ((_f##_OFFSET) >> 2) |
35 | |
36 | #define ATH10K_SCAN_ID 0 |
37 | #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ |
38 | #define WMI_READY_TIMEOUT (5 * HZ) |
39 | #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) |
40 | #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) |
41 | #define ATH10K_NUM_CHANS 41 |
42 | #define ATH10K_MAX_5G_CHAN 173 |
43 | |
44 | /* Antenna noise floor */ |
45 | #define ATH10K_DEFAULT_NOISE_FLOOR -95 |
46 | |
47 | #define 128 |
48 | |
49 | #define ATH10K_MAX_NUM_MGMT_PENDING 128 |
50 | |
51 | /* number of failed packets (20 packets with 16 sw reties each) */ |
52 | #define ATH10K_KICKOUT_THRESHOLD (20 * 16) |
53 | |
54 | /* |
55 | * Use insanely high numbers to make sure that the firmware implementation |
56 | * won't start, we have the same functionality already in hostapd. Unit |
57 | * is seconds. |
58 | */ |
59 | #define ATH10K_KEEPALIVE_MIN_IDLE 3747 |
60 | #define ATH10K_KEEPALIVE_MAX_IDLE 3895 |
61 | #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 |
62 | |
63 | /* SMBIOS type containing Board Data File Name Extension */ |
64 | #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 |
65 | |
66 | /* SMBIOS type structure length (excluding strings-set) */ |
67 | #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 |
68 | |
69 | /* Offset pointing to Board Data File Name Extension */ |
70 | #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 |
71 | |
72 | /* Board Data File Name Extension string length. |
73 | * String format: BDF_<Customer ID>_<Extension>\0 |
74 | */ |
75 | #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 |
76 | |
77 | /* The magic used by QCA spec */ |
78 | #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" |
79 | |
80 | /* Default Airtime weight multiplier (Tuned for multiclient performance) */ |
81 | #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4 |
82 | |
83 | #define ATH10K_MAX_RETRY_COUNT 30 |
84 | |
85 | #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \ |
86 | IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) |
87 | #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\ |
88 | IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) |
89 | |
90 | struct ath10k; |
91 | |
92 | static inline const char *ath10k_bus_str(enum ath10k_bus bus) |
93 | { |
94 | switch (bus) { |
95 | case ATH10K_BUS_PCI: |
96 | return "pci" ; |
97 | case ATH10K_BUS_AHB: |
98 | return "ahb" ; |
99 | case ATH10K_BUS_SDIO: |
100 | return "sdio" ; |
101 | case ATH10K_BUS_USB: |
102 | return "usb" ; |
103 | case ATH10K_BUS_SNOC: |
104 | return "snoc" ; |
105 | } |
106 | |
107 | return "unknown" ; |
108 | } |
109 | |
110 | enum ath10k_skb_flags { |
111 | ATH10K_SKB_F_NO_HWCRYPT = BIT(0), |
112 | ATH10K_SKB_F_DTIM_ZERO = BIT(1), |
113 | ATH10K_SKB_F_DELIVER_CAB = BIT(2), |
114 | ATH10K_SKB_F_MGMT = BIT(3), |
115 | ATH10K_SKB_F_QOS = BIT(4), |
116 | ATH10K_SKB_F_RAW_TX = BIT(5), |
117 | ATH10K_SKB_F_NOACK_TID = BIT(6), |
118 | }; |
119 | |
120 | struct ath10k_skb_cb { |
121 | dma_addr_t paddr; |
122 | u8 flags; |
123 | u8 eid; |
124 | u16 msdu_id; |
125 | u16 airtime_est; |
126 | struct ieee80211_vif *vif; |
127 | struct ieee80211_txq *txq; |
128 | u32 ucast_cipher; |
129 | } __packed; |
130 | |
131 | struct ath10k_skb_rxcb { |
132 | dma_addr_t paddr; |
133 | struct hlist_node hlist; |
134 | u8 eid; |
135 | }; |
136 | |
137 | static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) |
138 | { |
139 | BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > |
140 | IEEE80211_TX_INFO_DRIVER_DATA_SIZE); |
141 | return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; |
142 | } |
143 | |
144 | static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) |
145 | { |
146 | BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); |
147 | return (struct ath10k_skb_rxcb *)skb->cb; |
148 | } |
149 | |
150 | #define ATH10K_RXCB_SKB(rxcb) \ |
151 | container_of((void *)rxcb, struct sk_buff, cb) |
152 | |
153 | static inline u32 host_interest_item_address(u32 item_offset) |
154 | { |
155 | return QCA988X_HOST_INTEREST_ADDRESS + item_offset; |
156 | } |
157 | |
158 | enum ath10k_phy_mode { |
159 | ATH10K_PHY_MODE_LEGACY = 0, |
160 | ATH10K_PHY_MODE_HT = 1, |
161 | ATH10K_PHY_MODE_VHT = 2, |
162 | }; |
163 | |
164 | /* Data rate 100KBPS based on IE Index */ |
165 | struct ath10k_index_ht_data_rate_type { |
166 | u8 beacon_rate_index; |
167 | u16 supported_rate[4]; |
168 | }; |
169 | |
170 | /* Data rate 100KBPS based on IE Index */ |
171 | struct ath10k_index_vht_data_rate_type { |
172 | u8 beacon_rate_index; |
173 | u16 supported_VHT80_rate[2]; |
174 | u16 supported_VHT40_rate[2]; |
175 | u16 supported_VHT20_rate[2]; |
176 | }; |
177 | |
178 | struct ath10k_bmi { |
179 | bool done_sent; |
180 | }; |
181 | |
182 | struct ath10k_mem_chunk { |
183 | void *vaddr; |
184 | dma_addr_t paddr; |
185 | u32 len; |
186 | u32 req_id; |
187 | }; |
188 | |
189 | struct ath10k_wmi { |
190 | enum ath10k_htc_ep_id eid; |
191 | struct completion service_ready; |
192 | struct completion unified_ready; |
193 | struct completion barrier; |
194 | struct completion radar_confirm; |
195 | wait_queue_head_t tx_credits_wq; |
196 | DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); |
197 | struct wmi_cmd_map *cmd; |
198 | struct wmi_vdev_param_map *vdev_param; |
199 | struct wmi_pdev_param_map *pdev_param; |
200 | struct wmi_peer_param_map *peer_param; |
201 | const struct wmi_ops *ops; |
202 | const struct wmi_peer_flags_map *peer_flags; |
203 | |
204 | u32 mgmt_max_num_pending_tx; |
205 | |
206 | /* Protected by data_lock */ |
207 | struct idr mgmt_pending_tx; |
208 | |
209 | u32 num_mem_chunks; |
210 | u32 rx_decap_mode; |
211 | struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; |
212 | }; |
213 | |
214 | struct ath10k_fw_stats_peer { |
215 | struct list_head list; |
216 | |
217 | u8 peer_macaddr[ETH_ALEN]; |
218 | u32 ; |
219 | u32 peer_tx_rate; |
220 | u32 peer_rx_rate; /* 10x only */ |
221 | u64 rx_duration; |
222 | }; |
223 | |
224 | struct ath10k_fw_extd_stats_peer { |
225 | struct list_head list; |
226 | |
227 | u8 peer_macaddr[ETH_ALEN]; |
228 | u64 rx_duration; |
229 | }; |
230 | |
231 | struct ath10k_fw_stats_vdev { |
232 | struct list_head list; |
233 | |
234 | u32 vdev_id; |
235 | u32 beacon_snr; |
236 | u32 data_snr; |
237 | u32 num_tx_frames[4]; |
238 | u32 num_rx_frames; |
239 | u32 num_tx_frames_retries[4]; |
240 | u32 num_tx_frames_failures[4]; |
241 | u32 num_rts_fail; |
242 | u32 num_rts_success; |
243 | u32 num_rx_err; |
244 | u32 num_rx_discard; |
245 | u32 num_tx_not_acked; |
246 | u32 tx_rate_history[10]; |
247 | u32 [10]; |
248 | }; |
249 | |
250 | struct ath10k_fw_stats_vdev_extd { |
251 | struct list_head list; |
252 | |
253 | u32 vdev_id; |
254 | u32 ppdu_aggr_cnt; |
255 | u32 ppdu_noack; |
256 | u32 mpdu_queued; |
257 | u32 ppdu_nonaggr_cnt; |
258 | u32 mpdu_sw_requeued; |
259 | u32 mpdu_suc_retry; |
260 | u32 mpdu_suc_multitry; |
261 | u32 mpdu_fail_retry; |
262 | u32 tx_ftm_suc; |
263 | u32 tx_ftm_suc_retry; |
264 | u32 tx_ftm_fail; |
265 | u32 rx_ftmr_cnt; |
266 | u32 rx_ftmr_dup_cnt; |
267 | u32 rx_iftmr_cnt; |
268 | u32 rx_iftmr_dup_cnt; |
269 | }; |
270 | |
271 | struct ath10k_fw_stats_pdev { |
272 | struct list_head list; |
273 | |
274 | /* PDEV stats */ |
275 | s32 ch_noise_floor; |
276 | u32 tx_frame_count; /* Cycles spent transmitting frames */ |
277 | u32 rx_frame_count; /* Cycles spent receiving frames */ |
278 | u32 rx_clear_count; /* Total channel busy time, evidently */ |
279 | u32 cycle_count; /* Total on-channel time */ |
280 | u32 phy_err_count; |
281 | u32 chan_tx_power; |
282 | u32 ack_rx_bad; |
283 | u32 rts_bad; |
284 | u32 rts_good; |
285 | u32 fcs_bad; |
286 | u32 no_beacons; |
287 | u32 mib_int_count; |
288 | |
289 | /* PDEV TX stats */ |
290 | s32 comp_queued; |
291 | s32 comp_delivered; |
292 | s32 msdu_enqued; |
293 | s32 mpdu_enqued; |
294 | s32 wmm_drop; |
295 | s32 local_enqued; |
296 | s32 local_freed; |
297 | s32 hw_queued; |
298 | s32 hw_reaped; |
299 | s32 underrun; |
300 | u32 hw_paused; |
301 | s32 tx_abort; |
302 | s32 mpdus_requeued; |
303 | u32 tx_ko; |
304 | u32 data_rc; |
305 | u32 self_triggers; |
306 | u32 sw_retry_failure; |
307 | u32 illgl_rate_phy_err; |
308 | u32 pdev_cont_xretry; |
309 | u32 pdev_tx_timeout; |
310 | u32 pdev_resets; |
311 | u32 phy_underrun; |
312 | u32 txop_ovf; |
313 | u32 seq_posted; |
314 | u32 seq_failed_queueing; |
315 | u32 seq_completed; |
316 | u32 seq_restarted; |
317 | u32 mu_seq_posted; |
318 | u32 mpdus_sw_flush; |
319 | u32 mpdus_hw_filter; |
320 | u32 mpdus_truncated; |
321 | u32 mpdus_ack_failed; |
322 | u32 mpdus_expired; |
323 | |
324 | /* PDEV RX stats */ |
325 | s32 mid_ppdu_route_change; |
326 | s32 status_rcvd; |
327 | s32 r0_frags; |
328 | s32 r1_frags; |
329 | s32 r2_frags; |
330 | s32 r3_frags; |
331 | s32 htt_msdus; |
332 | s32 htt_mpdus; |
333 | s32 loc_msdus; |
334 | s32 loc_mpdus; |
335 | s32 oversize_amsdu; |
336 | s32 phy_errs; |
337 | s32 phy_err_drop; |
338 | s32 mpdu_errs; |
339 | s32 rx_ovfl_errs; |
340 | }; |
341 | |
342 | struct ath10k_fw_stats { |
343 | bool extended; |
344 | struct list_head pdevs; |
345 | struct list_head vdevs; |
346 | struct list_head peers; |
347 | struct list_head peers_extd; |
348 | }; |
349 | |
350 | #define ATH10K_TPC_TABLE_TYPE_FLAG 1 |
351 | #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF |
352 | |
353 | struct ath10k_tpc_table { |
354 | u32 pream_idx[WMI_TPC_RATE_MAX]; |
355 | u8 rate_code[WMI_TPC_RATE_MAX]; |
356 | char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; |
357 | }; |
358 | |
359 | struct ath10k_tpc_stats { |
360 | u32 reg_domain; |
361 | u32 chan_freq; |
362 | u32 phy_mode; |
363 | u32 twice_antenna_reduction; |
364 | u32 twice_max_rd_power; |
365 | s32 twice_antenna_gain; |
366 | u32 power_limit; |
367 | u32 num_tx_chain; |
368 | u32 ctl; |
369 | u32 rate_max; |
370 | u8 flag[WMI_TPC_FLAG]; |
371 | struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; |
372 | }; |
373 | |
374 | struct ath10k_tpc_table_final { |
375 | u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; |
376 | u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; |
377 | char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; |
378 | }; |
379 | |
380 | struct ath10k_tpc_stats_final { |
381 | u32 reg_domain; |
382 | u32 chan_freq; |
383 | u32 phy_mode; |
384 | u32 twice_antenna_reduction; |
385 | u32 twice_max_rd_power; |
386 | s32 twice_antenna_gain; |
387 | u32 power_limit; |
388 | u32 num_tx_chain; |
389 | u32 ctl; |
390 | u32 rate_max; |
391 | u8 flag[WMI_TPC_FLAG]; |
392 | struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; |
393 | }; |
394 | |
395 | struct ath10k_dfs_stats { |
396 | u32 phy_errors; |
397 | u32 pulses_total; |
398 | u32 pulses_detected; |
399 | u32 pulses_discarded; |
400 | u32 radar_detected; |
401 | }; |
402 | |
403 | enum ath10k_radar_confirmation_state { |
404 | ATH10K_RADAR_CONFIRMATION_IDLE = 0, |
405 | ATH10K_RADAR_CONFIRMATION_INPROGRESS, |
406 | ATH10K_RADAR_CONFIRMATION_STOPPED, |
407 | }; |
408 | |
409 | struct ath10k_radar_found_info { |
410 | u32 pri_min; |
411 | u32 pri_max; |
412 | u32 width_min; |
413 | u32 width_max; |
414 | u32 sidx_min; |
415 | u32 sidx_max; |
416 | }; |
417 | |
418 | #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ |
419 | |
420 | struct ath10k_peer { |
421 | struct list_head list; |
422 | struct ieee80211_vif *vif; |
423 | struct ieee80211_sta *sta; |
424 | |
425 | bool removed; |
426 | int vdev_id; |
427 | u8 addr[ETH_ALEN]; |
428 | DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); |
429 | |
430 | /* protected by ar->data_lock */ |
431 | struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; |
432 | union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; |
433 | bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS]; |
434 | union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; |
435 | u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS]; |
436 | struct { |
437 | enum htt_security_types sec_type; |
438 | int pn_len; |
439 | } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX]; |
440 | }; |
441 | |
442 | struct ath10k_txq { |
443 | struct list_head list; |
444 | unsigned long num_fw_queued; |
445 | unsigned long num_push_allowed; |
446 | }; |
447 | |
448 | enum ath10k_pkt_rx_err { |
449 | ATH10K_PKT_RX_ERR_FCS, |
450 | ATH10K_PKT_RX_ERR_TKIP, |
451 | ATH10K_PKT_RX_ERR_CRYPT, |
452 | ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, |
453 | ATH10K_PKT_RX_ERR_MAX, |
454 | }; |
455 | |
456 | enum ath10k_ampdu_subfrm_num { |
457 | ATH10K_AMPDU_SUBFRM_NUM_10, |
458 | ATH10K_AMPDU_SUBFRM_NUM_20, |
459 | ATH10K_AMPDU_SUBFRM_NUM_30, |
460 | ATH10K_AMPDU_SUBFRM_NUM_40, |
461 | ATH10K_AMPDU_SUBFRM_NUM_50, |
462 | ATH10K_AMPDU_SUBFRM_NUM_60, |
463 | ATH10K_AMPDU_SUBFRM_NUM_MORE, |
464 | ATH10K_AMPDU_SUBFRM_NUM_MAX, |
465 | }; |
466 | |
467 | enum ath10k_amsdu_subfrm_num { |
468 | ATH10K_AMSDU_SUBFRM_NUM_1, |
469 | ATH10K_AMSDU_SUBFRM_NUM_2, |
470 | ATH10K_AMSDU_SUBFRM_NUM_3, |
471 | ATH10K_AMSDU_SUBFRM_NUM_4, |
472 | ATH10K_AMSDU_SUBFRM_NUM_MORE, |
473 | ATH10K_AMSDU_SUBFRM_NUM_MAX, |
474 | }; |
475 | |
476 | struct ath10k_sta_tid_stats { |
477 | unsigned long rx_pkt_from_fw; |
478 | unsigned long rx_pkt_unchained; |
479 | unsigned long rx_pkt_drop_chained; |
480 | unsigned long rx_pkt_drop_filter; |
481 | unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; |
482 | unsigned long rx_pkt_queued_for_mac; |
483 | unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; |
484 | unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; |
485 | }; |
486 | |
487 | enum ath10k_counter_type { |
488 | ATH10K_COUNTER_TYPE_BYTES, |
489 | ATH10K_COUNTER_TYPE_PKTS, |
490 | ATH10K_COUNTER_TYPE_MAX, |
491 | }; |
492 | |
493 | enum ath10k_stats_type { |
494 | ATH10K_STATS_TYPE_SUCC, |
495 | ATH10K_STATS_TYPE_FAIL, |
496 | ATH10K_STATS_TYPE_RETRY, |
497 | ATH10K_STATS_TYPE_AMPDU, |
498 | ATH10K_STATS_TYPE_MAX, |
499 | }; |
500 | |
501 | struct ath10k_htt_data_stats { |
502 | u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; |
503 | u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; |
504 | u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; |
505 | u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; |
506 | u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; |
507 | u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; |
508 | u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; |
509 | }; |
510 | |
511 | struct ath10k_htt_tx_stats { |
512 | struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; |
513 | u64 tx_duration; |
514 | u64 ba_fails; |
515 | u64 ack_fails; |
516 | }; |
517 | |
518 | #define ATH10K_TID_MAX 8 |
519 | |
520 | struct ath10k_sta { |
521 | struct ath10k_vif *arvif; |
522 | |
523 | /* the following are protected by ar->data_lock */ |
524 | u32 changed; /* IEEE80211_RC_* */ |
525 | u32 bw; |
526 | u32 nss; |
527 | u32 smps; |
528 | u16 peer_id; |
529 | struct rate_info txrate; |
530 | struct ieee80211_tx_info tx_info; |
531 | u32 tx_retries; |
532 | u32 tx_failed; |
533 | u32 last_tx_bitrate; |
534 | |
535 | u32 rx_rate_code; |
536 | u32 rx_bitrate_kbps; |
537 | u32 tx_rate_code; |
538 | u32 tx_bitrate_kbps; |
539 | struct work_struct update_wk; |
540 | u64 rx_duration; |
541 | struct ath10k_htt_tx_stats *tx_stats; |
542 | u32 ucast_cipher; |
543 | |
544 | #ifdef CONFIG_MAC80211_DEBUGFS |
545 | /* protected by conf_mutex */ |
546 | bool aggr_mode; |
547 | |
548 | /* Protected with ar->data_lock */ |
549 | struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; |
550 | #endif |
551 | /* Protected with ar->data_lock */ |
552 | u32 peer_ps_state; |
553 | struct work_struct tid_config_wk; |
554 | int noack[ATH10K_TID_MAX]; |
555 | int retry_long[ATH10K_TID_MAX]; |
556 | int ampdu[ATH10K_TID_MAX]; |
557 | u8 rate_ctrl[ATH10K_TID_MAX]; |
558 | u32 rate_code[ATH10K_TID_MAX]; |
559 | int rtscts[ATH10K_TID_MAX]; |
560 | }; |
561 | |
562 | #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) |
563 | #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) |
564 | |
565 | enum ath10k_beacon_state { |
566 | ATH10K_BEACON_SCHEDULED = 0, |
567 | ATH10K_BEACON_SENDING, |
568 | ATH10K_BEACON_SENT, |
569 | }; |
570 | |
571 | struct ath10k_vif { |
572 | struct list_head list; |
573 | |
574 | u32 vdev_id; |
575 | u16 peer_id; |
576 | enum wmi_vdev_type vdev_type; |
577 | enum wmi_vdev_subtype vdev_subtype; |
578 | u32 beacon_interval; |
579 | u32 dtim_period; |
580 | struct sk_buff *beacon; |
581 | /* protected by data_lock */ |
582 | enum ath10k_beacon_state beacon_state; |
583 | void *beacon_buf; |
584 | dma_addr_t beacon_paddr; |
585 | unsigned long tx_paused; /* arbitrary values defined by target */ |
586 | |
587 | struct ath10k *ar; |
588 | struct ieee80211_vif *vif; |
589 | |
590 | bool is_started; |
591 | bool is_up; |
592 | bool spectral_enabled; |
593 | bool ps; |
594 | u32 aid; |
595 | u8 bssid[ETH_ALEN]; |
596 | |
597 | struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; |
598 | s8 def_wep_key_idx; |
599 | |
600 | u16 tx_seq_no; |
601 | |
602 | union { |
603 | struct { |
604 | u32 uapsd; |
605 | } sta; |
606 | struct { |
607 | /* 512 stations */ |
608 | u8 tim_bitmap[64]; |
609 | u8 tim_len; |
610 | u32 ssid_len; |
611 | u8 ssid[IEEE80211_MAX_SSID_LEN] __nonstring; |
612 | bool hidden_ssid; |
613 | /* P2P_IE with NoA attribute for P2P_GO case */ |
614 | u32 noa_len; |
615 | u8 *noa_data; |
616 | } ap; |
617 | } u; |
618 | |
619 | bool use_cts_prot; |
620 | bool nohwcrypt; |
621 | int num_legacy_stations; |
622 | int txpower; |
623 | bool ftm_responder; |
624 | struct wmi_wmm_params_all_arg wmm_params; |
625 | struct work_struct ap_csa_work; |
626 | struct delayed_work connection_loss_work; |
627 | struct cfg80211_bitrate_mask bitrate_mask; |
628 | |
629 | /* For setting VHT peer fixed rate, protected by conf_mutex */ |
630 | int vht_num_rates; |
631 | u8 vht_pfr; |
632 | u32 tid_conf_changed[ATH10K_TID_MAX]; |
633 | int noack[ATH10K_TID_MAX]; |
634 | int retry_long[ATH10K_TID_MAX]; |
635 | int ampdu[ATH10K_TID_MAX]; |
636 | u8 rate_ctrl[ATH10K_TID_MAX]; |
637 | u32 rate_code[ATH10K_TID_MAX]; |
638 | int rtscts[ATH10K_TID_MAX]; |
639 | u32 tids_rst; |
640 | }; |
641 | |
642 | struct ath10k_vif_iter { |
643 | u32 vdev_id; |
644 | struct ath10k_vif *arvif; |
645 | }; |
646 | |
647 | /* Copy Engine register dump, protected by ce-lock */ |
648 | struct ath10k_ce_crash_data { |
649 | __le32 base_addr; |
650 | __le32 src_wr_idx; |
651 | __le32 src_r_idx; |
652 | __le32 dst_wr_idx; |
653 | __le32 dst_r_idx; |
654 | }; |
655 | |
656 | struct ath10k_ce_crash_hdr { |
657 | __le32 ce_count; |
658 | __le32 reserved[3]; /* for future use */ |
659 | struct ath10k_ce_crash_data entries[]; |
660 | }; |
661 | |
662 | #define MAX_MEM_DUMP_TYPE 5 |
663 | |
664 | /* used for crash-dump storage, protected by data-lock */ |
665 | struct ath10k_fw_crash_data { |
666 | guid_t guid; |
667 | struct timespec64 timestamp; |
668 | __le32 registers[REG_DUMP_COUNT_QCA988X]; |
669 | struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; |
670 | |
671 | u8 *ramdump_buf; |
672 | size_t ramdump_buf_len; |
673 | }; |
674 | |
675 | struct ath10k_debug { |
676 | struct dentry *debugfs_phy; |
677 | |
678 | struct ath10k_fw_stats fw_stats; |
679 | struct completion fw_stats_complete; |
680 | bool fw_stats_done; |
681 | |
682 | unsigned long htt_stats_mask; |
683 | unsigned long reset_htt_stats; |
684 | struct delayed_work htt_stats_dwork; |
685 | struct ath10k_dfs_stats dfs_stats; |
686 | struct ath_dfs_pool_stats dfs_pool_stats; |
687 | |
688 | /* used for tpc-dump storage, protected by data-lock */ |
689 | struct ath10k_tpc_stats *tpc_stats; |
690 | struct ath10k_tpc_stats_final *tpc_stats_final; |
691 | |
692 | struct completion tpc_complete; |
693 | |
694 | /* protected by conf_mutex */ |
695 | u64 fw_dbglog_mask; |
696 | u32 fw_dbglog_level; |
697 | u32 reg_addr; |
698 | u32 nf_cal_period; |
699 | void *cal_data; |
700 | u32 enable_extd_tx_stats; |
701 | u8 fw_dbglog_mode; |
702 | }; |
703 | |
704 | enum ath10k_state { |
705 | ATH10K_STATE_OFF = 0, |
706 | ATH10K_STATE_ON, |
707 | |
708 | /* When doing firmware recovery the device is first powered down. |
709 | * mac80211 is supposed to call in to start() hook later on. It is |
710 | * however possible that driver unloading and firmware crash overlap. |
711 | * mac80211 can wait on conf_mutex in stop() while the device is |
712 | * stopped in ath10k_core_restart() work holding conf_mutex. The state |
713 | * RESTARTED means that the device is up and mac80211 has started hw |
714 | * reconfiguration. Once mac80211 is done with the reconfiguration we |
715 | * set the state to STATE_ON in reconfig_complete(). |
716 | */ |
717 | ATH10K_STATE_RESTARTING, |
718 | ATH10K_STATE_RESTARTED, |
719 | |
720 | /* The device has crashed while restarting hw. This state is like ON |
721 | * but commands are blocked in HTC and -ECOMM response is given. This |
722 | * prevents completion timeouts and makes the driver more responsive to |
723 | * userspace commands. This is also prevents recursive recovery. |
724 | */ |
725 | ATH10K_STATE_WEDGED, |
726 | |
727 | /* factory tests */ |
728 | ATH10K_STATE_UTF, |
729 | }; |
730 | |
731 | enum ath10k_firmware_mode { |
732 | /* the default mode, standard 802.11 functionality */ |
733 | ATH10K_FIRMWARE_MODE_NORMAL, |
734 | |
735 | /* factory tests etc */ |
736 | ATH10K_FIRMWARE_MODE_UTF, |
737 | }; |
738 | |
739 | enum ath10k_fw_features { |
740 | /* wmi_mgmt_rx_hdr contains extra RSSI information */ |
741 | ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, |
742 | |
743 | /* Firmware from 10X branch. Deprecated, don't use in new code. */ |
744 | ATH10K_FW_FEATURE_WMI_10X = 1, |
745 | |
746 | /* firmware support tx frame management over WMI, otherwise it's HTT */ |
747 | ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, |
748 | |
749 | /* Firmware does not support P2P */ |
750 | ATH10K_FW_FEATURE_NO_P2P = 3, |
751 | |
752 | /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature |
753 | * bit is required to be set as well. Deprecated, don't use in new |
754 | * code. |
755 | */ |
756 | ATH10K_FW_FEATURE_WMI_10_2 = 4, |
757 | |
758 | /* Some firmware revisions lack proper multi-interface client powersave |
759 | * implementation. Enabling PS could result in connection drops, |
760 | * traffic stalls, etc. |
761 | */ |
762 | ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, |
763 | |
764 | /* Some firmware revisions have an incomplete WoWLAN implementation |
765 | * despite WMI service bit being advertised. This feature flag is used |
766 | * to distinguish whether WoWLAN is really supported or not. |
767 | */ |
768 | ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, |
769 | |
770 | /* Don't trust error code from otp.bin */ |
771 | ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, |
772 | |
773 | /* Some firmware revisions pad 4th hw address to 4 byte boundary making |
774 | * it 8 bytes long in Native Wifi Rx decap. |
775 | */ |
776 | ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, |
777 | |
778 | /* Firmware supports bypassing PLL setting on init. */ |
779 | ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, |
780 | |
781 | /* Raw mode support. If supported, FW supports receiving and trasmitting |
782 | * frames in raw mode. |
783 | */ |
784 | ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, |
785 | |
786 | /* Firmware Supports Adaptive CCA*/ |
787 | ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, |
788 | |
789 | /* Firmware supports management frame protection */ |
790 | ATH10K_FW_FEATURE_MFP_SUPPORT = 12, |
791 | |
792 | /* Firmware supports pull-push model where host shares it's software |
793 | * queue state with firmware and firmware generates fetch requests |
794 | * telling host which queues to dequeue tx from. |
795 | * |
796 | * Primary function of this is improved MU-MIMO performance with |
797 | * multiple clients. |
798 | */ |
799 | ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, |
800 | |
801 | /* Firmware supports BT-Coex without reloading firmware via pdev param. |
802 | * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of |
803 | * extended resource config should be enabled always. This firmware IE |
804 | * is used to configure WMI_COEX_GPIO_SUPPORT. |
805 | */ |
806 | ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, |
807 | |
808 | /* Unused flag and proven to be not working, enable this if you want |
809 | * to experiment sending NULL func data frames in HTT TX |
810 | */ |
811 | ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, |
812 | |
813 | /* Firmware allow other BSS mesh broadcast/multicast frames without |
814 | * creating monitor interface. Appropriate rxfilters are programmed for |
815 | * mesh vdev by firmware itself. This feature flags will be used for |
816 | * not creating monitor vdev while configuring mesh node. |
817 | */ |
818 | ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, |
819 | |
820 | /* Firmware does not support power save in station mode. */ |
821 | ATH10K_FW_FEATURE_NO_PS = 17, |
822 | |
823 | /* Firmware allows management tx by reference instead of by value. */ |
824 | ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, |
825 | |
826 | /* Firmware load is done externally, not by bmi */ |
827 | ATH10K_FW_FEATURE_NON_BMI = 19, |
828 | |
829 | /* Firmware sends only one chan_info event per channel */ |
830 | ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, |
831 | |
832 | /* Firmware allows setting peer fixed rate */ |
833 | ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21, |
834 | |
835 | /* Firmware support IRAM recovery */ |
836 | ATH10K_FW_FEATURE_IRAM_RECOVERY = 22, |
837 | |
838 | /* keep last */ |
839 | ATH10K_FW_FEATURE_COUNT, |
840 | }; |
841 | |
842 | enum ath10k_dev_flags { |
843 | /* Indicates that ath10k device is during CAC phase of DFS */ |
844 | ATH10K_CAC_RUNNING, |
845 | ATH10K_FLAG_CORE_REGISTERED, |
846 | |
847 | /* Device has crashed and needs to restart. This indicates any pending |
848 | * waiters should immediately cancel instead of waiting for a time out. |
849 | */ |
850 | ATH10K_FLAG_CRASH_FLUSH, |
851 | |
852 | /* Use Raw mode instead of native WiFi Tx/Rx encap mode. |
853 | * Raw mode supports both hardware and software crypto. Native WiFi only |
854 | * supports hardware crypto. |
855 | */ |
856 | ATH10K_FLAG_RAW_MODE, |
857 | |
858 | /* Disable HW crypto engine */ |
859 | ATH10K_FLAG_HW_CRYPTO_DISABLED, |
860 | |
861 | /* Bluetooth coexistence enabled */ |
862 | ATH10K_FLAG_BTCOEX, |
863 | |
864 | /* Per Station statistics service */ |
865 | ATH10K_FLAG_PEER_STATS, |
866 | |
867 | /* Indicates that ath10k device is during recovery process and not complete */ |
868 | ATH10K_FLAG_RESTARTING, |
869 | |
870 | /* protected by conf_mutex */ |
871 | ATH10K_FLAG_NAPI_ENABLED, |
872 | }; |
873 | |
874 | enum ath10k_cal_mode { |
875 | ATH10K_CAL_MODE_FILE, |
876 | ATH10K_CAL_MODE_OTP, |
877 | ATH10K_CAL_MODE_DT, |
878 | ATH10K_CAL_MODE_NVMEM, |
879 | ATH10K_PRE_CAL_MODE_FILE, |
880 | ATH10K_PRE_CAL_MODE_DT, |
881 | ATH10K_PRE_CAL_MODE_NVMEM, |
882 | ATH10K_CAL_MODE_EEPROM, |
883 | }; |
884 | |
885 | enum ath10k_crypt_mode { |
886 | /* Only use hardware crypto engine */ |
887 | ATH10K_CRYPT_MODE_HW, |
888 | /* Only use software crypto engine */ |
889 | ATH10K_CRYPT_MODE_SW, |
890 | }; |
891 | |
892 | static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) |
893 | { |
894 | switch (mode) { |
895 | case ATH10K_CAL_MODE_FILE: |
896 | return "file" ; |
897 | case ATH10K_CAL_MODE_OTP: |
898 | return "otp" ; |
899 | case ATH10K_CAL_MODE_DT: |
900 | return "dt" ; |
901 | case ATH10K_CAL_MODE_NVMEM: |
902 | return "nvmem" ; |
903 | case ATH10K_PRE_CAL_MODE_FILE: |
904 | return "pre-cal-file" ; |
905 | case ATH10K_PRE_CAL_MODE_DT: |
906 | return "pre-cal-dt" ; |
907 | case ATH10K_PRE_CAL_MODE_NVMEM: |
908 | return "pre-cal-nvmem" ; |
909 | case ATH10K_CAL_MODE_EEPROM: |
910 | return "eeprom" ; |
911 | } |
912 | |
913 | return "unknown" ; |
914 | } |
915 | |
916 | enum ath10k_scan_state { |
917 | ATH10K_SCAN_IDLE, |
918 | ATH10K_SCAN_STARTING, |
919 | ATH10K_SCAN_RUNNING, |
920 | ATH10K_SCAN_ABORTING, |
921 | }; |
922 | |
923 | static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) |
924 | { |
925 | switch (state) { |
926 | case ATH10K_SCAN_IDLE: |
927 | return "idle" ; |
928 | case ATH10K_SCAN_STARTING: |
929 | return "starting" ; |
930 | case ATH10K_SCAN_RUNNING: |
931 | return "running" ; |
932 | case ATH10K_SCAN_ABORTING: |
933 | return "aborting" ; |
934 | } |
935 | |
936 | return "unknown" ; |
937 | } |
938 | |
939 | enum ath10k_tx_pause_reason { |
940 | ATH10K_TX_PAUSE_Q_FULL, |
941 | ATH10K_TX_PAUSE_MAX, |
942 | }; |
943 | |
944 | struct ath10k_fw_file { |
945 | const struct firmware *firmware; |
946 | |
947 | char fw_version[ETHTOOL_FWVERS_LEN]; |
948 | |
949 | DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); |
950 | |
951 | enum ath10k_fw_wmi_op_version wmi_op_version; |
952 | enum ath10k_fw_htt_op_version htt_op_version; |
953 | |
954 | const void *firmware_data; |
955 | size_t firmware_len; |
956 | |
957 | const void *otp_data; |
958 | size_t otp_len; |
959 | |
960 | const void *codeswap_data; |
961 | size_t codeswap_len; |
962 | |
963 | /* The original idea of struct ath10k_fw_file was that it only |
964 | * contains struct firmware and pointers to various parts (actual |
965 | * firmware binary, otp, metadata etc) of the file. This seg_info |
966 | * is actually created separate but as this is used similarly as |
967 | * the other firmware components it's more convenient to have it |
968 | * here. |
969 | */ |
970 | struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; |
971 | }; |
972 | |
973 | struct ath10k_fw_components { |
974 | const struct firmware *board; |
975 | const void *board_data; |
976 | size_t board_len; |
977 | const struct firmware *ext_board; |
978 | const void *ext_board_data; |
979 | size_t ext_board_len; |
980 | |
981 | struct ath10k_fw_file fw_file; |
982 | }; |
983 | |
984 | struct ath10k_per_peer_tx_stats { |
985 | u32 succ_bytes; |
986 | u32 retry_bytes; |
987 | u32 failed_bytes; |
988 | u8 ratecode; |
989 | u8 flags; |
990 | u16 peer_id; |
991 | u16 succ_pkts; |
992 | u16 retry_pkts; |
993 | u16 failed_pkts; |
994 | u16 duration; |
995 | u32 reserved1; |
996 | u32 reserved2; |
997 | }; |
998 | |
999 | enum ath10k_dev_type { |
1000 | ATH10K_DEV_TYPE_LL, |
1001 | ATH10K_DEV_TYPE_HL, |
1002 | }; |
1003 | |
1004 | struct ath10k_bus_params { |
1005 | u32 chip_id; |
1006 | enum ath10k_dev_type dev_type; |
1007 | bool link_can_suspend; |
1008 | bool hl_msdu_ids; |
1009 | }; |
1010 | |
1011 | struct ath10k { |
1012 | struct ath_common ath_common; |
1013 | struct ieee80211_hw *hw; |
1014 | struct ieee80211_ops *ops; |
1015 | struct device *dev; |
1016 | struct msa_region { |
1017 | dma_addr_t paddr; |
1018 | u32 mem_size; |
1019 | void *vaddr; |
1020 | } msa; |
1021 | u8 mac_addr[ETH_ALEN]; |
1022 | |
1023 | enum ath10k_hw_rev hw_rev; |
1024 | u16 dev_id; |
1025 | u32 chip_id; |
1026 | u32 target_version; |
1027 | u8 fw_version_major; |
1028 | u32 fw_version_minor; |
1029 | u16 fw_version_release; |
1030 | u16 fw_version_build; |
1031 | u32 fw_stats_req_mask; |
1032 | u32 phy_capability; |
1033 | u32 hw_min_tx_power; |
1034 | u32 hw_max_tx_power; |
1035 | u32 hw_eeprom_rd; |
1036 | u32 ht_cap_info; |
1037 | u32 vht_cap_info; |
1038 | u32 vht_supp_mcs; |
1039 | u32 num_rf_chains; |
1040 | u32 max_spatial_stream; |
1041 | /* protected by conf_mutex */ |
1042 | u32 low_2ghz_chan; |
1043 | u32 high_2ghz_chan; |
1044 | u32 low_5ghz_chan; |
1045 | u32 high_5ghz_chan; |
1046 | bool ani_enabled; |
1047 | u32 sys_cap_info; |
1048 | |
1049 | /* protected by data_lock */ |
1050 | bool hw_rfkill_on; |
1051 | |
1052 | /* protected by conf_mutex */ |
1053 | u8 ps_state_enable; |
1054 | |
1055 | bool nlo_enabled; |
1056 | bool p2p; |
1057 | |
1058 | struct { |
1059 | enum ath10k_bus bus; |
1060 | const struct ath10k_hif_ops *ops; |
1061 | } hif; |
1062 | |
1063 | struct completion target_suspend; |
1064 | struct completion driver_recovery; |
1065 | |
1066 | const struct ath10k_hw_regs *regs; |
1067 | const struct ath10k_hw_ce_regs *hw_ce_regs; |
1068 | const struct ath10k_hw_values *hw_values; |
1069 | struct ath10k_bmi bmi; |
1070 | struct ath10k_wmi wmi; |
1071 | struct ath10k_htc htc; |
1072 | struct ath10k_htt htt; |
1073 | |
1074 | struct ath10k_hw_params hw_params; |
1075 | |
1076 | /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ |
1077 | struct ath10k_fw_components normal_mode_fw; |
1078 | |
1079 | /* READ-ONLY images of the running firmware, which can be either |
1080 | * normal or UTF. Do not modify, release etc! |
1081 | */ |
1082 | const struct ath10k_fw_components *running_fw; |
1083 | |
1084 | const struct firmware *pre_cal_file; |
1085 | const struct firmware *cal_file; |
1086 | |
1087 | struct { |
1088 | u32 vendor; |
1089 | u32 device; |
1090 | u32 subsystem_vendor; |
1091 | u32 subsystem_device; |
1092 | |
1093 | bool bmi_ids_valid; |
1094 | bool qmi_ids_valid; |
1095 | u32 qmi_board_id; |
1096 | u32 qmi_chip_id; |
1097 | u8 bmi_board_id; |
1098 | u8 bmi_eboard_id; |
1099 | u8 bmi_chip_id; |
1100 | bool ext_bid_supported; |
1101 | |
1102 | char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; |
1103 | } id; |
1104 | |
1105 | int fw_api; |
1106 | int bd_api; |
1107 | enum ath10k_cal_mode cal_mode; |
1108 | |
1109 | struct { |
1110 | struct completion started; |
1111 | struct completion completed; |
1112 | struct completion on_channel; |
1113 | struct delayed_work timeout; |
1114 | enum ath10k_scan_state state; |
1115 | bool is_roc; |
1116 | int vdev_id; |
1117 | int roc_freq; |
1118 | bool roc_notify; |
1119 | } scan; |
1120 | |
1121 | struct { |
1122 | struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; |
1123 | } mac; |
1124 | |
1125 | /* should never be NULL; needed for regular htt rx */ |
1126 | struct ieee80211_channel *rx_channel; |
1127 | |
1128 | /* valid during scan; needed for mgmt rx during scan */ |
1129 | struct ieee80211_channel *scan_channel; |
1130 | |
1131 | /* current operating channel definition */ |
1132 | struct cfg80211_chan_def chandef; |
1133 | |
1134 | /* currently configured operating channel in firmware */ |
1135 | struct ieee80211_channel *tgt_oper_chan; |
1136 | |
1137 | unsigned long long free_vdev_map; |
1138 | struct ath10k_vif *monitor_arvif; |
1139 | bool monitor; |
1140 | int monitor_vdev_id; |
1141 | bool monitor_started; |
1142 | unsigned int filter_flags; |
1143 | unsigned long dev_flags; |
1144 | bool dfs_block_radar_events; |
1145 | |
1146 | /* protected by conf_mutex */ |
1147 | bool radar_enabled; |
1148 | int num_started_vdevs; |
1149 | |
1150 | /* Protected by conf-mutex */ |
1151 | u8 cfg_tx_chainmask; |
1152 | u8 cfg_rx_chainmask; |
1153 | |
1154 | struct completion install_key_done; |
1155 | |
1156 | int last_wmi_vdev_start_status; |
1157 | struct completion vdev_setup_done; |
1158 | struct completion vdev_delete_done; |
1159 | struct completion peer_stats_info_complete; |
1160 | |
1161 | struct workqueue_struct *workqueue; |
1162 | /* Auxiliary workqueue */ |
1163 | struct workqueue_struct *workqueue_aux; |
1164 | struct workqueue_struct *workqueue_tx_complete; |
1165 | /* prevents concurrent FW reconfiguration */ |
1166 | struct mutex conf_mutex; |
1167 | |
1168 | /* protects coredump data */ |
1169 | struct mutex dump_mutex; |
1170 | |
1171 | /* protects shared structure data */ |
1172 | spinlock_t data_lock; |
1173 | |
1174 | /* serialize wake_tx_queue calls per ac */ |
1175 | spinlock_t queue_lock[IEEE80211_NUM_ACS]; |
1176 | |
1177 | struct list_head arvifs; |
1178 | struct list_head peers; |
1179 | struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; |
1180 | wait_queue_head_t peer_mapping_wq; |
1181 | |
1182 | /* protected by conf_mutex */ |
1183 | int num_peers; |
1184 | int num_stations; |
1185 | |
1186 | int max_num_peers; |
1187 | int max_num_stations; |
1188 | int max_num_vdevs; |
1189 | int max_num_tdls_vdevs; |
1190 | int num_active_peers; |
1191 | int num_tids; |
1192 | |
1193 | struct work_struct svc_rdy_work; |
1194 | struct sk_buff *svc_rdy_skb; |
1195 | |
1196 | struct work_struct offchan_tx_work; |
1197 | struct sk_buff_head offchan_tx_queue; |
1198 | struct completion offchan_tx_completed; |
1199 | struct sk_buff *offchan_tx_skb; |
1200 | |
1201 | struct work_struct wmi_mgmt_tx_work; |
1202 | struct sk_buff_head wmi_mgmt_tx_queue; |
1203 | |
1204 | enum ath10k_state state; |
1205 | |
1206 | struct work_struct register_work; |
1207 | struct work_struct restart_work; |
1208 | struct work_struct bundle_tx_work; |
1209 | struct work_struct tx_complete_work; |
1210 | |
1211 | /* cycle count is reported twice for each visited channel during scan. |
1212 | * access protected by data_lock |
1213 | */ |
1214 | u32 survey_last_rx_clear_count; |
1215 | u32 survey_last_cycle_count; |
1216 | struct survey_info survey[ATH10K_NUM_CHANS]; |
1217 | |
1218 | /* Channel info events are expected to come in pairs without and with |
1219 | * COMPLETE flag set respectively for each channel visit during scan. |
1220 | * |
1221 | * However there are deviations from this rule. This flag is used to |
1222 | * avoid reporting garbage data. |
1223 | */ |
1224 | bool ch_info_can_report_survey; |
1225 | struct completion bss_survey_done; |
1226 | |
1227 | struct dfs_pattern_detector *dfs_detector; |
1228 | |
1229 | unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ |
1230 | |
1231 | #ifdef CONFIG_ATH10K_DEBUGFS |
1232 | struct ath10k_debug debug; |
1233 | struct { |
1234 | /* relay(fs) channel for spectral scan */ |
1235 | struct rchan *rfs_chan_spec_scan; |
1236 | |
1237 | /* spectral_mode and spec_config are protected by conf_mutex */ |
1238 | enum ath10k_spectral_mode mode; |
1239 | struct ath10k_spec_scan config; |
1240 | } spectral; |
1241 | #endif |
1242 | |
1243 | u32 pktlog_filter; |
1244 | |
1245 | #ifdef CONFIG_DEV_COREDUMP |
1246 | struct { |
1247 | struct ath10k_fw_crash_data *fw_crash_data; |
1248 | } coredump; |
1249 | #endif |
1250 | |
1251 | struct { |
1252 | /* protected by conf_mutex */ |
1253 | struct ath10k_fw_components utf_mode_fw; |
1254 | |
1255 | /* protected by data_lock */ |
1256 | bool utf_monitor; |
1257 | } testmode; |
1258 | |
1259 | struct { |
1260 | /* protected by data_lock */ |
1261 | u32 rx_crc_err_drop; |
1262 | u32 fw_crash_counter; |
1263 | u32 fw_warm_reset_counter; |
1264 | u32 fw_cold_reset_counter; |
1265 | } stats; |
1266 | |
1267 | struct ath10k_thermal thermal; |
1268 | struct ath10k_wow wow; |
1269 | struct ath10k_per_peer_tx_stats peer_tx_stats; |
1270 | |
1271 | /* NAPI */ |
1272 | struct net_device napi_dev; |
1273 | struct napi_struct napi; |
1274 | |
1275 | struct work_struct set_coverage_class_work; |
1276 | /* protected by conf_mutex */ |
1277 | struct { |
1278 | /* writing also protected by data_lock */ |
1279 | s16 coverage_class; |
1280 | |
1281 | u32 reg_phyclk; |
1282 | u32 reg_slottime_conf; |
1283 | u32 reg_slottime_orig; |
1284 | u32 reg_ack_cts_timeout_conf; |
1285 | u32 reg_ack_cts_timeout_orig; |
1286 | } fw_coverage; |
1287 | |
1288 | u32 ampdu_reference; |
1289 | |
1290 | const u8 *wmi_key_cipher; |
1291 | void *ce_priv; |
1292 | |
1293 | u32 sta_tid_stats_mask; |
1294 | |
1295 | /* protected by data_lock */ |
1296 | enum ath10k_radar_confirmation_state radar_conf_state; |
1297 | struct ath10k_radar_found_info last_radar_info; |
1298 | struct work_struct radar_confirmation_work; |
1299 | struct ath10k_bus_params bus_param; |
1300 | struct completion peer_delete_done; |
1301 | |
1302 | bool coex_support; |
1303 | int coex_gpio_pin; |
1304 | |
1305 | s32 tx_power_2g_limit; |
1306 | s32 tx_power_5g_limit; |
1307 | |
1308 | /* must be last */ |
1309 | u8 drv_priv[] __aligned(sizeof(void *)); |
1310 | }; |
1311 | |
1312 | static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) |
1313 | { |
1314 | if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && |
1315 | test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) |
1316 | return true; |
1317 | |
1318 | return false; |
1319 | } |
1320 | |
1321 | extern unsigned int ath10k_frame_mode; |
1322 | extern unsigned long ath10k_coredump_mask; |
1323 | |
1324 | void ath10k_core_napi_sync_disable(struct ath10k *ar); |
1325 | void ath10k_core_napi_enable(struct ath10k *ar); |
1326 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
1327 | enum ath10k_bus bus, |
1328 | enum ath10k_hw_rev hw_rev, |
1329 | const struct ath10k_hif_ops *hif_ops); |
1330 | void ath10k_core_destroy(struct ath10k *ar); |
1331 | void ath10k_core_get_fw_features_str(struct ath10k *ar, |
1332 | char *buf, |
1333 | size_t max_len); |
1334 | int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, |
1335 | struct ath10k_fw_file *fw_file); |
1336 | |
1337 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, |
1338 | const struct ath10k_fw_components *fw_components); |
1339 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); |
1340 | void ath10k_core_stop(struct ath10k *ar); |
1341 | void ath10k_core_start_recovery(struct ath10k *ar); |
1342 | int ath10k_core_register(struct ath10k *ar, |
1343 | const struct ath10k_bus_params *bus_params); |
1344 | void ath10k_core_unregister(struct ath10k *ar); |
1345 | int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); |
1346 | int ath10k_core_check_dt(struct ath10k *ar); |
1347 | void ath10k_core_free_board_files(struct ath10k *ar); |
1348 | |
1349 | #endif /* _CORE_H_ */ |
1350 | |