1 | /* |
2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any |
5 | * purpose with or without fee is hereby granted, provided that the above |
6 | * copyright notice and this permission notice appear in all copies. |
7 | * |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
15 | */ |
16 | |
17 | #include "hw.h" |
18 | #include "hw-ops.h" |
19 | #include <linux/export.h> |
20 | |
21 | /* Common calibration code */ |
22 | |
23 | |
24 | static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer) |
25 | { |
26 | int16_t nfval; |
27 | int16_t sort[ATH9K_NF_CAL_HIST_MAX]; |
28 | int i, j; |
29 | |
30 | for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++) |
31 | sort[i] = nfCalBuffer[i]; |
32 | |
33 | for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) { |
34 | for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) { |
35 | if (sort[j] > sort[j - 1]) { |
36 | nfval = sort[j]; |
37 | sort[j] = sort[j - 1]; |
38 | sort[j - 1] = nfval; |
39 | } |
40 | } |
41 | } |
42 | nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1]; |
43 | |
44 | return nfval; |
45 | } |
46 | |
47 | static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah, |
48 | struct ath9k_channel *chan) |
49 | { |
50 | struct ath_nf_limits *limit; |
51 | |
52 | if (!chan || IS_CHAN_2GHZ(chan)) |
53 | limit = &ah->nf_2g; |
54 | else |
55 | limit = &ah->nf_5g; |
56 | |
57 | return limit; |
58 | } |
59 | |
60 | static s16 ath9k_hw_get_default_nf(struct ath_hw *ah, |
61 | struct ath9k_channel *chan, |
62 | int chain) |
63 | { |
64 | s16 calib_nf = ath9k_hw_get_nf_limits(ah, chan)->cal[chain]; |
65 | |
66 | if (calib_nf) |
67 | return calib_nf; |
68 | else |
69 | return ath9k_hw_get_nf_limits(ah, chan)->nominal; |
70 | } |
71 | |
72 | s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan, |
73 | s16 nf) |
74 | { |
75 | s8 noise = ATH_DEFAULT_NOISE_FLOOR; |
76 | |
77 | if (nf) { |
78 | s8 delta = nf - ATH9K_NF_CAL_NOISE_THRESH - |
79 | ath9k_hw_get_default_nf(ah, chan, chain: 0); |
80 | if (delta > 0) |
81 | noise += delta; |
82 | } |
83 | return noise; |
84 | } |
85 | EXPORT_SYMBOL(ath9k_hw_getchan_noise); |
86 | |
87 | static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, |
88 | struct ath9k_hw_cal_data *cal, |
89 | int16_t *nfarray) |
90 | { |
91 | struct ath_common *common = ath9k_hw_common(ah); |
92 | struct ath_nf_limits *limit; |
93 | struct ath9k_nfcal_hist *h; |
94 | bool high_nf_mid = false; |
95 | u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; |
96 | int i; |
97 | |
98 | h = cal->nfCalHist; |
99 | limit = ath9k_hw_get_nf_limits(ah, chan: ah->curchan); |
100 | |
101 | for (i = 0; i < NUM_NF_READINGS; i++) { |
102 | if (!(chainmask & (1 << i)) || |
103 | ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan))) |
104 | continue; |
105 | |
106 | h[i].nfCalBuffer[h[i].currIndex] = nfarray[i]; |
107 | |
108 | if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX) |
109 | h[i].currIndex = 0; |
110 | |
111 | if (h[i].invalidNFcount > 0) { |
112 | h[i].invalidNFcount--; |
113 | h[i].privNF = nfarray[i]; |
114 | } else { |
115 | h[i].privNF = |
116 | ath9k_hw_get_nf_hist_mid(nfCalBuffer: h[i].nfCalBuffer); |
117 | } |
118 | |
119 | if (!h[i].privNF) |
120 | continue; |
121 | |
122 | if (h[i].privNF > limit->max) { |
123 | high_nf_mid = true; |
124 | |
125 | ath_dbg(common, CALIBRATE, |
126 | "NFmid[%d] (%d) > MAX (%d), %s\n" , |
127 | i, h[i].privNF, limit->max, |
128 | (test_bit(NFCAL_INTF, &cal->cal_flags) ? |
129 | "not corrected (due to interference)" : |
130 | "correcting to MAX" )); |
131 | |
132 | /* |
133 | * Normally we limit the average noise floor by the |
134 | * hardware specific maximum here. However if we have |
135 | * encountered stuck beacons because of interference, |
136 | * we bypass this limit here in order to better deal |
137 | * with our environment. |
138 | */ |
139 | if (!test_bit(NFCAL_INTF, &cal->cal_flags)) |
140 | h[i].privNF = limit->max; |
141 | } |
142 | } |
143 | |
144 | /* |
145 | * If the noise floor seems normal for all chains, assume that |
146 | * there is no significant interference in the environment anymore. |
147 | * Re-enable the enforcement of the NF maximum again. |
148 | */ |
149 | if (!high_nf_mid) |
150 | clear_bit(nr: NFCAL_INTF, addr: &cal->cal_flags); |
151 | } |
152 | |
153 | static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah, |
154 | enum nl80211_band band, |
155 | int16_t *nft) |
156 | { |
157 | switch (band) { |
158 | case NL80211_BAND_5GHZ: |
159 | *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5); |
160 | break; |
161 | case NL80211_BAND_2GHZ: |
162 | *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2); |
163 | break; |
164 | default: |
165 | BUG_ON(1); |
166 | return false; |
167 | } |
168 | |
169 | return true; |
170 | } |
171 | |
172 | void ath9k_hw_reset_calibration(struct ath_hw *ah, |
173 | struct ath9k_cal_list *currCal) |
174 | { |
175 | int i; |
176 | |
177 | ath9k_hw_setup_calibration(ah, currCal); |
178 | |
179 | ah->cal_start_time = jiffies; |
180 | currCal->calState = CAL_RUNNING; |
181 | |
182 | for (i = 0; i < AR5416_MAX_CHAINS; i++) { |
183 | ah->meas0.sign[i] = 0; |
184 | ah->meas1.sign[i] = 0; |
185 | ah->meas2.sign[i] = 0; |
186 | ah->meas3.sign[i] = 0; |
187 | } |
188 | |
189 | ah->cal_samples = 0; |
190 | } |
191 | |
192 | /* This is done for the currently configured channel */ |
193 | bool ath9k_hw_reset_calvalid(struct ath_hw *ah) |
194 | { |
195 | struct ath_common *common = ath9k_hw_common(ah); |
196 | struct ath9k_cal_list *currCal = ah->cal_list_curr; |
197 | |
198 | if (!ah->caldata) |
199 | return true; |
200 | |
201 | if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah)) |
202 | return true; |
203 | |
204 | if (currCal == NULL) |
205 | return true; |
206 | |
207 | if (currCal->calState != CAL_DONE) { |
208 | ath_dbg(common, CALIBRATE, "Calibration state incorrect, %d\n" , |
209 | currCal->calState); |
210 | return true; |
211 | } |
212 | |
213 | currCal = ah->cal_list; |
214 | do { |
215 | ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n" , |
216 | currCal->calData->calType, |
217 | ah->curchan->chan->center_freq); |
218 | |
219 | ah->caldata->CalValid &= ~currCal->calData->calType; |
220 | currCal->calState = CAL_WAITING; |
221 | |
222 | currCal = currCal->calNext; |
223 | } while (currCal != ah->cal_list); |
224 | |
225 | return false; |
226 | } |
227 | EXPORT_SYMBOL(ath9k_hw_reset_calvalid); |
228 | |
229 | void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update) |
230 | { |
231 | if (ah->caldata) |
232 | set_bit(nr: NFCAL_PENDING, addr: &ah->caldata->cal_flags); |
233 | |
234 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
235 | AR_PHY_AGC_CONTROL_ENABLE_NF); |
236 | |
237 | if (update) |
238 | REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
239 | AR_PHY_AGC_CONTROL_NO_UPDATE_NF); |
240 | else |
241 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
242 | AR_PHY_AGC_CONTROL_NO_UPDATE_NF); |
243 | |
244 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF); |
245 | } |
246 | |
247 | int ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan) |
248 | { |
249 | struct ath9k_nfcal_hist *h = NULL; |
250 | unsigned i, j; |
251 | u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; |
252 | struct ath_common *common = ath9k_hw_common(ah); |
253 | s16 default_nf = ath9k_hw_get_nf_limits(ah, chan)->nominal; |
254 | u32 bb_agc_ctl = REG_READ(ah, AR_PHY_AGC_CONTROL(ah)); |
255 | |
256 | if (ah->caldata) |
257 | h = ah->caldata->nfCalHist; |
258 | |
259 | ENABLE_REG_RMW_BUFFER(ah); |
260 | for (i = 0; i < NUM_NF_READINGS; i++) { |
261 | if (chainmask & (1 << i)) { |
262 | s16 nfval; |
263 | |
264 | if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan)) |
265 | continue; |
266 | |
267 | if (ah->nf_override) |
268 | nfval = ah->nf_override; |
269 | else if (h) |
270 | nfval = h[i].privNF; |
271 | else { |
272 | /* Try to get calibrated noise floor value */ |
273 | nfval = |
274 | ath9k_hw_get_nf_limits(ah, chan)->cal[i]; |
275 | if (nfval > -60 || nfval < -127) |
276 | nfval = default_nf; |
277 | } |
278 | |
279 | REG_RMW(ah, ah->nf_regs[i], |
280 | (((u32) nfval << 1) & 0x1ff), 0x1ff); |
281 | } |
282 | } |
283 | |
284 | /* |
285 | * stop NF cal if ongoing to ensure NF load completes immediately |
286 | * (or after end rx/tx frame if ongoing) |
287 | */ |
288 | if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NF) { |
289 | REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF); |
290 | REG_RMW_BUFFER_FLUSH(ah); |
291 | ENABLE_REG_RMW_BUFFER(ah); |
292 | } |
293 | |
294 | /* |
295 | * Load software filtered NF value into baseband internal minCCApwr |
296 | * variable. |
297 | */ |
298 | REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
299 | AR_PHY_AGC_CONTROL_ENABLE_NF); |
300 | REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
301 | AR_PHY_AGC_CONTROL_NO_UPDATE_NF); |
302 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF); |
303 | REG_RMW_BUFFER_FLUSH(ah); |
304 | |
305 | /* |
306 | * Wait for load to complete, should be fast, a few 10s of us. |
307 | * The max delay was changed from an original 250us to 22.2 msec. |
308 | * This would increase timeout to the longest possible frame |
309 | * (11n max length 22.1 msec) |
310 | */ |
311 | for (j = 0; j < 22200; j++) { |
312 | if ((REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & |
313 | AR_PHY_AGC_CONTROL_NF) == 0) |
314 | break; |
315 | udelay(10); |
316 | } |
317 | |
318 | /* |
319 | * Restart NF so it can continue. |
320 | */ |
321 | if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NF) { |
322 | ENABLE_REG_RMW_BUFFER(ah); |
323 | if (bb_agc_ctl & AR_PHY_AGC_CONTROL_ENABLE_NF) |
324 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
325 | AR_PHY_AGC_CONTROL_ENABLE_NF); |
326 | if (bb_agc_ctl & AR_PHY_AGC_CONTROL_NO_UPDATE_NF) |
327 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), |
328 | AR_PHY_AGC_CONTROL_NO_UPDATE_NF); |
329 | REG_SET_BIT(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_NF); |
330 | REG_RMW_BUFFER_FLUSH(ah); |
331 | } |
332 | |
333 | /* |
334 | * We timed out waiting for the noisefloor to load, probably due to an |
335 | * in-progress rx. Simply return here and allow the load plenty of time |
336 | * to complete before the next calibration interval. We need to avoid |
337 | * trying to load -50 (which happens below) while the previous load is |
338 | * still in progress as this can cause rx deafness. Instead by returning |
339 | * here, the baseband nf cal will just be capped by our present |
340 | * noisefloor until the next calibration timer. |
341 | */ |
342 | if (j == 22200) { |
343 | ath_dbg(common, ANY, |
344 | "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n" , |
345 | REG_READ(ah, AR_PHY_AGC_CONTROL(ah))); |
346 | return -ETIMEDOUT; |
347 | } |
348 | |
349 | /* |
350 | * Restore maxCCAPower register parameter again so that we're not capped |
351 | * by the median we just loaded. This will be initial (and max) value |
352 | * of next noise floor calibration the baseband does. |
353 | */ |
354 | ENABLE_REG_RMW_BUFFER(ah); |
355 | for (i = 0; i < NUM_NF_READINGS; i++) { |
356 | if (chainmask & (1 << i)) { |
357 | if ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(chan)) |
358 | continue; |
359 | |
360 | REG_RMW(ah, ah->nf_regs[i], |
361 | (((u32) (-50) << 1) & 0x1ff), 0x1ff); |
362 | } |
363 | } |
364 | REG_RMW_BUFFER_FLUSH(ah); |
365 | |
366 | return 0; |
367 | } |
368 | EXPORT_SYMBOL(ath9k_hw_loadnf); |
369 | |
370 | |
371 | static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf) |
372 | { |
373 | struct ath_common *common = ath9k_hw_common(ah); |
374 | struct ath_nf_limits *limit; |
375 | int i; |
376 | |
377 | if (IS_CHAN_2GHZ(ah->curchan)) |
378 | limit = &ah->nf_2g; |
379 | else |
380 | limit = &ah->nf_5g; |
381 | |
382 | for (i = 0; i < NUM_NF_READINGS; i++) { |
383 | if (!nf[i]) |
384 | continue; |
385 | |
386 | ath_dbg(common, CALIBRATE, |
387 | "NF calibrated [%s] [chain %d] is %d\n" , |
388 | (i >= 3 ? "ext" : "ctl" ), i % 3, nf[i]); |
389 | |
390 | if (nf[i] > limit->max) { |
391 | ath_dbg(common, CALIBRATE, |
392 | "NF[%d] (%d) > MAX (%d), correcting to MAX\n" , |
393 | i, nf[i], limit->max); |
394 | nf[i] = limit->max; |
395 | } else if (nf[i] < limit->min) { |
396 | ath_dbg(common, CALIBRATE, |
397 | "NF[%d] (%d) < MIN (%d), correcting to NOM\n" , |
398 | i, nf[i], limit->min); |
399 | nf[i] = limit->nominal; |
400 | } |
401 | } |
402 | } |
403 | |
404 | bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan) |
405 | { |
406 | struct ath_common *common = ath9k_hw_common(ah); |
407 | int16_t nf, nfThresh; |
408 | int16_t nfarray[NUM_NF_READINGS] = { 0 }; |
409 | struct ath9k_nfcal_hist *h; |
410 | struct ieee80211_channel *c = chan->chan; |
411 | struct ath9k_hw_cal_data *caldata = ah->caldata; |
412 | |
413 | if (REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF) { |
414 | ath_dbg(common, CALIBRATE, |
415 | "NF did not complete in calibration window\n" ); |
416 | return false; |
417 | } |
418 | |
419 | ath9k_hw_do_getnf(ah, nfarray); |
420 | ath9k_hw_nf_sanitize(ah, nf: nfarray); |
421 | nf = nfarray[0]; |
422 | if (ath9k_hw_get_nf_thresh(ah, band: c->band, nft: &nfThresh) |
423 | && nf > nfThresh) { |
424 | ath_dbg(common, CALIBRATE, |
425 | "noise floor failed detected; detected %d, threshold %d\n" , |
426 | nf, nfThresh); |
427 | } |
428 | |
429 | if (!caldata) { |
430 | chan->noisefloor = nf; |
431 | return false; |
432 | } |
433 | |
434 | h = caldata->nfCalHist; |
435 | clear_bit(nr: NFCAL_PENDING, addr: &caldata->cal_flags); |
436 | ath9k_hw_update_nfcal_hist_buffer(ah, cal: caldata, nfarray); |
437 | chan->noisefloor = h[0].privNF; |
438 | ah->noise = ath9k_hw_getchan_noise(ah, chan, chan->noisefloor); |
439 | return true; |
440 | } |
441 | EXPORT_SYMBOL(ath9k_hw_getnf); |
442 | |
443 | void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah, |
444 | struct ath9k_channel *chan) |
445 | { |
446 | struct ath9k_nfcal_hist *h; |
447 | int i, j, k = 0; |
448 | |
449 | ah->caldata->channel = chan->channel; |
450 | ah->caldata->channelFlags = chan->channelFlags; |
451 | h = ah->caldata->nfCalHist; |
452 | for (i = 0; i < NUM_NF_READINGS; i++) { |
453 | h[i].currIndex = 0; |
454 | h[i].privNF = ath9k_hw_get_default_nf(ah, chan, chain: k); |
455 | h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH; |
456 | for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) |
457 | h[i].nfCalBuffer[j] = h[i].privNF; |
458 | if (++k >= AR5416_MAX_CHAINS) |
459 | k = 0; |
460 | } |
461 | } |
462 | |
463 | |
464 | void ath9k_hw_bstuck_nfcal(struct ath_hw *ah) |
465 | { |
466 | struct ath9k_hw_cal_data *caldata = ah->caldata; |
467 | |
468 | if (unlikely(!caldata)) |
469 | return; |
470 | |
471 | /* |
472 | * If beacons are stuck, the most likely cause is interference. |
473 | * Triggering a noise floor calibration at this point helps the |
474 | * hardware adapt to a noisy environment much faster. |
475 | * To ensure that we recover from stuck beacons quickly, let |
476 | * the baseband update the internal NF value itself, similar to |
477 | * what is being done after a full reset. |
478 | */ |
479 | if (!test_bit(NFCAL_PENDING, &caldata->cal_flags)) |
480 | ath9k_hw_start_nfcal(ah, update: true); |
481 | else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL(ah)) & AR_PHY_AGC_CONTROL_NF)) |
482 | ath9k_hw_getnf(ah, ah->curchan); |
483 | |
484 | set_bit(nr: NFCAL_INTF, addr: &caldata->cal_flags); |
485 | } |
486 | EXPORT_SYMBOL(ath9k_hw_bstuck_nfcal); |
487 | |
488 | |