1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (C) 2019 MediaTek Inc. |
4 | * |
5 | * Author: |
6 | * Min Guo <min.guo@mediatek.com> |
7 | * Yonglong Wu <yonglong.wu@mediatek.com> |
8 | */ |
9 | |
10 | #include <linux/clk.h> |
11 | #include <linux/dma-mapping.h> |
12 | #include <linux/module.h> |
13 | #include <linux/of.h> |
14 | #include <linux/of_platform.h> |
15 | #include <linux/platform_device.h> |
16 | #include <linux/usb/role.h> |
17 | #include <linux/usb/usb_phy_generic.h> |
18 | #include "musb_core.h" |
19 | #include "musb_dma.h" |
20 | |
21 | #define USB_L1INTS 0x00a0 |
22 | #define USB_L1INTM 0x00a4 |
23 | #define MTK_MUSB_TXFUNCADDR 0x0480 |
24 | |
25 | /* MediaTek controller toggle enable and status reg */ |
26 | #define MUSB_RXTOG 0x80 |
27 | #define MUSB_RXTOGEN 0x82 |
28 | #define MUSB_TXTOG 0x84 |
29 | #define MUSB_TXTOGEN 0x86 |
30 | #define MTK_TOGGLE_EN GENMASK(15, 0) |
31 | |
32 | #define TX_INT_STATUS BIT(0) |
33 | #define RX_INT_STATUS BIT(1) |
34 | #define USBCOM_INT_STATUS BIT(2) |
35 | #define DMA_INT_STATUS BIT(3) |
36 | |
37 | #define DMA_INTR_STATUS_MSK GENMASK(7, 0) |
38 | #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24) |
39 | |
40 | #define MTK_MUSB_CLKS_NUM 3 |
41 | |
42 | struct mtk_glue { |
43 | struct device *dev; |
44 | struct musb *musb; |
45 | struct platform_device *musb_pdev; |
46 | struct platform_device *usb_phy; |
47 | struct phy *phy; |
48 | struct usb_phy *xceiv; |
49 | enum phy_mode phy_mode; |
50 | struct clk_bulk_data clks[MTK_MUSB_CLKS_NUM]; |
51 | enum usb_role role; |
52 | struct usb_role_switch *role_sw; |
53 | }; |
54 | |
55 | static int mtk_musb_clks_get(struct mtk_glue *glue) |
56 | { |
57 | struct device *dev = glue->dev; |
58 | |
59 | glue->clks[0].id = "main" ; |
60 | glue->clks[1].id = "mcu" ; |
61 | glue->clks[2].id = "univpll" ; |
62 | |
63 | return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, clks: glue->clks); |
64 | } |
65 | |
66 | static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) |
67 | { |
68 | struct musb *musb = glue->musb; |
69 | u8 devctl = readb(addr: musb->mregs + MUSB_DEVCTL); |
70 | enum usb_role new_role; |
71 | |
72 | if (role == glue->role) |
73 | return 0; |
74 | |
75 | switch (role) { |
76 | case USB_ROLE_HOST: |
77 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
78 | glue->phy_mode = PHY_MODE_USB_HOST; |
79 | new_role = USB_ROLE_HOST; |
80 | if (glue->role == USB_ROLE_NONE) |
81 | phy_power_on(phy: glue->phy); |
82 | |
83 | devctl |= MUSB_DEVCTL_SESSION; |
84 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
85 | MUSB_HST_MODE(musb); |
86 | break; |
87 | case USB_ROLE_DEVICE: |
88 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
89 | glue->phy_mode = PHY_MODE_USB_DEVICE; |
90 | new_role = USB_ROLE_DEVICE; |
91 | devctl &= ~MUSB_DEVCTL_SESSION; |
92 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
93 | if (glue->role == USB_ROLE_NONE) |
94 | phy_power_on(phy: glue->phy); |
95 | |
96 | MUSB_DEV_MODE(musb); |
97 | break; |
98 | case USB_ROLE_NONE: |
99 | glue->phy_mode = PHY_MODE_USB_OTG; |
100 | new_role = USB_ROLE_NONE; |
101 | devctl &= ~MUSB_DEVCTL_SESSION; |
102 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
103 | if (glue->role != USB_ROLE_NONE) |
104 | phy_power_off(phy: glue->phy); |
105 | |
106 | break; |
107 | default: |
108 | dev_err(glue->dev, "Invalid State\n" ); |
109 | return -EINVAL; |
110 | } |
111 | |
112 | glue->role = new_role; |
113 | phy_set_mode(glue->phy, glue->phy_mode); |
114 | |
115 | return 0; |
116 | } |
117 | |
118 | static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role) |
119 | { |
120 | return mtk_otg_switch_set(glue: usb_role_switch_get_drvdata(sw), role); |
121 | } |
122 | |
123 | static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw) |
124 | { |
125 | struct mtk_glue *glue = usb_role_switch_get_drvdata(sw); |
126 | |
127 | return glue->role; |
128 | } |
129 | |
130 | static int mtk_otg_switch_init(struct mtk_glue *glue) |
131 | { |
132 | struct usb_role_switch_desc role_sx_desc = { 0 }; |
133 | |
134 | role_sx_desc.set = musb_usb_role_sx_set; |
135 | role_sx_desc.get = musb_usb_role_sx_get; |
136 | role_sx_desc.allow_userspace_control = true; |
137 | role_sx_desc.fwnode = dev_fwnode(glue->dev); |
138 | role_sx_desc.driver_data = glue; |
139 | glue->role_sw = usb_role_switch_register(parent: glue->dev, desc: &role_sx_desc); |
140 | |
141 | return PTR_ERR_OR_ZERO(ptr: glue->role_sw); |
142 | } |
143 | |
144 | static void mtk_otg_switch_exit(struct mtk_glue *glue) |
145 | { |
146 | return usb_role_switch_unregister(sw: glue->role_sw); |
147 | } |
148 | |
149 | static irqreturn_t generic_interrupt(int irq, void *__hci) |
150 | { |
151 | unsigned long flags; |
152 | irqreturn_t retval = IRQ_NONE; |
153 | struct musb *musb = __hci; |
154 | |
155 | spin_lock_irqsave(&musb->lock, flags); |
156 | musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB); |
157 | musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX); |
158 | musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX); |
159 | |
160 | if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) { |
161 | /* ep0 FADDR must be 0 when (re)entering peripheral mode */ |
162 | musb_ep_select(musb->mregs, 0); |
163 | musb_writeb(musb->mregs, MUSB_FADDR, 0); |
164 | } |
165 | |
166 | if (musb->int_usb || musb->int_tx || musb->int_rx) |
167 | retval = musb_interrupt(musb); |
168 | |
169 | spin_unlock_irqrestore(lock: &musb->lock, flags); |
170 | |
171 | return retval; |
172 | } |
173 | |
174 | static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id) |
175 | { |
176 | irqreturn_t retval = IRQ_NONE; |
177 | struct musb *musb = (struct musb *)dev_id; |
178 | u32 l1_ints; |
179 | |
180 | l1_ints = musb_readl(addr: musb->mregs, USB_L1INTS) & |
181 | musb_readl(addr: musb->mregs, USB_L1INTM); |
182 | |
183 | if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS)) |
184 | retval = generic_interrupt(irq, hci: musb); |
185 | |
186 | #if defined(CONFIG_USB_INVENTRA_DMA) |
187 | if (l1_ints & DMA_INT_STATUS) |
188 | retval = dma_controller_irq(irq, musb->dma_controller); |
189 | #endif |
190 | return retval; |
191 | } |
192 | |
193 | static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset) |
194 | { |
195 | return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum; |
196 | } |
197 | |
198 | static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset) |
199 | { |
200 | u8 data; |
201 | |
202 | /* W1C */ |
203 | data = musb_readb(addr, offset); |
204 | musb_writeb(addr, offset, data); |
205 | return data; |
206 | } |
207 | |
208 | static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset) |
209 | { |
210 | u16 data; |
211 | |
212 | /* W1C */ |
213 | data = musb_readw(addr, offset); |
214 | musb_writew(addr, offset, data); |
215 | return data; |
216 | } |
217 | |
218 | static int mtk_musb_set_mode(struct musb *musb, u8 mode) |
219 | { |
220 | struct device *dev = musb->controller; |
221 | struct mtk_glue *glue = dev_get_drvdata(dev: dev->parent); |
222 | enum phy_mode new_mode; |
223 | enum usb_role new_role; |
224 | |
225 | switch (mode) { |
226 | case MUSB_HOST: |
227 | new_mode = PHY_MODE_USB_HOST; |
228 | new_role = USB_ROLE_HOST; |
229 | break; |
230 | case MUSB_PERIPHERAL: |
231 | new_mode = PHY_MODE_USB_DEVICE; |
232 | new_role = USB_ROLE_DEVICE; |
233 | break; |
234 | case MUSB_OTG: |
235 | new_mode = PHY_MODE_USB_OTG; |
236 | new_role = USB_ROLE_NONE; |
237 | break; |
238 | default: |
239 | dev_err(glue->dev, "Invalid mode request\n" ); |
240 | return -EINVAL; |
241 | } |
242 | |
243 | if (glue->phy_mode == new_mode) |
244 | return 0; |
245 | |
246 | if (musb->port_mode != MUSB_OTG) { |
247 | dev_err(glue->dev, "Does not support changing modes\n" ); |
248 | return -EINVAL; |
249 | } |
250 | |
251 | mtk_otg_switch_set(glue, role: new_role); |
252 | return 0; |
253 | } |
254 | |
255 | static int mtk_musb_init(struct musb *musb) |
256 | { |
257 | struct device *dev = musb->controller; |
258 | struct mtk_glue *glue = dev_get_drvdata(dev: dev->parent); |
259 | int ret; |
260 | |
261 | glue->musb = musb; |
262 | musb->phy = glue->phy; |
263 | musb->xceiv = glue->xceiv; |
264 | musb->is_host = false; |
265 | musb->isr = mtk_musb_interrupt; |
266 | |
267 | /* Set TX/RX toggle enable */ |
268 | musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN); |
269 | musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN); |
270 | |
271 | if (musb->port_mode == MUSB_OTG) { |
272 | ret = mtk_otg_switch_init(glue); |
273 | if (ret) |
274 | return ret; |
275 | } |
276 | |
277 | ret = phy_init(phy: glue->phy); |
278 | if (ret) |
279 | goto err_phy_init; |
280 | |
281 | ret = phy_power_on(phy: glue->phy); |
282 | if (ret) |
283 | goto err_phy_power_on; |
284 | |
285 | phy_set_mode(glue->phy, glue->phy_mode); |
286 | |
287 | #if defined(CONFIG_USB_INVENTRA_DMA) |
288 | musb_writel(musb->mregs, MUSB_HSDMA_INTR, |
289 | DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK); |
290 | #endif |
291 | musb_writel(addr: musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS | |
292 | USBCOM_INT_STATUS | DMA_INT_STATUS); |
293 | return 0; |
294 | |
295 | err_phy_power_on: |
296 | phy_exit(phy: glue->phy); |
297 | err_phy_init: |
298 | if (musb->port_mode == MUSB_OTG) |
299 | mtk_otg_switch_exit(glue); |
300 | return ret; |
301 | } |
302 | |
303 | static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out) |
304 | { |
305 | struct musb *musb = qh->hw_ep->musb; |
306 | u8 epnum = qh->hw_ep->epnum; |
307 | u16 toggle; |
308 | |
309 | toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG); |
310 | return toggle & (1 << epnum); |
311 | } |
312 | |
313 | static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb) |
314 | { |
315 | struct musb *musb = qh->hw_ep->musb; |
316 | u8 epnum = qh->hw_ep->epnum; |
317 | u16 value, toggle; |
318 | |
319 | toggle = usb_gettoggle(urb->dev, qh->epnum, is_out); |
320 | |
321 | if (is_out) { |
322 | value = musb_readw(musb->mregs, MUSB_TXTOG); |
323 | value |= toggle << epnum; |
324 | musb_writew(musb->mregs, MUSB_TXTOG, value); |
325 | } else { |
326 | value = musb_readw(musb->mregs, MUSB_RXTOG); |
327 | value |= toggle << epnum; |
328 | musb_writew(musb->mregs, MUSB_RXTOG, value); |
329 | } |
330 | |
331 | return 0; |
332 | } |
333 | |
334 | static int mtk_musb_exit(struct musb *musb) |
335 | { |
336 | struct device *dev = musb->controller; |
337 | struct mtk_glue *glue = dev_get_drvdata(dev: dev->parent); |
338 | |
339 | mtk_otg_switch_exit(glue); |
340 | phy_power_off(phy: glue->phy); |
341 | phy_exit(phy: glue->phy); |
342 | clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, clks: glue->clks); |
343 | |
344 | pm_runtime_put_sync(dev); |
345 | pm_runtime_disable(dev); |
346 | return 0; |
347 | } |
348 | |
349 | static const struct musb_platform_ops mtk_musb_ops = { |
350 | .quirks = MUSB_DMA_INVENTRA, |
351 | .init = mtk_musb_init, |
352 | .get_toggle = mtk_musb_get_toggle, |
353 | .set_toggle = mtk_musb_set_toggle, |
354 | .exit = mtk_musb_exit, |
355 | #ifdef CONFIG_USB_INVENTRA_DMA |
356 | .dma_init = musbhs_dma_controller_create_noirq, |
357 | .dma_exit = musbhs_dma_controller_destroy, |
358 | #endif |
359 | .clearb = mtk_musb_clearb, |
360 | .clearw = mtk_musb_clearw, |
361 | .busctl_offset = mtk_musb_busctl_offset, |
362 | .set_mode = mtk_musb_set_mode, |
363 | }; |
364 | |
365 | #define MTK_MUSB_MAX_EP_NUM 8 |
366 | #define MTK_MUSB_RAM_BITS 11 |
367 | |
368 | static struct musb_fifo_cfg mtk_musb_mode_cfg[] = { |
369 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
370 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
371 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
372 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
373 | { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, |
374 | { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, |
375 | { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, |
376 | { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, |
377 | { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, |
378 | { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, |
379 | { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, }, |
380 | { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, }, |
381 | { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, |
382 | { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, }, |
383 | }; |
384 | |
385 | static const struct musb_hdrc_config mtk_musb_hdrc_config = { |
386 | .fifo_cfg = mtk_musb_mode_cfg, |
387 | .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg), |
388 | .multipoint = true, |
389 | .dyn_fifo = true, |
390 | .num_eps = MTK_MUSB_MAX_EP_NUM, |
391 | .ram_bits = MTK_MUSB_RAM_BITS, |
392 | }; |
393 | |
394 | static const struct platform_device_info mtk_dev_info = { |
395 | .name = "musb-hdrc" , |
396 | .id = PLATFORM_DEVID_AUTO, |
397 | .dma_mask = DMA_BIT_MASK(32), |
398 | }; |
399 | |
400 | static int mtk_musb_probe(struct platform_device *pdev) |
401 | { |
402 | struct musb_hdrc_platform_data *pdata; |
403 | struct mtk_glue *glue; |
404 | struct platform_device_info pinfo; |
405 | struct device *dev = &pdev->dev; |
406 | struct device_node *np = dev->of_node; |
407 | int ret; |
408 | |
409 | glue = devm_kzalloc(dev, size: sizeof(*glue), GFP_KERNEL); |
410 | if (!glue) |
411 | return -ENOMEM; |
412 | |
413 | glue->dev = dev; |
414 | pdata = devm_kzalloc(dev, size: sizeof(*pdata), GFP_KERNEL); |
415 | if (!pdata) |
416 | return -ENOMEM; |
417 | |
418 | ret = of_platform_populate(root: np, NULL, NULL, parent: dev); |
419 | if (ret) { |
420 | dev_err(dev, "failed to create child devices at %p\n" , np); |
421 | return ret; |
422 | } |
423 | |
424 | ret = mtk_musb_clks_get(glue); |
425 | if (ret) |
426 | return ret; |
427 | |
428 | pdata->config = &mtk_musb_hdrc_config; |
429 | pdata->platform_ops = &mtk_musb_ops; |
430 | pdata->mode = usb_get_dr_mode(dev); |
431 | |
432 | if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) |
433 | pdata->mode = USB_DR_MODE_HOST; |
434 | else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET)) |
435 | pdata->mode = USB_DR_MODE_PERIPHERAL; |
436 | |
437 | switch (pdata->mode) { |
438 | case USB_DR_MODE_HOST: |
439 | glue->phy_mode = PHY_MODE_USB_HOST; |
440 | glue->role = USB_ROLE_HOST; |
441 | break; |
442 | case USB_DR_MODE_PERIPHERAL: |
443 | glue->phy_mode = PHY_MODE_USB_DEVICE; |
444 | glue->role = USB_ROLE_DEVICE; |
445 | break; |
446 | case USB_DR_MODE_OTG: |
447 | glue->phy_mode = PHY_MODE_USB_OTG; |
448 | glue->role = USB_ROLE_NONE; |
449 | break; |
450 | default: |
451 | dev_err(&pdev->dev, "Error 'dr_mode' property\n" ); |
452 | return -EINVAL; |
453 | } |
454 | |
455 | glue->phy = devm_of_phy_get_by_index(dev, np, index: 0); |
456 | if (IS_ERR(ptr: glue->phy)) { |
457 | dev_err(dev, "fail to getting phy %ld\n" , |
458 | PTR_ERR(glue->phy)); |
459 | return PTR_ERR(ptr: glue->phy); |
460 | } |
461 | |
462 | glue->usb_phy = usb_phy_generic_register(); |
463 | if (IS_ERR(ptr: glue->usb_phy)) { |
464 | dev_err(dev, "fail to registering usb-phy %ld\n" , |
465 | PTR_ERR(glue->usb_phy)); |
466 | return PTR_ERR(ptr: glue->usb_phy); |
467 | } |
468 | |
469 | glue->xceiv = devm_usb_get_phy(dev, type: USB_PHY_TYPE_USB2); |
470 | if (IS_ERR(ptr: glue->xceiv)) { |
471 | ret = PTR_ERR(ptr: glue->xceiv); |
472 | dev_err(dev, "fail to getting usb-phy %d\n" , ret); |
473 | goto err_unregister_usb_phy; |
474 | } |
475 | |
476 | platform_set_drvdata(pdev, data: glue); |
477 | pm_runtime_enable(dev); |
478 | pm_runtime_get_sync(dev); |
479 | |
480 | ret = clk_bulk_prepare_enable(MTK_MUSB_CLKS_NUM, clks: glue->clks); |
481 | if (ret) |
482 | goto err_enable_clk; |
483 | |
484 | pinfo = mtk_dev_info; |
485 | pinfo.parent = dev; |
486 | pinfo.res = pdev->resource; |
487 | pinfo.num_res = pdev->num_resources; |
488 | pinfo.data = pdata; |
489 | pinfo.size_data = sizeof(*pdata); |
490 | pinfo.fwnode = of_fwnode_handle(np); |
491 | pinfo.of_node_reused = true; |
492 | |
493 | glue->musb_pdev = platform_device_register_full(pdevinfo: &pinfo); |
494 | if (IS_ERR(ptr: glue->musb_pdev)) { |
495 | ret = PTR_ERR(ptr: glue->musb_pdev); |
496 | dev_err(dev, "failed to register musb device: %d\n" , ret); |
497 | goto err_device_register; |
498 | } |
499 | |
500 | return 0; |
501 | |
502 | err_device_register: |
503 | clk_bulk_disable_unprepare(MTK_MUSB_CLKS_NUM, clks: glue->clks); |
504 | err_enable_clk: |
505 | pm_runtime_put_sync(dev); |
506 | pm_runtime_disable(dev); |
507 | err_unregister_usb_phy: |
508 | usb_phy_generic_unregister(glue->usb_phy); |
509 | return ret; |
510 | } |
511 | |
512 | static void mtk_musb_remove(struct platform_device *pdev) |
513 | { |
514 | struct mtk_glue *glue = platform_get_drvdata(pdev); |
515 | struct platform_device *usb_phy = glue->usb_phy; |
516 | |
517 | platform_device_unregister(glue->musb_pdev); |
518 | usb_phy_generic_unregister(usb_phy); |
519 | } |
520 | |
521 | #ifdef CONFIG_OF |
522 | static const struct of_device_id mtk_musb_match[] = { |
523 | {.compatible = "mediatek,mtk-musb" ,}, |
524 | {}, |
525 | }; |
526 | MODULE_DEVICE_TABLE(of, mtk_musb_match); |
527 | #endif |
528 | |
529 | static struct platform_driver mtk_musb_driver = { |
530 | .probe = mtk_musb_probe, |
531 | .remove_new = mtk_musb_remove, |
532 | .driver = { |
533 | .name = "musb-mtk" , |
534 | .of_match_table = of_match_ptr(mtk_musb_match), |
535 | }, |
536 | }; |
537 | |
538 | module_platform_driver(mtk_musb_driver); |
539 | |
540 | MODULE_DESCRIPTION("MediaTek MUSB Glue Layer" ); |
541 | MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>" ); |
542 | MODULE_LICENSE("GPL v2" ); |
543 | |