1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * rt5631.c -- RT5631 ALSA Soc Audio driver |
4 | * |
5 | * Copyright 2011 Realtek Microelectronics |
6 | * |
7 | * Author: flove <flove@realtek.com> |
8 | * |
9 | * Based on WM8753.c |
10 | */ |
11 | #include <linux/module.h> |
12 | #include <linux/moduleparam.h> |
13 | #include <linux/init.h> |
14 | #include <linux/delay.h> |
15 | #include <linux/pm.h> |
16 | #include <linux/i2c.h> |
17 | #include <linux/regmap.h> |
18 | #include <sound/core.h> |
19 | #include <sound/pcm.h> |
20 | #include <sound/pcm_params.h> |
21 | #include <sound/soc.h> |
22 | #include <sound/soc-dapm.h> |
23 | #include <sound/initval.h> |
24 | #include <sound/tlv.h> |
25 | |
26 | #include "rt5631.h" |
27 | |
28 | struct rt5631_priv { |
29 | struct regmap *regmap; |
30 | int codec_version; |
31 | int master; |
32 | int sysclk; |
33 | int rx_rate; |
34 | int bclk_rate; |
35 | int dmic_used_flag; |
36 | }; |
37 | |
38 | static const struct reg_default rt5631_reg[] = { |
39 | { RT5631_SPK_OUT_VOL, 0x8888 }, |
40 | { RT5631_HP_OUT_VOL, 0x8080 }, |
41 | { RT5631_MONO_AXO_1_2_VOL, 0xa080 }, |
42 | { RT5631_AUX_IN_VOL, 0x0808 }, |
43 | { RT5631_ADC_REC_MIXER, 0xf0f0 }, |
44 | { RT5631_VDAC_DIG_VOL, 0x0010 }, |
45 | { RT5631_OUTMIXER_L_CTRL, 0xffc0 }, |
46 | { RT5631_OUTMIXER_R_CTRL, 0xffc0 }, |
47 | { RT5631_AXO1MIXER_CTRL, 0x88c0 }, |
48 | { RT5631_AXO2MIXER_CTRL, 0x88c0 }, |
49 | { RT5631_DIG_MIC_CTRL, 0x3000 }, |
50 | { RT5631_MONO_INPUT_VOL, 0x8808 }, |
51 | { RT5631_SPK_MIXER_CTRL, 0xf8f8 }, |
52 | { RT5631_SPK_MONO_OUT_CTRL, 0xfc00 }, |
53 | { RT5631_SPK_MONO_HP_OUT_CTRL, 0x4440 }, |
54 | { RT5631_SDP_CTRL, 0x8000 }, |
55 | { RT5631_MONO_SDP_CTRL, 0x8000 }, |
56 | { RT5631_STEREO_AD_DA_CLK_CTRL, 0x2010 }, |
57 | { RT5631_GEN_PUR_CTRL_REG, 0x0e00 }, |
58 | { RT5631_INT_ST_IRQ_CTRL_2, 0x071a }, |
59 | { RT5631_MISC_CTRL, 0x2040 }, |
60 | { RT5631_DEPOP_FUN_CTRL_2, 0x8000 }, |
61 | { RT5631_SOFT_VOL_CTRL, 0x07e0 }, |
62 | { RT5631_ALC_CTRL_1, 0x0206 }, |
63 | { RT5631_ALC_CTRL_3, 0x2000 }, |
64 | { RT5631_PSEUDO_SPATL_CTRL, 0x0553 }, |
65 | }; |
66 | |
67 | /* |
68 | * rt5631_write_index - write index register of 2nd layer |
69 | */ |
70 | static void rt5631_write_index(struct snd_soc_component *component, |
71 | unsigned int reg, unsigned int value) |
72 | { |
73 | snd_soc_component_write(component, RT5631_INDEX_ADD, val: reg); |
74 | snd_soc_component_write(component, RT5631_INDEX_DATA, val: value); |
75 | } |
76 | |
77 | /* |
78 | * rt5631_read_index - read index register of 2nd layer |
79 | */ |
80 | static unsigned int rt5631_read_index(struct snd_soc_component *component, |
81 | unsigned int reg) |
82 | { |
83 | unsigned int value; |
84 | |
85 | snd_soc_component_write(component, RT5631_INDEX_ADD, val: reg); |
86 | value = snd_soc_component_read(component, RT5631_INDEX_DATA); |
87 | |
88 | return value; |
89 | } |
90 | |
91 | static int rt5631_reset(struct snd_soc_component *component) |
92 | { |
93 | return snd_soc_component_write(component, RT5631_RESET, val: 0); |
94 | } |
95 | |
96 | static bool rt5631_volatile_register(struct device *dev, unsigned int reg) |
97 | { |
98 | switch (reg) { |
99 | case RT5631_RESET: |
100 | case RT5631_INT_ST_IRQ_CTRL_2: |
101 | case RT5631_INDEX_ADD: |
102 | case RT5631_INDEX_DATA: |
103 | case RT5631_EQ_CTRL: |
104 | return true; |
105 | default: |
106 | return false; |
107 | } |
108 | } |
109 | |
110 | static bool rt5631_readable_register(struct device *dev, unsigned int reg) |
111 | { |
112 | switch (reg) { |
113 | case RT5631_RESET: |
114 | case RT5631_SPK_OUT_VOL: |
115 | case RT5631_HP_OUT_VOL: |
116 | case RT5631_MONO_AXO_1_2_VOL: |
117 | case RT5631_AUX_IN_VOL: |
118 | case RT5631_STEREO_DAC_VOL_1: |
119 | case RT5631_MIC_CTRL_1: |
120 | case RT5631_STEREO_DAC_VOL_2: |
121 | case RT5631_ADC_CTRL_1: |
122 | case RT5631_ADC_REC_MIXER: |
123 | case RT5631_ADC_CTRL_2: |
124 | case RT5631_VDAC_DIG_VOL: |
125 | case RT5631_OUTMIXER_L_CTRL: |
126 | case RT5631_OUTMIXER_R_CTRL: |
127 | case RT5631_AXO1MIXER_CTRL: |
128 | case RT5631_AXO2MIXER_CTRL: |
129 | case RT5631_MIC_CTRL_2: |
130 | case RT5631_DIG_MIC_CTRL: |
131 | case RT5631_MONO_INPUT_VOL: |
132 | case RT5631_SPK_MIXER_CTRL: |
133 | case RT5631_SPK_MONO_OUT_CTRL: |
134 | case RT5631_SPK_MONO_HP_OUT_CTRL: |
135 | case RT5631_SDP_CTRL: |
136 | case RT5631_MONO_SDP_CTRL: |
137 | case RT5631_STEREO_AD_DA_CLK_CTRL: |
138 | case RT5631_PWR_MANAG_ADD1: |
139 | case RT5631_PWR_MANAG_ADD2: |
140 | case RT5631_PWR_MANAG_ADD3: |
141 | case RT5631_PWR_MANAG_ADD4: |
142 | case RT5631_GEN_PUR_CTRL_REG: |
143 | case RT5631_GLOBAL_CLK_CTRL: |
144 | case RT5631_PLL_CTRL: |
145 | case RT5631_INT_ST_IRQ_CTRL_1: |
146 | case RT5631_INT_ST_IRQ_CTRL_2: |
147 | case RT5631_GPIO_CTRL: |
148 | case RT5631_MISC_CTRL: |
149 | case RT5631_DEPOP_FUN_CTRL_1: |
150 | case RT5631_DEPOP_FUN_CTRL_2: |
151 | case RT5631_JACK_DET_CTRL: |
152 | case RT5631_SOFT_VOL_CTRL: |
153 | case RT5631_ALC_CTRL_1: |
154 | case RT5631_ALC_CTRL_2: |
155 | case RT5631_ALC_CTRL_3: |
156 | case RT5631_PSEUDO_SPATL_CTRL: |
157 | case RT5631_INDEX_ADD: |
158 | case RT5631_INDEX_DATA: |
159 | case RT5631_EQ_CTRL: |
160 | case RT5631_VENDOR_ID: |
161 | case RT5631_VENDOR_ID1: |
162 | case RT5631_VENDOR_ID2: |
163 | return true; |
164 | default: |
165 | return false; |
166 | } |
167 | } |
168 | |
169 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); |
170 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0); |
171 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
172 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52}dB */ |
173 | static const DECLARE_TLV_DB_RANGE(mic_bst_tlv, |
174 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
175 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), |
176 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
177 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), |
178 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), |
179 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), |
180 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) |
181 | ); |
182 | |
183 | static int rt5631_dmic_get(struct snd_kcontrol *kcontrol, |
184 | struct snd_ctl_elem_value *ucontrol) |
185 | { |
186 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
187 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
188 | |
189 | ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; |
190 | |
191 | return 0; |
192 | } |
193 | |
194 | static int rt5631_dmic_put(struct snd_kcontrol *kcontrol, |
195 | struct snd_ctl_elem_value *ucontrol) |
196 | { |
197 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
198 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
199 | |
200 | rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; |
201 | return 0; |
202 | } |
203 | |
204 | /* MIC Input Type */ |
205 | static const char *rt5631_input_mode[] = { |
206 | "Single ended" , "Differential" }; |
207 | |
208 | static SOC_ENUM_SINGLE_DECL(rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1, |
209 | RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode); |
210 | |
211 | static SOC_ENUM_SINGLE_DECL(rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1, |
212 | RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode); |
213 | |
214 | /* MONO Input Type */ |
215 | static SOC_ENUM_SINGLE_DECL(rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL, |
216 | RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode); |
217 | |
218 | /* SPK Ratio Gain Control */ |
219 | static const char *rt5631_spk_ratio[] = {"1.00x" , "1.09x" , "1.27x" , "1.44x" , |
220 | "1.56x" , "1.68x" , "1.99x" , "2.34x" }; |
221 | |
222 | static SOC_ENUM_SINGLE_DECL(rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG, |
223 | RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio); |
224 | |
225 | static const struct snd_kcontrol_new rt5631_snd_controls[] = { |
226 | /* MIC */ |
227 | SOC_ENUM("MIC1 Mode Control" , rt5631_mic1_mode_enum), |
228 | SOC_SINGLE_TLV("MIC1 Boost Volume" , RT5631_MIC_CTRL_2, |
229 | RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
230 | SOC_ENUM("MIC2 Mode Control" , rt5631_mic2_mode_enum), |
231 | SOC_SINGLE_TLV("MIC2 Boost Volume" , RT5631_MIC_CTRL_2, |
232 | RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv), |
233 | /* MONO IN */ |
234 | SOC_ENUM("MONOIN Mode Control" , rt5631_monoin_mode_enum), |
235 | SOC_DOUBLE_TLV("MONOIN_RX Capture Volume" , RT5631_MONO_INPUT_VOL, |
236 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
237 | RT5631_VOL_MASK, 1, in_vol_tlv), |
238 | /* AXI */ |
239 | SOC_DOUBLE_TLV("AXI Capture Volume" , RT5631_AUX_IN_VOL, |
240 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
241 | RT5631_VOL_MASK, 1, in_vol_tlv), |
242 | /* DAC */ |
243 | SOC_DOUBLE_TLV("PCM Playback Volume" , RT5631_STEREO_DAC_VOL_2, |
244 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
245 | RT5631_DAC_VOL_MASK, 1, dac_vol_tlv), |
246 | SOC_DOUBLE("PCM Playback Switch" , RT5631_STEREO_DAC_VOL_1, |
247 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
248 | /* AXO */ |
249 | SOC_SINGLE("AXO1 Playback Switch" , RT5631_MONO_AXO_1_2_VOL, |
250 | RT5631_L_MUTE_SHIFT, 1, 1), |
251 | SOC_SINGLE("AXO2 Playback Switch" , RT5631_MONO_AXO_1_2_VOL, |
252 | RT5631_R_VOL_SHIFT, 1, 1), |
253 | /* OUTVOL */ |
254 | SOC_DOUBLE("OUTVOL Channel Switch" , RT5631_SPK_OUT_VOL, |
255 | RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0), |
256 | |
257 | /* SPK */ |
258 | SOC_DOUBLE("Speaker Playback Switch" , RT5631_SPK_OUT_VOL, |
259 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
260 | SOC_DOUBLE_TLV("Speaker Playback Volume" , RT5631_SPK_OUT_VOL, |
261 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv), |
262 | /* MONO OUT */ |
263 | SOC_SINGLE("MONO Playback Switch" , RT5631_MONO_AXO_1_2_VOL, |
264 | RT5631_MUTE_MONO_SHIFT, 1, 1), |
265 | /* HP */ |
266 | SOC_DOUBLE("HP Playback Switch" , RT5631_HP_OUT_VOL, |
267 | RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1), |
268 | SOC_DOUBLE_TLV("HP Playback Volume" , RT5631_HP_OUT_VOL, |
269 | RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, |
270 | RT5631_VOL_MASK, 1, out_vol_tlv), |
271 | /* DMIC */ |
272 | SOC_SINGLE_EXT("DMIC Switch" , 0, 0, 1, 0, |
273 | rt5631_dmic_get, rt5631_dmic_put), |
274 | SOC_DOUBLE("DMIC Capture Switch" , RT5631_DIG_MIC_CTRL, |
275 | RT5631_DMIC_L_CH_MUTE_SHIFT, |
276 | RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1), |
277 | |
278 | /* SPK Ratio Gain Control */ |
279 | SOC_ENUM("SPK Ratio Control" , rt5631_spk_ratio_enum), |
280 | }; |
281 | |
282 | static int check_sysclk1_source(struct snd_soc_dapm_widget *source, |
283 | struct snd_soc_dapm_widget *sink) |
284 | { |
285 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
286 | unsigned int reg; |
287 | |
288 | reg = snd_soc_component_read(component, RT5631_GLOBAL_CLK_CTRL); |
289 | return reg & RT5631_SYSCLK_SOUR_SEL_PLL; |
290 | } |
291 | |
292 | static int check_dmic_used(struct snd_soc_dapm_widget *source, |
293 | struct snd_soc_dapm_widget *sink) |
294 | { |
295 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
296 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
297 | return rt5631->dmic_used_flag; |
298 | } |
299 | |
300 | static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source, |
301 | struct snd_soc_dapm_widget *sink) |
302 | { |
303 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
304 | unsigned int reg; |
305 | |
306 | reg = snd_soc_component_read(component, RT5631_OUTMIXER_L_CTRL); |
307 | return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L); |
308 | } |
309 | |
310 | static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source, |
311 | struct snd_soc_dapm_widget *sink) |
312 | { |
313 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
314 | unsigned int reg; |
315 | |
316 | reg = snd_soc_component_read(component, RT5631_OUTMIXER_R_CTRL); |
317 | return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R); |
318 | } |
319 | |
320 | static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source, |
321 | struct snd_soc_dapm_widget *sink) |
322 | { |
323 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
324 | unsigned int reg; |
325 | |
326 | reg = snd_soc_component_read(component, RT5631_SPK_MIXER_CTRL); |
327 | return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L); |
328 | } |
329 | |
330 | static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source, |
331 | struct snd_soc_dapm_widget *sink) |
332 | { |
333 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
334 | unsigned int reg; |
335 | |
336 | reg = snd_soc_component_read(component, RT5631_SPK_MIXER_CTRL); |
337 | return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R); |
338 | } |
339 | |
340 | static int check_adcl_select(struct snd_soc_dapm_widget *source, |
341 | struct snd_soc_dapm_widget *sink) |
342 | { |
343 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
344 | unsigned int reg; |
345 | |
346 | reg = snd_soc_component_read(component, RT5631_ADC_REC_MIXER); |
347 | return !(reg & RT5631_M_MIC1_TO_RECMIXER_L); |
348 | } |
349 | |
350 | static int check_adcr_select(struct snd_soc_dapm_widget *source, |
351 | struct snd_soc_dapm_widget *sink) |
352 | { |
353 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: source->dapm); |
354 | unsigned int reg; |
355 | |
356 | reg = snd_soc_component_read(component, RT5631_ADC_REC_MIXER); |
357 | return !(reg & RT5631_M_MIC2_TO_RECMIXER_R); |
358 | } |
359 | |
360 | /** |
361 | * onebit_depop_power_stage - auto depop in power stage. |
362 | * @component: ASoC component |
363 | * @enable: power on/off |
364 | * |
365 | * When power on/off headphone, the depop sequence is done by hardware. |
366 | */ |
367 | static void onebit_depop_power_stage(struct snd_soc_component *component, int enable) |
368 | { |
369 | unsigned int soft_vol, hp_zc; |
370 | |
371 | /* enable one-bit depop function */ |
372 | snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2, |
373 | RT5631_EN_ONE_BIT_DEPOP, val: 0); |
374 | |
375 | /* keep soft volume and zero crossing setting */ |
376 | soft_vol = snd_soc_component_read(component, RT5631_SOFT_VOL_CTRL); |
377 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: 0); |
378 | hp_zc = snd_soc_component_read(component, RT5631_INT_ST_IRQ_CTRL_2); |
379 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc & 0xf7ff); |
380 | if (enable) { |
381 | /* config one-bit depop parameter */ |
382 | rt5631_write_index(component, RT5631_TEST_MODE_CTRL, value: 0x84c0); |
383 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x309f); |
384 | rt5631_write_index(component, RT5631_CP_INTL_REG2, value: 0x6530); |
385 | /* power on capless block */ |
386 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_2, |
387 | RT5631_EN_CAP_FREE_DEPOP); |
388 | } else { |
389 | /* power off capless block */ |
390 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_2, val: 0); |
391 | msleep(msecs: 100); |
392 | } |
393 | |
394 | /* recover soft volume and zero crossing setting */ |
395 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: soft_vol); |
396 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc); |
397 | } |
398 | |
399 | /** |
400 | * onebit_depop_mute_stage - auto depop in mute stage. |
401 | * @component: ASoC component |
402 | * @enable: mute/unmute |
403 | * |
404 | * When mute/unmute headphone, the depop sequence is done by hardware. |
405 | */ |
406 | static void onebit_depop_mute_stage(struct snd_soc_component *component, int enable) |
407 | { |
408 | unsigned int soft_vol, hp_zc; |
409 | |
410 | /* enable one-bit depop function */ |
411 | snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2, |
412 | RT5631_EN_ONE_BIT_DEPOP, val: 0); |
413 | |
414 | /* keep soft volume and zero crossing setting */ |
415 | soft_vol = snd_soc_component_read(component, RT5631_SOFT_VOL_CTRL); |
416 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: 0); |
417 | hp_zc = snd_soc_component_read(component, RT5631_INT_ST_IRQ_CTRL_2); |
418 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc & 0xf7ff); |
419 | if (enable) { |
420 | schedule_timeout_uninterruptible(timeout: msecs_to_jiffies(m: 10)); |
421 | /* config one-bit depop parameter */ |
422 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x307f); |
423 | snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL, |
424 | RT5631_L_MUTE | RT5631_R_MUTE, val: 0); |
425 | msleep(msecs: 300); |
426 | } else { |
427 | snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL, |
428 | RT5631_L_MUTE | RT5631_R_MUTE, |
429 | RT5631_L_MUTE | RT5631_R_MUTE); |
430 | msleep(msecs: 100); |
431 | } |
432 | |
433 | /* recover soft volume and zero crossing setting */ |
434 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: soft_vol); |
435 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc); |
436 | } |
437 | |
438 | /** |
439 | * depop_seq_power_stage - step by step depop sequence in power stage. |
440 | * @component: ASoC component |
441 | * @enable: power on/off |
442 | * |
443 | * When power on/off headphone, the depop sequence is done in step by step. |
444 | */ |
445 | static void depop_seq_power_stage(struct snd_soc_component *component, int enable) |
446 | { |
447 | unsigned int soft_vol, hp_zc; |
448 | |
449 | /* depop control by register */ |
450 | snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2, |
451 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
452 | |
453 | /* keep soft volume and zero crossing setting */ |
454 | soft_vol = snd_soc_component_read(component, RT5631_SOFT_VOL_CTRL); |
455 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: 0); |
456 | hp_zc = snd_soc_component_read(component, RT5631_INT_ST_IRQ_CTRL_2); |
457 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc & 0xf7ff); |
458 | if (enable) { |
459 | /* config depop sequence parameter */ |
460 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x303e); |
461 | |
462 | /* power on headphone and charge pump */ |
463 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
464 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
465 | RT5631_PWR_HP_R_AMP, |
466 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
467 | RT5631_PWR_HP_R_AMP); |
468 | |
469 | /* power on soft generator and depop mode2 */ |
470 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
471 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP); |
472 | msleep(msecs: 100); |
473 | |
474 | /* stop depop mode */ |
475 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
476 | RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS); |
477 | } else { |
478 | /* config depop sequence parameter */ |
479 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x303F); |
480 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
481 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
482 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
483 | msleep(msecs: 75); |
484 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
485 | RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP | |
486 | RT5631_PD_HPAMP_R_ST_UP); |
487 | |
488 | /* start depop mode */ |
489 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
490 | RT5631_PWR_HP_DEPOP_DIS, val: 0); |
491 | |
492 | /* config depop sequence parameter */ |
493 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
494 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP | |
495 | RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP); |
496 | msleep(msecs: 80); |
497 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
498 | RT5631_POW_ON_SOFT_GEN); |
499 | |
500 | /* power down headphone and charge pump */ |
501 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
502 | RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP | |
503 | RT5631_PWR_HP_R_AMP, val: 0); |
504 | } |
505 | |
506 | /* recover soft volume and zero crossing setting */ |
507 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: soft_vol); |
508 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc); |
509 | } |
510 | |
511 | /** |
512 | * depop_seq_mute_stage - step by step depop sequence in mute stage. |
513 | * @component: ASoC component |
514 | * @enable: mute/unmute |
515 | * |
516 | * When mute/unmute headphone, the depop sequence is done in step by step. |
517 | */ |
518 | static void depop_seq_mute_stage(struct snd_soc_component *component, int enable) |
519 | { |
520 | unsigned int soft_vol, hp_zc; |
521 | |
522 | /* depop control by register */ |
523 | snd_soc_component_update_bits(component, RT5631_DEPOP_FUN_CTRL_2, |
524 | RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP); |
525 | |
526 | /* keep soft volume and zero crossing setting */ |
527 | soft_vol = snd_soc_component_read(component, RT5631_SOFT_VOL_CTRL); |
528 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: 0); |
529 | hp_zc = snd_soc_component_read(component, RT5631_INT_ST_IRQ_CTRL_2); |
530 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc & 0xf7ff); |
531 | if (enable) { |
532 | schedule_timeout_uninterruptible(timeout: msecs_to_jiffies(m: 10)); |
533 | |
534 | /* config depop sequence parameter */ |
535 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x302f); |
536 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
537 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
538 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
539 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
540 | |
541 | snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL, |
542 | RT5631_L_MUTE | RT5631_R_MUTE, val: 0); |
543 | msleep(msecs: 160); |
544 | } else { |
545 | /* config depop sequence parameter */ |
546 | rt5631_write_index(component, RT5631_SPK_INTL_CTRL, value: 0x302f); |
547 | snd_soc_component_write(component, RT5631_DEPOP_FUN_CTRL_1, |
548 | RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP | |
549 | RT5631_EN_HP_R_M_UN_MUTE_DEPOP | |
550 | RT5631_EN_HP_L_M_UN_MUTE_DEPOP); |
551 | |
552 | snd_soc_component_update_bits(component, RT5631_HP_OUT_VOL, |
553 | RT5631_L_MUTE | RT5631_R_MUTE, |
554 | RT5631_L_MUTE | RT5631_R_MUTE); |
555 | msleep(msecs: 150); |
556 | } |
557 | |
558 | /* recover soft volume and zero crossing setting */ |
559 | snd_soc_component_write(component, RT5631_SOFT_VOL_CTRL, val: soft_vol); |
560 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: hp_zc); |
561 | } |
562 | |
563 | static int hp_event(struct snd_soc_dapm_widget *w, |
564 | struct snd_kcontrol *kcontrol, int event) |
565 | { |
566 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
567 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
568 | |
569 | switch (event) { |
570 | case SND_SOC_DAPM_PRE_PMD: |
571 | if (rt5631->codec_version) { |
572 | onebit_depop_mute_stage(component, enable: 0); |
573 | onebit_depop_power_stage(component, enable: 0); |
574 | } else { |
575 | depop_seq_mute_stage(component, enable: 0); |
576 | depop_seq_power_stage(component, enable: 0); |
577 | } |
578 | break; |
579 | |
580 | case SND_SOC_DAPM_POST_PMU: |
581 | if (rt5631->codec_version) { |
582 | onebit_depop_power_stage(component, enable: 1); |
583 | onebit_depop_mute_stage(component, enable: 1); |
584 | } else { |
585 | depop_seq_power_stage(component, enable: 1); |
586 | depop_seq_mute_stage(component, enable: 1); |
587 | } |
588 | break; |
589 | |
590 | default: |
591 | break; |
592 | } |
593 | |
594 | return 0; |
595 | } |
596 | |
597 | static int set_dmic_params(struct snd_soc_dapm_widget *w, |
598 | struct snd_kcontrol *kcontrol, int event) |
599 | { |
600 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
601 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
602 | |
603 | switch (rt5631->rx_rate) { |
604 | case 44100: |
605 | case 48000: |
606 | snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL, |
607 | RT5631_DMIC_CLK_CTRL_MASK, |
608 | RT5631_DMIC_CLK_CTRL_TO_32FS); |
609 | break; |
610 | |
611 | case 32000: |
612 | case 22050: |
613 | snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL, |
614 | RT5631_DMIC_CLK_CTRL_MASK, |
615 | RT5631_DMIC_CLK_CTRL_TO_64FS); |
616 | break; |
617 | |
618 | case 16000: |
619 | case 11025: |
620 | case 8000: |
621 | snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL, |
622 | RT5631_DMIC_CLK_CTRL_MASK, |
623 | RT5631_DMIC_CLK_CTRL_TO_128FS); |
624 | break; |
625 | |
626 | default: |
627 | return -EINVAL; |
628 | } |
629 | |
630 | return 0; |
631 | } |
632 | |
633 | static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = { |
634 | SOC_DAPM_SINGLE("OUTMIXL Capture Switch" , RT5631_ADC_REC_MIXER, |
635 | RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1), |
636 | SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch" , RT5631_ADC_REC_MIXER, |
637 | RT5631_M_MIC1_RECMIXL_BIT, 1, 1), |
638 | SOC_DAPM_SINGLE("AXILVOL Capture Switch" , RT5631_ADC_REC_MIXER, |
639 | RT5631_M_AXIL_RECMIXL_BIT, 1, 1), |
640 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch" , RT5631_ADC_REC_MIXER, |
641 | RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1), |
642 | }; |
643 | |
644 | static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = { |
645 | SOC_DAPM_SINGLE("MONOIN_RX Capture Switch" , RT5631_ADC_REC_MIXER, |
646 | RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1), |
647 | SOC_DAPM_SINGLE("AXIRVOL Capture Switch" , RT5631_ADC_REC_MIXER, |
648 | RT5631_M_AXIR_RECMIXR_BIT, 1, 1), |
649 | SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch" , RT5631_ADC_REC_MIXER, |
650 | RT5631_M_MIC2_RECMIXR_BIT, 1, 1), |
651 | SOC_DAPM_SINGLE("OUTMIXR Capture Switch" , RT5631_ADC_REC_MIXER, |
652 | RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1), |
653 | }; |
654 | |
655 | static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = { |
656 | SOC_DAPM_SINGLE("RECMIXL Playback Switch" , RT5631_SPK_MIXER_CTRL, |
657 | RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1), |
658 | SOC_DAPM_SINGLE("MIC1_P Playback Switch" , RT5631_SPK_MIXER_CTRL, |
659 | RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1), |
660 | SOC_DAPM_SINGLE("DACL Playback Switch" , RT5631_SPK_MIXER_CTRL, |
661 | RT5631_M_DACL_SPKMIXL_BIT, 1, 1), |
662 | SOC_DAPM_SINGLE("OUTMIXL Playback Switch" , RT5631_SPK_MIXER_CTRL, |
663 | RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1), |
664 | }; |
665 | |
666 | static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = { |
667 | SOC_DAPM_SINGLE("OUTMIXR Playback Switch" , RT5631_SPK_MIXER_CTRL, |
668 | RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1), |
669 | SOC_DAPM_SINGLE("DACR Playback Switch" , RT5631_SPK_MIXER_CTRL, |
670 | RT5631_M_DACR_SPKMIXR_BIT, 1, 1), |
671 | SOC_DAPM_SINGLE("MIC2_P Playback Switch" , RT5631_SPK_MIXER_CTRL, |
672 | RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1), |
673 | SOC_DAPM_SINGLE("RECMIXR Playback Switch" , RT5631_SPK_MIXER_CTRL, |
674 | RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1), |
675 | }; |
676 | |
677 | static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = { |
678 | SOC_DAPM_SINGLE("RECMIXL Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
679 | RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1), |
680 | SOC_DAPM_SINGLE("RECMIXR Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
681 | RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1), |
682 | SOC_DAPM_SINGLE("DACL Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
683 | RT5631_M_DACL_OUTMIXL_BIT, 1, 1), |
684 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
685 | RT5631_M_MIC1_OUTMIXL_BIT, 1, 1), |
686 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
687 | RT5631_M_MIC2_OUTMIXL_BIT, 1, 1), |
688 | SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
689 | RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1), |
690 | SOC_DAPM_SINGLE("AXILVOL Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
691 | RT5631_M_AXIL_OUTMIXL_BIT, 1, 1), |
692 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
693 | RT5631_M_AXIR_OUTMIXL_BIT, 1, 1), |
694 | SOC_DAPM_SINGLE("VDAC Playback Switch" , RT5631_OUTMIXER_L_CTRL, |
695 | RT5631_M_VDAC_OUTMIXL_BIT, 1, 1), |
696 | }; |
697 | |
698 | static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = { |
699 | SOC_DAPM_SINGLE("VDAC Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
700 | RT5631_M_VDAC_OUTMIXR_BIT, 1, 1), |
701 | SOC_DAPM_SINGLE("AXIRVOL Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
702 | RT5631_M_AXIR_OUTMIXR_BIT, 1, 1), |
703 | SOC_DAPM_SINGLE("AXILVOL Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
704 | RT5631_M_AXIL_OUTMIXR_BIT, 1, 1), |
705 | SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
706 | RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1), |
707 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
708 | RT5631_M_MIC2_OUTMIXR_BIT, 1, 1), |
709 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
710 | RT5631_M_MIC1_OUTMIXR_BIT, 1, 1), |
711 | SOC_DAPM_SINGLE("DACR Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
712 | RT5631_M_DACR_OUTMIXR_BIT, 1, 1), |
713 | SOC_DAPM_SINGLE("RECMIXR Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
714 | RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1), |
715 | SOC_DAPM_SINGLE("RECMIXL Playback Switch" , RT5631_OUTMIXER_R_CTRL, |
716 | RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1), |
717 | }; |
718 | |
719 | static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = { |
720 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch" , RT5631_AXO1MIXER_CTRL, |
721 | RT5631_M_MIC1_AXO1MIX_BIT , 1, 1), |
722 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch" , RT5631_AXO1MIXER_CTRL, |
723 | RT5631_M_MIC2_AXO1MIX_BIT, 1, 1), |
724 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch" , RT5631_AXO1MIXER_CTRL, |
725 | RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1), |
726 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch" , RT5631_AXO1MIXER_CTRL, |
727 | RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1), |
728 | }; |
729 | |
730 | static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = { |
731 | SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch" , RT5631_AXO2MIXER_CTRL, |
732 | RT5631_M_MIC1_AXO2MIX_BIT, 1, 1), |
733 | SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch" , RT5631_AXO2MIXER_CTRL, |
734 | RT5631_M_MIC2_AXO2MIX_BIT, 1, 1), |
735 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch" , RT5631_AXO2MIXER_CTRL, |
736 | RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1), |
737 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch" , RT5631_AXO2MIXER_CTRL, |
738 | RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1), |
739 | }; |
740 | |
741 | static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = { |
742 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
743 | RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1), |
744 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
745 | RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1), |
746 | }; |
747 | |
748 | static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = { |
749 | SOC_DAPM_SINGLE("SPKVOLL Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
750 | RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1), |
751 | SOC_DAPM_SINGLE("SPKVOLR Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
752 | RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1), |
753 | }; |
754 | |
755 | static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = { |
756 | SOC_DAPM_SINGLE("OUTVOLL Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
757 | RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1), |
758 | SOC_DAPM_SINGLE("OUTVOLR Playback Switch" , RT5631_SPK_MONO_OUT_CTRL, |
759 | RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1), |
760 | }; |
761 | |
762 | /* Left SPK Volume Input */ |
763 | static const char *rt5631_spkvoll_sel[] = {"Vmid" , "SPKMIXL" }; |
764 | |
765 | static SOC_ENUM_SINGLE_DECL(rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL, |
766 | RT5631_L_EN_SHIFT, rt5631_spkvoll_sel); |
767 | |
768 | static const struct snd_kcontrol_new rt5631_spkvoll_mux_control = |
769 | SOC_DAPM_ENUM("Left SPKVOL SRC" , rt5631_spkvoll_enum); |
770 | |
771 | /* Left HP Volume Input */ |
772 | static const char *rt5631_hpvoll_sel[] = {"Vmid" , "OUTMIXL" }; |
773 | |
774 | static SOC_ENUM_SINGLE_DECL(rt5631_hpvoll_enum, RT5631_HP_OUT_VOL, |
775 | RT5631_L_EN_SHIFT, rt5631_hpvoll_sel); |
776 | |
777 | static const struct snd_kcontrol_new rt5631_hpvoll_mux_control = |
778 | SOC_DAPM_ENUM("Left HPVOL SRC" , rt5631_hpvoll_enum); |
779 | |
780 | /* Left Out Volume Input */ |
781 | static const char *rt5631_outvoll_sel[] = {"Vmid" , "OUTMIXL" }; |
782 | |
783 | static SOC_ENUM_SINGLE_DECL(rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL, |
784 | RT5631_L_EN_SHIFT, rt5631_outvoll_sel); |
785 | |
786 | static const struct snd_kcontrol_new rt5631_outvoll_mux_control = |
787 | SOC_DAPM_ENUM("Left OUTVOL SRC" , rt5631_outvoll_enum); |
788 | |
789 | /* Right Out Volume Input */ |
790 | static const char *rt5631_outvolr_sel[] = {"Vmid" , "OUTMIXR" }; |
791 | |
792 | static SOC_ENUM_SINGLE_DECL(rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL, |
793 | RT5631_R_EN_SHIFT, rt5631_outvolr_sel); |
794 | |
795 | static const struct snd_kcontrol_new rt5631_outvolr_mux_control = |
796 | SOC_DAPM_ENUM("Right OUTVOL SRC" , rt5631_outvolr_enum); |
797 | |
798 | /* Right HP Volume Input */ |
799 | static const char *rt5631_hpvolr_sel[] = {"Vmid" , "OUTMIXR" }; |
800 | |
801 | static SOC_ENUM_SINGLE_DECL(rt5631_hpvolr_enum, RT5631_HP_OUT_VOL, |
802 | RT5631_R_EN_SHIFT, rt5631_hpvolr_sel); |
803 | |
804 | static const struct snd_kcontrol_new rt5631_hpvolr_mux_control = |
805 | SOC_DAPM_ENUM("Right HPVOL SRC" , rt5631_hpvolr_enum); |
806 | |
807 | /* Right SPK Volume Input */ |
808 | static const char *rt5631_spkvolr_sel[] = {"Vmid" , "SPKMIXR" }; |
809 | |
810 | static SOC_ENUM_SINGLE_DECL(rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL, |
811 | RT5631_R_EN_SHIFT, rt5631_spkvolr_sel); |
812 | |
813 | static const struct snd_kcontrol_new rt5631_spkvolr_mux_control = |
814 | SOC_DAPM_ENUM("Right SPKVOL SRC" , rt5631_spkvolr_enum); |
815 | |
816 | /* SPO Left Channel Input */ |
817 | static const char *rt5631_spol_src_sel[] = { |
818 | "SPOLMIX" , "MONOIN_RX" , "VDAC" , "DACL" }; |
819 | |
820 | static SOC_ENUM_SINGLE_DECL(rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
821 | RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel); |
822 | |
823 | static const struct snd_kcontrol_new rt5631_spol_mux_control = |
824 | SOC_DAPM_ENUM("SPOL SRC" , rt5631_spol_src_enum); |
825 | |
826 | /* SPO Right Channel Input */ |
827 | static const char *rt5631_spor_src_sel[] = { |
828 | "SPORMIX" , "MONOIN_RX" , "VDAC" , "DACR" }; |
829 | |
830 | static SOC_ENUM_SINGLE_DECL(rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
831 | RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel); |
832 | |
833 | static const struct snd_kcontrol_new rt5631_spor_mux_control = |
834 | SOC_DAPM_ENUM("SPOR SRC" , rt5631_spor_src_enum); |
835 | |
836 | /* MONO Input */ |
837 | static const char *rt5631_mono_src_sel[] = {"MONOMIX" , "MONOIN_RX" , "VDAC" }; |
838 | |
839 | static SOC_ENUM_SINGLE_DECL(rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
840 | RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel); |
841 | |
842 | static const struct snd_kcontrol_new rt5631_mono_mux_control = |
843 | SOC_DAPM_ENUM("MONO SRC" , rt5631_mono_src_enum); |
844 | |
845 | /* Left HPO Input */ |
846 | static const char *rt5631_hpl_src_sel[] = {"Left HPVOL" , "Left DAC" }; |
847 | |
848 | static SOC_ENUM_SINGLE_DECL(rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
849 | RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel); |
850 | |
851 | static const struct snd_kcontrol_new rt5631_hpl_mux_control = |
852 | SOC_DAPM_ENUM("HPL SRC" , rt5631_hpl_src_enum); |
853 | |
854 | /* Right HPO Input */ |
855 | static const char *rt5631_hpr_src_sel[] = {"Right HPVOL" , "Right DAC" }; |
856 | |
857 | static SOC_ENUM_SINGLE_DECL(rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL, |
858 | RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel); |
859 | |
860 | static const struct snd_kcontrol_new rt5631_hpr_mux_control = |
861 | SOC_DAPM_ENUM("HPR SRC" , rt5631_hpr_src_enum); |
862 | |
863 | static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = { |
864 | /* Vmid */ |
865 | SND_SOC_DAPM_VMID("Vmid" ), |
866 | /* PLL1 */ |
867 | SND_SOC_DAPM_SUPPLY("PLL1" , RT5631_PWR_MANAG_ADD2, |
868 | RT5631_PWR_PLL1_BIT, 0, NULL, 0), |
869 | |
870 | /* Input Side */ |
871 | /* Input Lines */ |
872 | SND_SOC_DAPM_INPUT("MIC1" ), |
873 | SND_SOC_DAPM_INPUT("MIC2" ), |
874 | SND_SOC_DAPM_INPUT("AXIL" ), |
875 | SND_SOC_DAPM_INPUT("AXIR" ), |
876 | SND_SOC_DAPM_INPUT("MONOIN_RXN" ), |
877 | SND_SOC_DAPM_INPUT("MONOIN_RXP" ), |
878 | SND_SOC_DAPM_INPUT("DMIC" ), |
879 | |
880 | /* MICBIAS */ |
881 | SND_SOC_DAPM_MICBIAS("MIC Bias1" , RT5631_PWR_MANAG_ADD2, |
882 | RT5631_PWR_MICBIAS1_VOL_BIT, 0), |
883 | SND_SOC_DAPM_MICBIAS("MIC Bias2" , RT5631_PWR_MANAG_ADD2, |
884 | RT5631_PWR_MICBIAS2_VOL_BIT, 0), |
885 | |
886 | /* Boost */ |
887 | SND_SOC_DAPM_PGA("MIC1 Boost" , RT5631_PWR_MANAG_ADD2, |
888 | RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0), |
889 | SND_SOC_DAPM_PGA("MIC2 Boost" , RT5631_PWR_MANAG_ADD2, |
890 | RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0), |
891 | SND_SOC_DAPM_PGA("MONOIN_RXP Boost" , RT5631_PWR_MANAG_ADD4, |
892 | RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0), |
893 | SND_SOC_DAPM_PGA("MONOIN_RXN Boost" , RT5631_PWR_MANAG_ADD4, |
894 | RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0), |
895 | SND_SOC_DAPM_PGA("AXIL Boost" , RT5631_PWR_MANAG_ADD4, |
896 | RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0), |
897 | SND_SOC_DAPM_PGA("AXIR Boost" , RT5631_PWR_MANAG_ADD4, |
898 | RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0), |
899 | |
900 | /* MONO In */ |
901 | SND_SOC_DAPM_MIXER("MONO_IN" , SND_SOC_NOPM, 0, 0, NULL, 0), |
902 | |
903 | /* REC Mixer */ |
904 | SND_SOC_DAPM_MIXER("RECMIXL Mixer" , RT5631_PWR_MANAG_ADD2, |
905 | RT5631_PWR_RECMIXER_L_BIT, 0, |
906 | &rt5631_recmixl_mixer_controls[0], |
907 | ARRAY_SIZE(rt5631_recmixl_mixer_controls)), |
908 | SND_SOC_DAPM_MIXER("RECMIXR Mixer" , RT5631_PWR_MANAG_ADD2, |
909 | RT5631_PWR_RECMIXER_R_BIT, 0, |
910 | &rt5631_recmixr_mixer_controls[0], |
911 | ARRAY_SIZE(rt5631_recmixr_mixer_controls)), |
912 | /* Because of record duplication for L/R channel, |
913 | * L/R ADCs need power up at the same time */ |
914 | SND_SOC_DAPM_MIXER("ADC Mixer" , SND_SOC_NOPM, 0, 0, NULL, 0), |
915 | |
916 | /* DMIC */ |
917 | SND_SOC_DAPM_SUPPLY("DMIC Supply" , RT5631_DIG_MIC_CTRL, |
918 | RT5631_DMIC_ENA_SHIFT, 0, |
919 | set_dmic_params, SND_SOC_DAPM_PRE_PMU), |
920 | /* ADC Data Srouce */ |
921 | SND_SOC_DAPM_SUPPLY("Left ADC Select" , RT5631_INT_ST_IRQ_CTRL_2, |
922 | RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0), |
923 | SND_SOC_DAPM_SUPPLY("Right ADC Select" , RT5631_INT_ST_IRQ_CTRL_2, |
924 | RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0), |
925 | |
926 | /* ADCs */ |
927 | SND_SOC_DAPM_ADC("Left ADC" , "HIFI Capture" , |
928 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0), |
929 | SND_SOC_DAPM_ADC("Right ADC" , "HIFI Capture" , |
930 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0), |
931 | |
932 | /* DAC and ADC supply power */ |
933 | SND_SOC_DAPM_SUPPLY("I2S" , RT5631_PWR_MANAG_ADD1, |
934 | RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0), |
935 | SND_SOC_DAPM_SUPPLY("DAC REF" , RT5631_PWR_MANAG_ADD1, |
936 | RT5631_PWR_DAC_REF_BIT, 0, NULL, 0), |
937 | |
938 | /* Output Side */ |
939 | /* DACs */ |
940 | SND_SOC_DAPM_DAC("Left DAC" , "HIFI Playback" , |
941 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0), |
942 | SND_SOC_DAPM_DAC("Right DAC" , "HIFI Playback" , |
943 | RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0), |
944 | SND_SOC_DAPM_DAC("Voice DAC" , "Voice DAC Mono Playback" , |
945 | SND_SOC_NOPM, 0, 0), |
946 | SND_SOC_DAPM_PGA("Voice DAC Boost" , SND_SOC_NOPM, 0, 0, NULL, 0), |
947 | /* DAC supply power */ |
948 | SND_SOC_DAPM_SUPPLY("Left DAC To Mixer" , RT5631_PWR_MANAG_ADD1, |
949 | RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0), |
950 | SND_SOC_DAPM_SUPPLY("Right DAC To Mixer" , RT5631_PWR_MANAG_ADD1, |
951 | RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0), |
952 | |
953 | /* Left SPK Mixer */ |
954 | SND_SOC_DAPM_MIXER("SPKMIXL Mixer" , RT5631_PWR_MANAG_ADD2, |
955 | RT5631_PWR_SPKMIXER_L_BIT, 0, |
956 | &rt5631_spkmixl_mixer_controls[0], |
957 | ARRAY_SIZE(rt5631_spkmixl_mixer_controls)), |
958 | /* Left Out Mixer */ |
959 | SND_SOC_DAPM_MIXER("OUTMIXL Mixer" , RT5631_PWR_MANAG_ADD2, |
960 | RT5631_PWR_OUTMIXER_L_BIT, 0, |
961 | &rt5631_outmixl_mixer_controls[0], |
962 | ARRAY_SIZE(rt5631_outmixl_mixer_controls)), |
963 | /* Right Out Mixer */ |
964 | SND_SOC_DAPM_MIXER("OUTMIXR Mixer" , RT5631_PWR_MANAG_ADD2, |
965 | RT5631_PWR_OUTMIXER_R_BIT, 0, |
966 | &rt5631_outmixr_mixer_controls[0], |
967 | ARRAY_SIZE(rt5631_outmixr_mixer_controls)), |
968 | /* Right SPK Mixer */ |
969 | SND_SOC_DAPM_MIXER("SPKMIXR Mixer" , RT5631_PWR_MANAG_ADD2, |
970 | RT5631_PWR_SPKMIXER_R_BIT, 0, |
971 | &rt5631_spkmixr_mixer_controls[0], |
972 | ARRAY_SIZE(rt5631_spkmixr_mixer_controls)), |
973 | |
974 | /* Volume Mux */ |
975 | SND_SOC_DAPM_MUX("Left SPKVOL Mux" , RT5631_PWR_MANAG_ADD4, |
976 | RT5631_PWR_SPK_L_VOL_BIT, 0, |
977 | &rt5631_spkvoll_mux_control), |
978 | SND_SOC_DAPM_MUX("Left HPVOL Mux" , RT5631_PWR_MANAG_ADD4, |
979 | RT5631_PWR_HP_L_OUT_VOL_BIT, 0, |
980 | &rt5631_hpvoll_mux_control), |
981 | SND_SOC_DAPM_MUX("Left OUTVOL Mux" , RT5631_PWR_MANAG_ADD4, |
982 | RT5631_PWR_LOUT_VOL_BIT, 0, |
983 | &rt5631_outvoll_mux_control), |
984 | SND_SOC_DAPM_MUX("Right OUTVOL Mux" , RT5631_PWR_MANAG_ADD4, |
985 | RT5631_PWR_ROUT_VOL_BIT, 0, |
986 | &rt5631_outvolr_mux_control), |
987 | SND_SOC_DAPM_MUX("Right HPVOL Mux" , RT5631_PWR_MANAG_ADD4, |
988 | RT5631_PWR_HP_R_OUT_VOL_BIT, 0, |
989 | &rt5631_hpvolr_mux_control), |
990 | SND_SOC_DAPM_MUX("Right SPKVOL Mux" , RT5631_PWR_MANAG_ADD4, |
991 | RT5631_PWR_SPK_R_VOL_BIT, 0, |
992 | &rt5631_spkvolr_mux_control), |
993 | |
994 | /* DAC To HP */ |
995 | SND_SOC_DAPM_PGA_S("Left DAC_HP" , 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
996 | SND_SOC_DAPM_PGA_S("Right DAC_HP" , 0, SND_SOC_NOPM, 0, 0, NULL, 0), |
997 | |
998 | /* HP Depop */ |
999 | SND_SOC_DAPM_PGA_S("HP Depop" , 1, SND_SOC_NOPM, 0, 0, |
1000 | hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
1001 | |
1002 | /* AXO1 Mixer */ |
1003 | SND_SOC_DAPM_MIXER("AXO1MIX Mixer" , RT5631_PWR_MANAG_ADD3, |
1004 | RT5631_PWR_AXO1MIXER_BIT, 0, |
1005 | &rt5631_AXO1MIX_mixer_controls[0], |
1006 | ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)), |
1007 | /* SPOL Mixer */ |
1008 | SND_SOC_DAPM_MIXER("SPOLMIX Mixer" , SND_SOC_NOPM, 0, 0, |
1009 | &rt5631_spolmix_mixer_controls[0], |
1010 | ARRAY_SIZE(rt5631_spolmix_mixer_controls)), |
1011 | /* MONO Mixer */ |
1012 | SND_SOC_DAPM_MIXER("MONOMIX Mixer" , RT5631_PWR_MANAG_ADD3, |
1013 | RT5631_PWR_MONOMIXER_BIT, 0, |
1014 | &rt5631_monomix_mixer_controls[0], |
1015 | ARRAY_SIZE(rt5631_monomix_mixer_controls)), |
1016 | /* SPOR Mixer */ |
1017 | SND_SOC_DAPM_MIXER("SPORMIX Mixer" , SND_SOC_NOPM, 0, 0, |
1018 | &rt5631_spormix_mixer_controls[0], |
1019 | ARRAY_SIZE(rt5631_spormix_mixer_controls)), |
1020 | /* AXO2 Mixer */ |
1021 | SND_SOC_DAPM_MIXER("AXO2MIX Mixer" , RT5631_PWR_MANAG_ADD3, |
1022 | RT5631_PWR_AXO2MIXER_BIT, 0, |
1023 | &rt5631_AXO2MIX_mixer_controls[0], |
1024 | ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)), |
1025 | |
1026 | /* Mux */ |
1027 | SND_SOC_DAPM_MUX("SPOL Mux" , SND_SOC_NOPM, 0, 0, |
1028 | &rt5631_spol_mux_control), |
1029 | SND_SOC_DAPM_MUX("SPOR Mux" , SND_SOC_NOPM, 0, 0, |
1030 | &rt5631_spor_mux_control), |
1031 | SND_SOC_DAPM_MUX("MONO Mux" , SND_SOC_NOPM, 0, 0, |
1032 | &rt5631_mono_mux_control), |
1033 | SND_SOC_DAPM_MUX("HPL Mux" , SND_SOC_NOPM, 0, 0, |
1034 | &rt5631_hpl_mux_control), |
1035 | SND_SOC_DAPM_MUX("HPR Mux" , SND_SOC_NOPM, 0, 0, |
1036 | &rt5631_hpr_mux_control), |
1037 | |
1038 | /* AMP supply */ |
1039 | SND_SOC_DAPM_SUPPLY("MONO Depop" , RT5631_PWR_MANAG_ADD3, |
1040 | RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0), |
1041 | SND_SOC_DAPM_SUPPLY("Class D" , RT5631_PWR_MANAG_ADD1, |
1042 | RT5631_PWR_CLASS_D_BIT, 0, NULL, 0), |
1043 | |
1044 | /* Output Lines */ |
1045 | SND_SOC_DAPM_OUTPUT("AUXO1" ), |
1046 | SND_SOC_DAPM_OUTPUT("AUXO2" ), |
1047 | SND_SOC_DAPM_OUTPUT("SPOL" ), |
1048 | SND_SOC_DAPM_OUTPUT("SPOR" ), |
1049 | SND_SOC_DAPM_OUTPUT("HPOL" ), |
1050 | SND_SOC_DAPM_OUTPUT("HPOR" ), |
1051 | SND_SOC_DAPM_OUTPUT("MONO" ), |
1052 | }; |
1053 | |
1054 | static const struct snd_soc_dapm_route rt5631_dapm_routes[] = { |
1055 | {"MIC1 Boost" , NULL, "MIC1" }, |
1056 | {"MIC2 Boost" , NULL, "MIC2" }, |
1057 | {"MONOIN_RXP Boost" , NULL, "MONOIN_RXP" }, |
1058 | {"MONOIN_RXN Boost" , NULL, "MONOIN_RXN" }, |
1059 | {"AXIL Boost" , NULL, "AXIL" }, |
1060 | {"AXIR Boost" , NULL, "AXIR" }, |
1061 | |
1062 | {"MONO_IN" , NULL, "MONOIN_RXP Boost" }, |
1063 | {"MONO_IN" , NULL, "MONOIN_RXN Boost" }, |
1064 | |
1065 | {"RECMIXL Mixer" , "OUTMIXL Capture Switch" , "OUTMIXL Mixer" }, |
1066 | {"RECMIXL Mixer" , "MIC1_BST1 Capture Switch" , "MIC1 Boost" }, |
1067 | {"RECMIXL Mixer" , "AXILVOL Capture Switch" , "AXIL Boost" }, |
1068 | {"RECMIXL Mixer" , "MONOIN_RX Capture Switch" , "MONO_IN" }, |
1069 | |
1070 | {"RECMIXR Mixer" , "OUTMIXR Capture Switch" , "OUTMIXR Mixer" }, |
1071 | {"RECMIXR Mixer" , "MIC2_BST2 Capture Switch" , "MIC2 Boost" }, |
1072 | {"RECMIXR Mixer" , "AXIRVOL Capture Switch" , "AXIR Boost" }, |
1073 | {"RECMIXR Mixer" , "MONOIN_RX Capture Switch" , "MONO_IN" }, |
1074 | |
1075 | {"ADC Mixer" , NULL, "RECMIXL Mixer" }, |
1076 | {"ADC Mixer" , NULL, "RECMIXR Mixer" }, |
1077 | |
1078 | {"Left ADC" , NULL, "ADC Mixer" }, |
1079 | {"Left ADC" , NULL, "Left ADC Select" , check_adcl_select}, |
1080 | {"Left ADC" , NULL, "PLL1" , check_sysclk1_source}, |
1081 | {"Left ADC" , NULL, "I2S" }, |
1082 | {"Left ADC" , NULL, "DAC REF" }, |
1083 | |
1084 | {"Right ADC" , NULL, "ADC Mixer" }, |
1085 | {"Right ADC" , NULL, "Right ADC Select" , check_adcr_select}, |
1086 | {"Right ADC" , NULL, "PLL1" , check_sysclk1_source}, |
1087 | {"Right ADC" , NULL, "I2S" }, |
1088 | {"Right ADC" , NULL, "DAC REF" }, |
1089 | |
1090 | {"DMIC" , NULL, "DMIC Supply" , check_dmic_used}, |
1091 | {"Left ADC" , NULL, "DMIC" }, |
1092 | {"Right ADC" , NULL, "DMIC" }, |
1093 | |
1094 | {"Left DAC" , NULL, "PLL1" , check_sysclk1_source}, |
1095 | {"Left DAC" , NULL, "I2S" }, |
1096 | {"Left DAC" , NULL, "DAC REF" }, |
1097 | {"Right DAC" , NULL, "PLL1" , check_sysclk1_source}, |
1098 | {"Right DAC" , NULL, "I2S" }, |
1099 | {"Right DAC" , NULL, "DAC REF" }, |
1100 | |
1101 | {"Voice DAC Boost" , NULL, "Voice DAC" }, |
1102 | |
1103 | {"SPKMIXL Mixer" , NULL, "Left DAC To Mixer" , check_dacl_to_spkmixl}, |
1104 | {"SPKMIXL Mixer" , "RECMIXL Playback Switch" , "RECMIXL Mixer" }, |
1105 | {"SPKMIXL Mixer" , "MIC1_P Playback Switch" , "MIC1" }, |
1106 | {"SPKMIXL Mixer" , "DACL Playback Switch" , "Left DAC" }, |
1107 | {"SPKMIXL Mixer" , "OUTMIXL Playback Switch" , "OUTMIXL Mixer" }, |
1108 | |
1109 | {"SPKMIXR Mixer" , NULL, "Right DAC To Mixer" , check_dacr_to_spkmixr}, |
1110 | {"SPKMIXR Mixer" , "OUTMIXR Playback Switch" , "OUTMIXR Mixer" }, |
1111 | {"SPKMIXR Mixer" , "DACR Playback Switch" , "Right DAC" }, |
1112 | {"SPKMIXR Mixer" , "MIC2_P Playback Switch" , "MIC2" }, |
1113 | {"SPKMIXR Mixer" , "RECMIXR Playback Switch" , "RECMIXR Mixer" }, |
1114 | |
1115 | {"OUTMIXL Mixer" , NULL, "Left DAC To Mixer" , check_dacl_to_outmixl}, |
1116 | {"OUTMIXL Mixer" , "RECMIXL Playback Switch" , "RECMIXL Mixer" }, |
1117 | {"OUTMIXL Mixer" , "RECMIXR Playback Switch" , "RECMIXR Mixer" }, |
1118 | {"OUTMIXL Mixer" , "DACL Playback Switch" , "Left DAC" }, |
1119 | {"OUTMIXL Mixer" , "MIC1_BST1 Playback Switch" , "MIC1 Boost" }, |
1120 | {"OUTMIXL Mixer" , "MIC2_BST2 Playback Switch" , "MIC2 Boost" }, |
1121 | {"OUTMIXL Mixer" , "MONOIN_RXP Playback Switch" , "MONOIN_RXP Boost" }, |
1122 | {"OUTMIXL Mixer" , "AXILVOL Playback Switch" , "AXIL Boost" }, |
1123 | {"OUTMIXL Mixer" , "AXIRVOL Playback Switch" , "AXIR Boost" }, |
1124 | {"OUTMIXL Mixer" , "VDAC Playback Switch" , "Voice DAC Boost" }, |
1125 | |
1126 | {"OUTMIXR Mixer" , NULL, "Right DAC To Mixer" , check_dacr_to_outmixr}, |
1127 | {"OUTMIXR Mixer" , "RECMIXL Playback Switch" , "RECMIXL Mixer" }, |
1128 | {"OUTMIXR Mixer" , "RECMIXR Playback Switch" , "RECMIXR Mixer" }, |
1129 | {"OUTMIXR Mixer" , "DACR Playback Switch" , "Right DAC" }, |
1130 | {"OUTMIXR Mixer" , "MIC1_BST1 Playback Switch" , "MIC1 Boost" }, |
1131 | {"OUTMIXR Mixer" , "MIC2_BST2 Playback Switch" , "MIC2 Boost" }, |
1132 | {"OUTMIXR Mixer" , "MONOIN_RXN Playback Switch" , "MONOIN_RXN Boost" }, |
1133 | {"OUTMIXR Mixer" , "AXILVOL Playback Switch" , "AXIL Boost" }, |
1134 | {"OUTMIXR Mixer" , "AXIRVOL Playback Switch" , "AXIR Boost" }, |
1135 | {"OUTMIXR Mixer" , "VDAC Playback Switch" , "Voice DAC Boost" }, |
1136 | |
1137 | {"Left SPKVOL Mux" , "SPKMIXL" , "SPKMIXL Mixer" }, |
1138 | {"Left SPKVOL Mux" , "Vmid" , "Vmid" }, |
1139 | {"Left HPVOL Mux" , "OUTMIXL" , "OUTMIXL Mixer" }, |
1140 | {"Left HPVOL Mux" , "Vmid" , "Vmid" }, |
1141 | {"Left OUTVOL Mux" , "OUTMIXL" , "OUTMIXL Mixer" }, |
1142 | {"Left OUTVOL Mux" , "Vmid" , "Vmid" }, |
1143 | {"Right OUTVOL Mux" , "OUTMIXR" , "OUTMIXR Mixer" }, |
1144 | {"Right OUTVOL Mux" , "Vmid" , "Vmid" }, |
1145 | {"Right HPVOL Mux" , "OUTMIXR" , "OUTMIXR Mixer" }, |
1146 | {"Right HPVOL Mux" , "Vmid" , "Vmid" }, |
1147 | {"Right SPKVOL Mux" , "SPKMIXR" , "SPKMIXR Mixer" }, |
1148 | {"Right SPKVOL Mux" , "Vmid" , "Vmid" }, |
1149 | |
1150 | {"AXO1MIX Mixer" , "MIC1_BST1 Playback Switch" , "MIC1 Boost" }, |
1151 | {"AXO1MIX Mixer" , "OUTVOLL Playback Switch" , "Left OUTVOL Mux" }, |
1152 | {"AXO1MIX Mixer" , "OUTVOLR Playback Switch" , "Right OUTVOL Mux" }, |
1153 | {"AXO1MIX Mixer" , "MIC2_BST2 Playback Switch" , "MIC2 Boost" }, |
1154 | |
1155 | {"AXO2MIX Mixer" , "MIC1_BST1 Playback Switch" , "MIC1 Boost" }, |
1156 | {"AXO2MIX Mixer" , "OUTVOLL Playback Switch" , "Left OUTVOL Mux" }, |
1157 | {"AXO2MIX Mixer" , "OUTVOLR Playback Switch" , "Right OUTVOL Mux" }, |
1158 | {"AXO2MIX Mixer" , "MIC2_BST2 Playback Switch" , "MIC2 Boost" }, |
1159 | |
1160 | {"SPOLMIX Mixer" , "SPKVOLL Playback Switch" , "Left SPKVOL Mux" }, |
1161 | {"SPOLMIX Mixer" , "SPKVOLR Playback Switch" , "Right SPKVOL Mux" }, |
1162 | |
1163 | {"SPORMIX Mixer" , "SPKVOLL Playback Switch" , "Left SPKVOL Mux" }, |
1164 | {"SPORMIX Mixer" , "SPKVOLR Playback Switch" , "Right SPKVOL Mux" }, |
1165 | |
1166 | {"MONOMIX Mixer" , "OUTVOLL Playback Switch" , "Left OUTVOL Mux" }, |
1167 | {"MONOMIX Mixer" , "OUTVOLR Playback Switch" , "Right OUTVOL Mux" }, |
1168 | |
1169 | {"SPOL Mux" , "SPOLMIX" , "SPOLMIX Mixer" }, |
1170 | {"SPOL Mux" , "MONOIN_RX" , "MONO_IN" }, |
1171 | {"SPOL Mux" , "VDAC" , "Voice DAC Boost" }, |
1172 | {"SPOL Mux" , "DACL" , "Left DAC" }, |
1173 | |
1174 | {"SPOR Mux" , "SPORMIX" , "SPORMIX Mixer" }, |
1175 | {"SPOR Mux" , "MONOIN_RX" , "MONO_IN" }, |
1176 | {"SPOR Mux" , "VDAC" , "Voice DAC Boost" }, |
1177 | {"SPOR Mux" , "DACR" , "Right DAC" }, |
1178 | |
1179 | {"MONO Mux" , "MONOMIX" , "MONOMIX Mixer" }, |
1180 | {"MONO Mux" , "MONOIN_RX" , "MONO_IN" }, |
1181 | {"MONO Mux" , "VDAC" , "Voice DAC Boost" }, |
1182 | |
1183 | {"Right DAC_HP" , NULL, "Right DAC" }, |
1184 | {"Left DAC_HP" , NULL, "Left DAC" }, |
1185 | |
1186 | {"HPL Mux" , "Left HPVOL" , "Left HPVOL Mux" }, |
1187 | {"HPL Mux" , "Left DAC" , "Left DAC_HP" }, |
1188 | {"HPR Mux" , "Right HPVOL" , "Right HPVOL Mux" }, |
1189 | {"HPR Mux" , "Right DAC" , "Right DAC_HP" }, |
1190 | |
1191 | {"HP Depop" , NULL, "HPL Mux" }, |
1192 | {"HP Depop" , NULL, "HPR Mux" }, |
1193 | |
1194 | {"AUXO1" , NULL, "AXO1MIX Mixer" }, |
1195 | {"AUXO2" , NULL, "AXO2MIX Mixer" }, |
1196 | |
1197 | {"SPOL" , NULL, "Class D" }, |
1198 | {"SPOL" , NULL, "SPOL Mux" }, |
1199 | {"SPOR" , NULL, "Class D" }, |
1200 | {"SPOR" , NULL, "SPOR Mux" }, |
1201 | |
1202 | {"HPOL" , NULL, "HP Depop" }, |
1203 | {"HPOR" , NULL, "HP Depop" }, |
1204 | |
1205 | {"MONO" , NULL, "MONO Depop" }, |
1206 | {"MONO" , NULL, "MONO Mux" }, |
1207 | }; |
1208 | |
1209 | struct coeff_clk_div { |
1210 | u32 mclk; |
1211 | u32 bclk; |
1212 | u32 rate; |
1213 | u16 reg_val; |
1214 | }; |
1215 | |
1216 | /* PLL divisors */ |
1217 | struct pll_div { |
1218 | u32 pll_in; |
1219 | u32 pll_out; |
1220 | u16 reg_val; |
1221 | }; |
1222 | |
1223 | static const struct pll_div codec_master_pll_div[] = { |
1224 | {2048000, 8192000, 0x0ea0}, |
1225 | {3686400, 8192000, 0x4e27}, |
1226 | {12000000, 8192000, 0x456b}, |
1227 | {13000000, 8192000, 0x495f}, |
1228 | {13100000, 8192000, 0x0320}, |
1229 | {2048000, 11289600, 0xf637}, |
1230 | {3686400, 11289600, 0x2f22}, |
1231 | {12000000, 11289600, 0x3e2f}, |
1232 | {13000000, 11289600, 0x4d5b}, |
1233 | {13100000, 11289600, 0x363b}, |
1234 | {2048000, 16384000, 0x1ea0}, |
1235 | {3686400, 16384000, 0x9e27}, |
1236 | {12000000, 16384000, 0x452b}, |
1237 | {13000000, 16384000, 0x542f}, |
1238 | {13100000, 16384000, 0x03a0}, |
1239 | {2048000, 16934400, 0xe625}, |
1240 | {3686400, 16934400, 0x9126}, |
1241 | {12000000, 16934400, 0x4d2c}, |
1242 | {13000000, 16934400, 0x742f}, |
1243 | {13100000, 16934400, 0x3c27}, |
1244 | {2048000, 22579200, 0x2aa0}, |
1245 | {3686400, 22579200, 0x2f20}, |
1246 | {12000000, 22579200, 0x7e2f}, |
1247 | {13000000, 22579200, 0x742f}, |
1248 | {13100000, 22579200, 0x3c27}, |
1249 | {2048000, 24576000, 0x2ea0}, |
1250 | {3686400, 24576000, 0xee27}, |
1251 | {12000000, 24576000, 0x2915}, |
1252 | {13000000, 24576000, 0x772e}, |
1253 | {13100000, 24576000, 0x0d20}, |
1254 | {26000000, 24576000, 0x2027}, |
1255 | {26000000, 22579200, 0x392f}, |
1256 | {24576000, 22579200, 0x0921}, |
1257 | {24576000, 24576000, 0x02a0}, |
1258 | }; |
1259 | |
1260 | static const struct pll_div codec_slave_pll_div[] = { |
1261 | {256000, 2048000, 0x46f0}, |
1262 | {256000, 4096000, 0x3ea0}, |
1263 | {352800, 5644800, 0x3ea0}, |
1264 | {512000, 8192000, 0x3ea0}, |
1265 | {1024000, 8192000, 0x46f0}, |
1266 | {705600, 11289600, 0x3ea0}, |
1267 | {1024000, 16384000, 0x3ea0}, |
1268 | {1411200, 22579200, 0x3ea0}, |
1269 | {1536000, 24576000, 0x3ea0}, |
1270 | {2048000, 16384000, 0x1ea0}, |
1271 | {2822400, 22579200, 0x1ea0}, |
1272 | {2822400, 45158400, 0x5ec0}, |
1273 | {5644800, 45158400, 0x46f0}, |
1274 | {3072000, 24576000, 0x1ea0}, |
1275 | {3072000, 49152000, 0x5ec0}, |
1276 | {6144000, 49152000, 0x46f0}, |
1277 | {705600, 11289600, 0x3ea0}, |
1278 | {705600, 8467200, 0x3ab0}, |
1279 | {24576000, 24576000, 0x02a0}, |
1280 | {1411200, 11289600, 0x1690}, |
1281 | {2822400, 11289600, 0x0a90}, |
1282 | {1536000, 12288000, 0x1690}, |
1283 | {3072000, 12288000, 0x0a90}, |
1284 | }; |
1285 | |
1286 | static const struct coeff_clk_div coeff_div[] = { |
1287 | /* sysclk is 256fs */ |
1288 | {2048000, 8000 * 32, 8000, 0x1000}, |
1289 | {2048000, 8000 * 64, 8000, 0x0000}, |
1290 | {2822400, 11025 * 32, 11025, 0x1000}, |
1291 | {2822400, 11025 * 64, 11025, 0x0000}, |
1292 | {4096000, 16000 * 32, 16000, 0x1000}, |
1293 | {4096000, 16000 * 64, 16000, 0x0000}, |
1294 | {5644800, 22050 * 32, 22050, 0x1000}, |
1295 | {5644800, 22050 * 64, 22050, 0x0000}, |
1296 | {8192000, 32000 * 32, 32000, 0x1000}, |
1297 | {8192000, 32000 * 64, 32000, 0x0000}, |
1298 | {11289600, 44100 * 32, 44100, 0x1000}, |
1299 | {11289600, 44100 * 64, 44100, 0x0000}, |
1300 | {12288000, 48000 * 32, 48000, 0x1000}, |
1301 | {12288000, 48000 * 64, 48000, 0x0000}, |
1302 | {22579200, 88200 * 32, 88200, 0x1000}, |
1303 | {22579200, 88200 * 64, 88200, 0x0000}, |
1304 | {24576000, 96000 * 32, 96000, 0x1000}, |
1305 | {24576000, 96000 * 64, 96000, 0x0000}, |
1306 | /* sysclk is 512fs */ |
1307 | {4096000, 8000 * 32, 8000, 0x3000}, |
1308 | {4096000, 8000 * 64, 8000, 0x2000}, |
1309 | {5644800, 11025 * 32, 11025, 0x3000}, |
1310 | {5644800, 11025 * 64, 11025, 0x2000}, |
1311 | {8192000, 16000 * 32, 16000, 0x3000}, |
1312 | {8192000, 16000 * 64, 16000, 0x2000}, |
1313 | {11289600, 22050 * 32, 22050, 0x3000}, |
1314 | {11289600, 22050 * 64, 22050, 0x2000}, |
1315 | {16384000, 32000 * 32, 32000, 0x3000}, |
1316 | {16384000, 32000 * 64, 32000, 0x2000}, |
1317 | {22579200, 44100 * 32, 44100, 0x3000}, |
1318 | {22579200, 44100 * 64, 44100, 0x2000}, |
1319 | {24576000, 48000 * 32, 48000, 0x3000}, |
1320 | {24576000, 48000 * 64, 48000, 0x2000}, |
1321 | {45158400, 88200 * 32, 88200, 0x3000}, |
1322 | {45158400, 88200 * 64, 88200, 0x2000}, |
1323 | {49152000, 96000 * 32, 96000, 0x3000}, |
1324 | {49152000, 96000 * 64, 96000, 0x2000}, |
1325 | /* sysclk is 24.576Mhz or 22.5792Mhz */ |
1326 | {24576000, 8000 * 32, 8000, 0x7080}, |
1327 | {24576000, 8000 * 64, 8000, 0x6080}, |
1328 | {24576000, 16000 * 32, 16000, 0x5080}, |
1329 | {24576000, 16000 * 64, 16000, 0x4080}, |
1330 | {24576000, 24000 * 32, 24000, 0x5000}, |
1331 | {24576000, 24000 * 64, 24000, 0x4000}, |
1332 | {24576000, 32000 * 32, 32000, 0x3080}, |
1333 | {24576000, 32000 * 64, 32000, 0x2080}, |
1334 | {22579200, 11025 * 32, 11025, 0x7000}, |
1335 | {22579200, 11025 * 64, 11025, 0x6000}, |
1336 | {22579200, 22050 * 32, 22050, 0x5000}, |
1337 | {22579200, 22050 * 64, 22050, 0x4000}, |
1338 | }; |
1339 | |
1340 | static int get_coeff(int mclk, int rate, int timesofbclk) |
1341 | { |
1342 | int i; |
1343 | |
1344 | for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { |
1345 | if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate && |
1346 | (coeff_div[i].bclk / coeff_div[i].rate) == timesofbclk) |
1347 | return i; |
1348 | } |
1349 | return -EINVAL; |
1350 | } |
1351 | |
1352 | static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream, |
1353 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
1354 | { |
1355 | struct snd_soc_component *component = dai->component; |
1356 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1357 | int timesofbclk = 32, coeff; |
1358 | unsigned int iface = 0; |
1359 | |
1360 | dev_dbg(component->dev, "enter %s\n" , __func__); |
1361 | |
1362 | rt5631->bclk_rate = snd_soc_params_to_bclk(parms: params); |
1363 | if (rt5631->bclk_rate < 0) { |
1364 | dev_err(component->dev, "Fail to get BCLK rate\n" ); |
1365 | return rt5631->bclk_rate; |
1366 | } |
1367 | rt5631->rx_rate = params_rate(p: params); |
1368 | |
1369 | if (rt5631->master) |
1370 | coeff = get_coeff(mclk: rt5631->sysclk, rate: rt5631->rx_rate, |
1371 | timesofbclk: rt5631->bclk_rate / rt5631->rx_rate); |
1372 | else |
1373 | coeff = get_coeff(mclk: rt5631->sysclk, rate: rt5631->rx_rate, |
1374 | timesofbclk); |
1375 | if (coeff < 0) { |
1376 | dev_err(component->dev, "Fail to get coeff\n" ); |
1377 | return coeff; |
1378 | } |
1379 | |
1380 | switch (params_width(p: params)) { |
1381 | case 16: |
1382 | break; |
1383 | case 20: |
1384 | iface |= RT5631_SDP_I2S_DL_20; |
1385 | break; |
1386 | case 24: |
1387 | iface |= RT5631_SDP_I2S_DL_24; |
1388 | break; |
1389 | case 8: |
1390 | iface |= RT5631_SDP_I2S_DL_8; |
1391 | break; |
1392 | default: |
1393 | return -EINVAL; |
1394 | } |
1395 | |
1396 | snd_soc_component_update_bits(component, RT5631_SDP_CTRL, |
1397 | RT5631_SDP_I2S_DL_MASK, val: iface); |
1398 | snd_soc_component_write(component, RT5631_STEREO_AD_DA_CLK_CTRL, |
1399 | val: coeff_div[coeff].reg_val); |
1400 | |
1401 | return 0; |
1402 | } |
1403 | |
1404 | static int rt5631_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, |
1405 | unsigned int fmt) |
1406 | { |
1407 | struct snd_soc_component *component = codec_dai->component; |
1408 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1409 | unsigned int iface = 0; |
1410 | |
1411 | dev_dbg(component->dev, "enter %s\n" , __func__); |
1412 | |
1413 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
1414 | case SND_SOC_DAIFMT_CBM_CFM: |
1415 | rt5631->master = 1; |
1416 | break; |
1417 | case SND_SOC_DAIFMT_CBS_CFS: |
1418 | iface |= RT5631_SDP_MODE_SEL_SLAVE; |
1419 | rt5631->master = 0; |
1420 | break; |
1421 | default: |
1422 | return -EINVAL; |
1423 | } |
1424 | |
1425 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
1426 | case SND_SOC_DAIFMT_I2S: |
1427 | break; |
1428 | case SND_SOC_DAIFMT_LEFT_J: |
1429 | iface |= RT5631_SDP_I2S_DF_LEFT; |
1430 | break; |
1431 | case SND_SOC_DAIFMT_DSP_A: |
1432 | iface |= RT5631_SDP_I2S_DF_PCM_A; |
1433 | break; |
1434 | case SND_SOC_DAIFMT_DSP_B: |
1435 | iface |= RT5631_SDP_I2S_DF_PCM_B; |
1436 | break; |
1437 | default: |
1438 | return -EINVAL; |
1439 | } |
1440 | |
1441 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
1442 | case SND_SOC_DAIFMT_NB_NF: |
1443 | break; |
1444 | case SND_SOC_DAIFMT_IB_NF: |
1445 | iface |= RT5631_SDP_I2S_BCLK_POL_CTRL; |
1446 | break; |
1447 | default: |
1448 | return -EINVAL; |
1449 | } |
1450 | |
1451 | snd_soc_component_write(component, RT5631_SDP_CTRL, val: iface); |
1452 | |
1453 | return 0; |
1454 | } |
1455 | |
1456 | static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
1457 | int clk_id, unsigned int freq, int dir) |
1458 | { |
1459 | struct snd_soc_component *component = codec_dai->component; |
1460 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1461 | |
1462 | dev_dbg(component->dev, "enter %s, syclk=%d\n" , __func__, freq); |
1463 | |
1464 | if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) { |
1465 | rt5631->sysclk = freq; |
1466 | return 0; |
1467 | } |
1468 | |
1469 | return -EINVAL; |
1470 | } |
1471 | |
1472 | static int rt5631_codec_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
1473 | int source, unsigned int freq_in, unsigned int freq_out) |
1474 | { |
1475 | struct snd_soc_component *component = codec_dai->component; |
1476 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1477 | int i, ret = -EINVAL; |
1478 | |
1479 | dev_dbg(component->dev, "enter %s\n" , __func__); |
1480 | |
1481 | if (!freq_in || !freq_out) { |
1482 | dev_dbg(component->dev, "PLL disabled\n" ); |
1483 | |
1484 | snd_soc_component_update_bits(component, RT5631_GLOBAL_CLK_CTRL, |
1485 | RT5631_SYSCLK_SOUR_SEL_MASK, |
1486 | RT5631_SYSCLK_SOUR_SEL_MCLK); |
1487 | |
1488 | return 0; |
1489 | } |
1490 | |
1491 | if (rt5631->master) { |
1492 | for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) |
1493 | if (freq_in == codec_master_pll_div[i].pll_in && |
1494 | freq_out == codec_master_pll_div[i].pll_out) { |
1495 | dev_info(component->dev, |
1496 | "change PLL in master mode\n" ); |
1497 | snd_soc_component_write(component, RT5631_PLL_CTRL, |
1498 | val: codec_master_pll_div[i].reg_val); |
1499 | schedule_timeout_uninterruptible( |
1500 | timeout: msecs_to_jiffies(m: 20)); |
1501 | snd_soc_component_update_bits(component, |
1502 | RT5631_GLOBAL_CLK_CTRL, |
1503 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1504 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1505 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1506 | RT5631_PLLCLK_SOUR_SEL_MCLK); |
1507 | ret = 0; |
1508 | break; |
1509 | } |
1510 | } else { |
1511 | for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) |
1512 | if (freq_in == codec_slave_pll_div[i].pll_in && |
1513 | freq_out == codec_slave_pll_div[i].pll_out) { |
1514 | dev_info(component->dev, |
1515 | "change PLL in slave mode\n" ); |
1516 | snd_soc_component_write(component, RT5631_PLL_CTRL, |
1517 | val: codec_slave_pll_div[i].reg_val); |
1518 | schedule_timeout_uninterruptible( |
1519 | timeout: msecs_to_jiffies(m: 20)); |
1520 | snd_soc_component_update_bits(component, |
1521 | RT5631_GLOBAL_CLK_CTRL, |
1522 | RT5631_SYSCLK_SOUR_SEL_MASK | |
1523 | RT5631_PLLCLK_SOUR_SEL_MASK, |
1524 | RT5631_SYSCLK_SOUR_SEL_PLL | |
1525 | RT5631_PLLCLK_SOUR_SEL_BCLK); |
1526 | ret = 0; |
1527 | break; |
1528 | } |
1529 | } |
1530 | |
1531 | return ret; |
1532 | } |
1533 | |
1534 | static int rt5631_set_bias_level(struct snd_soc_component *component, |
1535 | enum snd_soc_bias_level level) |
1536 | { |
1537 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1538 | |
1539 | switch (level) { |
1540 | case SND_SOC_BIAS_ON: |
1541 | case SND_SOC_BIAS_PREPARE: |
1542 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD2, |
1543 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL, |
1544 | RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL); |
1545 | break; |
1546 | |
1547 | case SND_SOC_BIAS_STANDBY: |
1548 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
1549 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
1550 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1551 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1552 | msleep(msecs: 80); |
1553 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
1554 | RT5631_PWR_FAST_VREF_CTRL, |
1555 | RT5631_PWR_FAST_VREF_CTRL); |
1556 | regcache_cache_only(map: rt5631->regmap, enable: false); |
1557 | regcache_sync(map: rt5631->regmap); |
1558 | } |
1559 | break; |
1560 | |
1561 | case SND_SOC_BIAS_OFF: |
1562 | snd_soc_component_write(component, RT5631_PWR_MANAG_ADD1, val: 0x0000); |
1563 | snd_soc_component_write(component, RT5631_PWR_MANAG_ADD2, val: 0x0000); |
1564 | snd_soc_component_write(component, RT5631_PWR_MANAG_ADD3, val: 0x0000); |
1565 | snd_soc_component_write(component, RT5631_PWR_MANAG_ADD4, val: 0x0000); |
1566 | break; |
1567 | |
1568 | default: |
1569 | break; |
1570 | } |
1571 | |
1572 | return 0; |
1573 | } |
1574 | |
1575 | static int rt5631_probe(struct snd_soc_component *component) |
1576 | { |
1577 | struct rt5631_priv *rt5631 = snd_soc_component_get_drvdata(c: component); |
1578 | unsigned int val; |
1579 | |
1580 | val = rt5631_read_index(component, RT5631_ADDA_MIXER_INTL_REG3); |
1581 | if (val & 0x0002) |
1582 | rt5631->codec_version = 1; |
1583 | else |
1584 | rt5631->codec_version = 0; |
1585 | |
1586 | rt5631_reset(component); |
1587 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
1588 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS, |
1589 | RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS); |
1590 | msleep(msecs: 80); |
1591 | snd_soc_component_update_bits(component, RT5631_PWR_MANAG_ADD3, |
1592 | RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL); |
1593 | /* enable HP zero cross */ |
1594 | snd_soc_component_write(component, RT5631_INT_ST_IRQ_CTRL_2, val: 0x0f18); |
1595 | /* power off ClassD auto Recovery */ |
1596 | if (rt5631->codec_version) |
1597 | snd_soc_component_update_bits(component, RT5631_INT_ST_IRQ_CTRL_2, |
1598 | mask: 0x2000, val: 0x2000); |
1599 | else |
1600 | snd_soc_component_update_bits(component, RT5631_INT_ST_IRQ_CTRL_2, |
1601 | mask: 0x2000, val: 0); |
1602 | /* DMIC */ |
1603 | if (rt5631->dmic_used_flag) { |
1604 | snd_soc_component_update_bits(component, RT5631_GPIO_CTRL, |
1605 | RT5631_GPIO_PIN_FUN_SEL_MASK | |
1606 | RT5631_GPIO_DMIC_FUN_SEL_MASK, |
1607 | RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC | |
1608 | RT5631_GPIO_DMIC_FUN_SEL_DIMC); |
1609 | snd_soc_component_update_bits(component, RT5631_DIG_MIC_CTRL, |
1610 | RT5631_DMIC_L_CH_LATCH_MASK | |
1611 | RT5631_DMIC_R_CH_LATCH_MASK, |
1612 | RT5631_DMIC_L_CH_LATCH_FALLING | |
1613 | RT5631_DMIC_R_CH_LATCH_RISING); |
1614 | } |
1615 | |
1616 | snd_soc_component_init_bias_level(component, level: SND_SOC_BIAS_STANDBY); |
1617 | |
1618 | return 0; |
1619 | } |
1620 | |
1621 | #define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000 |
1622 | #define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \ |
1623 | SNDRV_PCM_FMTBIT_S20_3LE | \ |
1624 | SNDRV_PCM_FMTBIT_S24_LE | \ |
1625 | SNDRV_PCM_FMTBIT_S8) |
1626 | |
1627 | static const struct snd_soc_dai_ops rt5631_ops = { |
1628 | .hw_params = rt5631_hifi_pcm_params, |
1629 | .set_fmt = rt5631_hifi_codec_set_dai_fmt, |
1630 | .set_sysclk = rt5631_hifi_codec_set_dai_sysclk, |
1631 | .set_pll = rt5631_codec_set_dai_pll, |
1632 | }; |
1633 | |
1634 | static struct snd_soc_dai_driver rt5631_dai[] = { |
1635 | { |
1636 | .name = "rt5631-hifi" , |
1637 | .id = 1, |
1638 | .playback = { |
1639 | .stream_name = "HIFI Playback" , |
1640 | .channels_min = 1, |
1641 | .channels_max = 2, |
1642 | .rates = RT5631_STEREO_RATES, |
1643 | .formats = RT5631_FORMAT, |
1644 | }, |
1645 | .capture = { |
1646 | .stream_name = "HIFI Capture" , |
1647 | .channels_min = 1, |
1648 | .channels_max = 2, |
1649 | .rates = RT5631_STEREO_RATES, |
1650 | .formats = RT5631_FORMAT, |
1651 | }, |
1652 | .ops = &rt5631_ops, |
1653 | }, |
1654 | }; |
1655 | |
1656 | static const struct snd_soc_component_driver soc_component_dev_rt5631 = { |
1657 | .probe = rt5631_probe, |
1658 | .set_bias_level = rt5631_set_bias_level, |
1659 | .controls = rt5631_snd_controls, |
1660 | .num_controls = ARRAY_SIZE(rt5631_snd_controls), |
1661 | .dapm_widgets = rt5631_dapm_widgets, |
1662 | .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets), |
1663 | .dapm_routes = rt5631_dapm_routes, |
1664 | .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes), |
1665 | .suspend_bias_off = 1, |
1666 | .idle_bias_on = 1, |
1667 | .use_pmdown_time = 1, |
1668 | .endianness = 1, |
1669 | }; |
1670 | |
1671 | static const struct i2c_device_id rt5631_i2c_id[] = { |
1672 | { "rt5631" , 0 }, |
1673 | { "alc5631" , 0 }, |
1674 | { } |
1675 | }; |
1676 | MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id); |
1677 | |
1678 | #ifdef CONFIG_OF |
1679 | static const struct of_device_id rt5631_i2c_dt_ids[] = { |
1680 | { .compatible = "realtek,rt5631" }, |
1681 | { .compatible = "realtek,alc5631" }, |
1682 | { } |
1683 | }; |
1684 | MODULE_DEVICE_TABLE(of, rt5631_i2c_dt_ids); |
1685 | #endif |
1686 | |
1687 | static const struct regmap_config rt5631_regmap_config = { |
1688 | .reg_bits = 8, |
1689 | .val_bits = 16, |
1690 | |
1691 | .readable_reg = rt5631_readable_register, |
1692 | .volatile_reg = rt5631_volatile_register, |
1693 | .max_register = RT5631_VENDOR_ID2, |
1694 | .reg_defaults = rt5631_reg, |
1695 | .num_reg_defaults = ARRAY_SIZE(rt5631_reg), |
1696 | .cache_type = REGCACHE_MAPLE, |
1697 | .use_single_read = true, |
1698 | .use_single_write = true, |
1699 | }; |
1700 | |
1701 | static int rt5631_i2c_probe(struct i2c_client *i2c) |
1702 | { |
1703 | struct rt5631_priv *rt5631; |
1704 | int ret; |
1705 | |
1706 | rt5631 = devm_kzalloc(dev: &i2c->dev, size: sizeof(struct rt5631_priv), |
1707 | GFP_KERNEL); |
1708 | if (NULL == rt5631) |
1709 | return -ENOMEM; |
1710 | |
1711 | i2c_set_clientdata(client: i2c, data: rt5631); |
1712 | |
1713 | rt5631->regmap = devm_regmap_init_i2c(i2c, &rt5631_regmap_config); |
1714 | if (IS_ERR(ptr: rt5631->regmap)) |
1715 | return PTR_ERR(ptr: rt5631->regmap); |
1716 | |
1717 | ret = devm_snd_soc_register_component(dev: &i2c->dev, |
1718 | component_driver: &soc_component_dev_rt5631, |
1719 | dai_drv: rt5631_dai, ARRAY_SIZE(rt5631_dai)); |
1720 | return ret; |
1721 | } |
1722 | |
1723 | static void rt5631_i2c_remove(struct i2c_client *client) |
1724 | {} |
1725 | |
1726 | static struct i2c_driver rt5631_i2c_driver = { |
1727 | .driver = { |
1728 | .name = "rt5631" , |
1729 | .of_match_table = of_match_ptr(rt5631_i2c_dt_ids), |
1730 | }, |
1731 | .probe = rt5631_i2c_probe, |
1732 | .remove = rt5631_i2c_remove, |
1733 | .id_table = rt5631_i2c_id, |
1734 | }; |
1735 | |
1736 | module_i2c_driver(rt5631_i2c_driver); |
1737 | |
1738 | MODULE_DESCRIPTION("ASoC RT5631 driver" ); |
1739 | MODULE_AUTHOR("flove <flove@realtek.com>" ); |
1740 | MODULE_LICENSE("GPL" ); |
1741 | |