1 | /* Dwarf2 Call Frame Information helper routines. |
2 | Copyright (C) 1992-2024 Free Software Foundation, Inc. |
3 | |
4 | This file is part of GCC. |
5 | |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free |
8 | Software Foundation; either version 3, or (at your option) any later |
9 | version. |
10 | |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. |
15 | |
16 | You should have received a copy of the GNU General Public License |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ |
19 | |
20 | #include "config.h" |
21 | #include "system.h" |
22 | #include "coretypes.h" |
23 | #include "target.h" |
24 | #include "function.h" |
25 | #include "rtl.h" |
26 | #include "tree.h" |
27 | #include "tree-pass.h" |
28 | #include "memmodel.h" |
29 | #include "tm_p.h" |
30 | #include "emit-rtl.h" |
31 | #include "stor-layout.h" |
32 | #include "cfgbuild.h" |
33 | #include "dwarf2out.h" |
34 | #include "dwarf2asm.h" |
35 | #include "common/common-target.h" |
36 | |
37 | #include "except.h" /* expand_builtin_dwarf_sp_column */ |
38 | #include "profile-count.h" /* For expr.h */ |
39 | #include "expr.h" /* init_return_column_size */ |
40 | #include "output.h" /* asm_out_file */ |
41 | #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */ |
42 | #include "flags.h" /* dwarf_debuginfo_p */ |
43 | |
44 | /* ??? Poison these here until it can be done generically. They've been |
45 | totally replaced in this file; make sure it stays that way. */ |
46 | #undef DWARF2_UNWIND_INFO |
47 | #undef DWARF2_FRAME_INFO |
48 | #if (GCC_VERSION >= 3000) |
49 | #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO |
50 | #endif |
51 | |
52 | #ifndef INCOMING_RETURN_ADDR_RTX |
53 | #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX) |
54 | #endif |
55 | |
56 | #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET |
57 | #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET |
58 | #endif |
59 | |
60 | /* A collected description of an entire row of the abstract CFI table. */ |
61 | struct GTY(()) dw_cfi_row |
62 | { |
63 | /* The expression that computes the CFA, expressed in two different ways. |
64 | The CFA member for the simple cases, and the full CFI expression for |
65 | the complex cases. The later will be a DW_CFA_cfa_expression. */ |
66 | dw_cfa_location cfa; |
67 | dw_cfi_ref cfa_cfi; |
68 | |
69 | /* The expressions for any register column that is saved. */ |
70 | cfi_vec reg_save; |
71 | |
72 | /* True if the register window is saved. */ |
73 | bool window_save; |
74 | |
75 | /* True if the return address is in a mangled state. */ |
76 | bool ra_mangled; |
77 | }; |
78 | |
79 | /* The caller's ORIG_REG is saved in SAVED_IN_REG. */ |
80 | struct GTY(()) reg_saved_in_data { |
81 | rtx orig_reg; |
82 | rtx saved_in_reg; |
83 | }; |
84 | |
85 | |
86 | /* Since we no longer have a proper CFG, we're going to create a facsimile |
87 | of one on the fly while processing the frame-related insns. |
88 | |
89 | We create dw_trace_info structures for each extended basic block beginning |
90 | and ending at a "save point". Save points are labels, barriers, certain |
91 | notes, and of course the beginning and end of the function. |
92 | |
93 | As we encounter control transfer insns, we propagate the "current" |
94 | row state across the edges to the starts of traces. When checking is |
95 | enabled, we validate that we propagate the same data from all sources. |
96 | |
97 | All traces are members of the TRACE_INFO array, in the order in which |
98 | they appear in the instruction stream. |
99 | |
100 | All save points are present in the TRACE_INDEX hash, mapping the insn |
101 | starting a trace to the dw_trace_info describing the trace. */ |
102 | |
103 | struct dw_trace_info |
104 | { |
105 | /* The insn that begins the trace. */ |
106 | rtx_insn *head; |
107 | |
108 | /* The row state at the beginning and end of the trace. */ |
109 | dw_cfi_row *beg_row, *end_row; |
110 | |
111 | /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find |
112 | while scanning insns. However, the args_size value is irrelevant at |
113 | any point except can_throw_internal_p insns. Therefore the "delay" |
114 | sizes the values that must actually be emitted for this trace. */ |
115 | poly_int64 beg_true_args_size, end_true_args_size; |
116 | poly_int64 beg_delay_args_size, end_delay_args_size; |
117 | |
118 | /* The first EH insn in the trace, where beg_delay_args_size must be set. */ |
119 | rtx_insn *eh_head; |
120 | |
121 | /* The following variables contain data used in interpreting frame related |
122 | expressions. These are not part of the "real" row state as defined by |
123 | Dwarf, but it seems like they need to be propagated into a trace in case |
124 | frame related expressions have been sunk. */ |
125 | /* ??? This seems fragile. These variables are fragments of a larger |
126 | expression. If we do not keep the entire expression together, we risk |
127 | not being able to put it together properly. Consider forcing targets |
128 | to generate self-contained expressions and dropping all of the magic |
129 | interpretation code in this file. Or at least refusing to shrink wrap |
130 | any frame related insn that doesn't contain a complete expression. */ |
131 | |
132 | /* The register used for saving registers to the stack, and its offset |
133 | from the CFA. */ |
134 | dw_cfa_location cfa_store; |
135 | |
136 | /* A temporary register holding an integral value used in adjusting SP |
137 | or setting up the store_reg. The "offset" field holds the integer |
138 | value, not an offset. */ |
139 | dw_cfa_location cfa_temp; |
140 | |
141 | /* A set of registers saved in other registers. This is the inverse of |
142 | the row->reg_save info, if the entry is a DW_CFA_register. This is |
143 | implemented as a flat array because it normally contains zero or 1 |
144 | entry, depending on the target. IA-64 is the big spender here, using |
145 | a maximum of 5 entries. */ |
146 | vec<reg_saved_in_data> regs_saved_in_regs; |
147 | |
148 | /* An identifier for this trace. Used only for debugging dumps. */ |
149 | unsigned id; |
150 | |
151 | /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */ |
152 | bool switch_sections; |
153 | |
154 | /* True if we've seen different values incoming to beg_true_args_size. */ |
155 | bool args_size_undefined; |
156 | |
157 | /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */ |
158 | bool args_size_defined_for_eh; |
159 | }; |
160 | |
161 | |
162 | /* Hashtable helpers. */ |
163 | |
164 | struct trace_info_hasher : nofree_ptr_hash <dw_trace_info> |
165 | { |
166 | static inline hashval_t hash (const dw_trace_info *); |
167 | static inline bool equal (const dw_trace_info *, const dw_trace_info *); |
168 | }; |
169 | |
170 | inline hashval_t |
171 | trace_info_hasher::hash (const dw_trace_info *ti) |
172 | { |
173 | return INSN_UID (insn: ti->head); |
174 | } |
175 | |
176 | inline bool |
177 | trace_info_hasher::equal (const dw_trace_info *a, const dw_trace_info *b) |
178 | { |
179 | return a->head == b->head; |
180 | } |
181 | |
182 | |
183 | /* The variables making up the pseudo-cfg, as described above. */ |
184 | static vec<dw_trace_info> trace_info; |
185 | static vec<dw_trace_info *> trace_work_list; |
186 | static hash_table<trace_info_hasher> *trace_index; |
187 | |
188 | /* A vector of call frame insns for the CIE. */ |
189 | cfi_vec cie_cfi_vec; |
190 | |
191 | /* The state of the first row of the FDE table, which includes the |
192 | state provided by the CIE. */ |
193 | static GTY(()) dw_cfi_row *cie_cfi_row; |
194 | |
195 | static GTY(()) reg_saved_in_data *cie_return_save; |
196 | |
197 | static GTY(()) unsigned long dwarf2out_cfi_label_num; |
198 | |
199 | /* The insn after which a new CFI note should be emitted. */ |
200 | static rtx_insn *add_cfi_insn; |
201 | |
202 | /* When non-null, add_cfi will add the CFI to this vector. */ |
203 | static cfi_vec *add_cfi_vec; |
204 | |
205 | /* The current instruction trace. */ |
206 | static dw_trace_info *cur_trace; |
207 | |
208 | /* The current, i.e. most recently generated, row of the CFI table. */ |
209 | static dw_cfi_row *cur_row; |
210 | |
211 | /* A copy of the current CFA, for use during the processing of a |
212 | single insn. */ |
213 | static dw_cfa_location *cur_cfa; |
214 | |
215 | /* We delay emitting a register save until either (a) we reach the end |
216 | of the prologue or (b) the register is clobbered. This clusters |
217 | register saves so that there are fewer pc advances. */ |
218 | |
219 | struct queued_reg_save { |
220 | rtx reg; |
221 | rtx saved_reg; |
222 | poly_int64 cfa_offset; |
223 | }; |
224 | |
225 | |
226 | static vec<queued_reg_save> queued_reg_saves; |
227 | |
228 | /* True if any CFI directives were emitted at the current insn. */ |
229 | static bool any_cfis_emitted; |
230 | |
231 | /* Short-hand for commonly used register numbers. */ |
232 | static struct cfa_reg dw_stack_pointer_regnum; |
233 | static struct cfa_reg dw_frame_pointer_regnum; |
234 | |
235 | /* Hook used by __throw. */ |
236 | |
237 | rtx |
238 | expand_builtin_dwarf_sp_column (void) |
239 | { |
240 | unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM); |
241 | return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1)); |
242 | } |
243 | |
244 | /* MEM is a memory reference for the register size table, each element of |
245 | which has mode MODE. Initialize column C as a return address column. */ |
246 | |
247 | static void |
248 | init_return_column_size (scalar_int_mode mode, rtx mem, unsigned int c) |
249 | { |
250 | HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode); |
251 | HOST_WIDE_INT size = GET_MODE_SIZE (Pmode); |
252 | emit_move_insn (adjust_address (mem, mode, offset), |
253 | gen_int_mode (size, mode)); |
254 | } |
255 | |
256 | /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and |
257 | init_one_dwarf_reg_size to communicate on what has been done by the |
258 | latter. */ |
259 | |
260 | struct init_one_dwarf_reg_state |
261 | { |
262 | /* Whether the dwarf return column was initialized. */ |
263 | bool wrote_return_column; |
264 | |
265 | /* For each hard register REGNO, whether init_one_dwarf_reg_size |
266 | was given REGNO to process already. */ |
267 | bool processed_regno [FIRST_PSEUDO_REGISTER]; |
268 | |
269 | }; |
270 | |
271 | /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to |
272 | initialize the dwarf register size table entry corresponding to register |
273 | REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to |
274 | use for the size entry to initialize, and INIT_STATE is the communication |
275 | datastructure conveying what we're doing to our caller. */ |
276 | |
277 | static |
278 | void init_one_dwarf_reg_size (int regno, machine_mode regmode, |
279 | rtx table, machine_mode slotmode, |
280 | init_one_dwarf_reg_state *init_state) |
281 | { |
282 | const unsigned int dnum = DWARF_FRAME_REGNUM (regno); |
283 | const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1); |
284 | const unsigned int dcol = DWARF_REG_TO_UNWIND_COLUMN (rnum); |
285 | |
286 | poly_int64 slotoffset = dcol * GET_MODE_SIZE (mode: slotmode); |
287 | poly_int64 regsize = GET_MODE_SIZE (mode: regmode); |
288 | |
289 | init_state->processed_regno[regno] = true; |
290 | |
291 | if (rnum >= DWARF_FRAME_REGISTERS) |
292 | return; |
293 | |
294 | if (dnum == DWARF_FRAME_RETURN_COLUMN) |
295 | { |
296 | if (regmode == VOIDmode) |
297 | return; |
298 | init_state->wrote_return_column = true; |
299 | } |
300 | |
301 | /* ??? When is this true? Should it be a test based on DCOL instead? */ |
302 | if (maybe_lt (a: slotoffset, b: 0)) |
303 | return; |
304 | |
305 | emit_move_insn (adjust_address (table, slotmode, slotoffset), |
306 | gen_int_mode (regsize, slotmode)); |
307 | } |
308 | |
309 | /* Generate code to initialize the dwarf register size table located |
310 | at the provided ADDRESS. */ |
311 | |
312 | void |
313 | expand_builtin_init_dwarf_reg_sizes (tree address) |
314 | { |
315 | unsigned int i; |
316 | scalar_int_mode mode = SCALAR_INT_TYPE_MODE (char_type_node); |
317 | rtx addr = expand_normal (exp: address); |
318 | rtx mem = gen_rtx_MEM (BLKmode, addr); |
319 | |
320 | init_one_dwarf_reg_state init_state; |
321 | |
322 | memset (s: (char *)&init_state, c: 0, n: sizeof (init_state)); |
323 | |
324 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
325 | { |
326 | machine_mode save_mode; |
327 | rtx span; |
328 | |
329 | /* No point in processing a register multiple times. This could happen |
330 | with register spans, e.g. when a reg is first processed as a piece of |
331 | a span, then as a register on its own later on. */ |
332 | |
333 | if (init_state.processed_regno[i]) |
334 | continue; |
335 | |
336 | save_mode = targetm.dwarf_frame_reg_mode (i); |
337 | span = targetm.dwarf_register_span (gen_rtx_REG (save_mode, i)); |
338 | |
339 | if (!span) |
340 | init_one_dwarf_reg_size (regno: i, regmode: save_mode, table: mem, slotmode: mode, init_state: &init_state); |
341 | else |
342 | { |
343 | for (int si = 0; si < XVECLEN (span, 0); si++) |
344 | { |
345 | rtx reg = XVECEXP (span, 0, si); |
346 | |
347 | init_one_dwarf_reg_size |
348 | (REGNO (reg), GET_MODE (reg), table: mem, slotmode: mode, init_state: &init_state); |
349 | } |
350 | } |
351 | } |
352 | |
353 | if (!init_state.wrote_return_column) |
354 | init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN); |
355 | |
356 | #ifdef DWARF_ALT_FRAME_RETURN_COLUMN |
357 | init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN); |
358 | #endif |
359 | |
360 | targetm.init_dwarf_reg_sizes_extra (address); |
361 | } |
362 | |
363 | |
364 | static dw_trace_info * |
365 | get_trace_info (rtx_insn *insn) |
366 | { |
367 | dw_trace_info dummy; |
368 | dummy.head = insn; |
369 | return trace_index->find_with_hash (comparable: &dummy, hash: INSN_UID (insn)); |
370 | } |
371 | |
372 | static bool |
373 | save_point_p (rtx_insn *insn) |
374 | { |
375 | /* Labels, except those that are really jump tables. */ |
376 | if (LABEL_P (insn)) |
377 | return inside_basic_block_p (insn); |
378 | |
379 | /* We split traces at the prologue/epilogue notes because those |
380 | are points at which the unwind info is usually stable. This |
381 | makes it easier to find spots with identical unwind info so |
382 | that we can use remember/restore_state opcodes. */ |
383 | if (NOTE_P (insn)) |
384 | switch (NOTE_KIND (insn)) |
385 | { |
386 | case NOTE_INSN_PROLOGUE_END: |
387 | case NOTE_INSN_EPILOGUE_BEG: |
388 | return true; |
389 | } |
390 | |
391 | return false; |
392 | } |
393 | |
394 | /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */ |
395 | |
396 | static inline HOST_WIDE_INT |
397 | div_data_align (HOST_WIDE_INT off) |
398 | { |
399 | HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT; |
400 | gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off); |
401 | return r; |
402 | } |
403 | |
404 | /* Return true if we need a signed version of a given opcode |
405 | (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */ |
406 | |
407 | static inline bool |
408 | need_data_align_sf_opcode (HOST_WIDE_INT off) |
409 | { |
410 | return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0; |
411 | } |
412 | |
413 | /* Return a pointer to a newly allocated Call Frame Instruction. */ |
414 | |
415 | static inline dw_cfi_ref |
416 | new_cfi (void) |
417 | { |
418 | dw_cfi_ref cfi = ggc_alloc<dw_cfi_node> (); |
419 | |
420 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0; |
421 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0; |
422 | |
423 | return cfi; |
424 | } |
425 | |
426 | /* Return a newly allocated CFI row, with no defined data. */ |
427 | |
428 | static dw_cfi_row * |
429 | new_cfi_row (void) |
430 | { |
431 | dw_cfi_row *row = ggc_cleared_alloc<dw_cfi_row> (); |
432 | |
433 | row->cfa.reg.set_by_dwreg (INVALID_REGNUM); |
434 | |
435 | return row; |
436 | } |
437 | |
438 | /* Return a copy of an existing CFI row. */ |
439 | |
440 | static dw_cfi_row * |
441 | copy_cfi_row (dw_cfi_row *src) |
442 | { |
443 | dw_cfi_row *dst = ggc_alloc<dw_cfi_row> (); |
444 | |
445 | *dst = *src; |
446 | dst->reg_save = vec_safe_copy (src: src->reg_save); |
447 | |
448 | return dst; |
449 | } |
450 | |
451 | /* Return a copy of an existing CFA location. */ |
452 | |
453 | static dw_cfa_location * |
454 | copy_cfa (dw_cfa_location *src) |
455 | { |
456 | dw_cfa_location *dst = ggc_alloc<dw_cfa_location> (); |
457 | *dst = *src; |
458 | return dst; |
459 | } |
460 | |
461 | /* Generate a new label for the CFI info to refer to. */ |
462 | |
463 | static char * |
464 | dwarf2out_cfi_label (void) |
465 | { |
466 | int num = dwarf2out_cfi_label_num++; |
467 | char label[20]; |
468 | |
469 | ASM_GENERATE_INTERNAL_LABEL (label, "LCFI" , num); |
470 | |
471 | return xstrdup (label); |
472 | } |
473 | |
474 | /* Add CFI either to the current insn stream or to a vector, or both. */ |
475 | |
476 | static void |
477 | add_cfi (dw_cfi_ref cfi) |
478 | { |
479 | any_cfis_emitted = true; |
480 | |
481 | if (add_cfi_insn != NULL) |
482 | { |
483 | add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn); |
484 | NOTE_CFI (add_cfi_insn) = cfi; |
485 | } |
486 | |
487 | if (add_cfi_vec != NULL) |
488 | vec_safe_push (v&: *add_cfi_vec, obj: cfi); |
489 | } |
490 | |
491 | static void |
492 | add_cfi_args_size (poly_int64 size) |
493 | { |
494 | /* We don't yet have a representation for polynomial sizes. */ |
495 | HOST_WIDE_INT const_size = size.to_constant (); |
496 | |
497 | dw_cfi_ref cfi = new_cfi (); |
498 | |
499 | /* While we can occasionally have args_size < 0 internally, this state |
500 | should not persist at a point we actually need an opcode. */ |
501 | gcc_assert (const_size >= 0); |
502 | |
503 | cfi->dw_cfi_opc = DW_CFA_GNU_args_size; |
504 | cfi->dw_cfi_oprnd1.dw_cfi_offset = const_size; |
505 | |
506 | add_cfi (cfi); |
507 | } |
508 | |
509 | static void |
510 | add_cfi_restore (unsigned reg) |
511 | { |
512 | dw_cfi_ref cfi = new_cfi (); |
513 | |
514 | cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore); |
515 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; |
516 | |
517 | add_cfi (cfi); |
518 | } |
519 | |
520 | /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating |
521 | that the register column is no longer saved. */ |
522 | |
523 | static void |
524 | update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi) |
525 | { |
526 | if (vec_safe_length (v: row->reg_save) <= column) |
527 | vec_safe_grow_cleared (v&: row->reg_save, len: column + 1, exact: true); |
528 | (*row->reg_save)[column] = cfi; |
529 | } |
530 | |
531 | /* This function fills in aa dw_cfa_location structure from a dwarf location |
532 | descriptor sequence. */ |
533 | |
534 | static void |
535 | get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_node *loc) |
536 | { |
537 | struct dw_loc_descr_node *ptr; |
538 | cfa->offset = 0; |
539 | cfa->base_offset = 0; |
540 | cfa->indirect = 0; |
541 | cfa->reg.set_by_dwreg (INVALID_REGNUM); |
542 | |
543 | for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next) |
544 | { |
545 | enum dwarf_location_atom op = ptr->dw_loc_opc; |
546 | |
547 | switch (op) |
548 | { |
549 | case DW_OP_reg0: |
550 | case DW_OP_reg1: |
551 | case DW_OP_reg2: |
552 | case DW_OP_reg3: |
553 | case DW_OP_reg4: |
554 | case DW_OP_reg5: |
555 | case DW_OP_reg6: |
556 | case DW_OP_reg7: |
557 | case DW_OP_reg8: |
558 | case DW_OP_reg9: |
559 | case DW_OP_reg10: |
560 | case DW_OP_reg11: |
561 | case DW_OP_reg12: |
562 | case DW_OP_reg13: |
563 | case DW_OP_reg14: |
564 | case DW_OP_reg15: |
565 | case DW_OP_reg16: |
566 | case DW_OP_reg17: |
567 | case DW_OP_reg18: |
568 | case DW_OP_reg19: |
569 | case DW_OP_reg20: |
570 | case DW_OP_reg21: |
571 | case DW_OP_reg22: |
572 | case DW_OP_reg23: |
573 | case DW_OP_reg24: |
574 | case DW_OP_reg25: |
575 | case DW_OP_reg26: |
576 | case DW_OP_reg27: |
577 | case DW_OP_reg28: |
578 | case DW_OP_reg29: |
579 | case DW_OP_reg30: |
580 | case DW_OP_reg31: |
581 | cfa->reg.set_by_dwreg (op - DW_OP_reg0); |
582 | break; |
583 | case DW_OP_regx: |
584 | cfa->reg.set_by_dwreg (ptr->dw_loc_oprnd1.v.val_int); |
585 | break; |
586 | case DW_OP_breg0: |
587 | case DW_OP_breg1: |
588 | case DW_OP_breg2: |
589 | case DW_OP_breg3: |
590 | case DW_OP_breg4: |
591 | case DW_OP_breg5: |
592 | case DW_OP_breg6: |
593 | case DW_OP_breg7: |
594 | case DW_OP_breg8: |
595 | case DW_OP_breg9: |
596 | case DW_OP_breg10: |
597 | case DW_OP_breg11: |
598 | case DW_OP_breg12: |
599 | case DW_OP_breg13: |
600 | case DW_OP_breg14: |
601 | case DW_OP_breg15: |
602 | case DW_OP_breg16: |
603 | case DW_OP_breg17: |
604 | case DW_OP_breg18: |
605 | case DW_OP_breg19: |
606 | case DW_OP_breg20: |
607 | case DW_OP_breg21: |
608 | case DW_OP_breg22: |
609 | case DW_OP_breg23: |
610 | case DW_OP_breg24: |
611 | case DW_OP_breg25: |
612 | case DW_OP_breg26: |
613 | case DW_OP_breg27: |
614 | case DW_OP_breg28: |
615 | case DW_OP_breg29: |
616 | case DW_OP_breg30: |
617 | case DW_OP_breg31: |
618 | case DW_OP_bregx: |
619 | if (cfa->reg.reg == INVALID_REGNUM) |
620 | { |
621 | unsigned regno |
622 | = (op == DW_OP_bregx |
623 | ? ptr->dw_loc_oprnd1.v.val_int : op - DW_OP_breg0); |
624 | cfa->reg.set_by_dwreg (regno); |
625 | cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int; |
626 | } |
627 | else |
628 | { |
629 | /* Handle case when span can cover multiple registers. We |
630 | only support the simple case of consecutive registers |
631 | all with the same size. DWARF that we are dealing with |
632 | will look something like: |
633 | <DW_OP_bregx: (r49) 0; DW_OP_const1u: 32; DW_OP_shl; |
634 | DW_OP_bregx: (r48) 0; DW_OP_plus> */ |
635 | |
636 | unsigned regno |
637 | = (op == DW_OP_bregx |
638 | ? ptr->dw_loc_oprnd1.v.val_int : op - DW_OP_breg0); |
639 | gcc_assert (regno == cfa->reg.reg - 1); |
640 | cfa->reg.span++; |
641 | /* From all the consecutive registers used, we want to set |
642 | cfa->reg.reg to lower number register. */ |
643 | cfa->reg.reg = regno; |
644 | /* The offset was the shift value. Use it to get the |
645 | span_width and then set it to 0. */ |
646 | cfa->reg.span_width = cfa->offset.to_constant () / 8; |
647 | cfa->offset = 0; |
648 | } |
649 | break; |
650 | case DW_OP_deref: |
651 | cfa->indirect = 1; |
652 | break; |
653 | case DW_OP_shl: |
654 | break; |
655 | case DW_OP_lit0: |
656 | case DW_OP_lit1: |
657 | case DW_OP_lit2: |
658 | case DW_OP_lit3: |
659 | case DW_OP_lit4: |
660 | case DW_OP_lit5: |
661 | case DW_OP_lit6: |
662 | case DW_OP_lit7: |
663 | case DW_OP_lit8: |
664 | case DW_OP_lit9: |
665 | case DW_OP_lit10: |
666 | case DW_OP_lit11: |
667 | case DW_OP_lit12: |
668 | case DW_OP_lit13: |
669 | case DW_OP_lit14: |
670 | case DW_OP_lit15: |
671 | case DW_OP_lit16: |
672 | case DW_OP_lit17: |
673 | case DW_OP_lit18: |
674 | case DW_OP_lit19: |
675 | case DW_OP_lit20: |
676 | case DW_OP_lit21: |
677 | case DW_OP_lit22: |
678 | case DW_OP_lit23: |
679 | case DW_OP_lit24: |
680 | case DW_OP_lit25: |
681 | case DW_OP_lit26: |
682 | case DW_OP_lit27: |
683 | case DW_OP_lit28: |
684 | case DW_OP_lit29: |
685 | case DW_OP_lit30: |
686 | case DW_OP_lit31: |
687 | gcc_assert (known_eq (cfa->offset, 0)); |
688 | cfa->offset = op - DW_OP_lit0; |
689 | break; |
690 | case DW_OP_const1u: |
691 | case DW_OP_const1s: |
692 | case DW_OP_const2u: |
693 | case DW_OP_const2s: |
694 | case DW_OP_const4s: |
695 | case DW_OP_const8s: |
696 | case DW_OP_constu: |
697 | case DW_OP_consts: |
698 | gcc_assert (known_eq (cfa->offset, 0)); |
699 | cfa->offset = ptr->dw_loc_oprnd1.v.val_int; |
700 | break; |
701 | case DW_OP_minus: |
702 | cfa->offset = -cfa->offset; |
703 | break; |
704 | case DW_OP_plus: |
705 | /* The offset is already in place. */ |
706 | break; |
707 | case DW_OP_plus_uconst: |
708 | cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned; |
709 | break; |
710 | default: |
711 | gcc_unreachable (); |
712 | } |
713 | } |
714 | } |
715 | |
716 | /* Find the previous value for the CFA, iteratively. CFI is the opcode |
717 | to interpret, *LOC will be updated as necessary, *REMEMBER is used for |
718 | one level of remember/restore state processing. */ |
719 | |
720 | void |
721 | lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember) |
722 | { |
723 | switch (cfi->dw_cfi_opc) |
724 | { |
725 | case DW_CFA_def_cfa_offset: |
726 | case DW_CFA_def_cfa_offset_sf: |
727 | loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset; |
728 | break; |
729 | case DW_CFA_def_cfa_register: |
730 | loc->reg.set_by_dwreg (cfi->dw_cfi_oprnd1.dw_cfi_reg_num); |
731 | break; |
732 | case DW_CFA_def_cfa: |
733 | case DW_CFA_def_cfa_sf: |
734 | loc->reg.set_by_dwreg (cfi->dw_cfi_oprnd1.dw_cfi_reg_num); |
735 | loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset; |
736 | break; |
737 | case DW_CFA_def_cfa_expression: |
738 | if (cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc) |
739 | *loc = *cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc; |
740 | else |
741 | get_cfa_from_loc_descr (cfa: loc, loc: cfi->dw_cfi_oprnd1.dw_cfi_loc); |
742 | break; |
743 | |
744 | case DW_CFA_remember_state: |
745 | gcc_assert (!remember->in_use); |
746 | *remember = *loc; |
747 | remember->in_use = 1; |
748 | break; |
749 | case DW_CFA_restore_state: |
750 | gcc_assert (remember->in_use); |
751 | *loc = *remember; |
752 | remember->in_use = 0; |
753 | break; |
754 | |
755 | default: |
756 | break; |
757 | } |
758 | } |
759 | |
760 | /* Determine if two dw_cfa_location structures define the same data. */ |
761 | |
762 | bool |
763 | cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2) |
764 | { |
765 | return (loc1->reg == loc2->reg |
766 | && known_eq (loc1->offset, loc2->offset) |
767 | && loc1->indirect == loc2->indirect |
768 | && (loc1->indirect == 0 |
769 | || known_eq (loc1->base_offset, loc2->base_offset))); |
770 | } |
771 | |
772 | /* Determine if two CFI operands are identical. */ |
773 | |
774 | static bool |
775 | cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b) |
776 | { |
777 | switch (t) |
778 | { |
779 | case dw_cfi_oprnd_unused: |
780 | return true; |
781 | case dw_cfi_oprnd_reg_num: |
782 | return a->dw_cfi_reg_num == b->dw_cfi_reg_num; |
783 | case dw_cfi_oprnd_offset: |
784 | return a->dw_cfi_offset == b->dw_cfi_offset; |
785 | case dw_cfi_oprnd_addr: |
786 | return (a->dw_cfi_addr == b->dw_cfi_addr |
787 | || strcmp (s1: a->dw_cfi_addr, s2: b->dw_cfi_addr) == 0); |
788 | case dw_cfi_oprnd_loc: |
789 | return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc); |
790 | case dw_cfi_oprnd_cfa_loc: |
791 | /* If any of them is NULL, don't dereference either. */ |
792 | if (!a->dw_cfi_cfa_loc || !b->dw_cfi_cfa_loc) |
793 | return a->dw_cfi_cfa_loc == b->dw_cfi_cfa_loc; |
794 | return cfa_equal_p (loc1: a->dw_cfi_cfa_loc, loc2: b->dw_cfi_cfa_loc); |
795 | } |
796 | gcc_unreachable (); |
797 | } |
798 | |
799 | /* Determine if two CFI entries are identical. */ |
800 | |
801 | static bool |
802 | cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b) |
803 | { |
804 | enum dwarf_call_frame_info opc; |
805 | |
806 | /* Make things easier for our callers, including missing operands. */ |
807 | if (a == b) |
808 | return true; |
809 | if (a == NULL || b == NULL) |
810 | return false; |
811 | |
812 | /* Obviously, the opcodes must match. */ |
813 | opc = a->dw_cfi_opc; |
814 | if (opc != b->dw_cfi_opc) |
815 | return false; |
816 | |
817 | /* Compare the two operands, re-using the type of the operands as |
818 | already exposed elsewhere. */ |
819 | return (cfi_oprnd_equal_p (t: dw_cfi_oprnd1_desc (cfi: opc), |
820 | a: &a->dw_cfi_oprnd1, b: &b->dw_cfi_oprnd1) |
821 | && cfi_oprnd_equal_p (t: dw_cfi_oprnd2_desc (cfi: opc), |
822 | a: &a->dw_cfi_oprnd2, b: &b->dw_cfi_oprnd2)); |
823 | } |
824 | |
825 | /* Determine if two CFI_ROW structures are identical. */ |
826 | |
827 | static bool |
828 | cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b) |
829 | { |
830 | size_t i, n_a, n_b, n_max; |
831 | |
832 | if (a->cfa_cfi) |
833 | { |
834 | if (!cfi_equal_p (a: a->cfa_cfi, b: b->cfa_cfi)) |
835 | return false; |
836 | } |
837 | else if (!cfa_equal_p (loc1: &a->cfa, loc2: &b->cfa)) |
838 | return false; |
839 | |
840 | n_a = vec_safe_length (v: a->reg_save); |
841 | n_b = vec_safe_length (v: b->reg_save); |
842 | n_max = MAX (n_a, n_b); |
843 | |
844 | for (i = 0; i < n_max; ++i) |
845 | { |
846 | dw_cfi_ref r_a = NULL, r_b = NULL; |
847 | |
848 | if (i < n_a) |
849 | r_a = (*a->reg_save)[i]; |
850 | if (i < n_b) |
851 | r_b = (*b->reg_save)[i]; |
852 | |
853 | if (!cfi_equal_p (a: r_a, b: r_b)) |
854 | return false; |
855 | } |
856 | |
857 | if (a->window_save != b->window_save) |
858 | return false; |
859 | |
860 | if (a->ra_mangled != b->ra_mangled) |
861 | return false; |
862 | |
863 | return true; |
864 | } |
865 | |
866 | /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining |
867 | what opcode to emit. Returns the CFI opcode to effect the change, or |
868 | NULL if NEW_CFA == OLD_CFA. */ |
869 | |
870 | static dw_cfi_ref |
871 | def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa) |
872 | { |
873 | dw_cfi_ref cfi; |
874 | |
875 | /* If nothing changed, no need to issue any call frame instructions. */ |
876 | if (cfa_equal_p (loc1: old_cfa, loc2: new_cfa)) |
877 | return NULL; |
878 | |
879 | cfi = new_cfi (); |
880 | |
881 | HOST_WIDE_INT const_offset; |
882 | if (new_cfa->reg == old_cfa->reg |
883 | && new_cfa->reg.span == 1 |
884 | && !new_cfa->indirect |
885 | && !old_cfa->indirect |
886 | && new_cfa->offset.is_constant (const_value: &const_offset)) |
887 | { |
888 | /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating |
889 | the CFA register did not change but the offset did. The data |
890 | factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or |
891 | in the assembler via the .cfi_def_cfa_offset directive. */ |
892 | if (const_offset < 0) |
893 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf; |
894 | else |
895 | cfi->dw_cfi_opc = DW_CFA_def_cfa_offset; |
896 | cfi->dw_cfi_oprnd1.dw_cfi_offset = const_offset; |
897 | } |
898 | else if (new_cfa->offset.is_constant () |
899 | && known_eq (new_cfa->offset, old_cfa->offset) |
900 | && old_cfa->reg.reg != INVALID_REGNUM |
901 | && new_cfa->reg.span == 1 |
902 | && !new_cfa->indirect |
903 | && !old_cfa->indirect) |
904 | { |
905 | /* Construct a "DW_CFA_def_cfa_register <register>" instruction, |
906 | indicating the CFA register has changed to <register> but the |
907 | offset has not changed. This requires the old CFA to have |
908 | been set as a register plus offset rather than a general |
909 | DW_CFA_def_cfa_expression. */ |
910 | cfi->dw_cfi_opc = DW_CFA_def_cfa_register; |
911 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg.reg; |
912 | } |
913 | else if (new_cfa->indirect == 0 |
914 | && new_cfa->offset.is_constant (const_value: &const_offset) |
915 | && new_cfa->reg.span == 1) |
916 | { |
917 | /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction, |
918 | indicating the CFA register has changed to <register> with |
919 | the specified offset. The data factoring for DW_CFA_def_cfa_sf |
920 | happens in output_cfi, or in the assembler via the .cfi_def_cfa |
921 | directive. */ |
922 | if (const_offset < 0) |
923 | cfi->dw_cfi_opc = DW_CFA_def_cfa_sf; |
924 | else |
925 | cfi->dw_cfi_opc = DW_CFA_def_cfa; |
926 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg.reg; |
927 | cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset; |
928 | } |
929 | else |
930 | { |
931 | /* Construct a DW_CFA_def_cfa_expression instruction to |
932 | calculate the CFA using a full location expression since no |
933 | register-offset pair is available. */ |
934 | struct dw_loc_descr_node *loc_list; |
935 | |
936 | cfi->dw_cfi_opc = DW_CFA_def_cfa_expression; |
937 | loc_list = build_cfa_loc (new_cfa, 0); |
938 | cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list; |
939 | if (!new_cfa->offset.is_constant () |
940 | || !new_cfa->base_offset.is_constant ()) |
941 | /* It's hard to reconstruct the CFA location for a polynomial |
942 | expression, so just cache it instead. */ |
943 | cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = copy_cfa (src: new_cfa); |
944 | else |
945 | cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = NULL; |
946 | } |
947 | |
948 | return cfi; |
949 | } |
950 | |
951 | /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */ |
952 | |
953 | static void |
954 | def_cfa_1 (dw_cfa_location *new_cfa) |
955 | { |
956 | dw_cfi_ref cfi; |
957 | |
958 | if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0) |
959 | cur_trace->cfa_store.offset = new_cfa->offset; |
960 | |
961 | cfi = def_cfa_0 (old_cfa: &cur_row->cfa, new_cfa); |
962 | if (cfi) |
963 | { |
964 | cur_row->cfa = *new_cfa; |
965 | cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression |
966 | ? cfi : NULL); |
967 | |
968 | add_cfi (cfi); |
969 | } |
970 | } |
971 | |
972 | /* Add the CFI for saving a register. REG is the CFA column number. |
973 | If SREG is INVALID_REGISTER, the register is saved at OFFSET from the CFA; |
974 | otherwise it is saved in SREG. */ |
975 | |
976 | static void |
977 | reg_save (unsigned int reg, struct cfa_reg sreg, poly_int64 offset) |
978 | { |
979 | dw_fde_ref fde = cfun ? cfun->fde : NULL; |
980 | dw_cfi_ref cfi = new_cfi (); |
981 | |
982 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; |
983 | |
984 | if (sreg.reg == INVALID_REGNUM) |
985 | { |
986 | HOST_WIDE_INT const_offset; |
987 | /* When stack is aligned, store REG using DW_CFA_expression with FP. */ |
988 | if (fde && fde->stack_realign) |
989 | { |
990 | cfi->dw_cfi_opc = DW_CFA_expression; |
991 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; |
992 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
993 | = build_cfa_aligned_loc (&cur_row->cfa, offset, |
994 | fde->stack_realignment); |
995 | } |
996 | else if (offset.is_constant (const_value: &const_offset)) |
997 | { |
998 | if (need_data_align_sf_opcode (off: const_offset)) |
999 | cfi->dw_cfi_opc = DW_CFA_offset_extended_sf; |
1000 | else if (reg & ~0x3f) |
1001 | cfi->dw_cfi_opc = DW_CFA_offset_extended; |
1002 | else |
1003 | cfi->dw_cfi_opc = DW_CFA_offset; |
1004 | cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset; |
1005 | } |
1006 | else |
1007 | { |
1008 | cfi->dw_cfi_opc = DW_CFA_expression; |
1009 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; |
1010 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1011 | = build_cfa_loc (&cur_row->cfa, offset); |
1012 | } |
1013 | } |
1014 | else if (sreg.reg == reg) |
1015 | { |
1016 | /* While we could emit something like DW_CFA_same_value or |
1017 | DW_CFA_restore, we never expect to see something like that |
1018 | in a prologue. This is more likely to be a bug. A backend |
1019 | can always bypass this by using REG_CFA_RESTORE directly. */ |
1020 | gcc_unreachable (); |
1021 | } |
1022 | else if (sreg.span > 1) |
1023 | { |
1024 | cfi->dw_cfi_opc = DW_CFA_expression; |
1025 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg; |
1026 | cfi->dw_cfi_oprnd2.dw_cfi_loc = build_span_loc (sreg); |
1027 | } |
1028 | else |
1029 | { |
1030 | cfi->dw_cfi_opc = DW_CFA_register; |
1031 | cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg.reg; |
1032 | } |
1033 | |
1034 | add_cfi (cfi); |
1035 | update_row_reg_save (row: cur_row, column: reg, cfi); |
1036 | } |
1037 | |
1038 | /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note |
1039 | and adjust data structures to match. */ |
1040 | |
1041 | static void |
1042 | notice_args_size (rtx_insn *insn) |
1043 | { |
1044 | poly_int64 args_size, delta; |
1045 | rtx note; |
1046 | |
1047 | note = find_reg_note (insn, REG_ARGS_SIZE, NULL); |
1048 | if (note == NULL) |
1049 | return; |
1050 | |
1051 | if (!cur_trace->eh_head) |
1052 | cur_trace->args_size_defined_for_eh = true; |
1053 | |
1054 | args_size = get_args_size (note); |
1055 | delta = args_size - cur_trace->end_true_args_size; |
1056 | if (known_eq (delta, 0)) |
1057 | return; |
1058 | |
1059 | cur_trace->end_true_args_size = args_size; |
1060 | |
1061 | /* If the CFA is computed off the stack pointer, then we must adjust |
1062 | the computation of the CFA as well. */ |
1063 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1064 | { |
1065 | gcc_assert (!cur_cfa->indirect); |
1066 | |
1067 | /* Convert a change in args_size (always a positive in the |
1068 | direction of stack growth) to a change in stack pointer. */ |
1069 | if (!STACK_GROWS_DOWNWARD) |
1070 | delta = -delta; |
1071 | |
1072 | cur_cfa->offset += delta; |
1073 | } |
1074 | } |
1075 | |
1076 | /* A subroutine of scan_trace. INSN is can_throw_internal. Update the |
1077 | data within the trace related to EH insns and args_size. */ |
1078 | |
1079 | static void |
1080 | notice_eh_throw (rtx_insn *insn) |
1081 | { |
1082 | poly_int64 args_size = cur_trace->end_true_args_size; |
1083 | if (cur_trace->eh_head == NULL) |
1084 | { |
1085 | cur_trace->eh_head = insn; |
1086 | cur_trace->beg_delay_args_size = args_size; |
1087 | cur_trace->end_delay_args_size = args_size; |
1088 | } |
1089 | else if (maybe_ne (a: cur_trace->end_delay_args_size, b: args_size)) |
1090 | { |
1091 | cur_trace->end_delay_args_size = args_size; |
1092 | |
1093 | /* ??? If the CFA is the stack pointer, search backward for the last |
1094 | CFI note and insert there. Given that the stack changed for the |
1095 | args_size change, there *must* be such a note in between here and |
1096 | the last eh insn. */ |
1097 | add_cfi_args_size (size: args_size); |
1098 | } |
1099 | } |
1100 | |
1101 | /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */ |
1102 | /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is |
1103 | used in places where rtl is prohibited. */ |
1104 | |
1105 | static inline unsigned |
1106 | dwf_regno (const_rtx reg) |
1107 | { |
1108 | gcc_assert (REGNO (reg) < FIRST_PSEUDO_REGISTER); |
1109 | return DWARF_FRAME_REGNUM (REGNO (reg)); |
1110 | } |
1111 | |
1112 | /* Like dwf_regno, but when the value can span multiple registers. */ |
1113 | |
1114 | static struct cfa_reg |
1115 | dwf_cfa_reg (rtx reg) |
1116 | { |
1117 | struct cfa_reg result; |
1118 | |
1119 | result.reg = dwf_regno (reg); |
1120 | result.span = 1; |
1121 | result.span_width = 0; |
1122 | |
1123 | rtx span = targetm.dwarf_register_span (reg); |
1124 | if (span) |
1125 | { |
1126 | /* We only support the simple case of consecutive registers all with the |
1127 | same size. */ |
1128 | result.span = XVECLEN (span, 0); |
1129 | result.span_width = GET_MODE_SIZE (GET_MODE (XVECEXP (span, 0, 0))) |
1130 | .to_constant (); |
1131 | |
1132 | if (CHECKING_P) |
1133 | { |
1134 | /* Ensure that the above assumption is accurate. */ |
1135 | for (unsigned int i = 0; i < result.span; i++) |
1136 | { |
1137 | gcc_assert (GET_MODE_SIZE (GET_MODE (XVECEXP (span, 0, i))) |
1138 | .to_constant () == result.span_width); |
1139 | gcc_assert (REG_P (XVECEXP (span, 0, i))); |
1140 | gcc_assert (dwf_regno (XVECEXP (span, 0, i)) == result.reg + i); |
1141 | } |
1142 | } |
1143 | } |
1144 | |
1145 | return result; |
1146 | } |
1147 | |
1148 | /* More efficient comparisons that don't call targetm.dwarf_register_span |
1149 | unnecessarily. These cfa_reg vs. rtx comparisons should be done at |
1150 | least for call-saved REGs that might not be CFA related (like stack |
1151 | pointer, hard frame pointer or DRAP registers are), in other cases it is |
1152 | just a compile time and memory optimization. */ |
1153 | |
1154 | static bool |
1155 | operator== (cfa_reg &cfa, rtx reg) |
1156 | { |
1157 | unsigned int regno = dwf_regno (reg); |
1158 | if (cfa.reg != regno) |
1159 | return false; |
1160 | struct cfa_reg other = dwf_cfa_reg (reg); |
1161 | return cfa == other; |
1162 | } |
1163 | |
1164 | static inline bool |
1165 | operator!= (cfa_reg &cfa, rtx reg) |
1166 | { |
1167 | return !(cfa == reg); |
1168 | } |
1169 | |
1170 | /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */ |
1171 | |
1172 | static bool |
1173 | compare_reg_or_pc (rtx x, rtx y) |
1174 | { |
1175 | if (REG_P (x) && REG_P (y)) |
1176 | return REGNO (x) == REGNO (y); |
1177 | return x == y; |
1178 | } |
1179 | |
1180 | /* Record SRC as being saved in DEST. DEST may be null to delete an |
1181 | existing entry. SRC may be a register or PC_RTX. */ |
1182 | |
1183 | static void |
1184 | record_reg_saved_in_reg (rtx dest, rtx src) |
1185 | { |
1186 | reg_saved_in_data *elt; |
1187 | size_t i; |
1188 | |
1189 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt) |
1190 | if (compare_reg_or_pc (x: elt->orig_reg, y: src)) |
1191 | { |
1192 | if (dest == NULL) |
1193 | cur_trace->regs_saved_in_regs.unordered_remove (ix: i); |
1194 | else |
1195 | elt->saved_in_reg = dest; |
1196 | return; |
1197 | } |
1198 | |
1199 | if (dest == NULL) |
1200 | return; |
1201 | |
1202 | reg_saved_in_data e = {.orig_reg: src, .saved_in_reg: dest}; |
1203 | cur_trace->regs_saved_in_regs.safe_push (obj: e); |
1204 | } |
1205 | |
1206 | /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at |
1207 | SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */ |
1208 | |
1209 | static void |
1210 | queue_reg_save (rtx reg, rtx sreg, poly_int64 offset) |
1211 | { |
1212 | queued_reg_save *q; |
1213 | queued_reg_save e = {.reg: reg, .saved_reg: sreg, .cfa_offset: offset}; |
1214 | size_t i; |
1215 | |
1216 | /* Duplicates waste space, but it's also necessary to remove them |
1217 | for correctness, since the queue gets output in reverse order. */ |
1218 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
1219 | if (compare_reg_or_pc (x: q->reg, y: reg)) |
1220 | { |
1221 | *q = e; |
1222 | return; |
1223 | } |
1224 | |
1225 | queued_reg_saves.safe_push (obj: e); |
1226 | } |
1227 | |
1228 | /* Output all the entries in QUEUED_REG_SAVES. */ |
1229 | |
1230 | static void |
1231 | dwarf2out_flush_queued_reg_saves (void) |
1232 | { |
1233 | queued_reg_save *q; |
1234 | size_t i; |
1235 | |
1236 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
1237 | { |
1238 | unsigned int reg; |
1239 | struct cfa_reg sreg; |
1240 | |
1241 | record_reg_saved_in_reg (dest: q->saved_reg, src: q->reg); |
1242 | |
1243 | if (q->reg == pc_rtx) |
1244 | reg = DWARF_FRAME_RETURN_COLUMN; |
1245 | else |
1246 | reg = dwf_regno (reg: q->reg); |
1247 | if (q->saved_reg) |
1248 | sreg = dwf_cfa_reg (reg: q->saved_reg); |
1249 | else |
1250 | sreg.set_by_dwreg (INVALID_REGNUM); |
1251 | reg_save (reg, sreg, offset: q->cfa_offset); |
1252 | } |
1253 | |
1254 | queued_reg_saves.truncate (size: 0); |
1255 | } |
1256 | |
1257 | /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved |
1258 | location for? Or, does it clobber a register which we've previously |
1259 | said that some other register is saved in, and for which we now |
1260 | have a new location for? */ |
1261 | |
1262 | static bool |
1263 | clobbers_queued_reg_save (const_rtx insn) |
1264 | { |
1265 | queued_reg_save *q; |
1266 | size_t iq; |
1267 | |
1268 | FOR_EACH_VEC_ELT (queued_reg_saves, iq, q) |
1269 | { |
1270 | size_t ir; |
1271 | reg_saved_in_data *rir; |
1272 | |
1273 | if (modified_in_p (q->reg, insn)) |
1274 | return true; |
1275 | |
1276 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir) |
1277 | if (compare_reg_or_pc (x: q->reg, y: rir->orig_reg) |
1278 | && modified_in_p (rir->saved_in_reg, insn)) |
1279 | return true; |
1280 | } |
1281 | |
1282 | return false; |
1283 | } |
1284 | |
1285 | /* What register, if any, is currently saved in REG? */ |
1286 | |
1287 | static rtx |
1288 | reg_saved_in (rtx reg) |
1289 | { |
1290 | unsigned int regn = REGNO (reg); |
1291 | queued_reg_save *q; |
1292 | reg_saved_in_data *rir; |
1293 | size_t i; |
1294 | |
1295 | FOR_EACH_VEC_ELT (queued_reg_saves, i, q) |
1296 | if (q->saved_reg && regn == REGNO (q->saved_reg)) |
1297 | return q->reg; |
1298 | |
1299 | FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir) |
1300 | if (regn == REGNO (rir->saved_in_reg)) |
1301 | return rir->orig_reg; |
1302 | |
1303 | return NULL_RTX; |
1304 | } |
1305 | |
1306 | /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */ |
1307 | |
1308 | static void |
1309 | dwarf2out_frame_debug_def_cfa (rtx pat) |
1310 | { |
1311 | memset (s: cur_cfa, c: 0, n: sizeof (*cur_cfa)); |
1312 | |
1313 | pat = strip_offset (pat, &cur_cfa->offset); |
1314 | if (MEM_P (pat)) |
1315 | { |
1316 | cur_cfa->indirect = 1; |
1317 | pat = strip_offset (XEXP (pat, 0), &cur_cfa->base_offset); |
1318 | } |
1319 | /* ??? If this fails, we could be calling into the _loc functions to |
1320 | define a full expression. So far no port does that. */ |
1321 | gcc_assert (REG_P (pat)); |
1322 | cur_cfa->reg = dwf_cfa_reg (reg: pat); |
1323 | } |
1324 | |
1325 | /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */ |
1326 | |
1327 | static void |
1328 | dwarf2out_frame_debug_adjust_cfa (rtx pat) |
1329 | { |
1330 | rtx src, dest; |
1331 | |
1332 | gcc_assert (GET_CODE (pat) == SET); |
1333 | dest = XEXP (pat, 0); |
1334 | src = XEXP (pat, 1); |
1335 | |
1336 | switch (GET_CODE (src)) |
1337 | { |
1338 | case PLUS: |
1339 | gcc_assert (cur_cfa->reg == XEXP (src, 0)); |
1340 | cur_cfa->offset -= rtx_to_poly_int64 (XEXP (src, 1)); |
1341 | break; |
1342 | |
1343 | case REG: |
1344 | break; |
1345 | |
1346 | default: |
1347 | gcc_unreachable (); |
1348 | } |
1349 | |
1350 | cur_cfa->reg = dwf_cfa_reg (reg: dest); |
1351 | gcc_assert (cur_cfa->indirect == 0); |
1352 | } |
1353 | |
1354 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */ |
1355 | |
1356 | static void |
1357 | dwarf2out_frame_debug_cfa_offset (rtx set) |
1358 | { |
1359 | poly_int64 offset; |
1360 | rtx src, addr, span; |
1361 | unsigned int sregno; |
1362 | |
1363 | src = XEXP (set, 1); |
1364 | addr = XEXP (set, 0); |
1365 | gcc_assert (MEM_P (addr)); |
1366 | addr = XEXP (addr, 0); |
1367 | |
1368 | /* As documented, only consider extremely simple addresses. */ |
1369 | switch (GET_CODE (addr)) |
1370 | { |
1371 | case REG: |
1372 | gcc_assert (cur_cfa->reg == addr); |
1373 | offset = -cur_cfa->offset; |
1374 | break; |
1375 | case PLUS: |
1376 | gcc_assert (cur_cfa->reg == XEXP (addr, 0)); |
1377 | offset = rtx_to_poly_int64 (XEXP (addr, 1)) - cur_cfa->offset; |
1378 | break; |
1379 | default: |
1380 | gcc_unreachable (); |
1381 | } |
1382 | |
1383 | if (src == pc_rtx) |
1384 | { |
1385 | span = NULL; |
1386 | sregno = DWARF_FRAME_RETURN_COLUMN; |
1387 | } |
1388 | else |
1389 | { |
1390 | span = targetm.dwarf_register_span (src); |
1391 | sregno = dwf_regno (reg: src); |
1392 | } |
1393 | |
1394 | /* ??? We'd like to use queue_reg_save, but we need to come up with |
1395 | a different flushing heuristic for epilogues. */ |
1396 | struct cfa_reg invalid; |
1397 | invalid.set_by_dwreg (INVALID_REGNUM); |
1398 | if (!span) |
1399 | reg_save (reg: sregno, sreg: invalid, offset); |
1400 | else |
1401 | { |
1402 | /* We have a PARALLEL describing where the contents of SRC live. |
1403 | Adjust the offset for each piece of the PARALLEL. */ |
1404 | poly_int64 span_offset = offset; |
1405 | |
1406 | gcc_assert (GET_CODE (span) == PARALLEL); |
1407 | |
1408 | const int par_len = XVECLEN (span, 0); |
1409 | for (int par_index = 0; par_index < par_len; par_index++) |
1410 | { |
1411 | rtx elem = XVECEXP (span, 0, par_index); |
1412 | sregno = dwf_regno (reg: src); |
1413 | reg_save (reg: sregno, sreg: invalid, offset: span_offset); |
1414 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); |
1415 | } |
1416 | } |
1417 | } |
1418 | |
1419 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */ |
1420 | |
1421 | static void |
1422 | dwarf2out_frame_debug_cfa_register (rtx set) |
1423 | { |
1424 | rtx src, dest; |
1425 | unsigned sregno; |
1426 | struct cfa_reg dregno; |
1427 | |
1428 | src = XEXP (set, 1); |
1429 | dest = XEXP (set, 0); |
1430 | |
1431 | record_reg_saved_in_reg (dest, src); |
1432 | if (src == pc_rtx) |
1433 | sregno = DWARF_FRAME_RETURN_COLUMN; |
1434 | else |
1435 | sregno = dwf_regno (reg: src); |
1436 | |
1437 | dregno = dwf_cfa_reg (reg: dest); |
1438 | |
1439 | /* ??? We'd like to use queue_reg_save, but we need to come up with |
1440 | a different flushing heuristic for epilogues. */ |
1441 | reg_save (reg: sregno, sreg: dregno, offset: 0); |
1442 | } |
1443 | |
1444 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */ |
1445 | |
1446 | static void |
1447 | dwarf2out_frame_debug_cfa_expression (rtx set) |
1448 | { |
1449 | rtx src, dest, span; |
1450 | dw_cfi_ref cfi = new_cfi (); |
1451 | unsigned regno; |
1452 | |
1453 | dest = SET_DEST (set); |
1454 | src = SET_SRC (set); |
1455 | |
1456 | gcc_assert (REG_P (src)); |
1457 | gcc_assert (MEM_P (dest)); |
1458 | |
1459 | span = targetm.dwarf_register_span (src); |
1460 | gcc_assert (!span); |
1461 | |
1462 | regno = dwf_regno (reg: src); |
1463 | |
1464 | cfi->dw_cfi_opc = DW_CFA_expression; |
1465 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno; |
1466 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1467 | = mem_loc_descriptor (XEXP (dest, 0), mode: get_address_mode (mem: dest), |
1468 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); |
1469 | |
1470 | /* ??? We'd like to use queue_reg_save, were the interface different, |
1471 | and, as above, we could manage flushing for epilogues. */ |
1472 | add_cfi (cfi); |
1473 | update_row_reg_save (row: cur_row, column: regno, cfi); |
1474 | } |
1475 | |
1476 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION |
1477 | note. */ |
1478 | |
1479 | static void |
1480 | dwarf2out_frame_debug_cfa_val_expression (rtx set) |
1481 | { |
1482 | rtx dest = SET_DEST (set); |
1483 | gcc_assert (REG_P (dest)); |
1484 | |
1485 | rtx span = targetm.dwarf_register_span (dest); |
1486 | gcc_assert (!span); |
1487 | |
1488 | rtx src = SET_SRC (set); |
1489 | dw_cfi_ref cfi = new_cfi (); |
1490 | cfi->dw_cfi_opc = DW_CFA_val_expression; |
1491 | cfi->dw_cfi_oprnd1.dw_cfi_reg_num = dwf_regno (reg: dest); |
1492 | cfi->dw_cfi_oprnd2.dw_cfi_loc |
1493 | = mem_loc_descriptor (src, GET_MODE (src), |
1494 | GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED); |
1495 | add_cfi (cfi); |
1496 | update_row_reg_save (row: cur_row, column: dwf_regno (reg: dest), cfi); |
1497 | } |
1498 | |
1499 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE |
1500 | note. When called with EMIT_CFI set to false emitting a CFI |
1501 | statement is suppressed. */ |
1502 | |
1503 | static void |
1504 | dwarf2out_frame_debug_cfa_restore (rtx reg, bool emit_cfi) |
1505 | { |
1506 | gcc_assert (REG_P (reg)); |
1507 | |
1508 | rtx span = targetm.dwarf_register_span (reg); |
1509 | if (!span) |
1510 | { |
1511 | unsigned int regno = dwf_regno (reg); |
1512 | if (emit_cfi) |
1513 | add_cfi_restore (reg: regno); |
1514 | update_row_reg_save (row: cur_row, column: regno, NULL); |
1515 | } |
1516 | else |
1517 | { |
1518 | /* We have a PARALLEL describing where the contents of REG live. |
1519 | Restore the register for each piece of the PARALLEL. */ |
1520 | gcc_assert (GET_CODE (span) == PARALLEL); |
1521 | |
1522 | const int par_len = XVECLEN (span, 0); |
1523 | for (int par_index = 0; par_index < par_len; par_index++) |
1524 | { |
1525 | reg = XVECEXP (span, 0, par_index); |
1526 | gcc_assert (REG_P (reg)); |
1527 | unsigned int regno = dwf_regno (reg); |
1528 | if (emit_cfi) |
1529 | add_cfi_restore (reg: regno); |
1530 | update_row_reg_save (row: cur_row, column: regno, NULL); |
1531 | } |
1532 | } |
1533 | } |
1534 | |
1535 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. |
1536 | |
1537 | ??? Perhaps we should note in the CIE where windows are saved (instead |
1538 | of assuming 0(cfa)) and what registers are in the window. */ |
1539 | |
1540 | static void |
1541 | dwarf2out_frame_debug_cfa_window_save (void) |
1542 | { |
1543 | dw_cfi_ref cfi = new_cfi (); |
1544 | |
1545 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; |
1546 | add_cfi (cfi); |
1547 | cur_row->window_save = true; |
1548 | } |
1549 | |
1550 | /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_TOGGLE_RA_MANGLE. |
1551 | Note: DW_CFA_GNU_window_save dwarf opcode is reused for toggling RA mangle |
1552 | state, this is a target specific operation on AArch64 and can only be used |
1553 | on other targets if they don't use the window save operation otherwise. */ |
1554 | |
1555 | static void |
1556 | dwarf2out_frame_debug_cfa_toggle_ra_mangle (void) |
1557 | { |
1558 | dw_cfi_ref cfi = new_cfi (); |
1559 | |
1560 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; |
1561 | add_cfi (cfi); |
1562 | cur_row->ra_mangled = !cur_row->ra_mangled; |
1563 | } |
1564 | |
1565 | /* Record call frame debugging information for an expression EXPR, |
1566 | which either sets SP or FP (adjusting how we calculate the frame |
1567 | address) or saves a register to the stack or another register. |
1568 | LABEL indicates the address of EXPR. |
1569 | |
1570 | This function encodes a state machine mapping rtxes to actions on |
1571 | cfa, cfa_store, and cfa_temp.reg. We describe these rules so |
1572 | users need not read the source code. |
1573 | |
1574 | The High-Level Picture |
1575 | |
1576 | Changes in the register we use to calculate the CFA: Currently we |
1577 | assume that if you copy the CFA register into another register, we |
1578 | should take the other one as the new CFA register; this seems to |
1579 | work pretty well. If it's wrong for some target, it's simple |
1580 | enough not to set RTX_FRAME_RELATED_P on the insn in question. |
1581 | |
1582 | Changes in the register we use for saving registers to the stack: |
1583 | This is usually SP, but not always. Again, we deduce that if you |
1584 | copy SP into another register (and SP is not the CFA register), |
1585 | then the new register is the one we will be using for register |
1586 | saves. This also seems to work. |
1587 | |
1588 | Register saves: There's not much guesswork about this one; if |
1589 | RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a |
1590 | register save, and the register used to calculate the destination |
1591 | had better be the one we think we're using for this purpose. |
1592 | It's also assumed that a copy from a call-saved register to another |
1593 | register is saving that register if RTX_FRAME_RELATED_P is set on |
1594 | that instruction. If the copy is from a call-saved register to |
1595 | the *same* register, that means that the register is now the same |
1596 | value as in the caller. |
1597 | |
1598 | Except: If the register being saved is the CFA register, and the |
1599 | offset is nonzero, we are saving the CFA, so we assume we have to |
1600 | use DW_CFA_def_cfa_expression. If the offset is 0, we assume that |
1601 | the intent is to save the value of SP from the previous frame. |
1602 | |
1603 | In addition, if a register has previously been saved to a different |
1604 | register, |
1605 | |
1606 | Invariants / Summaries of Rules |
1607 | |
1608 | cfa current rule for calculating the CFA. It usually |
1609 | consists of a register and an offset. This is |
1610 | actually stored in *cur_cfa, but abbreviated |
1611 | for the purposes of this documentation. |
1612 | cfa_store register used by prologue code to save things to the stack |
1613 | cfa_store.offset is the offset from the value of |
1614 | cfa_store.reg to the actual CFA |
1615 | cfa_temp register holding an integral value. cfa_temp.offset |
1616 | stores the value, which will be used to adjust the |
1617 | stack pointer. cfa_temp is also used like cfa_store, |
1618 | to track stores to the stack via fp or a temp reg. |
1619 | |
1620 | Rules 1- 4: Setting a register's value to cfa.reg or an expression |
1621 | with cfa.reg as the first operand changes the cfa.reg and its |
1622 | cfa.offset. Rule 1 and 4 also set cfa_temp.reg and |
1623 | cfa_temp.offset. |
1624 | |
1625 | Rules 6- 9: Set a non-cfa.reg register value to a constant or an |
1626 | expression yielding a constant. This sets cfa_temp.reg |
1627 | and cfa_temp.offset. |
1628 | |
1629 | Rule 5: Create a new register cfa_store used to save items to the |
1630 | stack. |
1631 | |
1632 | Rules 10-14: Save a register to the stack. Define offset as the |
1633 | difference of the original location and cfa_store's |
1634 | location (or cfa_temp's location if cfa_temp is used). |
1635 | |
1636 | Rules 16-20: If AND operation happens on sp in prologue, we assume |
1637 | stack is realigned. We will use a group of DW_OP_XXX |
1638 | expressions to represent the location of the stored |
1639 | register instead of CFA+offset. |
1640 | |
1641 | The Rules |
1642 | |
1643 | "{a,b}" indicates a choice of a xor b. |
1644 | "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg. |
1645 | |
1646 | Rule 1: |
1647 | (set <reg1> <reg2>:cfa.reg) |
1648 | effects: cfa.reg = <reg1> |
1649 | cfa.offset unchanged |
1650 | cfa_temp.reg = <reg1> |
1651 | cfa_temp.offset = cfa.offset |
1652 | |
1653 | Rule 2: |
1654 | (set sp ({minus,plus,losum} {sp,fp}:cfa.reg |
1655 | {<const_int>,<reg>:cfa_temp.reg})) |
1656 | effects: cfa.reg = sp if fp used |
1657 | cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp |
1658 | cfa_store.offset += {+/- <const_int>, cfa_temp.offset} |
1659 | if cfa_store.reg==sp |
1660 | |
1661 | Rule 3: |
1662 | (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>)) |
1663 | effects: cfa.reg = fp |
1664 | cfa_offset += +/- <const_int> |
1665 | |
1666 | Rule 4: |
1667 | (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>)) |
1668 | constraints: <reg1> != fp |
1669 | <reg1> != sp |
1670 | effects: cfa.reg = <reg1> |
1671 | cfa_temp.reg = <reg1> |
1672 | cfa_temp.offset = cfa.offset |
1673 | |
1674 | Rule 5: |
1675 | (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg)) |
1676 | constraints: <reg1> != fp |
1677 | <reg1> != sp |
1678 | effects: cfa_store.reg = <reg1> |
1679 | cfa_store.offset = cfa.offset - cfa_temp.offset |
1680 | |
1681 | Rule 6: |
1682 | (set <reg> <const_int>) |
1683 | effects: cfa_temp.reg = <reg> |
1684 | cfa_temp.offset = <const_int> |
1685 | |
1686 | Rule 7: |
1687 | (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>)) |
1688 | effects: cfa_temp.reg = <reg1> |
1689 | cfa_temp.offset |= <const_int> |
1690 | |
1691 | Rule 8: |
1692 | (set <reg> (high <exp>)) |
1693 | effects: none |
1694 | |
1695 | Rule 9: |
1696 | (set <reg> (lo_sum <exp> <const_int>)) |
1697 | effects: cfa_temp.reg = <reg> |
1698 | cfa_temp.offset = <const_int> |
1699 | |
1700 | Rule 10: |
1701 | (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>) |
1702 | effects: cfa_store.offset -= <const_int> |
1703 | cfa.offset = cfa_store.offset if cfa.reg == sp |
1704 | cfa.reg = sp |
1705 | cfa.base_offset = -cfa_store.offset |
1706 | |
1707 | Rule 11: |
1708 | (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>) |
1709 | effects: cfa_store.offset += -/+ mode_size(mem) |
1710 | cfa.offset = cfa_store.offset if cfa.reg == sp |
1711 | cfa.reg = sp |
1712 | cfa.base_offset = -cfa_store.offset |
1713 | |
1714 | Rule 12: |
1715 | (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>)) |
1716 | |
1717 | <reg2>) |
1718 | effects: cfa.reg = <reg1> |
1719 | cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset |
1720 | |
1721 | Rule 13: |
1722 | (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>) |
1723 | effects: cfa.reg = <reg1> |
1724 | cfa.base_offset = -{cfa_store,cfa_temp}.offset |
1725 | |
1726 | Rule 14: |
1727 | (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>) |
1728 | effects: cfa.reg = <reg1> |
1729 | cfa.base_offset = -cfa_temp.offset |
1730 | cfa_temp.offset -= mode_size(mem) |
1731 | |
1732 | Rule 15: |
1733 | (set <reg> {unspec, unspec_volatile}) |
1734 | effects: target-dependent |
1735 | |
1736 | Rule 16: |
1737 | (set sp (and: sp <const_int>)) |
1738 | constraints: cfa_store.reg == sp |
1739 | effects: cfun->fde.stack_realign = 1 |
1740 | cfa_store.offset = 0 |
1741 | fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp |
1742 | |
1743 | Rule 17: |
1744 | (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int)))) |
1745 | effects: cfa_store.offset += -/+ mode_size(mem) |
1746 | |
1747 | Rule 18: |
1748 | (set (mem ({pre_inc, pre_dec} sp)) fp) |
1749 | constraints: fde->stack_realign == 1 |
1750 | effects: cfa_store.offset = 0 |
1751 | cfa.reg != HARD_FRAME_POINTER_REGNUM |
1752 | |
1753 | Rule 19: |
1754 | (set (mem ({pre_inc, pre_dec} sp)) cfa.reg) |
1755 | constraints: fde->stack_realign == 1 |
1756 | && cfa.offset == 0 |
1757 | && cfa.indirect == 0 |
1758 | && cfa.reg != HARD_FRAME_POINTER_REGNUM |
1759 | effects: Use DW_CFA_def_cfa_expression to define cfa |
1760 | cfa.reg == fde->drap_reg */ |
1761 | |
1762 | static void |
1763 | dwarf2out_frame_debug_expr (rtx expr) |
1764 | { |
1765 | rtx src, dest, span; |
1766 | poly_int64 offset; |
1767 | dw_fde_ref fde; |
1768 | |
1769 | /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of |
1770 | the PARALLEL independently. The first element is always processed if |
1771 | it is a SET. This is for backward compatibility. Other elements |
1772 | are processed only if they are SETs and the RTX_FRAME_RELATED_P |
1773 | flag is set in them. */ |
1774 | if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE) |
1775 | { |
1776 | int par_index; |
1777 | int limit = XVECLEN (expr, 0); |
1778 | rtx elem; |
1779 | |
1780 | /* PARALLELs have strict read-modify-write semantics, so we |
1781 | ought to evaluate every rvalue before changing any lvalue. |
1782 | It's cumbersome to do that in general, but there's an |
1783 | easy approximation that is enough for all current users: |
1784 | handle register saves before register assignments. */ |
1785 | if (GET_CODE (expr) == PARALLEL) |
1786 | for (par_index = 0; par_index < limit; par_index++) |
1787 | { |
1788 | elem = XVECEXP (expr, 0, par_index); |
1789 | if (GET_CODE (elem) == SET |
1790 | && MEM_P (SET_DEST (elem)) |
1791 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) |
1792 | dwarf2out_frame_debug_expr (expr: elem); |
1793 | } |
1794 | |
1795 | for (par_index = 0; par_index < limit; par_index++) |
1796 | { |
1797 | elem = XVECEXP (expr, 0, par_index); |
1798 | if (GET_CODE (elem) == SET |
1799 | && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE) |
1800 | && (RTX_FRAME_RELATED_P (elem) || par_index == 0)) |
1801 | dwarf2out_frame_debug_expr (expr: elem); |
1802 | } |
1803 | return; |
1804 | } |
1805 | |
1806 | gcc_assert (GET_CODE (expr) == SET); |
1807 | |
1808 | src = SET_SRC (expr); |
1809 | dest = SET_DEST (expr); |
1810 | |
1811 | if (REG_P (src)) |
1812 | { |
1813 | rtx rsi = reg_saved_in (reg: src); |
1814 | if (rsi) |
1815 | src = rsi; |
1816 | } |
1817 | |
1818 | fde = cfun->fde; |
1819 | |
1820 | switch (GET_CODE (dest)) |
1821 | { |
1822 | case REG: |
1823 | switch (GET_CODE (src)) |
1824 | { |
1825 | /* Setting FP from SP. */ |
1826 | case REG: |
1827 | if (cur_cfa->reg == src) |
1828 | { |
1829 | /* Rule 1 */ |
1830 | /* Update the CFA rule wrt SP or FP. Make sure src is |
1831 | relative to the current CFA register. |
1832 | |
1833 | We used to require that dest be either SP or FP, but the |
1834 | ARM copies SP to a temporary register, and from there to |
1835 | FP. So we just rely on the backends to only set |
1836 | RTX_FRAME_RELATED_P on appropriate insns. */ |
1837 | cur_cfa->reg = dwf_cfa_reg (reg: dest); |
1838 | cur_trace->cfa_temp.reg = cur_cfa->reg; |
1839 | cur_trace->cfa_temp.offset = cur_cfa->offset; |
1840 | } |
1841 | else |
1842 | { |
1843 | /* Saving a register in a register. */ |
1844 | gcc_assert (!fixed_regs [REGNO (dest)] |
1845 | /* For the SPARC and its register window. */ |
1846 | || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN)); |
1847 | |
1848 | /* After stack is aligned, we can only save SP in FP |
1849 | if drap register is used. In this case, we have |
1850 | to restore stack pointer with the CFA value and we |
1851 | don't generate this DWARF information. */ |
1852 | if (fde |
1853 | && fde->stack_realign |
1854 | && REGNO (src) == STACK_POINTER_REGNUM) |
1855 | { |
1856 | gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM |
1857 | && fde->drap_reg != INVALID_REGNUM |
1858 | && cur_cfa->reg != src |
1859 | && fde->rule18); |
1860 | fde->rule18 = 0; |
1861 | /* The save of hard frame pointer has been deferred |
1862 | until this point when Rule 18 applied. Emit it now. */ |
1863 | queue_reg_save (reg: dest, NULL_RTX, offset: 0); |
1864 | /* And as the instruction modifies the hard frame pointer, |
1865 | flush the queue as well. */ |
1866 | dwarf2out_flush_queued_reg_saves (); |
1867 | } |
1868 | else |
1869 | queue_reg_save (reg: src, sreg: dest, offset: 0); |
1870 | } |
1871 | break; |
1872 | |
1873 | case PLUS: |
1874 | case MINUS: |
1875 | case LO_SUM: |
1876 | if (dest == stack_pointer_rtx) |
1877 | { |
1878 | /* Rule 2 */ |
1879 | /* Adjusting SP. */ |
1880 | if (REG_P (XEXP (src, 1))) |
1881 | { |
1882 | gcc_assert (cur_trace->cfa_temp.reg == XEXP (src, 1)); |
1883 | offset = cur_trace->cfa_temp.offset; |
1884 | } |
1885 | else if (!poly_int_rtx_p (XEXP (src, 1), res: &offset)) |
1886 | gcc_unreachable (); |
1887 | |
1888 | if (XEXP (src, 0) == hard_frame_pointer_rtx) |
1889 | { |
1890 | /* Restoring SP from FP in the epilogue. */ |
1891 | gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum); |
1892 | cur_cfa->reg = dw_stack_pointer_regnum; |
1893 | } |
1894 | else if (GET_CODE (src) == LO_SUM) |
1895 | /* Assume we've set the source reg of the LO_SUM from sp. */ |
1896 | ; |
1897 | else |
1898 | gcc_assert (XEXP (src, 0) == stack_pointer_rtx); |
1899 | |
1900 | if (GET_CODE (src) != MINUS) |
1901 | offset = -offset; |
1902 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
1903 | cur_cfa->offset += offset; |
1904 | if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum) |
1905 | cur_trace->cfa_store.offset += offset; |
1906 | } |
1907 | else if (dest == hard_frame_pointer_rtx) |
1908 | { |
1909 | /* Rule 3 */ |
1910 | /* Either setting the FP from an offset of the SP, |
1911 | or adjusting the FP */ |
1912 | gcc_assert (frame_pointer_needed); |
1913 | |
1914 | gcc_assert (REG_P (XEXP (src, 0)) |
1915 | && cur_cfa->reg == XEXP (src, 0)); |
1916 | offset = rtx_to_poly_int64 (XEXP (src, 1)); |
1917 | if (GET_CODE (src) != MINUS) |
1918 | offset = -offset; |
1919 | cur_cfa->offset += offset; |
1920 | cur_cfa->reg = dw_frame_pointer_regnum; |
1921 | } |
1922 | else |
1923 | { |
1924 | gcc_assert (GET_CODE (src) != MINUS); |
1925 | |
1926 | /* Rule 4 */ |
1927 | if (REG_P (XEXP (src, 0)) |
1928 | && cur_cfa->reg == XEXP (src, 0) |
1929 | && poly_int_rtx_p (XEXP (src, 1), res: &offset)) |
1930 | { |
1931 | /* Setting a temporary CFA register that will be copied |
1932 | into the FP later on. */ |
1933 | offset = -offset; |
1934 | cur_cfa->offset += offset; |
1935 | cur_cfa->reg = dwf_cfa_reg (reg: dest); |
1936 | /* Or used to save regs to the stack. */ |
1937 | cur_trace->cfa_temp.reg = cur_cfa->reg; |
1938 | cur_trace->cfa_temp.offset = cur_cfa->offset; |
1939 | } |
1940 | |
1941 | /* Rule 5 */ |
1942 | else if (REG_P (XEXP (src, 0)) |
1943 | && cur_trace->cfa_temp.reg == XEXP (src, 0) |
1944 | && XEXP (src, 1) == stack_pointer_rtx) |
1945 | { |
1946 | /* Setting a scratch register that we will use instead |
1947 | of SP for saving registers to the stack. */ |
1948 | gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum); |
1949 | cur_trace->cfa_store.reg = dwf_cfa_reg (reg: dest); |
1950 | cur_trace->cfa_store.offset |
1951 | = cur_cfa->offset - cur_trace->cfa_temp.offset; |
1952 | } |
1953 | |
1954 | /* Rule 9 */ |
1955 | else if (GET_CODE (src) == LO_SUM |
1956 | && poly_int_rtx_p (XEXP (src, 1), |
1957 | res: &cur_trace->cfa_temp.offset)) |
1958 | cur_trace->cfa_temp.reg = dwf_cfa_reg (reg: dest); |
1959 | else |
1960 | gcc_unreachable (); |
1961 | } |
1962 | break; |
1963 | |
1964 | /* Rule 6 */ |
1965 | case CONST_INT: |
1966 | case CONST_POLY_INT: |
1967 | cur_trace->cfa_temp.reg = dwf_cfa_reg (reg: dest); |
1968 | cur_trace->cfa_temp.offset = rtx_to_poly_int64 (x: src); |
1969 | break; |
1970 | |
1971 | /* Rule 7 */ |
1972 | case IOR: |
1973 | gcc_assert (REG_P (XEXP (src, 0)) |
1974 | && cur_trace->cfa_temp.reg == XEXP (src, 0) |
1975 | && CONST_INT_P (XEXP (src, 1))); |
1976 | |
1977 | cur_trace->cfa_temp.reg = dwf_cfa_reg (reg: dest); |
1978 | if (!can_ior_p (a: cur_trace->cfa_temp.offset, INTVAL (XEXP (src, 1)), |
1979 | result: &cur_trace->cfa_temp.offset)) |
1980 | /* The target shouldn't generate this kind of CFI note if we |
1981 | can't represent it. */ |
1982 | gcc_unreachable (); |
1983 | break; |
1984 | |
1985 | /* Skip over HIGH, assuming it will be followed by a LO_SUM, |
1986 | which will fill in all of the bits. */ |
1987 | /* Rule 8 */ |
1988 | case HIGH: |
1989 | break; |
1990 | |
1991 | /* Rule 15 */ |
1992 | case UNSPEC: |
1993 | case UNSPEC_VOLATILE: |
1994 | /* All unspecs should be represented by REG_CFA_* notes. */ |
1995 | gcc_unreachable (); |
1996 | return; |
1997 | |
1998 | /* Rule 16 */ |
1999 | case AND: |
2000 | /* If this AND operation happens on stack pointer in prologue, |
2001 | we assume the stack is realigned and we extract the |
2002 | alignment. */ |
2003 | if (fde && XEXP (src, 0) == stack_pointer_rtx) |
2004 | { |
2005 | /* We interpret reg_save differently with stack_realign set. |
2006 | Thus we must flush whatever we have queued first. */ |
2007 | dwarf2out_flush_queued_reg_saves (); |
2008 | |
2009 | gcc_assert (cur_trace->cfa_store.reg |
2010 | == XEXP (src, 0)); |
2011 | fde->stack_realign = 1; |
2012 | fde->stack_realignment = INTVAL (XEXP (src, 1)); |
2013 | cur_trace->cfa_store.offset = 0; |
2014 | |
2015 | if (cur_cfa->reg != dw_stack_pointer_regnum |
2016 | && cur_cfa->reg != dw_frame_pointer_regnum) |
2017 | { |
2018 | gcc_assert (cur_cfa->reg.span == 1); |
2019 | fde->drap_reg = cur_cfa->reg.reg; |
2020 | } |
2021 | } |
2022 | return; |
2023 | |
2024 | default: |
2025 | gcc_unreachable (); |
2026 | } |
2027 | break; |
2028 | |
2029 | case MEM: |
2030 | |
2031 | /* Saving a register to the stack. Make sure dest is relative to the |
2032 | CFA register. */ |
2033 | switch (GET_CODE (XEXP (dest, 0))) |
2034 | { |
2035 | /* Rule 10 */ |
2036 | /* With a push. */ |
2037 | case PRE_MODIFY: |
2038 | case POST_MODIFY: |
2039 | /* We can't handle variable size modifications. */ |
2040 | offset = -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest, 0), 1), 1)); |
2041 | |
2042 | gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM |
2043 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
2044 | |
2045 | cur_trace->cfa_store.offset += offset; |
2046 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
2047 | cur_cfa->offset = cur_trace->cfa_store.offset; |
2048 | |
2049 | if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY) |
2050 | offset -= cur_trace->cfa_store.offset; |
2051 | else |
2052 | offset = -cur_trace->cfa_store.offset; |
2053 | break; |
2054 | |
2055 | /* Rule 11 */ |
2056 | case PRE_INC: |
2057 | case PRE_DEC: |
2058 | case POST_DEC: |
2059 | offset = GET_MODE_SIZE (GET_MODE (dest)); |
2060 | if (GET_CODE (XEXP (dest, 0)) == PRE_INC) |
2061 | offset = -offset; |
2062 | |
2063 | gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0)) |
2064 | == STACK_POINTER_REGNUM) |
2065 | && cur_trace->cfa_store.reg == dw_stack_pointer_regnum); |
2066 | |
2067 | cur_trace->cfa_store.offset += offset; |
2068 | |
2069 | /* Rule 18: If stack is aligned, we will use FP as a |
2070 | reference to represent the address of the stored |
2071 | regiser. */ |
2072 | if (fde |
2073 | && fde->stack_realign |
2074 | && REG_P (src) |
2075 | && REGNO (src) == HARD_FRAME_POINTER_REGNUM) |
2076 | { |
2077 | gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum); |
2078 | cur_trace->cfa_store.offset = 0; |
2079 | fde->rule18 = 1; |
2080 | } |
2081 | |
2082 | if (cur_cfa->reg == dw_stack_pointer_regnum) |
2083 | cur_cfa->offset = cur_trace->cfa_store.offset; |
2084 | |
2085 | if (GET_CODE (XEXP (dest, 0)) == POST_DEC) |
2086 | offset += -cur_trace->cfa_store.offset; |
2087 | else |
2088 | offset = -cur_trace->cfa_store.offset; |
2089 | break; |
2090 | |
2091 | /* Rule 12 */ |
2092 | /* With an offset. */ |
2093 | case PLUS: |
2094 | case MINUS: |
2095 | case LO_SUM: |
2096 | { |
2097 | struct cfa_reg regno; |
2098 | |
2099 | gcc_assert (REG_P (XEXP (XEXP (dest, 0), 0))); |
2100 | offset = rtx_to_poly_int64 (XEXP (XEXP (dest, 0), 1)); |
2101 | if (GET_CODE (XEXP (dest, 0)) == MINUS) |
2102 | offset = -offset; |
2103 | |
2104 | regno = dwf_cfa_reg (XEXP (XEXP (dest, 0), 0)); |
2105 | |
2106 | if (cur_cfa->reg == regno) |
2107 | offset -= cur_cfa->offset; |
2108 | else if (cur_trace->cfa_store.reg == regno) |
2109 | offset -= cur_trace->cfa_store.offset; |
2110 | else |
2111 | { |
2112 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
2113 | offset -= cur_trace->cfa_temp.offset; |
2114 | } |
2115 | } |
2116 | break; |
2117 | |
2118 | /* Rule 13 */ |
2119 | /* Without an offset. */ |
2120 | case REG: |
2121 | { |
2122 | struct cfa_reg regno = dwf_cfa_reg (XEXP (dest, 0)); |
2123 | |
2124 | if (cur_cfa->reg == regno) |
2125 | offset = -cur_cfa->offset; |
2126 | else if (cur_trace->cfa_store.reg == regno) |
2127 | offset = -cur_trace->cfa_store.offset; |
2128 | else |
2129 | { |
2130 | gcc_assert (cur_trace->cfa_temp.reg == regno); |
2131 | offset = -cur_trace->cfa_temp.offset; |
2132 | } |
2133 | } |
2134 | break; |
2135 | |
2136 | /* Rule 14 */ |
2137 | case POST_INC: |
2138 | gcc_assert (cur_trace->cfa_temp.reg == XEXP (XEXP (dest, 0), 0)); |
2139 | offset = -cur_trace->cfa_temp.offset; |
2140 | cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest)); |
2141 | break; |
2142 | |
2143 | default: |
2144 | gcc_unreachable (); |
2145 | } |
2146 | |
2147 | /* Rule 17 */ |
2148 | /* If the source operand of this MEM operation is a memory, |
2149 | we only care how much stack grew. */ |
2150 | if (MEM_P (src)) |
2151 | break; |
2152 | |
2153 | if (REG_P (src) |
2154 | && REGNO (src) != STACK_POINTER_REGNUM |
2155 | && REGNO (src) != HARD_FRAME_POINTER_REGNUM |
2156 | && cur_cfa->reg == src) |
2157 | { |
2158 | /* We're storing the current CFA reg into the stack. */ |
2159 | |
2160 | if (known_eq (cur_cfa->offset, 0)) |
2161 | { |
2162 | /* Rule 19 */ |
2163 | /* If stack is aligned, putting CFA reg into stack means |
2164 | we can no longer use reg + offset to represent CFA. |
2165 | Here we use DW_CFA_def_cfa_expression instead. The |
2166 | result of this expression equals to the original CFA |
2167 | value. */ |
2168 | if (fde |
2169 | && fde->stack_realign |
2170 | && cur_cfa->indirect == 0 |
2171 | && cur_cfa->reg != dw_frame_pointer_regnum) |
2172 | { |
2173 | gcc_assert (fde->drap_reg == cur_cfa->reg.reg); |
2174 | |
2175 | cur_cfa->indirect = 1; |
2176 | cur_cfa->reg = dw_frame_pointer_regnum; |
2177 | cur_cfa->base_offset = offset; |
2178 | cur_cfa->offset = 0; |
2179 | |
2180 | fde->drap_reg_saved = 1; |
2181 | break; |
2182 | } |
2183 | |
2184 | /* If the source register is exactly the CFA, assume |
2185 | we're saving SP like any other register; this happens |
2186 | on the ARM. */ |
2187 | queue_reg_save (stack_pointer_rtx, NULL_RTX, offset); |
2188 | break; |
2189 | } |
2190 | else |
2191 | { |
2192 | /* Otherwise, we'll need to look in the stack to |
2193 | calculate the CFA. */ |
2194 | rtx x = XEXP (dest, 0); |
2195 | |
2196 | if (!REG_P (x)) |
2197 | x = XEXP (x, 0); |
2198 | gcc_assert (REG_P (x)); |
2199 | |
2200 | cur_cfa->reg = dwf_cfa_reg (reg: x); |
2201 | cur_cfa->base_offset = offset; |
2202 | cur_cfa->indirect = 1; |
2203 | break; |
2204 | } |
2205 | } |
2206 | |
2207 | if (REG_P (src)) |
2208 | span = targetm.dwarf_register_span (src); |
2209 | else |
2210 | span = NULL; |
2211 | |
2212 | if (!span) |
2213 | { |
2214 | if (fde->rule18) |
2215 | /* Just verify the hard frame pointer save when doing dynamic |
2216 | realignment uses expected offset. The actual queue_reg_save |
2217 | needs to be deferred until the instruction that sets |
2218 | hard frame pointer to stack pointer, see PR99334 for |
2219 | details. */ |
2220 | gcc_assert (known_eq (offset, 0)); |
2221 | else |
2222 | queue_reg_save (reg: src, NULL_RTX, offset); |
2223 | } |
2224 | else |
2225 | { |
2226 | /* We have a PARALLEL describing where the contents of SRC live. |
2227 | Queue register saves for each piece of the PARALLEL. */ |
2228 | poly_int64 span_offset = offset; |
2229 | |
2230 | gcc_assert (GET_CODE (span) == PARALLEL); |
2231 | |
2232 | const int par_len = XVECLEN (span, 0); |
2233 | for (int par_index = 0; par_index < par_len; par_index++) |
2234 | { |
2235 | rtx elem = XVECEXP (span, 0, par_index); |
2236 | queue_reg_save (reg: elem, NULL_RTX, offset: span_offset); |
2237 | span_offset += GET_MODE_SIZE (GET_MODE (elem)); |
2238 | } |
2239 | } |
2240 | break; |
2241 | |
2242 | default: |
2243 | gcc_unreachable (); |
2244 | } |
2245 | } |
2246 | |
2247 | /* Record call frame debugging information for INSN, which either sets |
2248 | SP or FP (adjusting how we calculate the frame address) or saves a |
2249 | register to the stack. */ |
2250 | |
2251 | static void |
2252 | dwarf2out_frame_debug (rtx_insn *insn) |
2253 | { |
2254 | rtx note, n, pat; |
2255 | bool handled_one = false; |
2256 | |
2257 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
2258 | switch (REG_NOTE_KIND (note)) |
2259 | { |
2260 | case REG_FRAME_RELATED_EXPR: |
2261 | pat = XEXP (note, 0); |
2262 | goto do_frame_expr; |
2263 | |
2264 | case REG_CFA_DEF_CFA: |
2265 | dwarf2out_frame_debug_def_cfa (XEXP (note, 0)); |
2266 | handled_one = true; |
2267 | break; |
2268 | |
2269 | case REG_CFA_ADJUST_CFA: |
2270 | n = XEXP (note, 0); |
2271 | if (n == NULL) |
2272 | { |
2273 | n = PATTERN (insn); |
2274 | if (GET_CODE (n) == PARALLEL) |
2275 | n = XVECEXP (n, 0, 0); |
2276 | } |
2277 | dwarf2out_frame_debug_adjust_cfa (pat: n); |
2278 | handled_one = true; |
2279 | break; |
2280 | |
2281 | case REG_CFA_OFFSET: |
2282 | n = XEXP (note, 0); |
2283 | if (n == NULL) |
2284 | n = single_set (insn); |
2285 | dwarf2out_frame_debug_cfa_offset (set: n); |
2286 | handled_one = true; |
2287 | break; |
2288 | |
2289 | case REG_CFA_REGISTER: |
2290 | n = XEXP (note, 0); |
2291 | if (n == NULL) |
2292 | { |
2293 | n = PATTERN (insn); |
2294 | if (GET_CODE (n) == PARALLEL) |
2295 | n = XVECEXP (n, 0, 0); |
2296 | } |
2297 | dwarf2out_frame_debug_cfa_register (set: n); |
2298 | handled_one = true; |
2299 | break; |
2300 | |
2301 | case REG_CFA_EXPRESSION: |
2302 | case REG_CFA_VAL_EXPRESSION: |
2303 | n = XEXP (note, 0); |
2304 | if (n == NULL) |
2305 | n = single_set (insn); |
2306 | |
2307 | if (REG_NOTE_KIND (note) == REG_CFA_EXPRESSION) |
2308 | dwarf2out_frame_debug_cfa_expression (set: n); |
2309 | else |
2310 | dwarf2out_frame_debug_cfa_val_expression (set: n); |
2311 | |
2312 | handled_one = true; |
2313 | break; |
2314 | |
2315 | case REG_CFA_RESTORE: |
2316 | case REG_CFA_NO_RESTORE: |
2317 | n = XEXP (note, 0); |
2318 | if (n == NULL) |
2319 | { |
2320 | n = PATTERN (insn); |
2321 | if (GET_CODE (n) == PARALLEL) |
2322 | n = XVECEXP (n, 0, 0); |
2323 | n = XEXP (n, 0); |
2324 | } |
2325 | dwarf2out_frame_debug_cfa_restore (reg: n, REG_NOTE_KIND (note) == REG_CFA_RESTORE); |
2326 | handled_one = true; |
2327 | break; |
2328 | |
2329 | case REG_CFA_SET_VDRAP: |
2330 | n = XEXP (note, 0); |
2331 | if (REG_P (n)) |
2332 | { |
2333 | dw_fde_ref fde = cfun->fde; |
2334 | if (fde) |
2335 | { |
2336 | gcc_assert (fde->vdrap_reg == INVALID_REGNUM); |
2337 | if (REG_P (n)) |
2338 | fde->vdrap_reg = dwf_regno (reg: n); |
2339 | } |
2340 | } |
2341 | handled_one = true; |
2342 | break; |
2343 | |
2344 | case REG_CFA_TOGGLE_RA_MANGLE: |
2345 | dwarf2out_frame_debug_cfa_toggle_ra_mangle (); |
2346 | handled_one = true; |
2347 | break; |
2348 | |
2349 | case REG_CFA_WINDOW_SAVE: |
2350 | dwarf2out_frame_debug_cfa_window_save (); |
2351 | handled_one = true; |
2352 | break; |
2353 | |
2354 | case REG_CFA_FLUSH_QUEUE: |
2355 | /* The actual flush happens elsewhere. */ |
2356 | handled_one = true; |
2357 | break; |
2358 | |
2359 | default: |
2360 | break; |
2361 | } |
2362 | |
2363 | if (!handled_one) |
2364 | { |
2365 | pat = PATTERN (insn); |
2366 | do_frame_expr: |
2367 | dwarf2out_frame_debug_expr (expr: pat); |
2368 | |
2369 | /* Check again. A parallel can save and update the same register. |
2370 | We could probably check just once, here, but this is safer than |
2371 | removing the check at the start of the function. */ |
2372 | if (clobbers_queued_reg_save (insn: pat)) |
2373 | dwarf2out_flush_queued_reg_saves (); |
2374 | } |
2375 | } |
2376 | |
2377 | /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */ |
2378 | |
2379 | static void |
2380 | change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row) |
2381 | { |
2382 | size_t i, n_old, n_new, n_max; |
2383 | dw_cfi_ref cfi; |
2384 | |
2385 | if (new_row->cfa_cfi && !cfi_equal_p (a: old_row->cfa_cfi, b: new_row->cfa_cfi)) |
2386 | add_cfi (cfi: new_row->cfa_cfi); |
2387 | else |
2388 | { |
2389 | cfi = def_cfa_0 (old_cfa: &old_row->cfa, new_cfa: &new_row->cfa); |
2390 | if (cfi) |
2391 | add_cfi (cfi); |
2392 | } |
2393 | |
2394 | n_old = vec_safe_length (v: old_row->reg_save); |
2395 | n_new = vec_safe_length (v: new_row->reg_save); |
2396 | n_max = MAX (n_old, n_new); |
2397 | |
2398 | for (i = 0; i < n_max; ++i) |
2399 | { |
2400 | dw_cfi_ref r_old = NULL, r_new = NULL; |
2401 | |
2402 | if (i < n_old) |
2403 | r_old = (*old_row->reg_save)[i]; |
2404 | if (i < n_new) |
2405 | r_new = (*new_row->reg_save)[i]; |
2406 | |
2407 | if (r_old == r_new) |
2408 | ; |
2409 | else if (r_new == NULL) |
2410 | add_cfi_restore (reg: i); |
2411 | else if (!cfi_equal_p (a: r_old, b: r_new)) |
2412 | add_cfi (cfi: r_new); |
2413 | } |
2414 | |
2415 | if (!old_row->window_save && new_row->window_save) |
2416 | { |
2417 | dw_cfi_ref cfi = new_cfi (); |
2418 | |
2419 | gcc_assert (!old_row->ra_mangled && !new_row->ra_mangled); |
2420 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; |
2421 | add_cfi (cfi); |
2422 | } |
2423 | |
2424 | if (old_row->ra_mangled != new_row->ra_mangled) |
2425 | { |
2426 | dw_cfi_ref cfi = new_cfi (); |
2427 | |
2428 | gcc_assert (!old_row->window_save && !new_row->window_save); |
2429 | /* DW_CFA_GNU_window_save is reused for toggling RA mangle state. */ |
2430 | cfi->dw_cfi_opc = DW_CFA_GNU_window_save; |
2431 | add_cfi (cfi); |
2432 | } |
2433 | } |
2434 | |
2435 | /* Examine CFI and return true if a cfi label and set_loc is needed |
2436 | beforehand. Even when generating CFI assembler instructions, we |
2437 | still have to add the cfi to the list so that lookup_cfa_1 works |
2438 | later on. When -g2 and above we even need to force emitting of |
2439 | CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list |
2440 | purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa |
2441 | and so don't use convert_cfa_to_fb_loc_list. */ |
2442 | |
2443 | static bool |
2444 | cfi_label_required_p (dw_cfi_ref cfi) |
2445 | { |
2446 | if (!dwarf2out_do_cfi_asm ()) |
2447 | return true; |
2448 | |
2449 | if (dwarf_version == 2 |
2450 | && debug_info_level > DINFO_LEVEL_TERSE |
2451 | && dwarf_debuginfo_p ()) |
2452 | { |
2453 | switch (cfi->dw_cfi_opc) |
2454 | { |
2455 | case DW_CFA_def_cfa_offset: |
2456 | case DW_CFA_def_cfa_offset_sf: |
2457 | case DW_CFA_def_cfa_register: |
2458 | case DW_CFA_def_cfa: |
2459 | case DW_CFA_def_cfa_sf: |
2460 | case DW_CFA_def_cfa_expression: |
2461 | case DW_CFA_restore_state: |
2462 | return true; |
2463 | default: |
2464 | return false; |
2465 | } |
2466 | } |
2467 | return false; |
2468 | } |
2469 | |
2470 | /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the |
2471 | function's FDE, adding CFI labels and set_loc/advance_loc opcodes as |
2472 | necessary. */ |
2473 | static void |
2474 | add_cfis_to_fde (void) |
2475 | { |
2476 | dw_fde_ref fde = cfun->fde; |
2477 | rtx_insn *insn, *next; |
2478 | |
2479 | for (insn = get_insns (); insn; insn = next) |
2480 | { |
2481 | next = NEXT_INSN (insn); |
2482 | |
2483 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) |
2484 | fde->dw_fde_switch_cfi_index = vec_safe_length (v: fde->dw_fde_cfi); |
2485 | |
2486 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) |
2487 | { |
2488 | bool required = cfi_label_required_p (NOTE_CFI (insn)); |
2489 | while (next) |
2490 | if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI) |
2491 | { |
2492 | required |= cfi_label_required_p (NOTE_CFI (next)); |
2493 | next = NEXT_INSN (insn: next); |
2494 | } |
2495 | else if (active_insn_p (next) |
2496 | || (NOTE_P (next) && (NOTE_KIND (next) |
2497 | == NOTE_INSN_SWITCH_TEXT_SECTIONS))) |
2498 | break; |
2499 | else |
2500 | next = NEXT_INSN (insn: next); |
2501 | if (required) |
2502 | { |
2503 | int num = dwarf2out_cfi_label_num; |
2504 | const char *label = dwarf2out_cfi_label (); |
2505 | dw_cfi_ref xcfi; |
2506 | |
2507 | /* Set the location counter to the new label. */ |
2508 | xcfi = new_cfi (); |
2509 | xcfi->dw_cfi_opc = DW_CFA_advance_loc4; |
2510 | xcfi->dw_cfi_oprnd1.dw_cfi_addr = label; |
2511 | vec_safe_push (v&: fde->dw_fde_cfi, obj: xcfi); |
2512 | |
2513 | rtx_note *tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn); |
2514 | NOTE_LABEL_NUMBER (tmp) = num; |
2515 | } |
2516 | |
2517 | do |
2518 | { |
2519 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI) |
2520 | vec_safe_push (v&: fde->dw_fde_cfi, NOTE_CFI (insn)); |
2521 | insn = NEXT_INSN (insn); |
2522 | } |
2523 | while (insn != next); |
2524 | } |
2525 | } |
2526 | } |
2527 | |
2528 | static void dump_cfi_row (FILE *f, dw_cfi_row *row); |
2529 | |
2530 | /* If LABEL is the start of a trace, then initialize the state of that |
2531 | trace from CUR_TRACE and CUR_ROW. */ |
2532 | |
2533 | static void |
2534 | maybe_record_trace_start (rtx_insn *start, rtx_insn *origin) |
2535 | { |
2536 | dw_trace_info *ti; |
2537 | |
2538 | ti = get_trace_info (insn: start); |
2539 | gcc_assert (ti != NULL); |
2540 | |
2541 | if (dump_file) |
2542 | { |
2543 | fprintf (stream: dump_file, format: " saw edge from trace %u to %u (via %s %d)\n" , |
2544 | cur_trace->id, ti->id, |
2545 | (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru" ), |
2546 | (origin ? INSN_UID (insn: origin) : 0)); |
2547 | } |
2548 | |
2549 | poly_int64 args_size = cur_trace->end_true_args_size; |
2550 | if (ti->beg_row == NULL) |
2551 | { |
2552 | /* This is the first time we've encountered this trace. Propagate |
2553 | state across the edge and push the trace onto the work list. */ |
2554 | ti->beg_row = copy_cfi_row (src: cur_row); |
2555 | ti->beg_true_args_size = args_size; |
2556 | |
2557 | ti->cfa_store = cur_trace->cfa_store; |
2558 | ti->cfa_temp = cur_trace->cfa_temp; |
2559 | ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy (); |
2560 | |
2561 | trace_work_list.safe_push (obj: ti); |
2562 | |
2563 | if (dump_file) |
2564 | fprintf (stream: dump_file, format: "\tpush trace %u to worklist\n" , ti->id); |
2565 | } |
2566 | else |
2567 | { |
2568 | |
2569 | /* We ought to have the same state incoming to a given trace no |
2570 | matter how we arrive at the trace. Anything else means we've |
2571 | got some kind of optimization error. */ |
2572 | #if CHECKING_P |
2573 | if (!cfi_row_equal_p (a: cur_row, b: ti->beg_row)) |
2574 | { |
2575 | if (dump_file) |
2576 | { |
2577 | fprintf (stream: dump_file, format: "Inconsistent CFI state!\n" ); |
2578 | fprintf (stream: dump_file, format: "SHOULD have:\n" ); |
2579 | dump_cfi_row (f: dump_file, row: ti->beg_row); |
2580 | fprintf (stream: dump_file, format: "DO have:\n" ); |
2581 | dump_cfi_row (f: dump_file, row: cur_row); |
2582 | } |
2583 | |
2584 | gcc_unreachable (); |
2585 | } |
2586 | #endif |
2587 | |
2588 | /* The args_size is allowed to conflict if it isn't actually used. */ |
2589 | if (maybe_ne (a: ti->beg_true_args_size, b: args_size)) |
2590 | ti->args_size_undefined = true; |
2591 | } |
2592 | } |
2593 | |
2594 | /* Similarly, but handle the args_size and CFA reset across EH |
2595 | and non-local goto edges. */ |
2596 | |
2597 | static void |
2598 | maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin) |
2599 | { |
2600 | poly_int64 save_args_size, delta; |
2601 | dw_cfa_location save_cfa; |
2602 | |
2603 | save_args_size = cur_trace->end_true_args_size; |
2604 | if (known_eq (save_args_size, 0)) |
2605 | { |
2606 | maybe_record_trace_start (start, origin); |
2607 | return; |
2608 | } |
2609 | |
2610 | delta = -save_args_size; |
2611 | cur_trace->end_true_args_size = 0; |
2612 | |
2613 | save_cfa = cur_row->cfa; |
2614 | if (cur_row->cfa.reg == dw_stack_pointer_regnum) |
2615 | { |
2616 | /* Convert a change in args_size (always a positive in the |
2617 | direction of stack growth) to a change in stack pointer. */ |
2618 | if (!STACK_GROWS_DOWNWARD) |
2619 | delta = -delta; |
2620 | |
2621 | cur_row->cfa.offset += delta; |
2622 | } |
2623 | |
2624 | maybe_record_trace_start (start, origin); |
2625 | |
2626 | cur_trace->end_true_args_size = save_args_size; |
2627 | cur_row->cfa = save_cfa; |
2628 | } |
2629 | |
2630 | /* Propagate CUR_TRACE state to the destinations implied by INSN. */ |
2631 | /* ??? Sadly, this is in large part a duplicate of make_edges. */ |
2632 | |
2633 | static void |
2634 | create_trace_edges (rtx_insn *insn) |
2635 | { |
2636 | rtx tmp; |
2637 | int i, n; |
2638 | |
2639 | if (JUMP_P (insn)) |
2640 | { |
2641 | rtx_jump_table_data *table; |
2642 | |
2643 | if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX)) |
2644 | return; |
2645 | |
2646 | if (tablejump_p (insn, NULL, &table)) |
2647 | { |
2648 | rtvec vec = table->get_labels (); |
2649 | |
2650 | n = GET_NUM_ELEM (vec); |
2651 | for (i = 0; i < n; ++i) |
2652 | { |
2653 | rtx_insn *lab = as_a <rtx_insn *> (XEXP (RTVEC_ELT (vec, i), 0)); |
2654 | maybe_record_trace_start (start: lab, origin: insn); |
2655 | } |
2656 | |
2657 | /* Handle casesi dispatch insns. */ |
2658 | if ((tmp = tablejump_casesi_pattern (insn)) != NULL_RTX) |
2659 | { |
2660 | rtx_insn * lab = label_ref_label (XEXP (SET_SRC (tmp), 2)); |
2661 | maybe_record_trace_start (start: lab, origin: insn); |
2662 | } |
2663 | } |
2664 | else if (computed_jump_p (insn)) |
2665 | { |
2666 | rtx_insn *temp; |
2667 | unsigned int i; |
2668 | FOR_EACH_VEC_SAFE_ELT (forced_labels, i, temp) |
2669 | maybe_record_trace_start (start: temp, origin: insn); |
2670 | } |
2671 | else if (returnjump_p (insn)) |
2672 | ; |
2673 | else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL) |
2674 | { |
2675 | n = ASM_OPERANDS_LABEL_LENGTH (tmp); |
2676 | for (i = 0; i < n; ++i) |
2677 | { |
2678 | rtx_insn *lab = |
2679 | as_a <rtx_insn *> (XEXP (ASM_OPERANDS_LABEL (tmp, i), 0)); |
2680 | maybe_record_trace_start (start: lab, origin: insn); |
2681 | } |
2682 | } |
2683 | else |
2684 | { |
2685 | rtx_insn *lab = JUMP_LABEL_AS_INSN (insn); |
2686 | gcc_assert (lab != NULL); |
2687 | maybe_record_trace_start (start: lab, origin: insn); |
2688 | } |
2689 | } |
2690 | else if (CALL_P (insn)) |
2691 | { |
2692 | /* Sibling calls don't have edges inside this function. */ |
2693 | if (SIBLING_CALL_P (insn)) |
2694 | return; |
2695 | |
2696 | /* Process non-local goto edges. */ |
2697 | if (can_nonlocal_goto (insn)) |
2698 | for (rtx_insn_list *lab = nonlocal_goto_handler_labels; |
2699 | lab; |
2700 | lab = lab->next ()) |
2701 | maybe_record_trace_start_abnormal (start: lab->insn (), origin: insn); |
2702 | } |
2703 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (p: PATTERN (insn))) |
2704 | { |
2705 | int i, n = seq->len (); |
2706 | for (i = 0; i < n; ++i) |
2707 | create_trace_edges (insn: seq->insn (index: i)); |
2708 | return; |
2709 | } |
2710 | |
2711 | /* Process EH edges. */ |
2712 | if (CALL_P (insn) || cfun->can_throw_non_call_exceptions) |
2713 | { |
2714 | eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn); |
2715 | if (lp) |
2716 | maybe_record_trace_start_abnormal (start: lp->landing_pad, origin: insn); |
2717 | } |
2718 | } |
2719 | |
2720 | /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */ |
2721 | |
2722 | static void |
2723 | scan_insn_after (rtx_insn *insn) |
2724 | { |
2725 | if (RTX_FRAME_RELATED_P (insn)) |
2726 | dwarf2out_frame_debug (insn); |
2727 | notice_args_size (insn); |
2728 | } |
2729 | |
2730 | /* Scan the trace beginning at INSN and create the CFI notes for the |
2731 | instructions therein. */ |
2732 | |
2733 | static void |
2734 | scan_trace (dw_trace_info *trace, bool entry) |
2735 | { |
2736 | rtx_insn *prev, *insn = trace->head; |
2737 | dw_cfa_location this_cfa; |
2738 | |
2739 | if (dump_file) |
2740 | fprintf (stream: dump_file, format: "Processing trace %u : start at %s %d\n" , |
2741 | trace->id, rtx_name[(int) GET_CODE (insn)], |
2742 | INSN_UID (insn)); |
2743 | |
2744 | trace->end_row = copy_cfi_row (src: trace->beg_row); |
2745 | trace->end_true_args_size = trace->beg_true_args_size; |
2746 | |
2747 | cur_trace = trace; |
2748 | cur_row = trace->end_row; |
2749 | |
2750 | this_cfa = cur_row->cfa; |
2751 | cur_cfa = &this_cfa; |
2752 | |
2753 | /* If the current function starts with a non-standard incoming frame |
2754 | sp offset, emit a note before the first instruction. */ |
2755 | if (entry |
2756 | && DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET) |
2757 | { |
2758 | add_cfi_insn = insn; |
2759 | gcc_assert (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_DELETED); |
2760 | this_cfa.offset = INCOMING_FRAME_SP_OFFSET; |
2761 | def_cfa_1 (new_cfa: &this_cfa); |
2762 | } |
2763 | |
2764 | for (prev = insn, insn = NEXT_INSN (insn); |
2765 | insn; |
2766 | prev = insn, insn = NEXT_INSN (insn)) |
2767 | { |
2768 | rtx_insn *control; |
2769 | |
2770 | /* Do everything that happens "before" the insn. */ |
2771 | add_cfi_insn = prev; |
2772 | |
2773 | /* Notice the end of a trace. */ |
2774 | if (BARRIER_P (insn)) |
2775 | { |
2776 | /* Don't bother saving the unneeded queued registers at all. */ |
2777 | queued_reg_saves.truncate (size: 0); |
2778 | break; |
2779 | } |
2780 | if (save_point_p (insn)) |
2781 | { |
2782 | /* Propagate across fallthru edges. */ |
2783 | dwarf2out_flush_queued_reg_saves (); |
2784 | maybe_record_trace_start (start: insn, NULL); |
2785 | break; |
2786 | } |
2787 | |
2788 | if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn)) |
2789 | continue; |
2790 | |
2791 | /* Handle all changes to the row state. Sequences require special |
2792 | handling for the positioning of the notes. */ |
2793 | if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (p: PATTERN (insn))) |
2794 | { |
2795 | rtx_insn *elt; |
2796 | int i, n = pat->len (); |
2797 | |
2798 | control = pat->insn (index: 0); |
2799 | if (can_throw_internal (control)) |
2800 | notice_eh_throw (insn: control); |
2801 | dwarf2out_flush_queued_reg_saves (); |
2802 | |
2803 | if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control)) |
2804 | { |
2805 | /* ??? Hopefully multiple delay slots are not annulled. */ |
2806 | gcc_assert (n == 2); |
2807 | gcc_assert (!RTX_FRAME_RELATED_P (control)); |
2808 | gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL)); |
2809 | |
2810 | elt = pat->insn (index: 1); |
2811 | |
2812 | if (INSN_FROM_TARGET_P (elt)) |
2813 | { |
2814 | cfi_vec save_row_reg_save; |
2815 | |
2816 | /* If ELT is an instruction from target of an annulled |
2817 | branch, the effects are for the target only and so |
2818 | the args_size and CFA along the current path |
2819 | shouldn't change. */ |
2820 | add_cfi_insn = NULL; |
2821 | poly_int64 restore_args_size = cur_trace->end_true_args_size; |
2822 | cur_cfa = &cur_row->cfa; |
2823 | save_row_reg_save = vec_safe_copy (src: cur_row->reg_save); |
2824 | |
2825 | scan_insn_after (insn: elt); |
2826 | |
2827 | /* ??? Should we instead save the entire row state? */ |
2828 | gcc_assert (!queued_reg_saves.length ()); |
2829 | |
2830 | create_trace_edges (insn: control); |
2831 | |
2832 | cur_trace->end_true_args_size = restore_args_size; |
2833 | cur_row->cfa = this_cfa; |
2834 | cur_row->reg_save = save_row_reg_save; |
2835 | cur_cfa = &this_cfa; |
2836 | } |
2837 | else |
2838 | { |
2839 | /* If ELT is a annulled branch-taken instruction (i.e. |
2840 | executed only when branch is not taken), the args_size |
2841 | and CFA should not change through the jump. */ |
2842 | create_trace_edges (insn: control); |
2843 | |
2844 | /* Update and continue with the trace. */ |
2845 | add_cfi_insn = insn; |
2846 | scan_insn_after (insn: elt); |
2847 | def_cfa_1 (new_cfa: &this_cfa); |
2848 | } |
2849 | continue; |
2850 | } |
2851 | |
2852 | /* The insns in the delay slot should all be considered to happen |
2853 | "before" a call insn. Consider a call with a stack pointer |
2854 | adjustment in the delay slot. The backtrace from the callee |
2855 | should include the sp adjustment. Unfortunately, that leaves |
2856 | us with an unavoidable unwinding error exactly at the call insn |
2857 | itself. For jump insns we'd prefer to avoid this error by |
2858 | placing the notes after the sequence. */ |
2859 | if (JUMP_P (control)) |
2860 | add_cfi_insn = insn; |
2861 | |
2862 | for (i = 1; i < n; ++i) |
2863 | { |
2864 | elt = pat->insn (index: i); |
2865 | scan_insn_after (insn: elt); |
2866 | } |
2867 | |
2868 | /* Make sure any register saves are visible at the jump target. */ |
2869 | dwarf2out_flush_queued_reg_saves (); |
2870 | any_cfis_emitted = false; |
2871 | |
2872 | /* However, if there is some adjustment on the call itself, e.g. |
2873 | a call_pop, that action should be considered to happen after |
2874 | the call returns. */ |
2875 | add_cfi_insn = insn; |
2876 | scan_insn_after (insn: control); |
2877 | } |
2878 | else |
2879 | { |
2880 | /* Flush data before calls and jumps, and of course if necessary. */ |
2881 | if (can_throw_internal (insn)) |
2882 | { |
2883 | notice_eh_throw (insn); |
2884 | dwarf2out_flush_queued_reg_saves (); |
2885 | } |
2886 | else if (!NONJUMP_INSN_P (insn) |
2887 | || clobbers_queued_reg_save (insn) |
2888 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) |
2889 | dwarf2out_flush_queued_reg_saves (); |
2890 | any_cfis_emitted = false; |
2891 | |
2892 | add_cfi_insn = insn; |
2893 | scan_insn_after (insn); |
2894 | control = insn; |
2895 | } |
2896 | |
2897 | /* Between frame-related-p and args_size we might have otherwise |
2898 | emitted two cfa adjustments. Do it now. */ |
2899 | def_cfa_1 (new_cfa: &this_cfa); |
2900 | |
2901 | /* Minimize the number of advances by emitting the entire queue |
2902 | once anything is emitted. */ |
2903 | if (any_cfis_emitted |
2904 | || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL)) |
2905 | dwarf2out_flush_queued_reg_saves (); |
2906 | |
2907 | /* Note that a test for control_flow_insn_p does exactly the |
2908 | same tests as are done to actually create the edges. So |
2909 | always call the routine and let it not create edges for |
2910 | non-control-flow insns. */ |
2911 | create_trace_edges (insn: control); |
2912 | } |
2913 | |
2914 | gcc_assert (!cfun->fde || !cfun->fde->rule18); |
2915 | add_cfi_insn = NULL; |
2916 | cur_row = NULL; |
2917 | cur_trace = NULL; |
2918 | cur_cfa = NULL; |
2919 | } |
2920 | |
2921 | /* Scan the function and create the initial set of CFI notes. */ |
2922 | |
2923 | static void |
2924 | create_cfi_notes (void) |
2925 | { |
2926 | dw_trace_info *ti; |
2927 | |
2928 | gcc_checking_assert (!queued_reg_saves.exists ()); |
2929 | gcc_checking_assert (!trace_work_list.exists ()); |
2930 | |
2931 | /* Always begin at the entry trace. */ |
2932 | ti = &trace_info[0]; |
2933 | scan_trace (trace: ti, entry: true); |
2934 | |
2935 | while (!trace_work_list.is_empty ()) |
2936 | { |
2937 | ti = trace_work_list.pop (); |
2938 | scan_trace (trace: ti, entry: false); |
2939 | } |
2940 | |
2941 | queued_reg_saves.release (); |
2942 | trace_work_list.release (); |
2943 | } |
2944 | |
2945 | /* Return the insn before the first NOTE_INSN_CFI after START. */ |
2946 | |
2947 | static rtx_insn * |
2948 | before_next_cfi_note (rtx_insn *start) |
2949 | { |
2950 | rtx_insn *prev = start; |
2951 | while (start) |
2952 | { |
2953 | if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI) |
2954 | return prev; |
2955 | prev = start; |
2956 | start = NEXT_INSN (insn: start); |
2957 | } |
2958 | gcc_unreachable (); |
2959 | } |
2960 | |
2961 | /* Insert CFI notes between traces to properly change state between them. */ |
2962 | |
2963 | static void |
2964 | connect_traces (void) |
2965 | { |
2966 | unsigned i, n; |
2967 | dw_trace_info *prev_ti, *ti; |
2968 | |
2969 | /* ??? Ideally, we should have both queued and processed every trace. |
2970 | However the current representation of constant pools on various targets |
2971 | is indistinguishable from unreachable code. Assume for the moment that |
2972 | we can simply skip over such traces. */ |
2973 | /* ??? Consider creating a DATA_INSN rtx code to indicate that |
2974 | these are not "real" instructions, and should not be considered. |
2975 | This could be generically useful for tablejump data as well. */ |
2976 | /* Remove all unprocessed traces from the list. */ |
2977 | unsigned ix, ix2; |
2978 | VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info, ix, ix2, ti, 1, |
2979 | trace_info.length (), ti->beg_row == NULL); |
2980 | FOR_EACH_VEC_ELT (trace_info, ix, ti) |
2981 | gcc_assert (ti->end_row != NULL); |
2982 | |
2983 | /* Work from the end back to the beginning. This lets us easily insert |
2984 | remember/restore_state notes in the correct order wrt other notes. */ |
2985 | n = trace_info.length (); |
2986 | prev_ti = &trace_info[n - 1]; |
2987 | for (i = n - 1; i > 0; --i) |
2988 | { |
2989 | dw_cfi_row *old_row; |
2990 | |
2991 | ti = prev_ti; |
2992 | prev_ti = &trace_info[i - 1]; |
2993 | |
2994 | add_cfi_insn = ti->head; |
2995 | |
2996 | /* In dwarf2out_switch_text_section, we'll begin a new FDE |
2997 | for the portion of the function in the alternate text |
2998 | section. The row state at the very beginning of that |
2999 | new FDE will be exactly the row state from the CIE. */ |
3000 | if (ti->switch_sections) |
3001 | old_row = cie_cfi_row; |
3002 | else |
3003 | { |
3004 | old_row = prev_ti->end_row; |
3005 | /* If there's no change from the previous end state, fine. */ |
3006 | if (cfi_row_equal_p (a: old_row, b: ti->beg_row)) |
3007 | ; |
3008 | /* Otherwise check for the common case of sharing state with |
3009 | the beginning of an epilogue, but not the end. Insert |
3010 | remember/restore opcodes in that case. */ |
3011 | else if (cfi_row_equal_p (a: prev_ti->beg_row, b: ti->beg_row)) |
3012 | { |
3013 | dw_cfi_ref cfi; |
3014 | |
3015 | /* Note that if we blindly insert the remember at the |
3016 | start of the trace, we can wind up increasing the |
3017 | size of the unwind info due to extra advance opcodes. |
3018 | Instead, put the remember immediately before the next |
3019 | state change. We know there must be one, because the |
3020 | state at the beginning and head of the trace differ. */ |
3021 | add_cfi_insn = before_next_cfi_note (start: prev_ti->head); |
3022 | cfi = new_cfi (); |
3023 | cfi->dw_cfi_opc = DW_CFA_remember_state; |
3024 | add_cfi (cfi); |
3025 | |
3026 | add_cfi_insn = ti->head; |
3027 | cfi = new_cfi (); |
3028 | cfi->dw_cfi_opc = DW_CFA_restore_state; |
3029 | add_cfi (cfi); |
3030 | |
3031 | /* If the target unwinder does not save the CFA as part of the |
3032 | register state, we need to restore it separately. */ |
3033 | if (targetm.asm_out.should_restore_cfa_state () |
3034 | && (cfi = def_cfa_0 (old_cfa: &old_row->cfa, new_cfa: &ti->beg_row->cfa))) |
3035 | add_cfi (cfi); |
3036 | |
3037 | old_row = prev_ti->beg_row; |
3038 | } |
3039 | /* Otherwise, we'll simply change state from the previous end. */ |
3040 | } |
3041 | |
3042 | change_cfi_row (old_row, new_row: ti->beg_row); |
3043 | |
3044 | if (dump_file && add_cfi_insn != ti->head) |
3045 | { |
3046 | rtx_insn *note; |
3047 | |
3048 | fprintf (stream: dump_file, format: "Fixup between trace %u and %u:\n" , |
3049 | prev_ti->id, ti->id); |
3050 | |
3051 | note = ti->head; |
3052 | do |
3053 | { |
3054 | note = NEXT_INSN (insn: note); |
3055 | gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI); |
3056 | output_cfi_directive (f: dump_file, NOTE_CFI (note)); |
3057 | } |
3058 | while (note != add_cfi_insn); |
3059 | } |
3060 | } |
3061 | |
3062 | /* Connect args_size between traces that have can_throw_internal insns. */ |
3063 | if (cfun->eh->lp_array) |
3064 | { |
3065 | poly_int64 prev_args_size = 0; |
3066 | |
3067 | for (i = 0; i < n; ++i) |
3068 | { |
3069 | ti = &trace_info[i]; |
3070 | |
3071 | if (ti->switch_sections) |
3072 | prev_args_size = 0; |
3073 | |
3074 | if (ti->eh_head == NULL) |
3075 | continue; |
3076 | |
3077 | /* We require either the incoming args_size values to match or the |
3078 | presence of an insn setting it before the first EH insn. */ |
3079 | gcc_assert (!ti->args_size_undefined || ti->args_size_defined_for_eh); |
3080 | |
3081 | /* In the latter case, we force the creation of a CFI note. */ |
3082 | if (ti->args_size_undefined |
3083 | || maybe_ne (a: ti->beg_delay_args_size, b: prev_args_size)) |
3084 | { |
3085 | /* ??? Search back to previous CFI note. */ |
3086 | add_cfi_insn = PREV_INSN (insn: ti->eh_head); |
3087 | add_cfi_args_size (size: ti->beg_delay_args_size); |
3088 | } |
3089 | |
3090 | prev_args_size = ti->end_delay_args_size; |
3091 | } |
3092 | } |
3093 | } |
3094 | |
3095 | /* Set up the pseudo-cfg of instruction traces, as described at the |
3096 | block comment at the top of the file. */ |
3097 | |
3098 | static void |
3099 | create_pseudo_cfg (void) |
3100 | { |
3101 | bool saw_barrier, switch_sections; |
3102 | dw_trace_info ti; |
3103 | rtx_insn *insn; |
3104 | unsigned i; |
3105 | |
3106 | /* The first trace begins at the start of the function, |
3107 | and begins with the CIE row state. */ |
3108 | trace_info.create (nelems: 16); |
3109 | memset (s: &ti, c: 0, n: sizeof (ti)); |
3110 | ti.head = get_insns (); |
3111 | ti.beg_row = cie_cfi_row; |
3112 | ti.cfa_store = cie_cfi_row->cfa; |
3113 | ti.cfa_temp.reg.set_by_dwreg (INVALID_REGNUM); |
3114 | trace_info.quick_push (obj: ti); |
3115 | |
3116 | if (cie_return_save) |
3117 | ti.regs_saved_in_regs.safe_push (obj: *cie_return_save); |
3118 | |
3119 | /* Walk all the insns, collecting start of trace locations. */ |
3120 | saw_barrier = false; |
3121 | switch_sections = false; |
3122 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) |
3123 | { |
3124 | if (BARRIER_P (insn)) |
3125 | saw_barrier = true; |
3126 | else if (NOTE_P (insn) |
3127 | && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) |
3128 | { |
3129 | /* We should have just seen a barrier. */ |
3130 | gcc_assert (saw_barrier); |
3131 | switch_sections = true; |
3132 | } |
3133 | /* Watch out for save_point notes between basic blocks. |
3134 | In particular, a note after a barrier. Do not record these, |
3135 | delaying trace creation until the label. */ |
3136 | else if (save_point_p (insn) |
3137 | && (LABEL_P (insn) || !saw_barrier)) |
3138 | { |
3139 | memset (s: &ti, c: 0, n: sizeof (ti)); |
3140 | ti.head = insn; |
3141 | ti.switch_sections = switch_sections; |
3142 | ti.id = trace_info.length (); |
3143 | trace_info.safe_push (obj: ti); |
3144 | |
3145 | saw_barrier = false; |
3146 | switch_sections = false; |
3147 | } |
3148 | } |
3149 | |
3150 | /* Create the trace index after we've finished building trace_info, |
3151 | avoiding stale pointer problems due to reallocation. */ |
3152 | trace_index |
3153 | = new hash_table<trace_info_hasher> (trace_info.length ()); |
3154 | dw_trace_info *tp; |
3155 | FOR_EACH_VEC_ELT (trace_info, i, tp) |
3156 | { |
3157 | dw_trace_info **slot; |
3158 | |
3159 | if (dump_file) |
3160 | fprintf (stream: dump_file, format: "Creating trace %u : start at %s %d%s\n" , tp->id, |
3161 | rtx_name[(int) GET_CODE (tp->head)], INSN_UID (insn: tp->head), |
3162 | tp->switch_sections ? " (section switch)" : "" ); |
3163 | |
3164 | slot = trace_index->find_slot_with_hash (comparable: tp, hash: INSN_UID (insn: tp->head), insert: INSERT); |
3165 | gcc_assert (*slot == NULL); |
3166 | *slot = tp; |
3167 | } |
3168 | } |
3169 | |
3170 | /* Record the initial position of the return address. RTL is |
3171 | INCOMING_RETURN_ADDR_RTX. */ |
3172 | |
3173 | static void |
3174 | initial_return_save (rtx rtl) |
3175 | { |
3176 | struct cfa_reg reg; |
3177 | reg.set_by_dwreg (INVALID_REGNUM); |
3178 | poly_int64 offset = 0; |
3179 | |
3180 | switch (GET_CODE (rtl)) |
3181 | { |
3182 | case REG: |
3183 | /* RA is in a register. */ |
3184 | reg = dwf_cfa_reg (reg: rtl); |
3185 | break; |
3186 | |
3187 | case MEM: |
3188 | /* RA is on the stack. */ |
3189 | rtl = XEXP (rtl, 0); |
3190 | switch (GET_CODE (rtl)) |
3191 | { |
3192 | case REG: |
3193 | gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM); |
3194 | offset = 0; |
3195 | break; |
3196 | |
3197 | case PLUS: |
3198 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); |
3199 | offset = rtx_to_poly_int64 (XEXP (rtl, 1)); |
3200 | break; |
3201 | |
3202 | case MINUS: |
3203 | gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM); |
3204 | offset = -rtx_to_poly_int64 (XEXP (rtl, 1)); |
3205 | break; |
3206 | |
3207 | default: |
3208 | gcc_unreachable (); |
3209 | } |
3210 | |
3211 | break; |
3212 | |
3213 | case PLUS: |
3214 | /* The return address is at some offset from any value we can |
3215 | actually load. For instance, on the SPARC it is in %i7+8. Just |
3216 | ignore the offset for now; it doesn't matter for unwinding frames. */ |
3217 | gcc_assert (CONST_INT_P (XEXP (rtl, 1))); |
3218 | initial_return_save (XEXP (rtl, 0)); |
3219 | return; |
3220 | |
3221 | default: |
3222 | gcc_unreachable (); |
3223 | } |
3224 | |
3225 | if (reg.reg != DWARF_FRAME_RETURN_COLUMN) |
3226 | { |
3227 | if (reg.reg != INVALID_REGNUM) |
3228 | record_reg_saved_in_reg (dest: rtl, src: pc_rtx); |
3229 | reg_save (DWARF_FRAME_RETURN_COLUMN, sreg: reg, offset: offset - cur_row->cfa.offset); |
3230 | } |
3231 | } |
3232 | |
3233 | static void |
3234 | create_cie_data (void) |
3235 | { |
3236 | dw_cfa_location loc; |
3237 | dw_trace_info cie_trace; |
3238 | |
3239 | dw_stack_pointer_regnum = dwf_cfa_reg (stack_pointer_rtx); |
3240 | |
3241 | memset (s: &cie_trace, c: 0, n: sizeof (cie_trace)); |
3242 | cur_trace = &cie_trace; |
3243 | |
3244 | add_cfi_vec = &cie_cfi_vec; |
3245 | cie_cfi_row = cur_row = new_cfi_row (); |
3246 | |
3247 | /* On entry, the Canonical Frame Address is at SP. */ |
3248 | memset (s: &loc, c: 0, n: sizeof (loc)); |
3249 | loc.reg = dw_stack_pointer_regnum; |
3250 | /* create_cie_data is called just once per TU, and when using .cfi_startproc |
3251 | is even done by the assembler rather than the compiler. If the target |
3252 | has different incoming frame sp offsets depending on what kind of |
3253 | function it is, use a single constant offset for the target and |
3254 | if needed, adjust before the first instruction in insn stream. */ |
3255 | loc.offset = DEFAULT_INCOMING_FRAME_SP_OFFSET; |
3256 | def_cfa_1 (new_cfa: &loc); |
3257 | |
3258 | if (targetm.debug_unwind_info () == UI_DWARF2 |
3259 | || targetm_common.except_unwind_info (&global_options) == UI_DWARF2) |
3260 | { |
3261 | initial_return_save (INCOMING_RETURN_ADDR_RTX); |
3262 | |
3263 | /* For a few targets, we have the return address incoming into a |
3264 | register, but choose a different return column. This will result |
3265 | in a DW_CFA_register for the return, and an entry in |
3266 | regs_saved_in_regs to match. If the target later stores that |
3267 | return address register to the stack, we want to be able to emit |
3268 | the DW_CFA_offset against the return column, not the intermediate |
3269 | save register. Save the contents of regs_saved_in_regs so that |
3270 | we can re-initialize it at the start of each function. */ |
3271 | switch (cie_trace.regs_saved_in_regs.length ()) |
3272 | { |
3273 | case 0: |
3274 | break; |
3275 | case 1: |
3276 | cie_return_save = ggc_alloc<reg_saved_in_data> (); |
3277 | *cie_return_save = cie_trace.regs_saved_in_regs[0]; |
3278 | cie_trace.regs_saved_in_regs.release (); |
3279 | break; |
3280 | default: |
3281 | gcc_unreachable (); |
3282 | } |
3283 | } |
3284 | |
3285 | add_cfi_vec = NULL; |
3286 | cur_row = NULL; |
3287 | cur_trace = NULL; |
3288 | } |
3289 | |
3290 | /* Annotate the function with NOTE_INSN_CFI notes to record the CFI |
3291 | state at each location within the function. These notes will be |
3292 | emitted during pass_final. */ |
3293 | |
3294 | static void |
3295 | execute_dwarf2_frame (void) |
3296 | { |
3297 | /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */ |
3298 | dw_frame_pointer_regnum = dwf_cfa_reg (hard_frame_pointer_rtx); |
3299 | |
3300 | /* The first time we're called, compute the incoming frame state. */ |
3301 | if (cie_cfi_vec == NULL) |
3302 | create_cie_data (); |
3303 | |
3304 | dwarf2out_alloc_current_fde (); |
3305 | |
3306 | create_pseudo_cfg (); |
3307 | |
3308 | /* Do the work. */ |
3309 | create_cfi_notes (); |
3310 | connect_traces (); |
3311 | add_cfis_to_fde (); |
3312 | |
3313 | /* Free all the data we allocated. */ |
3314 | { |
3315 | size_t i; |
3316 | dw_trace_info *ti; |
3317 | |
3318 | FOR_EACH_VEC_ELT (trace_info, i, ti) |
3319 | ti->regs_saved_in_regs.release (); |
3320 | } |
3321 | trace_info.release (); |
3322 | |
3323 | delete trace_index; |
3324 | trace_index = NULL; |
3325 | } |
3326 | |
3327 | /* Convert a DWARF call frame info. operation to its string name */ |
3328 | |
3329 | static const char * |
3330 | dwarf_cfi_name (unsigned int cfi_opc) |
3331 | { |
3332 | const char *name = get_DW_CFA_name (opc: cfi_opc); |
3333 | |
3334 | if (name != NULL) |
3335 | return name; |
3336 | |
3337 | return "DW_CFA_<unknown>" ; |
3338 | } |
3339 | |
3340 | /* This routine will generate the correct assembly data for a location |
3341 | description based on a cfi entry with a complex address. */ |
3342 | |
3343 | static void |
3344 | output_cfa_loc (dw_cfi_ref cfi, int for_eh) |
3345 | { |
3346 | dw_loc_descr_ref loc; |
3347 | unsigned long size; |
3348 | |
3349 | if (cfi->dw_cfi_opc == DW_CFA_expression |
3350 | || cfi->dw_cfi_opc == DW_CFA_val_expression) |
3351 | { |
3352 | unsigned r = |
3353 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3354 | dw2_asm_output_data (1, r, NULL); |
3355 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; |
3356 | } |
3357 | else |
3358 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; |
3359 | |
3360 | /* Output the size of the block. */ |
3361 | size = size_of_locs (loc); |
3362 | dw2_asm_output_data_uleb128 (size, NULL); |
3363 | |
3364 | /* Now output the operations themselves. */ |
3365 | output_loc_sequence (loc, for_eh); |
3366 | } |
3367 | |
3368 | /* Similar, but used for .cfi_escape. */ |
3369 | |
3370 | static void |
3371 | output_cfa_loc_raw (dw_cfi_ref cfi) |
3372 | { |
3373 | dw_loc_descr_ref loc; |
3374 | unsigned long size; |
3375 | |
3376 | if (cfi->dw_cfi_opc == DW_CFA_expression |
3377 | || cfi->dw_cfi_opc == DW_CFA_val_expression) |
3378 | { |
3379 | unsigned r = |
3380 | DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3381 | fprintf (stream: asm_out_file, format: "%#x," , r); |
3382 | loc = cfi->dw_cfi_oprnd2.dw_cfi_loc; |
3383 | } |
3384 | else |
3385 | loc = cfi->dw_cfi_oprnd1.dw_cfi_loc; |
3386 | |
3387 | /* Output the size of the block. */ |
3388 | size = size_of_locs (loc); |
3389 | dw2_asm_output_data_uleb128_raw (size); |
3390 | fputc (c: ',', stream: asm_out_file); |
3391 | |
3392 | /* Now output the operations themselves. */ |
3393 | output_loc_sequence_raw (loc); |
3394 | } |
3395 | |
3396 | /* Output a Call Frame Information opcode and its operand(s). */ |
3397 | |
3398 | void |
3399 | output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh) |
3400 | { |
3401 | unsigned long r; |
3402 | HOST_WIDE_INT off; |
3403 | |
3404 | if (cfi->dw_cfi_opc == DW_CFA_advance_loc) |
3405 | dw2_asm_output_data (1, (cfi->dw_cfi_opc |
3406 | | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)), |
3407 | "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX, |
3408 | ((unsigned HOST_WIDE_INT) |
3409 | cfi->dw_cfi_oprnd1.dw_cfi_offset)); |
3410 | else if (cfi->dw_cfi_opc == DW_CFA_offset) |
3411 | { |
3412 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3413 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), |
3414 | "DW_CFA_offset, column %#lx" , r); |
3415 | off = div_data_align (off: cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3416 | dw2_asm_output_data_uleb128 (off, NULL); |
3417 | } |
3418 | else if (cfi->dw_cfi_opc == DW_CFA_restore) |
3419 | { |
3420 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3421 | dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)), |
3422 | "DW_CFA_restore, column %#lx" , r); |
3423 | } |
3424 | else |
3425 | { |
3426 | dw2_asm_output_data (1, cfi->dw_cfi_opc, |
3427 | "%s" , dwarf_cfi_name (cfi_opc: cfi->dw_cfi_opc)); |
3428 | |
3429 | switch (cfi->dw_cfi_opc) |
3430 | { |
3431 | case DW_CFA_set_loc: |
3432 | if (for_eh) |
3433 | dw2_asm_output_encoded_addr_rtx ( |
3434 | ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0), |
3435 | gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr), |
3436 | false, NULL); |
3437 | else |
3438 | dw2_asm_output_addr (DWARF2_ADDR_SIZE, |
3439 | cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL); |
3440 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; |
3441 | break; |
3442 | |
3443 | case DW_CFA_advance_loc1: |
3444 | dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr, |
3445 | fde->dw_fde_current_label, NULL); |
3446 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; |
3447 | break; |
3448 | |
3449 | case DW_CFA_advance_loc2: |
3450 | dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr, |
3451 | fde->dw_fde_current_label, NULL); |
3452 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; |
3453 | break; |
3454 | |
3455 | case DW_CFA_advance_loc4: |
3456 | dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr, |
3457 | fde->dw_fde_current_label, NULL); |
3458 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; |
3459 | break; |
3460 | |
3461 | case DW_CFA_MIPS_advance_loc8: |
3462 | dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr, |
3463 | fde->dw_fde_current_label, NULL); |
3464 | fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr; |
3465 | break; |
3466 | |
3467 | case DW_CFA_offset_extended: |
3468 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3469 | dw2_asm_output_data_uleb128 (r, NULL); |
3470 | off = div_data_align (off: cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3471 | dw2_asm_output_data_uleb128 (off, NULL); |
3472 | break; |
3473 | |
3474 | case DW_CFA_def_cfa: |
3475 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3476 | dw2_asm_output_data_uleb128 (r, NULL); |
3477 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL); |
3478 | break; |
3479 | |
3480 | case DW_CFA_offset_extended_sf: |
3481 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3482 | dw2_asm_output_data_uleb128 (r, NULL); |
3483 | off = div_data_align (off: cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3484 | dw2_asm_output_data_sleb128 (off, NULL); |
3485 | break; |
3486 | |
3487 | case DW_CFA_def_cfa_sf: |
3488 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3489 | dw2_asm_output_data_uleb128 (r, NULL); |
3490 | off = div_data_align (off: cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3491 | dw2_asm_output_data_sleb128 (off, NULL); |
3492 | break; |
3493 | |
3494 | case DW_CFA_restore_extended: |
3495 | case DW_CFA_undefined: |
3496 | case DW_CFA_same_value: |
3497 | case DW_CFA_def_cfa_register: |
3498 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3499 | dw2_asm_output_data_uleb128 (r, NULL); |
3500 | break; |
3501 | |
3502 | case DW_CFA_register: |
3503 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh); |
3504 | dw2_asm_output_data_uleb128 (r, NULL); |
3505 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh); |
3506 | dw2_asm_output_data_uleb128 (r, NULL); |
3507 | break; |
3508 | |
3509 | case DW_CFA_def_cfa_offset: |
3510 | case DW_CFA_GNU_args_size: |
3511 | dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL); |
3512 | break; |
3513 | |
3514 | case DW_CFA_def_cfa_offset_sf: |
3515 | off = div_data_align (off: cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3516 | dw2_asm_output_data_sleb128 (off, NULL); |
3517 | break; |
3518 | |
3519 | case DW_CFA_GNU_window_save: |
3520 | break; |
3521 | |
3522 | case DW_CFA_def_cfa_expression: |
3523 | case DW_CFA_expression: |
3524 | case DW_CFA_val_expression: |
3525 | output_cfa_loc (cfi, for_eh); |
3526 | break; |
3527 | |
3528 | case DW_CFA_GNU_negative_offset_extended: |
3529 | /* Obsoleted by DW_CFA_offset_extended_sf. */ |
3530 | gcc_unreachable (); |
3531 | |
3532 | default: |
3533 | break; |
3534 | } |
3535 | } |
3536 | } |
3537 | |
3538 | /* Similar, but do it via assembler directives instead. */ |
3539 | |
3540 | void |
3541 | output_cfi_directive (FILE *f, dw_cfi_ref cfi) |
3542 | { |
3543 | unsigned long r, r2; |
3544 | |
3545 | switch (cfi->dw_cfi_opc) |
3546 | { |
3547 | case DW_CFA_advance_loc: |
3548 | case DW_CFA_advance_loc1: |
3549 | case DW_CFA_advance_loc2: |
3550 | case DW_CFA_advance_loc4: |
3551 | case DW_CFA_MIPS_advance_loc8: |
3552 | case DW_CFA_set_loc: |
3553 | /* Should only be created in a code path not followed when emitting |
3554 | via directives. The assembler is going to take care of this for |
3555 | us. But this routines is also used for debugging dumps, so |
3556 | print something. */ |
3557 | gcc_assert (f != asm_out_file); |
3558 | fprintf (stream: f, format: "\t.cfi_advance_loc\n" ); |
3559 | break; |
3560 | |
3561 | case DW_CFA_offset: |
3562 | case DW_CFA_offset_extended: |
3563 | case DW_CFA_offset_extended_sf: |
3564 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3565 | fprintf (stream: f, format: "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC"\n" , |
3566 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3567 | break; |
3568 | |
3569 | case DW_CFA_restore: |
3570 | case DW_CFA_restore_extended: |
3571 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3572 | fprintf (stream: f, format: "\t.cfi_restore %lu\n" , r); |
3573 | break; |
3574 | |
3575 | case DW_CFA_undefined: |
3576 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3577 | fprintf (stream: f, format: "\t.cfi_undefined %lu\n" , r); |
3578 | break; |
3579 | |
3580 | case DW_CFA_same_value: |
3581 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3582 | fprintf (stream: f, format: "\t.cfi_same_value %lu\n" , r); |
3583 | break; |
3584 | |
3585 | case DW_CFA_def_cfa: |
3586 | case DW_CFA_def_cfa_sf: |
3587 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3588 | fprintf (stream: f, format: "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC"\n" , |
3589 | r, cfi->dw_cfi_oprnd2.dw_cfi_offset); |
3590 | break; |
3591 | |
3592 | case DW_CFA_def_cfa_register: |
3593 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3594 | fprintf (stream: f, format: "\t.cfi_def_cfa_register %lu\n" , r); |
3595 | break; |
3596 | |
3597 | case DW_CFA_register: |
3598 | r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1); |
3599 | r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1); |
3600 | fprintf (stream: f, format: "\t.cfi_register %lu, %lu\n" , r, r2); |
3601 | break; |
3602 | |
3603 | case DW_CFA_def_cfa_offset: |
3604 | case DW_CFA_def_cfa_offset_sf: |
3605 | fprintf (stream: f, format: "\t.cfi_def_cfa_offset " |
3606 | HOST_WIDE_INT_PRINT_DEC"\n" , |
3607 | cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3608 | break; |
3609 | |
3610 | case DW_CFA_remember_state: |
3611 | fprintf (stream: f, format: "\t.cfi_remember_state\n" ); |
3612 | break; |
3613 | case DW_CFA_restore_state: |
3614 | fprintf (stream: f, format: "\t.cfi_restore_state\n" ); |
3615 | break; |
3616 | |
3617 | case DW_CFA_GNU_args_size: |
3618 | if (f == asm_out_file) |
3619 | { |
3620 | fprintf (stream: f, format: "\t.cfi_escape %#x," , DW_CFA_GNU_args_size); |
3621 | dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3622 | if (flag_debug_asm) |
3623 | fprintf (stream: f, format: "\t%s args_size " HOST_WIDE_INT_PRINT_DEC, |
3624 | ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3625 | fputc (c: '\n', stream: f); |
3626 | } |
3627 | else |
3628 | { |
3629 | fprintf (stream: f, format: "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC "\n" , |
3630 | cfi->dw_cfi_oprnd1.dw_cfi_offset); |
3631 | } |
3632 | break; |
3633 | |
3634 | case DW_CFA_GNU_window_save: |
3635 | fprintf (stream: f, format: "\t.cfi_window_save\n" ); |
3636 | break; |
3637 | |
3638 | case DW_CFA_def_cfa_expression: |
3639 | case DW_CFA_expression: |
3640 | case DW_CFA_val_expression: |
3641 | if (f != asm_out_file) |
3642 | { |
3643 | fprintf (stream: f, format: "\t.cfi_%scfa_%sexpression ...\n" , |
3644 | cfi->dw_cfi_opc == DW_CFA_def_cfa_expression ? "def_" : "" , |
3645 | cfi->dw_cfi_opc == DW_CFA_val_expression ? "val_" : "" ); |
3646 | break; |
3647 | } |
3648 | fprintf (stream: f, format: "\t.cfi_escape %#x," , cfi->dw_cfi_opc); |
3649 | output_cfa_loc_raw (cfi); |
3650 | fputc (c: '\n', stream: f); |
3651 | break; |
3652 | |
3653 | default: |
3654 | gcc_unreachable (); |
3655 | } |
3656 | } |
3657 | |
3658 | void |
3659 | dwarf2out_emit_cfi (dw_cfi_ref cfi) |
3660 | { |
3661 | if (dwarf2out_do_cfi_asm ()) |
3662 | output_cfi_directive (f: asm_out_file, cfi); |
3663 | } |
3664 | |
3665 | static void |
3666 | dump_cfi_row (FILE *f, dw_cfi_row *row) |
3667 | { |
3668 | dw_cfi_ref cfi; |
3669 | unsigned i; |
3670 | |
3671 | cfi = row->cfa_cfi; |
3672 | if (!cfi) |
3673 | { |
3674 | dw_cfa_location dummy; |
3675 | memset (s: &dummy, c: 0, n: sizeof (dummy)); |
3676 | dummy.reg.set_by_dwreg (INVALID_REGNUM); |
3677 | cfi = def_cfa_0 (old_cfa: &dummy, new_cfa: &row->cfa); |
3678 | } |
3679 | output_cfi_directive (f, cfi); |
3680 | |
3681 | FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi) |
3682 | if (cfi) |
3683 | output_cfi_directive (f, cfi); |
3684 | } |
3685 | |
3686 | void debug_cfi_row (dw_cfi_row *row); |
3687 | |
3688 | void |
3689 | debug_cfi_row (dw_cfi_row *row) |
3690 | { |
3691 | dump_cfi_row (stderr, row); |
3692 | } |
3693 | |
3694 | |
3695 | /* Save the result of dwarf2out_do_frame across PCH. |
3696 | This variable is tri-state, with 0 unset, >0 true, <0 false. */ |
3697 | static GTY(()) signed char saved_do_cfi_asm = 0; |
3698 | |
3699 | /* Decide whether to emit EH frame unwind information for the current |
3700 | translation unit. */ |
3701 | |
3702 | bool |
3703 | dwarf2out_do_eh_frame (void) |
3704 | { |
3705 | return |
3706 | (flag_unwind_tables || flag_exceptions) |
3707 | && targetm_common.except_unwind_info (&global_options) == UI_DWARF2; |
3708 | } |
3709 | |
3710 | /* Decide whether we want to emit frame unwind information for the current |
3711 | translation unit. */ |
3712 | |
3713 | bool |
3714 | dwarf2out_do_frame (void) |
3715 | { |
3716 | /* We want to emit correct CFA location expressions or lists, so we |
3717 | have to return true if we're going to generate debug info, even if |
3718 | we're not going to output frame or unwind info. */ |
3719 | if (dwarf_debuginfo_p () || dwarf_based_debuginfo_p ()) |
3720 | return true; |
3721 | |
3722 | if (saved_do_cfi_asm > 0) |
3723 | return true; |
3724 | |
3725 | if (targetm.debug_unwind_info () == UI_DWARF2) |
3726 | return true; |
3727 | |
3728 | if (dwarf2out_do_eh_frame ()) |
3729 | return true; |
3730 | |
3731 | return false; |
3732 | } |
3733 | |
3734 | /* Decide whether to emit frame unwind via assembler directives. */ |
3735 | |
3736 | bool |
3737 | dwarf2out_do_cfi_asm (void) |
3738 | { |
3739 | int enc; |
3740 | |
3741 | if (saved_do_cfi_asm != 0) |
3742 | return saved_do_cfi_asm > 0; |
3743 | |
3744 | /* Assume failure for a moment. */ |
3745 | saved_do_cfi_asm = -1; |
3746 | |
3747 | if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ()) |
3748 | return false; |
3749 | if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE) |
3750 | return false; |
3751 | |
3752 | /* Make sure the personality encoding is one the assembler can support. |
3753 | In particular, aligned addresses can't be handled. */ |
3754 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1); |
3755 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) |
3756 | return false; |
3757 | enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0); |
3758 | if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel) |
3759 | return false; |
3760 | |
3761 | /* If we can't get the assembler to emit only .debug_frame, and we don't need |
3762 | dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */ |
3763 | if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE && !dwarf2out_do_eh_frame ()) |
3764 | return false; |
3765 | |
3766 | /* Success! */ |
3767 | saved_do_cfi_asm = 1; |
3768 | return true; |
3769 | } |
3770 | |
3771 | namespace { |
3772 | |
3773 | const pass_data pass_data_dwarf2_frame = |
3774 | { |
3775 | .type: RTL_PASS, /* type */ |
3776 | .name: "dwarf2" , /* name */ |
3777 | .optinfo_flags: OPTGROUP_NONE, /* optinfo_flags */ |
3778 | .tv_id: TV_FINAL, /* tv_id */ |
3779 | .properties_required: 0, /* properties_required */ |
3780 | .properties_provided: 0, /* properties_provided */ |
3781 | .properties_destroyed: 0, /* properties_destroyed */ |
3782 | .todo_flags_start: 0, /* todo_flags_start */ |
3783 | .todo_flags_finish: 0, /* todo_flags_finish */ |
3784 | }; |
3785 | |
3786 | class pass_dwarf2_frame : public rtl_opt_pass |
3787 | { |
3788 | public: |
3789 | pass_dwarf2_frame (gcc::context *ctxt) |
3790 | : rtl_opt_pass (pass_data_dwarf2_frame, ctxt) |
3791 | {} |
3792 | |
3793 | /* opt_pass methods: */ |
3794 | bool gate (function *) final override; |
3795 | unsigned int execute (function *) final override |
3796 | { |
3797 | execute_dwarf2_frame (); |
3798 | return 0; |
3799 | } |
3800 | |
3801 | }; // class pass_dwarf2_frame |
3802 | |
3803 | bool |
3804 | pass_dwarf2_frame::gate (function *) |
3805 | { |
3806 | /* Targets which still implement the prologue in assembler text |
3807 | cannot use the generic dwarf2 unwinding. */ |
3808 | if (!targetm.have_prologue ()) |
3809 | return false; |
3810 | |
3811 | /* ??? What to do for UI_TARGET unwinding? They might be able to benefit |
3812 | from the optimized shrink-wrapping annotations that we will compute. |
3813 | For now, only produce the CFI notes for dwarf2. */ |
3814 | return dwarf2out_do_frame (); |
3815 | } |
3816 | |
3817 | } // anon namespace |
3818 | |
3819 | rtl_opt_pass * |
3820 | make_pass_dwarf2_frame (gcc::context *ctxt) |
3821 | { |
3822 | return new pass_dwarf2_frame (ctxt); |
3823 | } |
3824 | |
3825 | void dwarf2cfi_cc_finalize () |
3826 | { |
3827 | add_cfi_insn = NULL; |
3828 | add_cfi_vec = NULL; |
3829 | cur_trace = NULL; |
3830 | cur_row = NULL; |
3831 | cur_cfa = NULL; |
3832 | } |
3833 | |
3834 | #include "gt-dwarf2cfi.h" |
3835 | |