1/* Code for RTL register eliminations.
2 Copyright (C) 2010-2024 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21/* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
27
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
35
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
45
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
49
50 fp + 42 => sp + 42
51
52*/
53
54#include "config.h"
55#include "system.h"
56#include "coretypes.h"
57#include "backend.h"
58#include "target.h"
59#include "rtl.h"
60#include "tree.h"
61#include "df.h"
62#include "memmodel.h"
63#include "tm_p.h"
64#include "optabs.h"
65#include "regs.h"
66#include "ira.h"
67#include "recog.h"
68#include "output.h"
69#include "rtl-error.h"
70#include "lra-int.h"
71
72/* This structure is used to record information about hard register
73 eliminations. */
74class lra_elim_table
75{
76public:
77 /* Hard register number to be eliminated. */
78 int from;
79 /* Hard register number used as replacement. */
80 int to;
81 /* Difference between values of the two hard registers above on
82 previous iteration. */
83 poly_int64 previous_offset;
84 /* Difference between the values on the current iteration. */
85 poly_int64 offset;
86 /* Nonzero if this elimination can be done. */
87 bool can_eliminate;
88 /* CAN_ELIMINATE since the last check. */
89 bool prev_can_eliminate;
90 /* REG rtx for the register to be eliminated. We cannot simply
91 compare the number since we might then spuriously replace a hard
92 register corresponding to a pseudo assigned to the reg to be
93 eliminated. */
94 rtx from_rtx;
95 /* REG rtx for the replacement. */
96 rtx to_rtx;
97};
98
99/* The elimination table. Each array entry describes one possible way
100 of eliminating a register in favor of another. If there is more
101 than one way of eliminating a particular register, the most
102 preferred should be specified first. */
103static class lra_elim_table *reg_eliminate = 0;
104
105/* This is an intermediate structure to initialize the table. It has
106 exactly the members provided by ELIMINABLE_REGS. */
107static const struct elim_table_1
108{
109 const int from;
110 const int to;
111} reg_eliminate_1[] =
112
113 ELIMINABLE_REGS;
114
115#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
116
117/* Print info about elimination table to file F. */
118static void
119print_elim_table (FILE *f)
120{
121 class lra_elim_table *ep;
122
123 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
124 {
125 fprintf (stream: f, format: "%s eliminate %d to %d (offset=",
126 ep->can_eliminate ? "Can" : "Can't", ep->from, ep->to);
127 print_dec (value: ep->offset, file: f);
128 fprintf (stream: f, format: ", prev_offset=");
129 print_dec (value: ep->previous_offset, file: f);
130 fprintf (stream: f, format: ")\n");
131 }
132}
133
134/* Print info about elimination table to stderr. */
135void
136lra_debug_elim_table (void)
137{
138 print_elim_table (stderr);
139}
140
141/* Setup possibility of elimination in elimination table element EP to
142 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
143 pointer to stack pointer is not possible anymore. */
144static void
145setup_can_eliminate (class lra_elim_table *ep, bool value)
146{
147 ep->can_eliminate = ep->prev_can_eliminate = value;
148 if (! value
149 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
150 frame_pointer_needed = 1;
151 if (!frame_pointer_needed)
152 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
153}
154
155/* Map: eliminable "from" register -> its current elimination,
156 or NULL if none. The elimination table may contain more than
157 one elimination for the same hard register, but this map specifies
158 the one that we are currently using. */
159static class lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
160
161/* When an eliminable hard register becomes not eliminable, we use the
162 following special structure to restore original offsets for the
163 register. */
164static class lra_elim_table self_elim_table;
165
166/* Offsets should be used to restore original offsets for eliminable
167 hard register which just became not eliminable. Zero,
168 otherwise. */
169static poly_int64 self_elim_offsets[FIRST_PSEUDO_REGISTER];
170
171/* Map: hard regno -> RTL presentation. RTL presentations of all
172 potentially eliminable hard registers are stored in the map. */
173static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
174
175/* Set up ELIMINATION_MAP of the currently used eliminations. */
176static void
177setup_elimination_map (void)
178{
179 int i;
180 class lra_elim_table *ep;
181
182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
183 elimination_map[i] = NULL;
184 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
185 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
186 elimination_map[ep->from] = ep;
187}
188
189
190
191/* Compute the sum of X and Y, making canonicalizations assumed in an
192 address, namely: sum constant integers, surround the sum of two
193 constants with a CONST, put the constant as the second operand, and
194 group the constant on the outermost sum.
195
196 This routine assumes both inputs are already in canonical form. */
197static rtx
198form_sum (rtx x, rtx y)
199{
200 machine_mode mode = GET_MODE (x);
201 poly_int64 offset;
202
203 if (mode == VOIDmode)
204 mode = GET_MODE (y);
205
206 if (mode == VOIDmode)
207 mode = Pmode;
208
209 if (poly_int_rtx_p (x, res: &offset))
210 return plus_constant (mode, y, offset);
211 else if (poly_int_rtx_p (x: y, res: &offset))
212 return plus_constant (mode, x, offset);
213 else if (CONSTANT_P (x))
214 std::swap (a&: x, b&: y);
215
216 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
217 return form_sum (XEXP (x, 0), y: form_sum (XEXP (x, 1), y));
218
219 /* Note that if the operands of Y are specified in the opposite
220 order in the recursive calls below, infinite recursion will
221 occur. */
222 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
223 return form_sum (x: form_sum (x, XEXP (y, 0)), XEXP (y, 1));
224
225 /* If both constant, encapsulate sum. Otherwise, just form sum. A
226 constant will have been placed second. */
227 if (CONSTANT_P (x) && CONSTANT_P (y))
228 {
229 if (GET_CODE (x) == CONST)
230 x = XEXP (x, 0);
231 if (GET_CODE (y) == CONST)
232 y = XEXP (y, 0);
233
234 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
235 }
236
237 return gen_rtx_PLUS (mode, x, y);
238}
239
240/* Return the current substitution hard register of the elimination of
241 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
242int
243lra_get_elimination_hard_regno (int hard_regno)
244{
245 class lra_elim_table *ep;
246
247 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
248 return hard_regno;
249 if ((ep = elimination_map[hard_regno]) == NULL)
250 return hard_regno;
251 return ep->to;
252}
253
254/* Return elimination which will be used for hard reg REG, NULL
255 otherwise. */
256static class lra_elim_table *
257get_elimination (rtx reg)
258{
259 int hard_regno;
260 class lra_elim_table *ep;
261
262 lra_assert (REG_P (reg));
263 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
264 return NULL;
265 if ((ep = elimination_map[hard_regno]) != NULL)
266 return ep->from_rtx != reg ? NULL : ep;
267 poly_int64 offset = self_elim_offsets[hard_regno];
268 if (known_eq (offset, 0))
269 return NULL;
270 /* This is an iteration to restore offsets just after HARD_REGNO
271 stopped to be eliminable. */
272 self_elim_table.from = self_elim_table.to = hard_regno;
273 self_elim_table.from_rtx
274 = self_elim_table.to_rtx
275 = eliminable_reg_rtx[hard_regno];
276 lra_assert (self_elim_table.from_rtx != NULL);
277 self_elim_table.offset = offset;
278 return &self_elim_table;
279}
280
281/* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
282 when it is possible. Return X or the transformation result if the
283 transformation is done. */
284static rtx
285move_plus_up (rtx x)
286{
287 rtx subreg_reg;
288 machine_mode x_mode, subreg_reg_mode;
289
290 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
291 return x;
292 subreg_reg = SUBREG_REG (x);
293 x_mode = GET_MODE (x);
294 subreg_reg_mode = GET_MODE (subreg_reg);
295 if (!paradoxical_subreg_p (x)
296 && GET_CODE (subreg_reg) == PLUS
297 && CONSTANT_P (XEXP (subreg_reg, 1))
298 && GET_MODE_CLASS (x_mode) == MODE_INT
299 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
300 {
301 rtx cst = simplify_subreg (outermode: x_mode, XEXP (subreg_reg, 1), innermode: subreg_reg_mode,
302 byte: subreg_lowpart_offset (outermode: x_mode,
303 innermode: subreg_reg_mode));
304 if (cst && CONSTANT_P (cst))
305 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
306 XEXP (subreg_reg, 0),
307 subreg_reg_mode), cst);
308 }
309 return x;
310}
311
312/* Flag that we already did frame pointer to stack pointer elimination. */
313static bool elimination_fp2sp_occured_p = false;
314
315/* Scan X and replace any eliminable registers (such as fp) with a
316 replacement (such as sp) if SUBST_P, plus an offset. The offset is
317 a change in the offset between the eliminable register and its
318 substitution if UPDATE_P, or the full offset if FULL_P, or
319 otherwise zero. If FULL_P, we also use the SP offsets for
320 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
321 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
322 non-zero, don't use difference of the offset and the previous
323 offset.
324
325 MEM_MODE is the mode of an enclosing MEM. We need this to know how
326 much to adjust a register for, e.g., PRE_DEC. Also, if we are
327 inside a MEM, we are allowed to replace a sum of a hard register
328 and the constant zero with the hard register, which we cannot do
329 outside a MEM. In addition, we need to record the fact that a
330 hard register is referenced outside a MEM.
331
332 If we make full substitution to SP for non-null INSN, add the insn
333 sp offset. */
334rtx
335lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
336 bool subst_p, bool update_p,
337 poly_int64 update_sp_offset, bool full_p)
338{
339 enum rtx_code code = GET_CODE (x);
340 class lra_elim_table *ep;
341 rtx new_rtx;
342 int i, j;
343 const char *fmt;
344 int copied = 0;
345
346 lra_assert (!update_p || !full_p);
347 lra_assert (known_eq (update_sp_offset, 0)
348 || (!subst_p && update_p && !full_p));
349 if (! current_function_decl)
350 return x;
351
352 switch (code)
353 {
354 CASE_CONST_ANY:
355 case CONST:
356 case SYMBOL_REF:
357 case CODE_LABEL:
358 case PC:
359 case ASM_INPUT:
360 case ADDR_VEC:
361 case ADDR_DIFF_VEC:
362 case RETURN:
363 return x;
364
365 case REG:
366 /* First handle the case where we encounter a bare hard register
367 that is eliminable. Replace it with a PLUS. */
368 if ((ep = get_elimination (reg: x)) != NULL)
369 {
370 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
371
372 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
373 elimination_fp2sp_occured_p = true;
374
375 if (maybe_ne (a: update_sp_offset, b: 0))
376 {
377 if (ep->to_rtx == stack_pointer_rtx)
378 return plus_constant (Pmode, to, update_sp_offset);
379 return to;
380 }
381 else if (update_p)
382 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
383 else if (full_p)
384 return plus_constant (Pmode, to,
385 ep->offset
386 - (insn != NULL_RTX
387 && ep->to_rtx == stack_pointer_rtx
388 ? lra_get_insn_recog_data (insn)->sp_offset
389 : 0));
390 else
391 return to;
392 }
393 return x;
394
395 case PLUS:
396 /* If this is the sum of an eliminable register and a constant, rework
397 the sum. */
398 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
399 {
400 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
401 {
402 poly_int64 offset, curr_offset;
403 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
404
405 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
406 elimination_fp2sp_occured_p = true;
407
408 if (! update_p && ! full_p)
409 return simplify_gen_binary (code: PLUS, Pmode, op0: to, XEXP (x, 1));
410
411 if (maybe_ne (a: update_sp_offset, b: 0))
412 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
413 else
414 offset = (update_p
415 ? ep->offset - ep->previous_offset : ep->offset);
416 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
417 offset -= lra_get_insn_recog_data (insn)->sp_offset;
418 if (poly_int_rtx_p (XEXP (x, 1), res: &curr_offset)
419 && known_eq (curr_offset, -offset))
420 return to;
421 else
422 return gen_rtx_PLUS (Pmode, to,
423 plus_constant (Pmode,
424 XEXP (x, 1), offset));
425 }
426
427 /* If the hard register is not eliminable, we are done since
428 the other operand is a constant. */
429 return x;
430 }
431
432 /* If this is part of an address, we want to bring any constant
433 to the outermost PLUS. We will do this by doing hard
434 register replacement in our operands and seeing if a constant
435 shows up in one of them.
436
437 Note that there is no risk of modifying the structure of the
438 insn, since we only get called for its operands, thus we are
439 either modifying the address inside a MEM, or something like
440 an address operand of a load-address insn. */
441
442 {
443 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
444 subst_p, update_p,
445 update_sp_offset, full_p);
446 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
447 subst_p, update_p,
448 update_sp_offset, full_p);
449
450 new0 = move_plus_up (x: new0);
451 new1 = move_plus_up (x: new1);
452 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
453 return form_sum (x: new0, y: new1);
454 }
455 return x;
456
457 case MULT:
458 /* If this is the product of an eliminable hard register and a
459 constant, apply the distribute law and move the constant out
460 so that we have (plus (mult ..) ..). This is needed in order
461 to keep load-address insns valid. This case is pathological.
462 We ignore the possibility of overflow here. */
463 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
464 && (ep = get_elimination (XEXP (x, 0))) != NULL)
465 {
466 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
467
468 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
469 elimination_fp2sp_occured_p = true;
470
471 if (maybe_ne (a: update_sp_offset, b: 0))
472 {
473 if (ep->to_rtx == stack_pointer_rtx)
474 return plus_constant (Pmode,
475 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
476 update_sp_offset * INTVAL (XEXP (x, 1)));
477 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
478 }
479 else if (update_p)
480 return plus_constant (Pmode,
481 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
482 (ep->offset - ep->previous_offset)
483 * INTVAL (XEXP (x, 1)));
484 else if (full_p)
485 {
486 poly_int64 offset = ep->offset;
487
488 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
489 offset -= lra_get_insn_recog_data (insn)->sp_offset;
490 return
491 plus_constant (Pmode,
492 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
493 offset * INTVAL (XEXP (x, 1)));
494 }
495 else
496 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
497 }
498
499 /* fall through */
500
501 case CALL:
502 case COMPARE:
503 /* See comments before PLUS about handling MINUS. */
504 case MINUS:
505 case DIV: case UDIV:
506 case MOD: case UMOD:
507 case AND: case IOR: case XOR:
508 case ROTATERT: case ROTATE:
509 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
510 case NE: case EQ:
511 case GE: case GT: case GEU: case GTU:
512 case LE: case LT: case LEU: case LTU:
513 {
514 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
515 subst_p, update_p,
516 update_sp_offset, full_p);
517 rtx new1 = XEXP (x, 1)
518 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
519 subst_p, update_p,
520 update_sp_offset, full_p) : 0;
521
522 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
523 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
524 }
525 return x;
526
527 case EXPR_LIST:
528 /* If we have something in XEXP (x, 0), the usual case,
529 eliminate it. */
530 if (XEXP (x, 0))
531 {
532 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
533 subst_p, update_p,
534 update_sp_offset, full_p);
535 if (new_rtx != XEXP (x, 0))
536 {
537 /* If this is a REG_DEAD note, it is not valid anymore.
538 Using the eliminated version could result in creating a
539 REG_DEAD note for the stack or frame pointer. */
540 if (REG_NOTE_KIND (x) == REG_DEAD)
541 return (XEXP (x, 1)
542 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
543 subst_p, update_p,
544 update_sp_offset, full_p)
545 : NULL_RTX);
546
547 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
548 }
549 }
550
551 /* fall through */
552
553 case INSN_LIST:
554 case INT_LIST:
555 /* Now do eliminations in the rest of the chain. If this was
556 an EXPR_LIST, this might result in allocating more memory than is
557 strictly needed, but it simplifies the code. */
558 if (XEXP (x, 1))
559 {
560 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
561 subst_p, update_p,
562 update_sp_offset, full_p);
563 if (new_rtx != XEXP (x, 1))
564 return
565 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
566 XEXP (x, 0), new_rtx);
567 }
568 return x;
569
570 case PRE_INC:
571 case POST_INC:
572 case PRE_DEC:
573 case POST_DEC:
574 /* We do not support elimination of a register that is modified.
575 elimination_effects has already make sure that this does not
576 happen. */
577 return x;
578
579 case PRE_MODIFY:
580 case POST_MODIFY:
581 /* We do not support elimination of a hard register that is
582 modified. LRA has already make sure that this does not
583 happen. The only remaining case we need to consider here is
584 that the increment value may be an eliminable register. */
585 if (GET_CODE (XEXP (x, 1)) == PLUS
586 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
587 {
588 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
589 mem_mode, subst_p, update_p,
590 update_sp_offset, full_p);
591
592 if (new_rtx != XEXP (XEXP (x, 1), 1))
593 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
594 gen_rtx_PLUS (GET_MODE (x),
595 XEXP (x, 0), new_rtx));
596 }
597 return x;
598
599 case STRICT_LOW_PART:
600 case NEG: case NOT:
601 case SIGN_EXTEND: case ZERO_EXTEND:
602 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
603 case FLOAT: case FIX:
604 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
605 case ABS:
606 case SQRT:
607 case FFS:
608 case CLZ:
609 case CTZ:
610 case POPCOUNT:
611 case PARITY:
612 case BSWAP:
613 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
614 subst_p, update_p,
615 update_sp_offset, full_p);
616 if (new_rtx != XEXP (x, 0))
617 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
618 return x;
619
620 case SUBREG:
621 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
622 subst_p, update_p,
623 update_sp_offset, full_p);
624
625 if (new_rtx != SUBREG_REG (x))
626 {
627 if (MEM_P (new_rtx) && !paradoxical_subreg_p (x))
628 {
629 SUBREG_REG (x) = new_rtx;
630 alter_subreg (&x, false);
631 return x;
632 }
633 else if (! subst_p)
634 {
635 /* LRA can transform subregs itself. So don't call
636 simplify_gen_subreg until LRA transformations are
637 finished. Function simplify_gen_subreg can do
638 non-trivial transformations (like truncation) which
639 might make LRA work to fail. */
640 SUBREG_REG (x) = new_rtx;
641 return x;
642 }
643 else
644 return simplify_gen_subreg (GET_MODE (x), op: new_rtx,
645 GET_MODE (new_rtx), SUBREG_BYTE (x));
646 }
647
648 return x;
649
650 case MEM:
651 /* Our only special processing is to pass the mode of the MEM to our
652 recursive call and copy the flags. While we are here, handle this
653 case more efficiently. */
654 return
655 replace_equiv_address_nv
656 (x,
657 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
658 subst_p, update_p, update_sp_offset, full_p));
659
660 case USE:
661 /* Handle insn_list USE that a call to a pure function may generate. */
662 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
663 subst_p, update_p, update_sp_offset, full_p);
664 if (new_rtx != XEXP (x, 0))
665 return gen_rtx_USE (GET_MODE (x), new_rtx);
666 return x;
667
668 case CLOBBER:
669 case ASM_OPERANDS:
670 gcc_assert (insn && DEBUG_INSN_P (insn));
671 break;
672
673 case SET:
674 gcc_unreachable ();
675
676 default:
677 break;
678 }
679
680 /* Process each of our operands recursively. If any have changed, make a
681 copy of the rtx. */
682 fmt = GET_RTX_FORMAT (code);
683 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
684 {
685 if (*fmt == 'e')
686 {
687 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
688 subst_p, update_p,
689 update_sp_offset, full_p);
690 if (new_rtx != XEXP (x, i) && ! copied)
691 {
692 x = shallow_copy_rtx (x);
693 copied = 1;
694 }
695 XEXP (x, i) = new_rtx;
696 }
697 else if (*fmt == 'E')
698 {
699 int copied_vec = 0;
700 for (j = 0; j < XVECLEN (x, i); j++)
701 {
702 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
703 subst_p, update_p,
704 update_sp_offset, full_p);
705 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
706 {
707 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
708 XVEC (x, i)->elem);
709 if (! copied)
710 {
711 x = shallow_copy_rtx (x);
712 copied = 1;
713 }
714 XVEC (x, i) = new_v;
715 copied_vec = 1;
716 }
717 XVECEXP (x, i, j) = new_rtx;
718 }
719 }
720 }
721
722 return x;
723}
724
725/* This function is used externally in subsequent passes of GCC. It
726 always does a full elimination of X. */
727rtx
728lra_eliminate_regs (rtx x, machine_mode mem_mode,
729 rtx insn ATTRIBUTE_UNUSED)
730{
731 return lra_eliminate_regs_1 (NULL, x, mem_mode, subst_p: true, update_p: false, update_sp_offset: 0, full_p: true);
732}
733
734/* Stack pointer offset before the current insn relative to one at the
735 func start. RTL insns can change SP explicitly. We keep the
736 changes from one insn to another through this variable. */
737static poly_int64 curr_sp_change;
738
739/* Scan rtx X for references to elimination source or target registers
740 in contexts that would prevent the elimination from happening.
741 Update the table of eliminables to reflect the changed state.
742 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
743 within a MEM. */
744static void
745mark_not_eliminable (rtx x, machine_mode mem_mode)
746{
747 enum rtx_code code = GET_CODE (x);
748 class lra_elim_table *ep;
749 int i, j;
750 const char *fmt;
751 poly_int64 offset = 0;
752
753 switch (code)
754 {
755 case PRE_INC:
756 case POST_INC:
757 case PRE_DEC:
758 case POST_DEC:
759 case POST_MODIFY:
760 case PRE_MODIFY:
761 if (XEXP (x, 0) == stack_pointer_rtx
762 && ((code != PRE_MODIFY && code != POST_MODIFY)
763 || (GET_CODE (XEXP (x, 1)) == PLUS
764 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
765 && poly_int_rtx_p (XEXP (XEXP (x, 1), 1), res: &offset))))
766 {
767 poly_int64 size = GET_MODE_SIZE (mode: mem_mode);
768
769#ifdef PUSH_ROUNDING
770 /* If more bytes than MEM_MODE are pushed, account for
771 them. */
772 size = PUSH_ROUNDING (size);
773#endif
774 if (code == PRE_DEC || code == POST_DEC)
775 curr_sp_change -= size;
776 else if (code == PRE_INC || code == POST_INC)
777 curr_sp_change += size;
778 else if (code == PRE_MODIFY || code == POST_MODIFY)
779 curr_sp_change += offset;
780 }
781 else if (REG_P (XEXP (x, 0))
782 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
783 {
784 /* If we modify the source of an elimination rule, disable
785 it. Do the same if it is the destination and not the
786 hard frame register. */
787 for (ep = reg_eliminate;
788 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
789 ep++)
790 if (ep->from_rtx == XEXP (x, 0)
791 || (ep->to_rtx == XEXP (x, 0)
792 && ep->to_rtx != hard_frame_pointer_rtx))
793 setup_can_eliminate (ep, value: false);
794 }
795 return;
796
797 case USE:
798 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
799 /* If using a hard register that is the source of an eliminate
800 we still think can be performed, note it cannot be
801 performed since we don't know how this hard register is
802 used. */
803 for (ep = reg_eliminate;
804 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
805 ep++)
806 if (ep->from_rtx == XEXP (x, 0)
807 && ep->to_rtx != hard_frame_pointer_rtx)
808 setup_can_eliminate (ep, value: false);
809 return;
810
811 case CLOBBER:
812 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
813 /* If clobbering a hard register that is the replacement
814 register for an elimination we still think can be
815 performed, note that it cannot be performed. Otherwise, we
816 need not be concerned about it. */
817 for (ep = reg_eliminate;
818 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
819 ep++)
820 if (ep->to_rtx == XEXP (x, 0)
821 && ep->to_rtx != hard_frame_pointer_rtx)
822 setup_can_eliminate (ep, value: false);
823 return;
824
825 case SET:
826 if (SET_DEST (x) == stack_pointer_rtx
827 && GET_CODE (SET_SRC (x)) == PLUS
828 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
829 && poly_int_rtx_p (XEXP (SET_SRC (x), 1), res: &offset))
830 {
831 curr_sp_change += offset;
832 return;
833 }
834 if (! REG_P (SET_DEST (x))
835 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
836 mark_not_eliminable (SET_DEST (x), mem_mode);
837 else
838 {
839 /* See if this is setting the replacement hard register for
840 an elimination.
841
842 If DEST is the hard frame pointer, we do nothing because
843 we assume that all assignments to the frame pointer are
844 for non-local gotos and are being done at a time when
845 they are valid and do not disturb anything else. Some
846 machines want to eliminate a fake argument pointer (or
847 even a fake frame pointer) with either the real frame
848 pointer or the stack pointer. Assignments to the hard
849 frame pointer must not prevent this elimination. */
850 for (ep = reg_eliminate;
851 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
852 ep++)
853 if (ep->to_rtx == SET_DEST (x)
854 && SET_DEST (x) != hard_frame_pointer_rtx)
855 setup_can_eliminate (ep, value: false);
856 }
857
858 mark_not_eliminable (SET_SRC (x), mem_mode);
859 return;
860
861 case MEM:
862 /* Our only special processing is to pass the mode of the MEM to
863 our recursive call. */
864 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
865 return;
866
867 default:
868 break;
869 }
870
871 fmt = GET_RTX_FORMAT (code);
872 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
873 {
874 if (*fmt == 'e')
875 mark_not_eliminable (XEXP (x, i), mem_mode);
876 else if (*fmt == 'E')
877 for (j = 0; j < XVECLEN (x, i); j++)
878 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
879 }
880}
881
882
883
884/* Scan INSN and eliminate all eliminable hard registers in it.
885
886 If REPLACE_P is true, do the replacement destructively. Also
887 delete the insn as dead it if it is setting an eliminable register.
888
889 If REPLACE_P is false, just update the offsets while keeping the
890 base register the same. If FIRST_P, use the sp offset for
891 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
892 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
893 and the previous offset. Attach the note about used elimination
894 for insns setting frame pointer to update elimination easy (without
895 parsing already generated elimination insns to find offset
896 previously used) in future. */
897
898void
899eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
900 poly_int64 update_sp_offset)
901{
902 int icode = recog_memoized (insn);
903 rtx set, old_set = single_set (insn);
904 bool validate_p;
905 int i;
906 rtx substed_operand[MAX_RECOG_OPERANDS];
907 rtx orig_operand[MAX_RECOG_OPERANDS];
908 class lra_elim_table *ep;
909 rtx plus_src, plus_cst_src;
910 lra_insn_recog_data_t id;
911 struct lra_static_insn_data *static_id;
912
913 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
914 {
915 lra_assert (GET_CODE (PATTERN (insn)) == USE
916 || GET_CODE (PATTERN (insn)) == CLOBBER
917 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
918 return;
919 }
920
921 /* We allow one special case which happens to work on all machines we
922 currently support: a single set with the source or a REG_EQUAL
923 note being a PLUS of an eliminable register and a constant. */
924 plus_src = plus_cst_src = 0;
925 poly_int64 offset = 0;
926 if (old_set && REG_P (SET_DEST (old_set)))
927 {
928 if (GET_CODE (SET_SRC (old_set)) == PLUS)
929 plus_src = SET_SRC (old_set);
930 /* First see if the source is of the form (plus (...) CST). */
931 if (plus_src && poly_int_rtx_p (XEXP (plus_src, 1), res: &offset))
932 plus_cst_src = plus_src;
933 /* If we are doing initial offset computation, then utilize
934 eqivalences to discover a constant for the second term
935 of PLUS_SRC. */
936 else if (plus_src && REG_P (XEXP (plus_src, 1)))
937 {
938 int regno = REGNO (XEXP (plus_src, 1));
939 if (regno < ira_reg_equiv_len
940 && ira_reg_equiv[regno].constant != NULL_RTX
941 && !replace_p
942 && poly_int_rtx_p (x: ira_reg_equiv[regno].constant, res: &offset))
943 plus_cst_src = plus_src;
944 }
945 /* Check that the first operand of the PLUS is a hard reg or
946 the lowpart subreg of one. */
947 if (plus_cst_src)
948 {
949 rtx reg = XEXP (plus_cst_src, 0);
950
951 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
952 reg = SUBREG_REG (reg);
953
954 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
955 plus_cst_src = 0;
956 }
957 }
958 if (plus_cst_src)
959 {
960 rtx reg = XEXP (plus_cst_src, 0);
961
962 if (GET_CODE (reg) == SUBREG)
963 reg = SUBREG_REG (reg);
964
965 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
966 {
967 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
968
969 if (! replace_p)
970 {
971 if (known_eq (update_sp_offset, 0))
972 offset += (ep->offset - ep->previous_offset);
973 if (ep->to_rtx == stack_pointer_rtx)
974 {
975 if (first_p)
976 offset -= lra_get_insn_recog_data (insn)->sp_offset;
977 else
978 offset += update_sp_offset;
979 }
980 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
981 }
982
983 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
984 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
985 /* If we have a nonzero offset, and the source is already a
986 simple REG, the following transformation would increase
987 the cost of the insn by replacing a simple REG with (plus
988 (reg sp) CST). So try only when we already had a PLUS
989 before. */
990 if (known_eq (offset, 0) || plus_src)
991 {
992 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
993
994 old_set = single_set (insn);
995
996 /* First see if this insn remains valid when we make the
997 change. If not, try to replace the whole pattern
998 with a simple set (this may help if the original insn
999 was a PARALLEL that was only recognized as single_set
1000 due to REG_UNUSED notes). If this isn't valid
1001 either, keep the INSN_CODE the same and let the
1002 constraint pass fix it up. */
1003 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
1004 {
1005 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
1006
1007 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
1008 SET_SRC (old_set) = new_src;
1009 }
1010 lra_update_insn_recog_data (insn);
1011 /* This can't have an effect on elimination offsets, so skip
1012 right to the end. */
1013 return;
1014 }
1015 }
1016 }
1017
1018 /* Eliminate all eliminable registers occurring in operands that
1019 can be handled by the constraint pass. */
1020 id = lra_get_insn_recog_data (insn);
1021 static_id = id->insn_static_data;
1022 validate_p = false;
1023 for (i = 0; i < static_id->n_operands; i++)
1024 {
1025 orig_operand[i] = *id->operand_loc[i];
1026 substed_operand[i] = *id->operand_loc[i];
1027
1028 /* For an asm statement, every operand is eliminable. */
1029 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1030 {
1031 /* Check for setting a hard register that we know about. */
1032 if (static_id->operand[i].type != OP_IN
1033 && REG_P (orig_operand[i]))
1034 {
1035 /* If we are assigning to a hard register that can be
1036 eliminated, it must be as part of a PARALLEL, since
1037 the code above handles single SETs. This reg cannot
1038 be longer eliminated -- it is forced by
1039 mark_not_eliminable. */
1040 for (ep = reg_eliminate;
1041 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
1042 ep++)
1043 lra_assert (ep->from_rtx != orig_operand[i]
1044 || ! ep->can_eliminate);
1045 }
1046
1047 /* Companion to the above plus substitution, we can allow
1048 invariants as the source of a plain move. */
1049 substed_operand[i]
1050 = lra_eliminate_regs_1 (insn, x: *id->operand_loc[i], VOIDmode,
1051 subst_p: replace_p, update_p: ! replace_p && ! first_p,
1052 update_sp_offset, full_p: first_p);
1053 if (substed_operand[i] != orig_operand[i])
1054 validate_p = true;
1055 }
1056 }
1057
1058 if (! validate_p)
1059 return;
1060
1061 /* Substitute the operands; the new values are in the substed_operand
1062 array. */
1063 for (i = 0; i < static_id->n_operands; i++)
1064 *id->operand_loc[i] = substed_operand[i];
1065 for (i = 0; i < static_id->n_dups; i++)
1066 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1067
1068 /* Transform plus (plus (hard reg, const), pseudo) to plus (plus (pseudo,
1069 const), hard reg) in order to keep insn containing eliminated register
1070 after all reloads calculating its offset. This permits to keep register
1071 pressure under control and helps to avoid LRA cycling in patalogical
1072 cases. */
1073 if (! replace_p && (set = single_set (insn)) != NULL
1074 && GET_CODE (SET_SRC (set)) == PLUS
1075 && GET_CODE (XEXP (SET_SRC (set), 0)) == PLUS)
1076 {
1077 rtx reg1, reg2, op1, op2;
1078
1079 reg1 = op1 = XEXP (XEXP (SET_SRC (set), 0), 0);
1080 reg2 = op2 = XEXP (SET_SRC (set), 1);
1081 if (GET_CODE (reg1) == SUBREG)
1082 reg1 = SUBREG_REG (reg1);
1083 if (GET_CODE (reg2) == SUBREG)
1084 reg2 = SUBREG_REG (reg2);
1085 if (REG_P (reg1) && REG_P (reg2)
1086 && REGNO (reg1) < FIRST_PSEUDO_REGISTER
1087 && REGNO (reg2) >= FIRST_PSEUDO_REGISTER
1088 && GET_MODE (reg1) == Pmode
1089 && !have_addptr3_insn (lra_pmode_pseudo, reg1,
1090 XEXP (XEXP (SET_SRC (set), 0), 1)))
1091 {
1092 XEXP (XEXP (SET_SRC (set), 0), 0) = op2;
1093 XEXP (SET_SRC (set), 1) = op1;
1094 }
1095 }
1096
1097 /* If we had a move insn but now we don't, re-recognize it.
1098 This will cause spurious re-recognition if the old move had a
1099 PARALLEL since the new one still will, but we can't call
1100 single_set without having put new body into the insn and the
1101 re-recognition won't hurt in this rare case. */
1102 lra_update_insn_recog_data (insn);
1103}
1104
1105/* Spill pseudos which are assigned to hard registers in SET, record them in
1106 SPILLED_PSEUDOS unless it is null, and return the recorded pseudos number.
1107 Add affected insns for processing in the subsequent constraint pass. */
1108static int
1109spill_pseudos (HARD_REG_SET set, int *spilled_pseudos)
1110{
1111 int i, n;
1112 bitmap_head to_process;
1113 rtx_insn *insn;
1114
1115 if (hard_reg_set_empty_p (x: set))
1116 return 0;
1117 if (lra_dump_file != NULL)
1118 {
1119 fprintf (stream: lra_dump_file, format: " Spilling non-eliminable hard regs:");
1120 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1121 if (TEST_HARD_REG_BIT (set, bit: i))
1122 fprintf (stream: lra_dump_file, format: " %d", i);
1123 fprintf (stream: lra_dump_file, format: "\n");
1124 }
1125 bitmap_initialize (head: &to_process, obstack: &reg_obstack);
1126 n = 0;
1127 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1128 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1129 && overlaps_hard_reg_set_p (regs: set,
1130 PSEUDO_REGNO_MODE (i), regno: reg_renumber[i]))
1131 {
1132 if (lra_dump_file != NULL)
1133 fprintf (stream: lra_dump_file, format: " Spilling r%d(%d)\n",
1134 i, reg_renumber[i]);
1135 reg_renumber[i] = -1;
1136 if (spilled_pseudos != NULL)
1137 spilled_pseudos[n++] = i;
1138 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1139 }
1140 lra_no_alloc_regs |= set;
1141 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1142 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1143 {
1144 lra_push_insn (insn);
1145 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
1146 }
1147 bitmap_clear (&to_process);
1148 return n;
1149}
1150
1151/* Update all offsets and possibility for elimination on eliminable
1152 registers. Spill pseudos assigned to registers which are
1153 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1154 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1155 registers whose offsets should be changed. Return true if any
1156 elimination offset changed. */
1157static bool
1158update_reg_eliminate (bitmap insns_with_changed_offsets)
1159{
1160 bool prev, result;
1161 class lra_elim_table *ep, *ep1;
1162 HARD_REG_SET temp_hard_reg_set;
1163
1164 targetm.compute_frame_layout ();
1165
1166 /* Clear self elimination offsets. */
1167 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1168 self_elim_offsets[ep->from] = 0;
1169 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1170 {
1171 /* If it is a currently used elimination: update the previous
1172 offset. */
1173 if (elimination_map[ep->from] == ep)
1174 ep->previous_offset = ep->offset;
1175
1176 prev = ep->prev_can_eliminate;
1177 setup_can_eliminate (ep, value: targetm.can_eliminate (ep->from, ep->to));
1178 if (ep->can_eliminate && ! prev)
1179 {
1180 /* It is possible that not eliminable register becomes
1181 eliminable because we took other reasons into account to
1182 set up eliminable regs in the initial set up. Just
1183 ignore new eliminable registers. */
1184 setup_can_eliminate (ep, value: false);
1185 continue;
1186 }
1187 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1188 {
1189 /* We cannot use this elimination anymore -- find another
1190 one. */
1191 if (lra_dump_file != NULL)
1192 fprintf (stream: lra_dump_file,
1193 format: " Elimination %d to %d is not possible anymore\n",
1194 ep->from, ep->to);
1195 /* If after processing RTL we decides that SP can be used as a result
1196 of elimination, it cannot be changed. For frame pointer to stack
1197 pointer elimination the condition is a bit relaxed and we just require
1198 that actual elimination has not been done yet. */
1199 gcc_assert (ep->to_rtx != stack_pointer_rtx
1200 || (ep->from == FRAME_POINTER_REGNUM
1201 && !elimination_fp2sp_occured_p)
1202 || (ep->from < FIRST_PSEUDO_REGISTER
1203 && fixed_regs [ep->from]));
1204
1205 /* Mark that is not eliminable anymore. */
1206 elimination_map[ep->from] = NULL;
1207 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1208 if (ep1->can_eliminate && ep1->from == ep->from)
1209 break;
1210 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1211 {
1212 if (lra_dump_file != NULL)
1213 fprintf (stream: lra_dump_file, format: " Using elimination %d to %d now\n",
1214 ep1->from, ep1->to);
1215 lra_assert (known_eq (ep1->previous_offset, 0));
1216 ep1->previous_offset = ep->offset;
1217 }
1218 else
1219 {
1220 /* There is no elimination anymore just use the hard
1221 register `from' itself. Setup self elimination
1222 offset to restore the original offset values. */
1223 if (lra_dump_file != NULL)
1224 fprintf (stream: lra_dump_file, format: " %d is not eliminable at all\n",
1225 ep->from);
1226 self_elim_offsets[ep->from] = -ep->offset;
1227 if (maybe_ne (a: ep->offset, b: 0))
1228 bitmap_ior_into (insns_with_changed_offsets,
1229 &lra_reg_info[ep->from].insn_bitmap);
1230 }
1231 }
1232
1233 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1234 }
1235 setup_elimination_map ();
1236 result = false;
1237 CLEAR_HARD_REG_SET (set&: temp_hard_reg_set);
1238 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1239 if (elimination_map[ep->from] == NULL)
1240 add_to_hard_reg_set (regs: &temp_hard_reg_set, Pmode, regno: ep->from);
1241 else if (elimination_map[ep->from] == ep)
1242 {
1243 /* Prevent the hard register into which we eliminate from
1244 the usage for pseudos. */
1245 if (ep->from != ep->to)
1246 add_to_hard_reg_set (regs: &temp_hard_reg_set, Pmode, regno: ep->to);
1247 if (maybe_ne (a: ep->previous_offset, b: ep->offset))
1248 {
1249 bitmap_ior_into (insns_with_changed_offsets,
1250 &lra_reg_info[ep->from].insn_bitmap);
1251
1252 /* Update offset when the eliminate offset have been
1253 changed. */
1254 lra_update_reg_val_offset (val: lra_reg_info[ep->from].val,
1255 incr: ep->offset - ep->previous_offset);
1256 result = true;
1257 }
1258 }
1259 lra_no_alloc_regs |= temp_hard_reg_set;
1260 eliminable_regset &= ~temp_hard_reg_set;
1261 spill_pseudos (set: temp_hard_reg_set, NULL);
1262 return result;
1263}
1264
1265/* Initialize the table of hard registers to eliminate.
1266 Pre-condition: global flag frame_pointer_needed has been set before
1267 calling this function. */
1268static void
1269init_elim_table (void)
1270{
1271 class lra_elim_table *ep;
1272 bool value_p;
1273 const struct elim_table_1 *ep1;
1274
1275 if (!reg_eliminate)
1276 reg_eliminate = XCNEWVEC (class lra_elim_table, NUM_ELIMINABLE_REGS);
1277
1278 memset (s: self_elim_offsets, c: 0, n: sizeof (self_elim_offsets));
1279 /* Initiate member values which will be never changed. */
1280 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1281 self_elim_table.previous_offset = 0;
1282
1283 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1284 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1285 {
1286 ep->offset = ep->previous_offset = 0;
1287 ep->from = ep1->from;
1288 ep->to = ep1->to;
1289 value_p = (targetm.can_eliminate (ep->from, ep->to)
1290 && ! (ep->to == STACK_POINTER_REGNUM
1291 && frame_pointer_needed
1292 && (! SUPPORTS_STACK_ALIGNMENT
1293 || ! stack_realign_fp)));
1294 setup_can_eliminate (ep, value: value_p);
1295 }
1296
1297 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
1298 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
1299 equal stack_pointer_rtx. We depend on this. Threfore we switch
1300 off that we are in LRA temporarily. */
1301 lra_in_progress = false;
1302 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1303 {
1304 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1305 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1306 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1307 }
1308 lra_in_progress = true;
1309}
1310
1311/* Function for initialization of elimination once per function. It
1312 sets up sp offset for each insn. */
1313static void
1314init_elimination (void)
1315{
1316 bool stop_to_sp_elimination_p;
1317 basic_block bb;
1318 rtx_insn *insn;
1319 class lra_elim_table *ep;
1320
1321 init_elim_table ();
1322 FOR_EACH_BB_FN (bb, cfun)
1323 {
1324 curr_sp_change = 0;
1325 stop_to_sp_elimination_p = false;
1326 FOR_BB_INSNS (bb, insn)
1327 if (INSN_P (insn))
1328 {
1329 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
1330 if (NONDEBUG_INSN_P (insn))
1331 {
1332 mark_not_eliminable (x: PATTERN (insn), VOIDmode);
1333 if (maybe_ne (a: curr_sp_change, b: 0)
1334 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
1335 stop_to_sp_elimination_p = true;
1336 }
1337 }
1338 if (! frame_pointer_needed
1339 && (maybe_ne (a: curr_sp_change, b: 0) || stop_to_sp_elimination_p)
1340 && bb->succs && bb->succs->length () != 0)
1341 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1342 if (ep->to == STACK_POINTER_REGNUM)
1343 setup_can_eliminate (ep, value: false);
1344 }
1345 setup_elimination_map ();
1346}
1347
1348/* Update and return stack pointer OFFSET after processing X. */
1349poly_int64
1350lra_update_sp_offset (rtx x, poly_int64 offset)
1351{
1352 curr_sp_change = offset;
1353 mark_not_eliminable (x, VOIDmode);
1354 return curr_sp_change;
1355}
1356
1357
1358/* Eliminate hard reg given by its location LOC. */
1359void
1360lra_eliminate_reg_if_possible (rtx *loc)
1361{
1362 int regno;
1363 class lra_elim_table *ep;
1364
1365 lra_assert (REG_P (*loc));
1366 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1367 || ! TEST_HARD_REG_BIT (set: lra_no_alloc_regs, bit: regno))
1368 return;
1369 if ((ep = get_elimination (reg: *loc)) != NULL)
1370 *loc = ep->to_rtx;
1371}
1372
1373/* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
1374 the insn for subsequent processing in the constraint pass, update
1375 the insn info. */
1376static void
1377process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
1378{
1379 eliminate_regs_in_insn (insn, replace_p: final_p, first_p, update_sp_offset: 0);
1380 if (! final_p)
1381 {
1382 /* Check that insn changed its code. This is a case when a move
1383 insn becomes an add insn and we do not want to process the
1384 insn as a move anymore. */
1385 int icode = recog (PATTERN (insn), insn, 0);
1386
1387 if (icode >= 0 && icode != INSN_CODE (insn))
1388 {
1389 if (INSN_CODE (insn) >= 0)
1390 /* Insn code is changed. It may change its operand type
1391 from IN to INOUT. Inform the subsequent assignment
1392 subpass about this situation. */
1393 check_and_force_assignment_correctness_p = true;
1394 INSN_CODE (insn) = icode;
1395 lra_update_insn_recog_data (insn);
1396 }
1397 lra_update_insn_regno_info (insn);
1398 lra_push_insn (insn);
1399 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
1400 }
1401}
1402
1403/* Update frame pointer to stack pointer elimination if we started with
1404 permitted frame pointer elimination and now target reports that we can not
1405 do this elimination anymore. Record spilled pseudos in SPILLED_PSEUDOS
1406 unless it is null, and return the recorded pseudos number. */
1407int
1408lra_update_fp2sp_elimination (int *spilled_pseudos)
1409{
1410 int n;
1411 HARD_REG_SET set;
1412 class lra_elim_table *ep;
1413
1414 if (frame_pointer_needed || !targetm.frame_pointer_required ())
1415 return 0;
1416 gcc_assert (!elimination_fp2sp_occured_p);
1417 if (lra_dump_file != NULL)
1418 fprintf (stream: lra_dump_file,
1419 format: " Frame pointer can not be eliminated anymore\n");
1420 frame_pointer_needed = true;
1421 CLEAR_HARD_REG_SET (set);
1422 add_to_hard_reg_set (regs: &set, Pmode, HARD_FRAME_POINTER_REGNUM);
1423 n = spill_pseudos (set, spilled_pseudos);
1424 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1425 if (ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
1426 setup_can_eliminate (ep, value: false);
1427 return n;
1428}
1429
1430/* Entry function to do final elimination if FINAL_P or to update
1431 elimination register offsets (FIRST_P if we are doing it the first
1432 time). */
1433void
1434lra_eliminate (bool final_p, bool first_p)
1435{
1436 unsigned int uid;
1437 bitmap_head insns_with_changed_offsets;
1438 bitmap_iterator bi;
1439 class lra_elim_table *ep;
1440
1441 gcc_assert (! final_p || ! first_p);
1442
1443 timevar_push (tv: TV_LRA_ELIMINATE);
1444
1445 if (first_p)
1446 {
1447 elimination_fp2sp_occured_p = false;
1448 init_elimination ();
1449 }
1450
1451 bitmap_initialize (head: &insns_with_changed_offsets, obstack: &reg_obstack);
1452 if (final_p)
1453 {
1454 if (flag_checking)
1455 {
1456 update_reg_eliminate (insns_with_changed_offsets: &insns_with_changed_offsets);
1457 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
1458 }
1459 /* We change eliminable hard registers in insns so we should do
1460 this for all insns containing any eliminable hard
1461 register. */
1462 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1463 if (elimination_map[ep->from] != NULL)
1464 bitmap_ior_into (&insns_with_changed_offsets,
1465 &lra_reg_info[ep->from].insn_bitmap);
1466 }
1467 else if (! update_reg_eliminate (insns_with_changed_offsets: &insns_with_changed_offsets))
1468 goto lra_eliminate_done;
1469 if (lra_dump_file != NULL)
1470 {
1471 fprintf (stream: lra_dump_file, format: "New elimination table:\n");
1472 print_elim_table (f: lra_dump_file);
1473 }
1474 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1475 /* A dead insn can be deleted in process_insn_for_elimination. */
1476 if (lra_insn_recog_data[uid] != NULL)
1477 process_insn_for_elimination (insn: lra_insn_recog_data[uid]->insn,
1478 final_p, first_p);
1479 bitmap_clear (&insns_with_changed_offsets);
1480
1481lra_eliminate_done:
1482 timevar_pop (tv: TV_LRA_ELIMINATE);
1483}
1484

source code of gcc/lra-eliminations.cc