1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * P5 specific Machine Check Exception Reporting |
4 | * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk> |
5 | */ |
6 | #include <linux/interrupt.h> |
7 | #include <linux/kernel.h> |
8 | #include <linux/types.h> |
9 | #include <linux/smp.h> |
10 | #include <linux/hardirq.h> |
11 | |
12 | #include <asm/processor.h> |
13 | #include <asm/traps.h> |
14 | #include <asm/tlbflush.h> |
15 | #include <asm/mce.h> |
16 | #include <asm/msr.h> |
17 | |
18 | #include "internal.h" |
19 | |
20 | /* By default disabled */ |
21 | int mce_p5_enabled __read_mostly; |
22 | |
23 | /* Machine check handler for Pentium class Intel CPUs: */ |
24 | noinstr void pentium_machine_check(struct pt_regs *regs) |
25 | { |
26 | u32 loaddr, hi, lotype; |
27 | |
28 | instrumentation_begin(); |
29 | rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi); |
30 | rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi); |
31 | |
32 | pr_emerg("CPU#%d: Machine Check Exception: 0x%8X (type 0x%8X).\n" , |
33 | smp_processor_id(), loaddr, lotype); |
34 | |
35 | if (lotype & (1<<5)) { |
36 | pr_emerg("CPU#%d: Possible thermal failure (CPU on fire ?).\n" , |
37 | smp_processor_id()); |
38 | } |
39 | |
40 | add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); |
41 | instrumentation_end(); |
42 | } |
43 | |
44 | /* Set up machine check reporting for processors with Intel style MCE: */ |
45 | void intel_p5_mcheck_init(struct cpuinfo_x86 *c) |
46 | { |
47 | u32 l, h; |
48 | |
49 | /* Default P5 to off as its often misconnected: */ |
50 | if (!mce_p5_enabled) |
51 | return; |
52 | |
53 | /* Check for MCE support: */ |
54 | if (!cpu_has(c, X86_FEATURE_MCE)) |
55 | return; |
56 | |
57 | /* Read registers before enabling: */ |
58 | rdmsr(MSR_IA32_P5_MC_ADDR, l, h); |
59 | rdmsr(MSR_IA32_P5_MC_TYPE, l, h); |
60 | pr_info("Intel old style machine check architecture supported.\n" ); |
61 | |
62 | /* Enable MCE: */ |
63 | cr4_set_bits(X86_CR4_MCE); |
64 | pr_info("Intel old style machine check reporting enabled on CPU#%d.\n" , |
65 | smp_processor_id()); |
66 | } |
67 | |