1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4 */
5
6#ifndef _DP_PANEL_H_
7#define _DP_PANEL_H_
8
9#include <drm/msm_drm.h>
10
11#include "dp_aux.h"
12#include "dp_link.h"
13
14struct edid;
15
16struct dp_display_mode {
17 struct drm_display_mode drm_mode;
18 u32 capabilities;
19 u32 bpp;
20 u32 h_active_low;
21 u32 v_active_low;
22 bool out_fmt_is_yuv_420;
23};
24
25struct dp_panel_in {
26 struct device *dev;
27 struct drm_dp_aux *aux;
28 struct dp_link *link;
29 struct dp_catalog *catalog;
30};
31
32struct dp_panel_psr {
33 u8 version;
34 u8 capabilities;
35};
36
37struct dp_panel {
38 /* dpcd raw data */
39 u8 dpcd[DP_RECEIVER_CAP_SIZE];
40 u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
41
42 struct dp_link_info link_info;
43 struct drm_dp_desc desc;
44 struct edid *edid;
45 struct drm_connector *connector;
46 struct dp_display_mode dp_mode;
47 struct dp_panel_psr psr_cap;
48 bool video_test;
49 bool vsc_sdp_supported;
50
51 u32 vic;
52 u32 max_dp_lanes;
53 u32 max_dp_link_rate;
54
55 u32 max_bw_code;
56};
57
58int dp_panel_init_panel_info(struct dp_panel *dp_panel);
59int dp_panel_deinit(struct dp_panel *dp_panel);
60int dp_panel_timing_cfg(struct dp_panel *dp_panel);
61void dp_panel_dump_regs(struct dp_panel *dp_panel);
62int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
63 struct drm_connector *connector);
64u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp,
65 u32 mode_pclk_khz);
66int dp_panel_get_modes(struct dp_panel *dp_panel,
67 struct drm_connector *connector);
68void dp_panel_handle_sink_request(struct dp_panel *dp_panel);
69void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable);
70
71/**
72 * is_link_rate_valid() - validates the link rate
73 * @lane_rate: link rate requested by the sink
74 *
75 * Returns true if the requested link rate is supported.
76 */
77static inline bool is_link_rate_valid(u32 bw_code)
78{
79 return (bw_code == DP_LINK_BW_1_62 ||
80 bw_code == DP_LINK_BW_2_7 ||
81 bw_code == DP_LINK_BW_5_4 ||
82 bw_code == DP_LINK_BW_8_1);
83}
84
85/**
86 * dp_link_is_lane_count_valid() - validates the lane count
87 * @lane_count: lane count requested by the sink
88 *
89 * Returns true if the requested lane count is supported.
90 */
91static inline bool is_lane_count_valid(u32 lane_count)
92{
93 return (lane_count == 1 ||
94 lane_count == 2 ||
95 lane_count == 4);
96}
97
98struct dp_panel *dp_panel_get(struct dp_panel_in *in);
99void dp_panel_put(struct dp_panel *dp_panel);
100#endif /* _DP_PANEL_H_ */
101

source code of linux/drivers/gpu/drm/msm/dp/dp_panel.h