1	// SPDX-License-Identifier: GPL-2.0
2	/* Copyright (c) 2018, Intel Corporation. */
3
4	#include "ice.h"
5	#include "ice_base.h"
6	#include "ice_flow.h"
7	#include "ice_lib.h"
8	#include "ice_fltr.h"
9	#include "ice_dcb_lib.h"
10	#include "ice_devlink.h"
11	#include "ice_vsi_vlan_ops.h"
12
13	/**
14	* ice_vsi_type_str - maps VSI type enum to string equivalents
15	* @vsi_type: VSI type enum
16	*/
17	const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
18	{
19	switch (vsi_type) {
20	case ICE_VSI_PF:
21	return "ICE_VSI_PF";
22	case ICE_VSI_VF:
23	return "ICE_VSI_VF";
24	case ICE_VSI_CTRL:
25	return "ICE_VSI_CTRL";
26	case ICE_VSI_CHNL:
27	return "ICE_VSI_CHNL";
28	case ICE_VSI_LB:
29	return "ICE_VSI_LB";
30	case ICE_VSI_SWITCHDEV_CTRL:
31	return "ICE_VSI_SWITCHDEV_CTRL";
32	default:
33	return "unknown";
34	}
35	}
36
37	/**
38	* ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
39	* @vsi: the VSI being configured
40	* @ena: start or stop the Rx rings
41	*
42	* First enable/disable all of the Rx rings, flush any remaining writes, and
43	* then verify that they have all been enabled/disabled successfully. This will
44	* let all of the register writes complete when enabling/disabling the Rx rings
45	* before waiting for the change in hardware to complete.
46	*/
47	static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
48	{
49	int ret = 0;
50	u16 i;
51
52	ice_for_each_rxq(vsi, i)
53	ice_vsi_ctrl_one_rx_ring(vsi, ena, rxq_idx: i, wait: false);
54
55	ice_flush(&vsi->back->hw);
56
57	ice_for_each_rxq(vsi, i) {
58	ret = ice_vsi_wait_one_rx_ring(vsi, ena, rxq_idx: i);
59	if (ret)
60	break;
61	}
62
63	return ret;
64	}
65
66	/**
67	* ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
68	* @vsi: VSI pointer
69	*
70	* On error: returns error code (negative)
71	* On success: returns 0
72	*/
73	static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
74	{
75	struct ice_pf *pf = vsi->back;
76	struct device *dev;
77
78	dev = ice_pf_to_dev(pf);
79	if (vsi->type == ICE_VSI_CHNL)
80	return 0;
81
82	/* allocate memory for both Tx and Rx ring pointers */
83	vsi->tx_rings = devm_kcalloc(dev, n: vsi->alloc_txq,
84	size: sizeof(*vsi->tx_rings), GFP_KERNEL);
85	if (!vsi->tx_rings)
86	return -ENOMEM;
87
88	vsi->rx_rings = devm_kcalloc(dev, n: vsi->alloc_rxq,
89	size: sizeof(*vsi->rx_rings), GFP_KERNEL);
90	if (!vsi->rx_rings)
91	goto err_rings;
92
93	/* txq_map needs to have enough space to track both Tx (stack) rings
94	* and XDP rings; at this point vsi->num_xdp_txq might not be set,
95	* so use num_possible_cpus() as we want to always provide XDP ring
96	* per CPU, regardless of queue count settings from user that might
97	* have come from ethtool's set_channels() callback;
98	*/
99	vsi->txq_map = devm_kcalloc(dev, n: (vsi->alloc_txq + num_possible_cpus()),
100	size: sizeof(*vsi->txq_map), GFP_KERNEL);
101
102	if (!vsi->txq_map)
103	goto err_txq_map;
104
105	vsi->rxq_map = devm_kcalloc(dev, n: vsi->alloc_rxq,
106	size: sizeof(*vsi->rxq_map), GFP_KERNEL);
107	if (!vsi->rxq_map)
108	goto err_rxq_map;
109
110	/* There is no need to allocate q_vectors for a loopback VSI. */
111	if (vsi->type == ICE_VSI_LB)
112	return 0;
113
114	/* allocate memory for q_vector pointers */
115	vsi->q_vectors = devm_kcalloc(dev, n: vsi->num_q_vectors,
116	size: sizeof(*vsi->q_vectors), GFP_KERNEL);
117	if (!vsi->q_vectors)
118	goto err_vectors;
119
120	vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL);
121	if (!vsi->af_xdp_zc_qps)
122	goto err_zc_qps;
123
124	return 0;
125
126	err_zc_qps:
127	devm_kfree(dev, p: vsi->q_vectors);
128	err_vectors:
129	devm_kfree(dev, p: vsi->rxq_map);
130	err_rxq_map:
131	devm_kfree(dev, p: vsi->txq_map);
132	err_txq_map:
133	devm_kfree(dev, p: vsi->rx_rings);
134	err_rings:
135	devm_kfree(dev, p: vsi->tx_rings);
136	return -ENOMEM;
137	}
138
139	/**
140	* ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
141	* @vsi: the VSI being configured
142	*/
143	static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
144	{
145	switch (vsi->type) {
146	case ICE_VSI_PF:
147	case ICE_VSI_SWITCHDEV_CTRL:
148	case ICE_VSI_CTRL:
149	case ICE_VSI_LB:
150	/* a user could change the values of num_[tr]x_desc using
151	* ethtool -G so we should keep those values instead of
152	* overwriting them with the defaults.
153	*/
154	if (!vsi->num_rx_desc)
155	vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
156	if (!vsi->num_tx_desc)
157	vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
158	break;
159	default:
160	dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
161	vsi->type);
162	break;
163	}
164	}
165
166	/**
167	* ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
168	* @vsi: the VSI being configured
169	*
170	* Return 0 on success and a negative value on error
171	*/
172	static void ice_vsi_set_num_qs(struct ice_vsi *vsi)
173	{
174	enum ice_vsi_type vsi_type = vsi->type;
175	struct ice_pf *pf = vsi->back;
176	struct ice_vf *vf = vsi->vf;
177
178	if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
179	return;
180
181	switch (vsi_type) {
182	case ICE_VSI_PF:
183	if (vsi->req_txq) {
184	vsi->alloc_txq = vsi->req_txq;
185	vsi->num_txq = vsi->req_txq;
186	} else {
187	vsi->alloc_txq = min3(pf->num_lan_msix,
188	ice_get_avail_txq_count(pf),
189	(u16)num_online_cpus());
190	}
191
192	pf->num_lan_tx = vsi->alloc_txq;
193
194	/* only 1 Rx queue unless RSS is enabled */
195	if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
196	vsi->alloc_rxq = 1;
197	} else {
198	if (vsi->req_rxq) {
199	vsi->alloc_rxq = vsi->req_rxq;
200	vsi->num_rxq = vsi->req_rxq;
201	} else {
202	vsi->alloc_rxq = min3(pf->num_lan_msix,
203	ice_get_avail_rxq_count(pf),
204	(u16)num_online_cpus());
205	}
206	}
207
208	pf->num_lan_rx = vsi->alloc_rxq;
209
210	vsi->num_q_vectors = min_t(int, pf->num_lan_msix,
211	max_t(int, vsi->alloc_rxq,
212	vsi->alloc_txq));
213	break;
214	case ICE_VSI_SWITCHDEV_CTRL:
215	/* The number of queues for ctrl VSI is equal to number of PRs
216	* Each ring is associated to the corresponding VF_PR netdev.
217	* Tx and Rx rings are always equal
218	*/
219	if (vsi->req_txq && vsi->req_rxq) {
220	vsi->alloc_txq = vsi->req_txq;
221	vsi->alloc_rxq = vsi->req_rxq;
222	} else {
223	vsi->alloc_txq = 1;
224	vsi->alloc_rxq = 1;
225	}
226
227	vsi->num_q_vectors = 1;
228	break;
229	case ICE_VSI_VF:
230	if (vf->num_req_qs)
231	vf->num_vf_qs = vf->num_req_qs;
232	vsi->alloc_txq = vf->num_vf_qs;
233	vsi->alloc_rxq = vf->num_vf_qs;
234	/* pf->vfs.num_msix_per includes (VF miscellaneous vector +
235	* data queue interrupts). Since vsi->num_q_vectors is number
236	* of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
237	* original vector count
238	*/
239	vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF;
240	break;
241	case ICE_VSI_CTRL:
242	vsi->alloc_txq = 1;
243	vsi->alloc_rxq = 1;
244	vsi->num_q_vectors = 1;
245	break;
246	case ICE_VSI_CHNL:
247	vsi->alloc_txq = 0;
248	vsi->alloc_rxq = 0;
249	break;
250	case ICE_VSI_LB:
251	vsi->alloc_txq = 1;
252	vsi->alloc_rxq = 1;
253	break;
254	default:
255	dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type);
256	break;
257	}
258
259	ice_vsi_set_num_desc(vsi);
260	}
261
262	/**
263	* ice_get_free_slot - get the next non-NULL location index in array
264	* @array: array to search
265	* @size: size of the array
266	* @curr: last known occupied index to be used as a search hint
267	*
268	* void * is being used to keep the functionality generic. This lets us use this
269	* function on any array of pointers.
270	*/
271	static int ice_get_free_slot(void *array, int size, int curr)
272	{
273	int **tmp_array = (int **)array;
274	int next;
275
276	if (curr < (size - 1) && !tmp_array[curr + 1]) {
277	next = curr + 1;
278	} else {
279	int i = 0;
280
281	while ((i < size) && (tmp_array[i]))
282	i++;
283	if (i == size)
284	next = ICE_NO_VSI;
285	else
286	next = i;
287	}
288	return next;
289	}
290
291	/**
292	* ice_vsi_delete_from_hw - delete a VSI from the switch
293	* @vsi: pointer to VSI being removed
294	*/
295	static void ice_vsi_delete_from_hw(struct ice_vsi *vsi)
296	{
297	struct ice_pf *pf = vsi->back;
298	struct ice_vsi_ctx *ctxt;
299	int status;
300
301	ice_fltr_remove_all(vsi);
302	ctxt = kzalloc(size: sizeof(*ctxt), GFP_KERNEL);
303	if (!ctxt)
304	return;
305
306	if (vsi->type == ICE_VSI_VF)
307	ctxt->vf_num = vsi->vf->vf_id;
308	ctxt->vsi_num = vsi->vsi_num;
309
310	memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
311
312	status = ice_free_vsi(hw: &pf->hw, vsi_handle: vsi->idx, vsi_ctx: ctxt, keep_vsi_alloc: false, NULL);
313	if (status)
314	dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
315	vsi->vsi_num, status);
316
317	kfree(objp: ctxt);
318	}
319
320	/**
321	* ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
322	* @vsi: pointer to VSI being cleared
323	*/
324	static void ice_vsi_free_arrays(struct ice_vsi *vsi)
325	{
326	struct ice_pf *pf = vsi->back;
327	struct device *dev;
328
329	dev = ice_pf_to_dev(pf);
330
331	bitmap_free(bitmap: vsi->af_xdp_zc_qps);
332	vsi->af_xdp_zc_qps = NULL;
333	/* free the ring and vector containers */
334	devm_kfree(dev, p: vsi->q_vectors);
335	vsi->q_vectors = NULL;
336	devm_kfree(dev, p: vsi->tx_rings);
337	vsi->tx_rings = NULL;
338	devm_kfree(dev, p: vsi->rx_rings);
339	vsi->rx_rings = NULL;
340	devm_kfree(dev, p: vsi->txq_map);
341	vsi->txq_map = NULL;
342	devm_kfree(dev, p: vsi->rxq_map);
343	vsi->rxq_map = NULL;
344	}
345
346	/**
347	* ice_vsi_free_stats - Free the ring statistics structures
348	* @vsi: VSI pointer
349	*/
350	static void ice_vsi_free_stats(struct ice_vsi *vsi)
351	{
352	struct ice_vsi_stats *vsi_stat;
353	struct ice_pf *pf = vsi->back;
354	int i;
355
356	if (vsi->type == ICE_VSI_CHNL)
357	return;
358	if (!pf->vsi_stats)
359	return;
360
361	vsi_stat = pf->vsi_stats[vsi->idx];
362	if (!vsi_stat)
363	return;
364
365	ice_for_each_alloc_txq(vsi, i) {
366	if (vsi_stat->tx_ring_stats[i]) {
367	kfree_rcu(vsi_stat->tx_ring_stats[i], rcu);
368	WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL);
369	}
370	}
371
372	ice_for_each_alloc_rxq(vsi, i) {
373	if (vsi_stat->rx_ring_stats[i]) {
374	kfree_rcu(vsi_stat->rx_ring_stats[i], rcu);
375	WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL);
376	}
377	}
378
379	kfree(objp: vsi_stat->tx_ring_stats);
380	kfree(objp: vsi_stat->rx_ring_stats);
381	kfree(objp: vsi_stat);
382	pf->vsi_stats[vsi->idx] = NULL;
383	}
384
385	/**
386	* ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI
387	* @vsi: VSI which is having stats allocated
388	*/
389	static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi)
390	{
391	struct ice_ring_stats **tx_ring_stats;
392	struct ice_ring_stats **rx_ring_stats;
393	struct ice_vsi_stats *vsi_stats;
394	struct ice_pf *pf = vsi->back;
395	u16 i;
396
397	vsi_stats = pf->vsi_stats[vsi->idx];
398	tx_ring_stats = vsi_stats->tx_ring_stats;
399	rx_ring_stats = vsi_stats->rx_ring_stats;
400
401	/* Allocate Tx ring stats */
402	ice_for_each_alloc_txq(vsi, i) {
403	struct ice_ring_stats *ring_stats;
404	struct ice_tx_ring *ring;
405
406	ring = vsi->tx_rings[i];
407	ring_stats = tx_ring_stats[i];
408
409	if (!ring_stats) {
410	ring_stats = kzalloc(size: sizeof(*ring_stats), GFP_KERNEL);
411	if (!ring_stats)
412	goto err_out;
413
414	WRITE_ONCE(tx_ring_stats[i], ring_stats);
415	}
416
417	ring->ring_stats = ring_stats;
418	}
419
420	/* Allocate Rx ring stats */
421	ice_for_each_alloc_rxq(vsi, i) {
422	struct ice_ring_stats *ring_stats;
423	struct ice_rx_ring *ring;
424
425	ring = vsi->rx_rings[i];
426	ring_stats = rx_ring_stats[i];
427
428	if (!ring_stats) {
429	ring_stats = kzalloc(size: sizeof(*ring_stats), GFP_KERNEL);
430	if (!ring_stats)
431	goto err_out;
432
433	WRITE_ONCE(rx_ring_stats[i], ring_stats);
434	}
435
436	ring->ring_stats = ring_stats;
437	}
438
439	return 0;
440
441	err_out:
442	ice_vsi_free_stats(vsi);
443	return -ENOMEM;
444	}
445
446	/**
447	* ice_vsi_free - clean up and deallocate the provided VSI
448	* @vsi: pointer to VSI being cleared
449	*
450	* This deallocates the VSI's queue resources, removes it from the PF's
451	* VSI array if necessary, and deallocates the VSI
452	*/
453	static void ice_vsi_free(struct ice_vsi *vsi)
454	{
455	struct ice_pf *pf = NULL;
456	struct device *dev;
457
458	if (!vsi || !vsi->back)
459	return;
460
461	pf = vsi->back;
462	dev = ice_pf_to_dev(pf);
463
464	if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
465	dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
466	return;
467	}
468
469	mutex_lock(&pf->sw_mutex);
470	/* updates the PF for this cleared VSI */
471
472	pf->vsi[vsi->idx] = NULL;
473	pf->next_vsi = vsi->idx;
474
475	ice_vsi_free_stats(vsi);
476	ice_vsi_free_arrays(vsi);
477	mutex_unlock(lock: &pf->sw_mutex);
478	devm_kfree(dev, p: vsi);
479	}
480
481	void ice_vsi_delete(struct ice_vsi *vsi)
482	{
483	ice_vsi_delete_from_hw(vsi);
484	ice_vsi_free(vsi);
485	}
486
487	/**
488	* ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
489	* @irq: interrupt number
490	* @data: pointer to a q_vector
491	*/
492	static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
493	{
494	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
495
496	if (!q_vector->tx.tx_ring)
497	return IRQ_HANDLED;
498
499	#define FDIR_RX_DESC_CLEAN_BUDGET 64
500	ice_clean_rx_irq(rx_ring: q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);
501	ice_clean_ctrl_tx_irq(tx_ring: q_vector->tx.tx_ring);
502
503	return IRQ_HANDLED;
504	}
505
506	/**
507	* ice_msix_clean_rings - MSIX mode Interrupt Handler
508	* @irq: interrupt number
509	* @data: pointer to a q_vector
510	*/
511	static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
512	{
513	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
514
515	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
516	return IRQ_HANDLED;
517
518	q_vector->total_events++;
519
520	napi_schedule(n: &q_vector->napi);
521
522	return IRQ_HANDLED;
523	}
524
525	static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data)
526	{
527	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
528	struct ice_pf *pf = q_vector->vsi->back;
529	struct ice_repr *repr;
530	unsigned long id;
531
532	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
533	return IRQ_HANDLED;
534
535	xa_for_each(&pf->eswitch.reprs, id, repr)
536	napi_schedule(n: &repr->q_vector->napi);
537
538	return IRQ_HANDLED;
539	}
540
541	/**
542	* ice_vsi_alloc_stat_arrays - Allocate statistics arrays
543	* @vsi: VSI pointer
544	*/
545	static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi)
546	{
547	struct ice_vsi_stats *vsi_stat;
548	struct ice_pf *pf = vsi->back;
549
550	if (vsi->type == ICE_VSI_CHNL)
551	return 0;
552	if (!pf->vsi_stats)
553	return -ENOENT;
554
555	if (pf->vsi_stats[vsi->idx])
556	/* realloc will happen in rebuild path */
557	return 0;
558
559	vsi_stat = kzalloc(size: sizeof(*vsi_stat), GFP_KERNEL);
560	if (!vsi_stat)
561	return -ENOMEM;
562
563	vsi_stat->tx_ring_stats =
564	kcalloc(n: vsi->alloc_txq, size: sizeof(*vsi_stat->tx_ring_stats),
565	GFP_KERNEL);
566	if (!vsi_stat->tx_ring_stats)
567	goto err_alloc_tx;
568
569	vsi_stat->rx_ring_stats =
570	kcalloc(n: vsi->alloc_rxq, size: sizeof(*vsi_stat->rx_ring_stats),
571	GFP_KERNEL);
572	if (!vsi_stat->rx_ring_stats)
573	goto err_alloc_rx;
574
575	pf->vsi_stats[vsi->idx] = vsi_stat;
576
577	return 0;
578
579	err_alloc_rx:
580	kfree(objp: vsi_stat->rx_ring_stats);
581	err_alloc_tx:
582	kfree(objp: vsi_stat->tx_ring_stats);
583	kfree(objp: vsi_stat);
584	pf->vsi_stats[vsi->idx] = NULL;
585	return -ENOMEM;
586	}
587
588	/**
589	* ice_vsi_alloc_def - set default values for already allocated VSI
590	* @vsi: ptr to VSI
591	* @ch: ptr to channel
592	*/
593	static int
594	ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch)
595	{
596	if (vsi->type != ICE_VSI_CHNL) {
597	ice_vsi_set_num_qs(vsi);
598	if (ice_vsi_alloc_arrays(vsi))
599	return -ENOMEM;
600	}
601
602	switch (vsi->type) {
603	case ICE_VSI_SWITCHDEV_CTRL:
604	/* Setup eswitch MSIX irq handler for VSI */
605	vsi->irq_handler = ice_eswitch_msix_clean_rings;
606	break;
607	case ICE_VSI_PF:
608	/* Setup default MSIX irq handler for VSI */
609	vsi->irq_handler = ice_msix_clean_rings;
610	break;
611	case ICE_VSI_CTRL:
612	/* Setup ctrl VSI MSIX irq handler */
613	vsi->irq_handler = ice_msix_clean_ctrl_vsi;
614	break;
615	case ICE_VSI_CHNL:
616	if (!ch)
617	return -EINVAL;
618
619	vsi->num_rxq = ch->num_rxq;
620	vsi->num_txq = ch->num_txq;
621	vsi->next_base_q = ch->base_q;
622	break;
623	case ICE_VSI_VF:
624	case ICE_VSI_LB:
625	break;
626	default:
627	ice_vsi_free_arrays(vsi);
628	return -EINVAL;
629	}
630
631	return 0;
632	}
633
634	/**
635	* ice_vsi_alloc - Allocates the next available struct VSI in the PF
636	* @pf: board private structure
637	*
638	* Reserves a VSI index from the PF and allocates an empty VSI structure
639	* without a type. The VSI structure must later be initialized by calling
640	* ice_vsi_cfg().
641	*
642	* returns a pointer to a VSI on success, NULL on failure.
643	*/
644	static struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf)
645	{
646	struct device *dev = ice_pf_to_dev(pf);
647	struct ice_vsi *vsi = NULL;
648
649	/* Need to protect the allocation of the VSIs at the PF level */
650	mutex_lock(&pf->sw_mutex);
651
652	/* If we have already allocated our maximum number of VSIs,
653	* pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
654	* is available to be populated
655	*/
656	if (pf->next_vsi == ICE_NO_VSI) {
657	dev_dbg(dev, "out of VSI slots!\n");
658	goto unlock_pf;
659	}
660
661	vsi = devm_kzalloc(dev, size: sizeof(*vsi), GFP_KERNEL);
662	if (!vsi)
663	goto unlock_pf;
664
665	vsi->back = pf;
666	set_bit(nr: ICE_VSI_DOWN, addr: vsi->state);
667
668	/* fill slot and make note of the index */
669	vsi->idx = pf->next_vsi;
670	pf->vsi[pf->next_vsi] = vsi;
671
672	/* prepare pf->next_vsi for next use */
673	pf->next_vsi = ice_get_free_slot(array: pf->vsi, size: pf->num_alloc_vsi,
674	curr: pf->next_vsi);
675
676	unlock_pf:
677	mutex_unlock(lock: &pf->sw_mutex);
678	return vsi;
679	}
680
681	/**
682	* ice_alloc_fd_res - Allocate FD resource for a VSI
683	* @vsi: pointer to the ice_vsi
684	*
685	* This allocates the FD resources
686	*
687	* Returns 0 on success, -EPERM on no-op or -EIO on failure
688	*/
689	static int ice_alloc_fd_res(struct ice_vsi *vsi)
690	{
691	struct ice_pf *pf = vsi->back;
692	u32 g_val, b_val;
693
694	/* Flow Director filters are only allocated/assigned to the PF VSI or
695	* CHNL VSI which passes the traffic. The CTRL VSI is only used to
696	* add/delete filters so resources are not allocated to it
697	*/
698	if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
699	return -EPERM;
700
701	if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
702	vsi->type == ICE_VSI_CHNL))
703	return -EPERM;
704
705	/* FD filters from guaranteed pool per VSI */
706	g_val = pf->hw.func_caps.fd_fltr_guar;
707	if (!g_val)
708	return -EPERM;
709
710	/* FD filters from best effort pool */
711	b_val = pf->hw.func_caps.fd_fltr_best_effort;
712	if (!b_val)
713	return -EPERM;
714
715	/* PF main VSI gets only 64 FD resources from guaranteed pool
716	* when ADQ is configured.
717	*/
718	#define ICE_PF_VSI_GFLTR 64
719
720	/* determine FD filter resources per VSI from shared(best effort) and
721	* dedicated pool
722	*/
723	if (vsi->type == ICE_VSI_PF) {
724	vsi->num_gfltr = g_val;
725	/* if MQPRIO is configured, main VSI doesn't get all FD
726	* resources from guaranteed pool. PF VSI gets 64 FD resources
727	*/
728	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
729	if (g_val < ICE_PF_VSI_GFLTR)
730	return -EPERM;
731	/* allow bare minimum entries for PF VSI */
732	vsi->num_gfltr = ICE_PF_VSI_GFLTR;
733	}
734
735	/* each VSI gets same "best_effort" quota */
736	vsi->num_bfltr = b_val;
737	} else if (vsi->type == ICE_VSI_VF) {
738	vsi->num_gfltr = 0;
739
740	/* each VSI gets same "best_effort" quota */
741	vsi->num_bfltr = b_val;
742	} else {
743	struct ice_vsi *main_vsi;
744	int numtc;
745
746	main_vsi = ice_get_main_vsi(pf);
747	if (!main_vsi)
748	return -EPERM;
749
750	if (!main_vsi->all_numtc)
751	return -EINVAL;
752
753	/* figure out ADQ numtc */
754	numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
755
756	/* only one TC but still asking resources for channels,
757	* invalid config
758	*/
759	if (numtc < ICE_CHNL_START_TC)
760	return -EPERM;
761
762	g_val -= ICE_PF_VSI_GFLTR;
763	/* channel VSIs gets equal share from guaranteed pool */
764	vsi->num_gfltr = g_val / numtc;
765
766	/* each VSI gets same "best_effort" quota */
767	vsi->num_bfltr = b_val;
768	}
769
770	return 0;
771	}
772
773	/**
774	* ice_vsi_get_qs - Assign queues from PF to VSI
775	* @vsi: the VSI to assign queues to
776	*
777	* Returns 0 on success and a negative value on error
778	*/
779	static int ice_vsi_get_qs(struct ice_vsi *vsi)
780	{
781	struct ice_pf *pf = vsi->back;
782	struct ice_qs_cfg tx_qs_cfg = {
783	.qs_mutex = &pf->avail_q_mutex,
784	.pf_map = pf->avail_txqs,
785	.pf_map_size = pf->max_pf_txqs,
786	.q_count = vsi->alloc_txq,
787	.scatter_count = ICE_MAX_SCATTER_TXQS,
788	.vsi_map = vsi->txq_map,
789	.vsi_map_offset = 0,
790	.mapping_mode = ICE_VSI_MAP_CONTIG
791	};
792	struct ice_qs_cfg rx_qs_cfg = {
793	.qs_mutex = &pf->avail_q_mutex,
794	.pf_map = pf->avail_rxqs,
795	.pf_map_size = pf->max_pf_rxqs,
796	.q_count = vsi->alloc_rxq,
797	.scatter_count = ICE_MAX_SCATTER_RXQS,
798	.vsi_map = vsi->rxq_map,
799	.vsi_map_offset = 0,
800	.mapping_mode = ICE_VSI_MAP_CONTIG
801	};
802	int ret;
803
804	if (vsi->type == ICE_VSI_CHNL)
805	return 0;
806
807	ret = __ice_vsi_get_qs(qs_cfg: &tx_qs_cfg);
808	if (ret)
809	return ret;
810	vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
811
812	ret = __ice_vsi_get_qs(qs_cfg: &rx_qs_cfg);
813	if (ret)
814	return ret;
815	vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
816
817	return 0;
818	}
819
820	/**
821	* ice_vsi_put_qs - Release queues from VSI to PF
822	* @vsi: the VSI that is going to release queues
823	*/
824	static void ice_vsi_put_qs(struct ice_vsi *vsi)
825	{
826	struct ice_pf *pf = vsi->back;
827	int i;
828
829	mutex_lock(&pf->avail_q_mutex);
830
831	ice_for_each_alloc_txq(vsi, i) {
832	clear_bit(nr: vsi->txq_map[i], addr: pf->avail_txqs);
833	vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
834	}
835
836	ice_for_each_alloc_rxq(vsi, i) {
837	clear_bit(nr: vsi->rxq_map[i], addr: pf->avail_rxqs);
838	vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
839	}
840
841	mutex_unlock(lock: &pf->avail_q_mutex);
842	}
843
844	/**
845	* ice_is_safe_mode
846	* @pf: pointer to the PF struct
847	*
848	* returns true if driver is in safe mode, false otherwise
849	*/
850	bool ice_is_safe_mode(struct ice_pf *pf)
851	{
852	return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
853	}
854
855	/**
856	* ice_is_rdma_ena
857	* @pf: pointer to the PF struct
858	*
859	* returns true if RDMA is currently supported, false otherwise
860	*/
861	bool ice_is_rdma_ena(struct ice_pf *pf)
862	{
863	return test_bit(ICE_FLAG_RDMA_ENA, pf->flags);
864	}
865
866	/**
867	* ice_vsi_clean_rss_flow_fld - Delete RSS configuration
868	* @vsi: the VSI being cleaned up
869	*
870	* This function deletes RSS input set for all flows that were configured
871	* for this VSI
872	*/
873	static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
874	{
875	struct ice_pf *pf = vsi->back;
876	int status;
877
878	if (ice_is_safe_mode(pf))
879	return;
880
881	status = ice_rem_vsi_rss_cfg(hw: &pf->hw, vsi_handle: vsi->idx);
882	if (status)
883	dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
884	vsi->vsi_num, status);
885	}
886
887	/**
888	* ice_rss_clean - Delete RSS related VSI structures and configuration
889	* @vsi: the VSI being removed
890	*/
891	static void ice_rss_clean(struct ice_vsi *vsi)
892	{
893	struct ice_pf *pf = vsi->back;
894	struct device *dev;
895
896	dev = ice_pf_to_dev(pf);
897
898	devm_kfree(dev, p: vsi->rss_hkey_user);
899	devm_kfree(dev, p: vsi->rss_lut_user);
900
901	ice_vsi_clean_rss_flow_fld(vsi);
902	/* remove RSS replay list */
903	if (!ice_is_safe_mode(pf))
904	ice_rem_vsi_rss_list(hw: &pf->hw, vsi_handle: vsi->idx);
905	}
906
907	/**
908	* ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
909	* @vsi: the VSI being configured
910	*/
911	static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
912	{
913	struct ice_hw_common_caps *cap;
914	struct ice_pf *pf = vsi->back;
915	u16 max_rss_size;
916
917	if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
918	vsi->rss_size = 1;
919	return;
920	}
921
922	cap = &pf->hw.func_caps.common_cap;
923	max_rss_size = BIT(cap->rss_table_entry_width);
924	switch (vsi->type) {
925	case ICE_VSI_CHNL:
926	case ICE_VSI_PF:
927	/* PF VSI will inherit RSS instance of PF */
928	vsi->rss_table_size = (u16)cap->rss_table_size;
929	if (vsi->type == ICE_VSI_CHNL)
930	vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size);
931	else
932	vsi->rss_size = min_t(u16, num_online_cpus(),
933	max_rss_size);
934	vsi->rss_lut_type = ICE_LUT_PF;
935	break;
936	case ICE_VSI_SWITCHDEV_CTRL:
937	vsi->rss_table_size = ICE_LUT_VSI_SIZE;
938	vsi->rss_size = min_t(u16, num_online_cpus(), max_rss_size);
939	vsi->rss_lut_type = ICE_LUT_VSI;
940	break;
941	case ICE_VSI_VF:
942	/* VF VSI will get a small RSS table.
943	* For VSI_LUT, LUT size should be set to 64 bytes.
944	*/
945	vsi->rss_table_size = ICE_LUT_VSI_SIZE;
946	vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
947	vsi->rss_lut_type = ICE_LUT_VSI;
948	break;
949	case ICE_VSI_LB:
950	break;
951	default:
952	dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
953	ice_vsi_type_str(vsi->type));
954	break;
955	}
956	}
957
958	/**
959	* ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
960	* @hw: HW structure used to determine the VLAN mode of the device
961	* @ctxt: the VSI context being set
962	*
963	* This initializes a default VSI context for all sections except the Queues.
964	*/
965	static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
966	{
967	u32 table = 0;
968
969	memset(&ctxt->info, 0, sizeof(ctxt->info));
970	/* VSI's should be allocated from shared pool */
971	ctxt->alloc_from_pool = true;
972	/* Src pruning enabled by default */
973	ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
974	/* Traffic from VSI can be sent to LAN */
975	ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
976	/* allow all untagged/tagged packets by default on Tx */
977	ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M,
978	ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL);
979	/* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
980	* results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
981	*
982	* DVM - leave inner VLAN in packet by default
983	*/
984	if (ice_is_dvm_ena(hw)) {
985	ctxt->info.inner_vlan_flags |=
986	FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,
987	ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING);
988	ctxt->info.outer_vlan_flags =
989	FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,
990	ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL);
991	ctxt->info.outer_vlan_flags |=
992	FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M,
993	ICE_AQ_VSI_OUTER_TAG_VLAN_8100);
994	ctxt->info.outer_vlan_flags |=
995	FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M,
996	ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING);
997	}
998	/* Have 1:1 UP mapping for both ingress/egress tables */
999	table |= ICE_UP_TABLE_TRANSLATE(0, 0);
1000	table |= ICE_UP_TABLE_TRANSLATE(1, 1);
1001	table |= ICE_UP_TABLE_TRANSLATE(2, 2);
1002	table |= ICE_UP_TABLE_TRANSLATE(3, 3);
1003	table |= ICE_UP_TABLE_TRANSLATE(4, 4);
1004	table |= ICE_UP_TABLE_TRANSLATE(5, 5);
1005	table |= ICE_UP_TABLE_TRANSLATE(6, 6);
1006	table |= ICE_UP_TABLE_TRANSLATE(7, 7);
1007	ctxt->info.ingress_table = cpu_to_le32(table);
1008	ctxt->info.egress_table = cpu_to_le32(table);
1009	/* Have 1:1 UP mapping for outer to inner UP table */
1010	ctxt->info.outer_up_table = cpu_to_le32(table);
1011	/* No Outer tag support outer_tag_flags remains to zero */
1012	}
1013
1014	/**
1015	* ice_vsi_setup_q_map - Setup a VSI queue map
1016	* @vsi: the VSI being configured
1017	* @ctxt: VSI context structure
1018	*/
1019	static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1020	{
1021	u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0;
1022	u16 num_txq_per_tc, num_rxq_per_tc;
1023	u16 qcount_tx = vsi->alloc_txq;
1024	u16 qcount_rx = vsi->alloc_rxq;
1025	u8 netdev_tc = 0;
1026	int i;
1027
1028	if (!vsi->tc_cfg.numtc) {
1029	/* at least TC0 should be enabled by default */
1030	vsi->tc_cfg.numtc = 1;
1031	vsi->tc_cfg.ena_tc = 1;
1032	}
1033
1034	num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
1035	if (!num_rxq_per_tc)
1036	num_rxq_per_tc = 1;
1037	num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
1038	if (!num_txq_per_tc)
1039	num_txq_per_tc = 1;
1040
1041	/* find the (rounded up) power-of-2 of qcount */
1042	pow = (u16)order_base_2(num_rxq_per_tc);
1043
1044	/* TC mapping is a function of the number of Rx queues assigned to the
1045	* VSI for each traffic class and the offset of these queues.
1046	* The first 10 bits are for queue offset for TC0, next 4 bits for no:of
1047	* queues allocated to TC0. No:of queues is a power-of-2.
1048	*
1049	* If TC is not enabled, the queue offset is set to 0, and allocate one
1050	* queue, this way, traffic for the given TC will be sent to the default
1051	* queue.
1052	*
1053	* Setup number and offset of Rx queues for all TCs for the VSI
1054	*/
1055	ice_for_each_traffic_class(i) {
1056	if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
1057	/* TC is not enabled */
1058	vsi->tc_cfg.tc_info[i].qoffset = 0;
1059	vsi->tc_cfg.tc_info[i].qcount_rx = 1;
1060	vsi->tc_cfg.tc_info[i].qcount_tx = 1;
1061	vsi->tc_cfg.tc_info[i].netdev_tc = 0;
1062	ctxt->info.tc_mapping[i] = 0;
1063	continue;
1064	}
1065
1066	/* TC is enabled */
1067	vsi->tc_cfg.tc_info[i].qoffset = offset;
1068	vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
1069	vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
1070	vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
1071
1072	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);
1073	qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
1074	offset += num_rxq_per_tc;
1075	tx_count += num_txq_per_tc;
1076	ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1077	}
1078
1079	/* if offset is non-zero, means it is calculated correctly based on
1080	* enabled TCs for a given VSI otherwise qcount_rx will always
1081	* be correct and non-zero because it is based off - VSI's
1082	* allocated Rx queues which is at least 1 (hence qcount_tx will be
1083	* at least 1)
1084	*/
1085	if (offset)
1086	rx_count = offset;
1087	else
1088	rx_count = num_rxq_per_tc;
1089
1090	if (rx_count > vsi->alloc_rxq) {
1091	dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
1092	rx_count, vsi->alloc_rxq);
1093	return -EINVAL;
1094	}
1095
1096	if (tx_count > vsi->alloc_txq) {
1097	dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
1098	tx_count, vsi->alloc_txq);
1099	return -EINVAL;
1100	}
1101
1102	vsi->num_txq = tx_count;
1103	vsi->num_rxq = rx_count;
1104
1105	if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
1106	dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
1107	/* since there is a chance that num_rxq could have been changed
1108	* in the above for loop, make num_txq equal to num_rxq.
1109	*/
1110	vsi->num_txq = vsi->num_rxq;
1111	}
1112
1113	/* Rx queue mapping */
1114	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1115	/* q_mapping buffer holds the info for the first queue allocated for
1116	* this VSI in the PF space and also the number of queues associated
1117	* with this VSI.
1118	*/
1119	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
1120	ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
1121
1122	return 0;
1123	}
1124
1125	/**
1126	* ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
1127	* @ctxt: the VSI context being set
1128	* @vsi: the VSI being configured
1129	*/
1130	static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1131	{
1132	u8 dflt_q_group, dflt_q_prio;
1133	u16 dflt_q, report_q, val;
1134
1135	if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1136	vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1137	return;
1138
1139	val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1140	ctxt->info.valid_sections |= cpu_to_le16(val);
1141	dflt_q = 0;
1142	dflt_q_group = 0;
1143	report_q = 0;
1144	dflt_q_prio = 0;
1145
1146	/* enable flow director filtering/programming */
1147	val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1148	ctxt->info.fd_options = cpu_to_le16(val);
1149	/* max of allocated flow director filters */
1150	ctxt->info.max_fd_fltr_dedicated =
1151	cpu_to_le16(vsi->num_gfltr);
1152	/* max of shared flow director filters any VSI may program */
1153	ctxt->info.max_fd_fltr_shared =
1154	cpu_to_le16(vsi->num_bfltr);
1155	/* default queue index within the VSI of the default FD */
1156	val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q);
1157	/* target queue or queue group to the FD filter */
1158	val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group);
1159	ctxt->info.fd_def_q = cpu_to_le16(val);
1160	/* queue index on which FD filter completion is reported */
1161	val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q);
1162	/* priority of the default qindex action */
1163	val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio);
1164	ctxt->info.fd_report_opt = cpu_to_le16(val);
1165	}
1166
1167	/**
1168	* ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1169	* @ctxt: the VSI context being set
1170	* @vsi: the VSI being configured
1171	*/
1172	static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1173	{
1174	u8 lut_type, hash_type;
1175	struct device *dev;
1176	struct ice_pf *pf;
1177
1178	pf = vsi->back;
1179	dev = ice_pf_to_dev(pf);
1180
1181	switch (vsi->type) {
1182	case ICE_VSI_CHNL:
1183	case ICE_VSI_PF:
1184	/* PF VSI will inherit RSS instance of PF */
1185	lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1186	break;
1187	case ICE_VSI_VF:
1188	/* VF VSI will gets a small RSS table which is a VSI LUT type */
1189	lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1190	break;
1191	default:
1192	dev_dbg(dev, "Unsupported VSI type %s\n",
1193	ice_vsi_type_str(vsi->type));
1194	return;
1195	}
1196
1197	hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
1198	vsi->rss_hfunc = hash_type;
1199
1200	ctxt->info.q_opt_rss =
1201	FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) |
1202	FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type);
1203	}
1204
1205	static void
1206	ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1207	{
1208	struct ice_pf *pf = vsi->back;
1209	u16 qcount, qmap;
1210	u8 offset = 0;
1211	int pow;
1212
1213	qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix);
1214
1215	pow = order_base_2(qcount);
1216	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);
1217	qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
1218
1219	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1220	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1221	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1222	ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1223	}
1224
1225	/**
1226	* ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
1227	* @vsi: VSI to check whether or not VLAN pruning is enabled.
1228	*
1229	* returns true if Rx VLAN pruning is enabled and false otherwise.
1230	*/
1231	static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
1232	{
1233	return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1234	}
1235
1236	/**
1237	* ice_vsi_init - Create and initialize a VSI
1238	* @vsi: the VSI being configured
1239	* @vsi_flags: VSI configuration flags
1240	*
1241	* Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to
1242	* reconfigure an existing context.
1243	*
1244	* This initializes a VSI context depending on the VSI type to be added and
1245	* passes it down to the add_vsi aq command to create a new VSI.
1246	*/
1247	static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags)
1248	{
1249	struct ice_pf *pf = vsi->back;
1250	struct ice_hw *hw = &pf->hw;
1251	struct ice_vsi_ctx *ctxt;
1252	struct device *dev;
1253	int ret = 0;
1254
1255	dev = ice_pf_to_dev(pf);
1256	ctxt = kzalloc(size: sizeof(*ctxt), GFP_KERNEL);
1257	if (!ctxt)
1258	return -ENOMEM;
1259
1260	switch (vsi->type) {
1261	case ICE_VSI_CTRL:
1262	case ICE_VSI_LB:
1263	case ICE_VSI_PF:
1264	ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1265	break;
1266	case ICE_VSI_SWITCHDEV_CTRL:
1267	case ICE_VSI_CHNL:
1268	ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1269	break;
1270	case ICE_VSI_VF:
1271	ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1272	/* VF number here is the absolute VF number (0-255) */
1273	ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id;
1274	break;
1275	default:
1276	ret = -ENODEV;
1277	goto out;
1278	}
1279
1280	/* Handle VLAN pruning for channel VSI if main VSI has VLAN
1281	* prune enabled
1282	*/
1283	if (vsi->type == ICE_VSI_CHNL) {
1284	struct ice_vsi *main_vsi;
1285
1286	main_vsi = ice_get_main_vsi(pf);
1287	if (main_vsi && ice_vsi_is_vlan_pruning_ena(vsi: main_vsi))
1288	ctxt->info.sw_flags2 |=
1289	ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1290	else
1291	ctxt->info.sw_flags2 &=
1292	~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1293	}
1294
1295	ice_set_dflt_vsi_ctx(hw, ctxt);
1296	if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1297	ice_set_fd_vsi_ctx(ctxt, vsi);
1298	/* if the switch is in VEB mode, allow VSI loopback */
1299	if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1300	ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1301
1302	/* Set LUT type and HASH type if RSS is enabled */
1303	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1304	vsi->type != ICE_VSI_CTRL) {
1305	ice_set_rss_vsi_ctx(ctxt, vsi);
1306	/* if updating VSI context, make sure to set valid_section:
1307	* to indicate which section of VSI context being updated
1308	*/
1309	if (!(vsi_flags & ICE_VSI_FLAG_INIT))
1310	ctxt->info.valid_sections |=
1311	cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1312	}
1313
1314	ctxt->info.sw_id = vsi->port_info->sw_id;
1315	if (vsi->type == ICE_VSI_CHNL) {
1316	ice_chnl_vsi_setup_q_map(vsi, ctxt);
1317	} else {
1318	ret = ice_vsi_setup_q_map(vsi, ctxt);
1319	if (ret)
1320	goto out;
1321
1322	if (!(vsi_flags & ICE_VSI_FLAG_INIT))
1323	/* means VSI being updated */
1324	/* must to indicate which section of VSI context are
1325	* being modified
1326	*/
1327	ctxt->info.valid_sections |=
1328	cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1329	}
1330
1331	/* Allow control frames out of main VSI */
1332	if (vsi->type == ICE_VSI_PF) {
1333	ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1334	ctxt->info.valid_sections |=
1335	cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1336	}
1337
1338	if (vsi_flags & ICE_VSI_FLAG_INIT) {
1339	ret = ice_add_vsi(hw, vsi_handle: vsi->idx, vsi_ctx: ctxt, NULL);
1340	if (ret) {
1341	dev_err(dev, "Add VSI failed, err %d\n", ret);
1342	ret = -EIO;
1343	goto out;
1344	}
1345	} else {
1346	ret = ice_update_vsi(hw, vsi_handle: vsi->idx, vsi_ctx: ctxt, NULL);
1347	if (ret) {
1348	dev_err(dev, "Update VSI failed, err %d\n", ret);
1349	ret = -EIO;
1350	goto out;
1351	}
1352	}
1353
1354	/* keep context for update VSI operations */
1355	vsi->info = ctxt->info;
1356
1357	/* record VSI number returned */
1358	vsi->vsi_num = ctxt->vsi_num;
1359
1360	out:
1361	kfree(objp: ctxt);
1362	return ret;
1363	}
1364
1365	/**
1366	* ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1367	* @vsi: the VSI having rings deallocated
1368	*/
1369	static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1370	{
1371	int i;
1372
1373	/* Avoid stale references by clearing map from vector to ring */
1374	if (vsi->q_vectors) {
1375	ice_for_each_q_vector(vsi, i) {
1376	struct ice_q_vector *q_vector = vsi->q_vectors[i];
1377
1378	if (q_vector) {
1379	q_vector->tx.tx_ring = NULL;
1380	q_vector->rx.rx_ring = NULL;
1381	}
1382	}
1383	}
1384
1385	if (vsi->tx_rings) {
1386	ice_for_each_alloc_txq(vsi, i) {
1387	if (vsi->tx_rings[i]) {
1388	kfree_rcu(vsi->tx_rings[i], rcu);
1389	WRITE_ONCE(vsi->tx_rings[i], NULL);
1390	}
1391	}
1392	}
1393	if (vsi->rx_rings) {
1394	ice_for_each_alloc_rxq(vsi, i) {
1395	if (vsi->rx_rings[i]) {
1396	kfree_rcu(vsi->rx_rings[i], rcu);
1397	WRITE_ONCE(vsi->rx_rings[i], NULL);
1398	}
1399	}
1400	}
1401	}
1402
1403	/**
1404	* ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1405	* @vsi: VSI which is having rings allocated
1406	*/
1407	static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1408	{
1409	bool dvm_ena = ice_is_dvm_ena(hw: &vsi->back->hw);
1410	struct ice_pf *pf = vsi->back;
1411	struct device *dev;
1412	u16 i;
1413
1414	dev = ice_pf_to_dev(pf);
1415	/* Allocate Tx rings */
1416	ice_for_each_alloc_txq(vsi, i) {
1417	struct ice_tx_ring *ring;
1418
1419	/* allocate with kzalloc(), free with kfree_rcu() */
1420	ring = kzalloc(size: sizeof(*ring), GFP_KERNEL);
1421
1422	if (!ring)
1423	goto err_out;
1424
1425	ring->q_index = i;
1426	ring->reg_idx = vsi->txq_map[i];
1427	ring->vsi = vsi;
1428	ring->tx_tstamps = &pf->ptp.port.tx;
1429	ring->dev = dev;
1430	ring->count = vsi->num_tx_desc;
1431	ring->txq_teid = ICE_INVAL_TEID;
1432	if (dvm_ena)
1433	ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1434	else
1435	ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1436	WRITE_ONCE(vsi->tx_rings[i], ring);
1437	}
1438
1439	/* Allocate Rx rings */
1440	ice_for_each_alloc_rxq(vsi, i) {
1441	struct ice_rx_ring *ring;
1442
1443	/* allocate with kzalloc(), free with kfree_rcu() */
1444	ring = kzalloc(size: sizeof(*ring), GFP_KERNEL);
1445	if (!ring)
1446	goto err_out;
1447
1448	ring->q_index = i;
1449	ring->reg_idx = vsi->rxq_map[i];
1450	ring->vsi = vsi;
1451	ring->netdev = vsi->netdev;
1452	ring->dev = dev;
1453	ring->count = vsi->num_rx_desc;
1454	ring->cached_phctime = pf->ptp.cached_phc_time;
1455	WRITE_ONCE(vsi->rx_rings[i], ring);
1456	}
1457
1458	return 0;
1459
1460	err_out:
1461	ice_vsi_clear_rings(vsi);
1462	return -ENOMEM;
1463	}
1464
1465	/**
1466	* ice_vsi_manage_rss_lut - disable/enable RSS
1467	* @vsi: the VSI being changed
1468	* @ena: boolean value indicating if this is an enable or disable request
1469	*
1470	* In the event of disable request for RSS, this function will zero out RSS
1471	* LUT, while in the event of enable request for RSS, it will reconfigure RSS
1472	* LUT.
1473	*/
1474	void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1475	{
1476	u8 *lut;
1477
1478	lut = kzalloc(size: vsi->rss_table_size, GFP_KERNEL);
1479	if (!lut)
1480	return;
1481
1482	if (ena) {
1483	if (vsi->rss_lut_user)
1484	memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1485	else
1486	ice_fill_rss_lut(lut, rss_table_size: vsi->rss_table_size,
1487	rss_size: vsi->rss_size);
1488	}
1489
1490	ice_set_rss_lut(vsi, lut, lut_size: vsi->rss_table_size);
1491	kfree(objp: lut);
1492	}
1493
1494	/**
1495	* ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI
1496	* @vsi: VSI to be configured
1497	* @disable: set to true to have FCS / CRC in the frame data
1498	*/
1499	void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable)
1500	{
1501	int i;
1502
1503	ice_for_each_rxq(vsi, i)
1504	if (disable)
1505	vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS;
1506	else
1507	vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS;
1508	}
1509
1510	/**
1511	* ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1512	* @vsi: VSI to be configured
1513	*/
1514	int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1515	{
1516	struct ice_pf *pf = vsi->back;
1517	struct device *dev;
1518	u8 *lut, *key;
1519	int err;
1520
1521	dev = ice_pf_to_dev(pf);
1522	if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1523	(test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1524	vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1525	} else {
1526	vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1527
1528	/* If orig_rss_size is valid and it is less than determined
1529	* main VSI's rss_size, update main VSI's rss_size to be
1530	* orig_rss_size so that when tc-qdisc is deleted, main VSI
1531	* RSS table gets programmed to be correct (whatever it was
1532	* to begin with (prior to setup-tc for ADQ config)
1533	*/
1534	if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1535	vsi->orig_rss_size <= vsi->num_rxq) {
1536	vsi->rss_size = vsi->orig_rss_size;
1537	/* now orig_rss_size is used, reset it to zero */
1538	vsi->orig_rss_size = 0;
1539	}
1540	}
1541
1542	lut = kzalloc(size: vsi->rss_table_size, GFP_KERNEL);
1543	if (!lut)
1544	return -ENOMEM;
1545
1546	if (vsi->rss_lut_user)
1547	memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1548	else
1549	ice_fill_rss_lut(lut, rss_table_size: vsi->rss_table_size, rss_size: vsi->rss_size);
1550
1551	err = ice_set_rss_lut(vsi, lut, lut_size: vsi->rss_table_size);
1552	if (err) {
1553	dev_err(dev, "set_rss_lut failed, error %d\n", err);
1554	goto ice_vsi_cfg_rss_exit;
1555	}
1556
1557	key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1558	if (!key) {
1559	err = -ENOMEM;
1560	goto ice_vsi_cfg_rss_exit;
1561	}
1562
1563	if (vsi->rss_hkey_user)
1564	memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1565	else
1566	netdev_rss_key_fill(buffer: (void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1567
1568	err = ice_set_rss_key(vsi, seed: key);
1569	if (err)
1570	dev_err(dev, "set_rss_key failed, error %d\n", err);
1571
1572	kfree(objp: key);
1573	ice_vsi_cfg_rss_exit:
1574	kfree(objp: lut);
1575	return err;
1576	}
1577
1578	/**
1579	* ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1580	* @vsi: VSI to be configured
1581	*
1582	* This function will only be called during the VF VSI setup. Upon successful
1583	* completion of package download, this function will configure default RSS
1584	* input sets for VF VSI.
1585	*/
1586	static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1587	{
1588	struct ice_pf *pf = vsi->back;
1589	struct device *dev;
1590	int status;
1591
1592	dev = ice_pf_to_dev(pf);
1593	if (ice_is_safe_mode(pf)) {
1594	dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1595	vsi->vsi_num);
1596	return;
1597	}
1598
1599	status = ice_add_avf_rss_cfg(hw: &pf->hw, vsi, ICE_DEFAULT_RSS_HENA);
1600	if (status)
1601	dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1602	vsi->vsi_num, status);
1603	}
1604
1605	static const struct ice_rss_hash_cfg default_rss_cfgs[] = {
1606	/* configure RSS for IPv4 with input set IP src/dst */
1607	{ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false},
1608	/* configure RSS for IPv6 with input set IPv6 src/dst */
1609	{ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false},
1610	/* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1611	{ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4,
1612	ICE_HASH_TCP_IPV4, ICE_RSS_ANY_HEADERS, false},
1613	/* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1614	{ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4,
1615	ICE_HASH_UDP_IPV4, ICE_RSS_ANY_HEADERS, false},
1616	/* configure RSS for sctp4 with input set IP src/dst - only support
1617	* RSS on SCTPv4 on outer headers (non-tunneled)
1618	*/
1619	{ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4,
1620	ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false},
1621	/* configure RSS for gtpc4 with input set IPv4 src/dst */
1622	{ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4,
1623	ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false},
1624	/* configure RSS for gtpc4t with input set IPv4 src/dst */
1625	{ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4,
1626	ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false},
1627	/* configure RSS for gtpu4 with input set IPv4 src/dst */
1628	{ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4,
1629	ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false},
1630	/* configure RSS for gtpu4e with input set IPv4 src/dst */
1631	{ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4,
1632	ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false},
1633	/* configure RSS for gtpu4u with input set IPv4 src/dst */
1634	{ ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4,
1635	ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false},
1636	/* configure RSS for gtpu4d with input set IPv4 src/dst */
1637	{ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4,
1638	ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false},
1639
1640	/* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1641	{ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6,
1642	ICE_HASH_TCP_IPV6, ICE_RSS_ANY_HEADERS, false},
1643	/* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1644	{ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6,
1645	ICE_HASH_UDP_IPV6, ICE_RSS_ANY_HEADERS, false},
1646	/* configure RSS for sctp6 with input set IPv6 src/dst - only support
1647	* RSS on SCTPv6 on outer headers (non-tunneled)
1648	*/
1649	{ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6,
1650	ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false},
1651	/* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */
1652	{ICE_FLOW_SEG_HDR_ESP,
1653	ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false},
1654	/* configure RSS for gtpc6 with input set IPv6 src/dst */
1655	{ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6,
1656	ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false},
1657	/* configure RSS for gtpc6t with input set IPv6 src/dst */
1658	{ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6,
1659	ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false},
1660	/* configure RSS for gtpu6 with input set IPv6 src/dst */
1661	{ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6,
1662	ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false},
1663	/* configure RSS for gtpu6e with input set IPv6 src/dst */
1664	{ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6,
1665	ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false},
1666	/* configure RSS for gtpu6u with input set IPv6 src/dst */
1667	{ ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6,
1668	ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false},
1669	/* configure RSS for gtpu6d with input set IPv6 src/dst */
1670	{ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6,
1671	ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false},
1672	};
1673
1674	/**
1675	* ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1676	* @vsi: VSI to be configured
1677	*
1678	* This function will only be called after successful download package call
1679	* during initialization of PF. Since the downloaded package will erase the
1680	* RSS section, this function will configure RSS input sets for different
1681	* flow types. The last profile added has the highest priority, therefore 2
1682	* tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1683	* (i.e. IPv4 src/dst TCP src/dst port).
1684	*/
1685	static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1686	{
1687	u16 vsi_num = vsi->vsi_num;
1688	struct ice_pf *pf = vsi->back;
1689	struct ice_hw *hw = &pf->hw;
1690	struct device *dev;
1691	int status;
1692	u32 i;
1693
1694	dev = ice_pf_to_dev(pf);
1695	if (ice_is_safe_mode(pf)) {
1696	dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1697	vsi_num);
1698	return;
1699	}
1700	for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) {
1701	const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i];
1702
1703	status = ice_add_rss_cfg(hw, vsi, cfg);
1704	if (status)
1705	dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n",
1706	cfg->addl_hdrs, cfg->hash_flds,
1707	cfg->hdr_type, cfg->symm);
1708	}
1709	}
1710
1711	/**
1712	* ice_pf_state_is_nominal - checks the PF for nominal state
1713	* @pf: pointer to PF to check
1714	*
1715	* Check the PF's state for a collection of bits that would indicate
1716	* the PF is in a state that would inhibit normal operation for
1717	* driver functionality.
1718	*
1719	* Returns true if PF is in a nominal state, false otherwise
1720	*/
1721	bool ice_pf_state_is_nominal(struct ice_pf *pf)
1722	{
1723	DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1724
1725	if (!pf)
1726	return false;
1727
1728	bitmap_set(map: check_bits, start: 0, nbits: ICE_STATE_NOMINAL_CHECK_BITS);
1729	if (bitmap_intersects(src1: pf->state, src2: check_bits, nbits: ICE_STATE_NBITS))
1730	return false;
1731
1732	return true;
1733	}
1734
1735	/**
1736	* ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1737	* @vsi: the VSI to be updated
1738	*/
1739	void ice_update_eth_stats(struct ice_vsi *vsi)
1740	{
1741	struct ice_eth_stats *prev_es, *cur_es;
1742	struct ice_hw *hw = &vsi->back->hw;
1743	struct ice_pf *pf = vsi->back;
1744	u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
1745
1746	prev_es = &vsi->eth_stats_prev;
1747	cur_es = &vsi->eth_stats;
1748
1749	if (ice_is_reset_in_progress(state: pf->state))
1750	vsi->stat_offsets_loaded = false;
1751
1752	ice_stat_update40(hw, GLV_GORCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1753	prev_stat: &prev_es->rx_bytes, cur_stat: &cur_es->rx_bytes);
1754
1755	ice_stat_update40(hw, GLV_UPRCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1756	prev_stat: &prev_es->rx_unicast, cur_stat: &cur_es->rx_unicast);
1757
1758	ice_stat_update40(hw, GLV_MPRCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1759	prev_stat: &prev_es->rx_multicast, cur_stat: &cur_es->rx_multicast);
1760
1761	ice_stat_update40(hw, GLV_BPRCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1762	prev_stat: &prev_es->rx_broadcast, cur_stat: &cur_es->rx_broadcast);
1763
1764	ice_stat_update32(hw, GLV_RDPC(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1765	prev_stat: &prev_es->rx_discards, cur_stat: &cur_es->rx_discards);
1766
1767	ice_stat_update40(hw, GLV_GOTCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1768	prev_stat: &prev_es->tx_bytes, cur_stat: &cur_es->tx_bytes);
1769
1770	ice_stat_update40(hw, GLV_UPTCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1771	prev_stat: &prev_es->tx_unicast, cur_stat: &cur_es->tx_unicast);
1772
1773	ice_stat_update40(hw, GLV_MPTCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1774	prev_stat: &prev_es->tx_multicast, cur_stat: &cur_es->tx_multicast);
1775
1776	ice_stat_update40(hw, GLV_BPTCL(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1777	prev_stat: &prev_es->tx_broadcast, cur_stat: &cur_es->tx_broadcast);
1778
1779	ice_stat_update32(hw, GLV_TEPC(vsi_num), prev_stat_loaded: vsi->stat_offsets_loaded,
1780	prev_stat: &prev_es->tx_errors, cur_stat: &cur_es->tx_errors);
1781
1782	vsi->stat_offsets_loaded = true;
1783	}
1784
1785	/**
1786	* ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1787	* @hw: HW pointer
1788	* @pf_q: index of the Rx queue in the PF's queue space
1789	* @rxdid: flexible descriptor RXDID
1790	* @prio: priority for the RXDID for this queue
1791	* @ena_ts: true to enable timestamp and false to disable timestamp
1792	*/
1793	void
1794	ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1795	bool ena_ts)
1796	{
1797	int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1798
1799	/* clear any previous values */
1800	regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1801	QRXFLXP_CNTXT_RXDID_PRIO_M |
1802	QRXFLXP_CNTXT_TS_M);
1803
1804	regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid);
1805	regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio);
1806
1807	if (ena_ts)
1808	/* Enable TimeSync on this queue */
1809	regval |= QRXFLXP_CNTXT_TS_M;
1810
1811	wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1812	}
1813
1814	/**
1815	* ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1816	* @intrl: interrupt rate limit in usecs
1817	* @gran: interrupt rate limit granularity in usecs
1818	*
1819	* This function converts a decimal interrupt rate limit in usecs to the format
1820	* expected by firmware.
1821	*/
1822	static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1823	{
1824	u32 val = intrl / gran;
1825
1826	if (val)
1827	return val | GLINT_RATE_INTRL_ENA_M;
1828	return 0;
1829	}
1830
1831	/**
1832	* ice_write_intrl - write throttle rate limit to interrupt specific register
1833	* @q_vector: pointer to interrupt specific structure
1834	* @intrl: throttle rate limit in microseconds to write
1835	*/
1836	void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
1837	{
1838	struct ice_hw *hw = &q_vector->vsi->back->hw;
1839
1840	wr32(hw, GLINT_RATE(q_vector->reg_idx),
1841	ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
1842	}
1843
1844	static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
1845	{
1846	switch (rc->type) {
1847	case ICE_RX_CONTAINER:
1848	if (rc->rx_ring)
1849	return rc->rx_ring->q_vector;
1850	break;
1851	case ICE_TX_CONTAINER:
1852	if (rc->tx_ring)
1853	return rc->tx_ring->q_vector;
1854	break;
1855	default:
1856	break;
1857	}
1858
1859	return NULL;
1860	}
1861
1862	/**
1863	* __ice_write_itr - write throttle rate to register
1864	* @q_vector: pointer to interrupt data structure
1865	* @rc: pointer to ring container
1866	* @itr: throttle rate in microseconds to write
1867	*/
1868	static void __ice_write_itr(struct ice_q_vector *q_vector,
1869	struct ice_ring_container *rc, u16 itr)
1870	{
1871	struct ice_hw *hw = &q_vector->vsi->back->hw;
1872
1873	wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
1874	ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
1875	}
1876
1877	/**
1878	* ice_write_itr - write throttle rate to queue specific register
1879	* @rc: pointer to ring container
1880	* @itr: throttle rate in microseconds to write
1881	*/
1882	void ice_write_itr(struct ice_ring_container *rc, u16 itr)
1883	{
1884	struct ice_q_vector *q_vector;
1885
1886	q_vector = ice_pull_qvec_from_rc(rc);
1887	if (!q_vector)
1888	return;
1889
1890	__ice_write_itr(q_vector, rc, itr);
1891	}
1892
1893	/**
1894	* ice_set_q_vector_intrl - set up interrupt rate limiting
1895	* @q_vector: the vector to be configured
1896	*
1897	* Interrupt rate limiting is local to the vector, not per-queue so we must
1898	* detect if either ring container has dynamic moderation enabled to decide
1899	* what to set the interrupt rate limit to via INTRL settings. In the case that
1900	* dynamic moderation is disabled on both, write the value with the cached
1901	* setting to make sure INTRL register matches the user visible value.
1902	*/
1903	void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
1904	{
1905	if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
1906	/* in the case of dynamic enabled, cap each vector to no more
1907	* than (4 us) 250,000 ints/sec, which allows low latency
1908	* but still less than 500,000 interrupts per second, which
1909	* reduces CPU a bit in the case of the lowest latency
1910	* setting. The 4 here is a value in microseconds.
1911	*/
1912	ice_write_intrl(q_vector, intrl: 4);
1913	} else {
1914	ice_write_intrl(q_vector, intrl: q_vector->intrl);
1915	}
1916	}
1917
1918	/**
1919	* ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
1920	* @vsi: the VSI being configured
1921	*
1922	* This configures MSIX mode interrupts for the PF VSI, and should not be used
1923	* for the VF VSI.
1924	*/
1925	void ice_vsi_cfg_msix(struct ice_vsi *vsi)
1926	{
1927	struct ice_pf *pf = vsi->back;
1928	struct ice_hw *hw = &pf->hw;
1929	u16 txq = 0, rxq = 0;
1930	int i, q;
1931
1932	ice_for_each_q_vector(vsi, i) {
1933	struct ice_q_vector *q_vector = vsi->q_vectors[i];
1934	u16 reg_idx = q_vector->reg_idx;
1935
1936	ice_cfg_itr(hw, q_vector);
1937
1938	/* Both Transmit Queue Interrupt Cause Control register
1939	* and Receive Queue Interrupt Cause control register
1940	* expects MSIX_INDX field to be the vector index
1941	* within the function space and not the absolute
1942	* vector index across PF or across device.
1943	* For SR-IOV VF VSIs queue vector index always starts
1944	* with 1 since first vector index(0) is used for OICR
1945	* in VF space. Since VMDq and other PF VSIs are within
1946	* the PF function space, use the vector index that is
1947	* tracked for this PF.
1948	*/
1949	for (q = 0; q < q_vector->num_ring_tx; q++) {
1950	ice_cfg_txq_interrupt(vsi, txq, msix_idx: reg_idx,
1951	itr_idx: q_vector->tx.itr_idx);
1952	txq++;
1953	}
1954
1955	for (q = 0; q < q_vector->num_ring_rx; q++) {
1956	ice_cfg_rxq_interrupt(vsi, rxq, msix_idx: reg_idx,
1957	itr_idx: q_vector->rx.itr_idx);
1958	rxq++;
1959	}
1960	}
1961	}
1962
1963	/**
1964	* ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
1965	* @vsi: the VSI whose rings are to be enabled
1966	*
1967	* Returns 0 on success and a negative value on error
1968	*/
1969	int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
1970	{
1971	return ice_vsi_ctrl_all_rx_rings(vsi, ena: true);
1972	}
1973
1974	/**
1975	* ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
1976	* @vsi: the VSI whose rings are to be disabled
1977	*
1978	* Returns 0 on success and a negative value on error
1979	*/
1980	int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
1981	{
1982	return ice_vsi_ctrl_all_rx_rings(vsi, ena: false);
1983	}
1984
1985	/**
1986	* ice_vsi_stop_tx_rings - Disable Tx rings
1987	* @vsi: the VSI being configured
1988	* @rst_src: reset source
1989	* @rel_vmvf_num: Relative ID of VF/VM
1990	* @rings: Tx ring array to be stopped
1991	* @count: number of Tx ring array elements
1992	*/
1993	static int
1994	ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
1995	u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
1996	{
1997	u16 q_idx;
1998
1999	if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2000	return -EINVAL;
2001
2002	for (q_idx = 0; q_idx < count; q_idx++) {
2003	struct ice_txq_meta txq_meta = { };
2004	int status;
2005
2006	if (!rings || !rings[q_idx])
2007	return -EINVAL;
2008
2009	ice_fill_txq_meta(vsi, ring: rings[q_idx], txq_meta: &txq_meta);
2010	status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
2011	ring: rings[q_idx], txq_meta: &txq_meta);
2012
2013	if (status)
2014	return status;
2015	}
2016
2017	return 0;
2018	}
2019
2020	/**
2021	* ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2022	* @vsi: the VSI being configured
2023	* @rst_src: reset source
2024	* @rel_vmvf_num: Relative ID of VF/VM
2025	*/
2026	int
2027	ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2028	u16 rel_vmvf_num)
2029	{
2030	return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, rings: vsi->tx_rings, count: vsi->num_txq);
2031	}
2032
2033	/**
2034	* ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2035	* @vsi: the VSI being configured
2036	*/
2037	int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2038	{
2039	return ice_vsi_stop_tx_rings(vsi, rst_src: ICE_NO_RESET, rel_vmvf_num: 0, rings: vsi->xdp_rings, count: vsi->num_xdp_txq);
2040	}
2041
2042	/**
2043	* ice_vsi_is_rx_queue_active
2044	* @vsi: the VSI being configured
2045	*
2046	* Return true if at least one queue is active.
2047	*/
2048	bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi)
2049	{
2050	struct ice_pf *pf = vsi->back;
2051	struct ice_hw *hw = &pf->hw;
2052	int i;
2053
2054	ice_for_each_rxq(vsi, i) {
2055	u32 rx_reg;
2056	int pf_q;
2057
2058	pf_q = vsi->rxq_map[i];
2059	rx_reg = rd32(hw, QRX_CTRL(pf_q));
2060	if (rx_reg & QRX_CTRL_QENA_STAT_M)
2061	return true;
2062	}
2063
2064	return false;
2065	}
2066
2067	static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2068	{
2069	if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2070	vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2071	vsi->tc_cfg.numtc = 1;
2072	return;
2073	}
2074
2075	/* set VSI TC information based on DCB config */
2076	ice_vsi_set_dcb_tc_cfg(vsi);
2077	}
2078
2079	/**
2080	* ice_cfg_sw_lldp - Config switch rules for LLDP packet handling
2081	* @vsi: the VSI being configured
2082	* @tx: bool to determine Tx or Rx rule
2083	* @create: bool to determine create or remove Rule
2084	*/
2085	void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2086	{
2087	int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2088	enum ice_sw_fwd_act_type act);
2089	struct ice_pf *pf = vsi->back;
2090	struct device *dev;
2091	int status;
2092
2093	dev = ice_pf_to_dev(pf);
2094	eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2095
2096	if (tx) {
2097	status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2098	ICE_DROP_PACKET);
2099	} else {
2100	if (ice_fw_supports_lldp_fltr_ctrl(hw: &pf->hw)) {
2101	status = ice_lldp_fltr_add_remove(hw: &pf->hw, vsi_num: vsi->vsi_num,
2102	add: create);
2103	} else {
2104	status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2105	ICE_FWD_TO_VSI);
2106	}
2107	}
2108
2109	if (status)
2110	dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",
2111	create ? "adding" : "removing", tx ? "TX" : "RX",
2112	vsi->vsi_num, status);
2113	}
2114
2115	/**
2116	* ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2117	* @vsi: pointer to the VSI
2118	*
2119	* This function will allocate new scheduler aggregator now if needed and will
2120	* move specified VSI into it.
2121	*/
2122	static void ice_set_agg_vsi(struct ice_vsi *vsi)
2123	{
2124	struct device *dev = ice_pf_to_dev(vsi->back);
2125	struct ice_agg_node *agg_node_iter = NULL;
2126	u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2127	struct ice_agg_node *agg_node = NULL;
2128	int node_offset, max_agg_nodes = 0;
2129	struct ice_port_info *port_info;
2130	struct ice_pf *pf = vsi->back;
2131	u32 agg_node_id_start = 0;
2132	int status;
2133
2134	/* create (as needed) scheduler aggregator node and move VSI into
2135	* corresponding aggregator node
2136	* - PF aggregator node to contains VSIs of type _PF and _CTRL
2137	* - VF aggregator nodes will contain VF VSI
2138	*/
2139	port_info = pf->hw.port_info;
2140	if (!port_info)
2141	return;
2142
2143	switch (vsi->type) {
2144	case ICE_VSI_CTRL:
2145	case ICE_VSI_CHNL:
2146	case ICE_VSI_LB:
2147	case ICE_VSI_PF:
2148	case ICE_VSI_SWITCHDEV_CTRL:
2149	max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2150	agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2151	agg_node_iter = &pf->pf_agg_node[0];
2152	break;
2153	case ICE_VSI_VF:
2154	/* user can create 'n' VFs on a given PF, but since max children
2155	* per aggregator node can be only 64. Following code handles
2156	* aggregator(s) for VF VSIs, either selects a agg_node which
2157	* was already created provided num_vsis < 64, otherwise
2158	* select next available node, which will be created
2159	*/
2160	max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2161	agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2162	agg_node_iter = &pf->vf_agg_node[0];
2163	break;
2164	default:
2165	/* other VSI type, handle later if needed */
2166	dev_dbg(dev, "unexpected VSI type %s\n",
2167	ice_vsi_type_str(vsi->type));
2168	return;
2169	}
2170
2171	/* find the appropriate aggregator node */
2172	for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2173	/* see if we can find space in previously created
2174	* node if num_vsis < 64, otherwise skip
2175	*/
2176	if (agg_node_iter->num_vsis &&
2177	agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2178	agg_node_iter++;
2179	continue;
2180	}
2181
2182	if (agg_node_iter->valid &&
2183	agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2184	agg_id = agg_node_iter->agg_id;
2185	agg_node = agg_node_iter;
2186	break;
2187	}
2188
2189	/* find unclaimed agg_id */
2190	if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2191	agg_id = node_offset + agg_node_id_start;
2192	agg_node = agg_node_iter;
2193	break;
2194	}
2195	/* move to next agg_node */
2196	agg_node_iter++;
2197	}
2198
2199	if (!agg_node)
2200	return;
2201
2202	/* if selected aggregator node was not created, create it */
2203	if (!agg_node->valid) {
2204	status = ice_cfg_agg(pi: port_info, agg_id, agg_type: ICE_AGG_TYPE_AGG,
2205	tc_bitmap: (u8)vsi->tc_cfg.ena_tc);
2206	if (status) {
2207	dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2208	agg_id);
2209	return;
2210	}
2211	/* aggregator node is created, store the needed info */
2212	agg_node->valid = true;
2213	agg_node->agg_id = agg_id;
2214	}
2215
2216	/* move VSI to corresponding aggregator node */
2217	status = ice_move_vsi_to_agg(pi: port_info, agg_id, vsi_handle: vsi->idx,
2218	tc_bitmap: (u8)vsi->tc_cfg.ena_tc);
2219	if (status) {
2220	dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2221	vsi->idx, agg_id);
2222	return;
2223	}
2224
2225	/* keep active children count for aggregator node */
2226	agg_node->num_vsis++;
2227
2228	/* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2229	* to aggregator node
2230	*/
2231	vsi->agg_node = agg_node;
2232	dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2233	vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2234	vsi->agg_node->num_vsis);
2235	}
2236
2237	static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi)
2238	{
2239	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2240	struct device *dev = ice_pf_to_dev(pf);
2241	int ret, i;
2242
2243	/* configure VSI nodes based on number of queues and TC's */
2244	ice_for_each_traffic_class(i) {
2245	if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2246	continue;
2247
2248	if (vsi->type == ICE_VSI_CHNL) {
2249	if (!vsi->alloc_txq && vsi->num_txq)
2250	max_txqs[i] = vsi->num_txq;
2251	else
2252	max_txqs[i] = pf->num_lan_tx;
2253	} else {
2254	max_txqs[i] = vsi->alloc_txq;
2255	}
2256
2257	if (vsi->type == ICE_VSI_PF)
2258	max_txqs[i] += vsi->num_xdp_txq;
2259	}
2260
2261	dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2262	ret = ice_cfg_vsi_lan(pi: vsi->port_info, vsi_handle: vsi->idx, tc_bitmap: vsi->tc_cfg.ena_tc,
2263	max_lanqs: max_txqs);
2264	if (ret) {
2265	dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2266	vsi->vsi_num, ret);
2267	return ret;
2268	}
2269
2270	return 0;
2271	}
2272
2273	/**
2274	* ice_vsi_cfg_def - configure default VSI based on the type
2275	* @vsi: pointer to VSI
2276	* @params: the parameters to configure this VSI with
2277	*/
2278	static int
2279	ice_vsi_cfg_def(struct ice_vsi *vsi, struct ice_vsi_cfg_params *params)
2280	{
2281	struct device *dev = ice_pf_to_dev(vsi->back);
2282	struct ice_pf *pf = vsi->back;
2283	int ret;
2284
2285	vsi->vsw = pf->first_sw;
2286
2287	ret = ice_vsi_alloc_def(vsi, ch: params->ch);
2288	if (ret)
2289	return ret;
2290
2291	/* allocate memory for Tx/Rx ring stat pointers */
2292	ret = ice_vsi_alloc_stat_arrays(vsi);
2293	if (ret)
2294	goto unroll_vsi_alloc;
2295
2296	ice_alloc_fd_res(vsi);
2297
2298	ret = ice_vsi_get_qs(vsi);
2299	if (ret) {
2300	dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2301	vsi->idx);
2302	goto unroll_vsi_alloc_stat;
2303	}
2304
2305	/* set RSS capabilities */
2306	ice_vsi_set_rss_params(vsi);
2307
2308	/* set TC configuration */
2309	ice_vsi_set_tc_cfg(vsi);
2310
2311	/* create the VSI */
2312	ret = ice_vsi_init(vsi, vsi_flags: params->flags);
2313	if (ret)
2314	goto unroll_get_qs;
2315
2316	ice_vsi_init_vlan_ops(vsi);
2317
2318	switch (vsi->type) {
2319	case ICE_VSI_CTRL:
2320	case ICE_VSI_SWITCHDEV_CTRL:
2321	case ICE_VSI_PF:
2322	ret = ice_vsi_alloc_q_vectors(vsi);
2323	if (ret)
2324	goto unroll_vsi_init;
2325
2326	ret = ice_vsi_alloc_rings(vsi);
2327	if (ret)
2328	goto unroll_vector_base;
2329
2330	ret = ice_vsi_alloc_ring_stats(vsi);
2331	if (ret)
2332	goto unroll_vector_base;
2333
2334	ice_vsi_map_rings_to_vectors(vsi);
2335
2336	/* Associate q_vector rings to napi */
2337	ice_vsi_set_napi_queues(vsi);
2338
2339	vsi->stat_offsets_loaded = false;
2340
2341	if (ice_is_xdp_ena_vsi(vsi)) {
2342	ret = ice_vsi_determine_xdp_res(vsi);
2343	if (ret)
2344	goto unroll_vector_base;
2345	ret = ice_prepare_xdp_rings(vsi, prog: vsi->xdp_prog);
2346	if (ret)
2347	goto unroll_vector_base;
2348	}
2349
2350	/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2351	if (vsi->type != ICE_VSI_CTRL)
2352	/* Do not exit if configuring RSS had an issue, at
2353	* least receive traffic on first queue. Hence no
2354	* need to capture return value
2355	*/
2356	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2357	ice_vsi_cfg_rss_lut_key(vsi);
2358	ice_vsi_set_rss_flow_fld(vsi);
2359	}
2360	ice_init_arfs(vsi);
2361	break;
2362	case ICE_VSI_CHNL:
2363	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2364	ice_vsi_cfg_rss_lut_key(vsi);
2365	ice_vsi_set_rss_flow_fld(vsi);
2366	}
2367	break;
2368	case ICE_VSI_VF:
2369	/* VF driver will take care of creating netdev for this type and
2370	* map queues to vectors through Virtchnl, PF driver only
2371	* creates a VSI and corresponding structures for bookkeeping
2372	* purpose
2373	*/
2374	ret = ice_vsi_alloc_q_vectors(vsi);
2375	if (ret)
2376	goto unroll_vsi_init;
2377
2378	ret = ice_vsi_alloc_rings(vsi);
2379	if (ret)
2380	goto unroll_alloc_q_vector;
2381
2382	ret = ice_vsi_alloc_ring_stats(vsi);
2383	if (ret)
2384	goto unroll_vector_base;
2385
2386	vsi->stat_offsets_loaded = false;
2387
2388	/* Do not exit if configuring RSS had an issue, at least
2389	* receive traffic on first queue. Hence no need to capture
2390	* return value
2391	*/
2392	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2393	ice_vsi_cfg_rss_lut_key(vsi);
2394	ice_vsi_set_vf_rss_flow_fld(vsi);
2395	}
2396	break;
2397	case ICE_VSI_LB:
2398	ret = ice_vsi_alloc_rings(vsi);
2399	if (ret)
2400	goto unroll_vsi_init;
2401
2402	ret = ice_vsi_alloc_ring_stats(vsi);
2403	if (ret)
2404	goto unroll_vector_base;
2405
2406	break;
2407	default:
2408	/* clean up the resources and exit */
2409	ret = -EINVAL;
2410	goto unroll_vsi_init;
2411	}
2412
2413	return 0;
2414
2415	unroll_vector_base:
2416	/* reclaim SW interrupts back to the common pool */
2417	unroll_alloc_q_vector:
2418	ice_vsi_free_q_vectors(vsi);
2419	unroll_vsi_init:
2420	ice_vsi_delete_from_hw(vsi);
2421	unroll_get_qs:
2422	ice_vsi_put_qs(vsi);
2423	unroll_vsi_alloc_stat:
2424	ice_vsi_free_stats(vsi);
2425	unroll_vsi_alloc:
2426	ice_vsi_free_arrays(vsi);
2427	return ret;
2428	}
2429
2430	/**
2431	* ice_vsi_cfg - configure a previously allocated VSI
2432	* @vsi: pointer to VSI
2433	* @params: parameters used to configure this VSI
2434	*/
2435	int ice_vsi_cfg(struct ice_vsi *vsi, struct ice_vsi_cfg_params *params)
2436	{
2437	struct ice_pf *pf = vsi->back;
2438	int ret;
2439
2440	if (WARN_ON(params->type == ICE_VSI_VF && !params->vf))
2441	return -EINVAL;
2442
2443	vsi->type = params->type;
2444	vsi->port_info = params->pi;
2445
2446	/* For VSIs which don't have a connected VF, this will be NULL */
2447	vsi->vf = params->vf;
2448
2449	ret = ice_vsi_cfg_def(vsi, params);
2450	if (ret)
2451	return ret;
2452
2453	ret = ice_vsi_cfg_tc_lan(pf: vsi->back, vsi);
2454	if (ret)
2455	ice_vsi_decfg(vsi);
2456
2457	if (vsi->type == ICE_VSI_CTRL) {
2458	if (vsi->vf) {
2459	WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI);
2460	vsi->vf->ctrl_vsi_idx = vsi->idx;
2461	} else {
2462	WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI);
2463	pf->ctrl_vsi_idx = vsi->idx;
2464	}
2465	}
2466
2467	return ret;
2468	}
2469
2470	/**
2471	* ice_vsi_decfg - remove all VSI configuration
2472	* @vsi: pointer to VSI
2473	*/
2474	void ice_vsi_decfg(struct ice_vsi *vsi)
2475	{
2476	struct ice_pf *pf = vsi->back;
2477	int err;
2478
2479	/* The Rx rule will only exist to remove if the LLDP FW
2480	* engine is currently stopped
2481	*/
2482	if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF &&
2483	!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
2484	ice_cfg_sw_lldp(vsi, tx: false, create: false);
2485
2486	ice_rm_vsi_lan_cfg(pi: vsi->port_info, vsi_handle: vsi->idx);
2487	err = ice_rm_vsi_rdma_cfg(pi: vsi->port_info, vsi_handle: vsi->idx);
2488	if (err)
2489	dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
2490	vsi->vsi_num, err);
2491
2492	if (ice_is_xdp_ena_vsi(vsi))
2493	/* return value check can be skipped here, it always returns
2494	* 0 if reset is in progress
2495	*/
2496	ice_destroy_xdp_rings(vsi);
2497
2498	ice_vsi_clear_rings(vsi);
2499	ice_vsi_free_q_vectors(vsi);
2500	ice_vsi_put_qs(vsi);
2501	ice_vsi_free_arrays(vsi);
2502
2503	/* SR-IOV determines needed MSIX resources all at once instead of per
2504	* VSI since when VFs are spawned we know how many VFs there are and how
2505	* many interrupts each VF needs. SR-IOV MSIX resources are also
2506	* cleared in the same manner.
2507	*/
2508
2509	if (vsi->type == ICE_VSI_VF &&
2510	vsi->agg_node && vsi->agg_node->valid)
2511	vsi->agg_node->num_vsis--;
2512	}
2513
2514	/**
2515	* ice_vsi_setup - Set up a VSI by a given type
2516	* @pf: board private structure
2517	* @params: parameters to use when creating the VSI
2518	*
2519	* This allocates the sw VSI structure and its queue resources.
2520	*
2521	* Returns pointer to the successfully allocated and configured VSI sw struct on
2522	* success, NULL on failure.
2523	*/
2524	struct ice_vsi *
2525	ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params)
2526	{
2527	struct device *dev = ice_pf_to_dev(pf);
2528	struct ice_vsi *vsi;
2529	int ret;
2530
2531	/* ice_vsi_setup can only initialize a new VSI, and we must have
2532	* a port_info structure for it.
2533	*/
2534	if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) ||
2535	WARN_ON(!params->pi))
2536	return NULL;
2537
2538	vsi = ice_vsi_alloc(pf);
2539	if (!vsi) {
2540	dev_err(dev, "could not allocate VSI\n");
2541	return NULL;
2542	}
2543
2544	ret = ice_vsi_cfg(vsi, params);
2545	if (ret)
2546	goto err_vsi_cfg;
2547
2548	/* Add switch rule to drop all Tx Flow Control Frames, of look up
2549	* type ETHERTYPE from VSIs, and restrict malicious VF from sending
2550	* out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2551	* The rule is added once for PF VSI in order to create appropriate
2552	* recipe, since VSI/VSI list is ignored with drop action...
2553	* Also add rules to handle LLDP Tx packets. Tx LLDP packets need to
2554	* be dropped so that VFs cannot send LLDP packets to reconfig DCB
2555	* settings in the HW.
2556	*/
2557	if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) {
2558	ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2559	action: ICE_DROP_PACKET);
2560	ice_cfg_sw_lldp(vsi, tx: true, create: true);
2561	}
2562
2563	if (!vsi->agg_node)
2564	ice_set_agg_vsi(vsi);
2565
2566	return vsi;
2567
2568	err_vsi_cfg:
2569	ice_vsi_free(vsi);
2570
2571	return NULL;
2572	}
2573
2574	/**
2575	* ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2576	* @vsi: the VSI being cleaned up
2577	*/
2578	static void ice_vsi_release_msix(struct ice_vsi *vsi)
2579	{
2580	struct ice_pf *pf = vsi->back;
2581	struct ice_hw *hw = &pf->hw;
2582	u32 txq = 0;
2583	u32 rxq = 0;
2584	int i, q;
2585
2586	ice_for_each_q_vector(vsi, i) {
2587	struct ice_q_vector *q_vector = vsi->q_vectors[i];
2588
2589	ice_write_intrl(q_vector, intrl: 0);
2590	for (q = 0; q < q_vector->num_ring_tx; q++) {
2591	ice_write_itr(rc: &q_vector->tx, itr: 0);
2592	wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2593	if (ice_is_xdp_ena_vsi(vsi)) {
2594	u32 xdp_txq = txq + vsi->num_xdp_txq;
2595
2596	wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2597	}
2598	txq++;
2599	}
2600
2601	for (q = 0; q < q_vector->num_ring_rx; q++) {
2602	ice_write_itr(rc: &q_vector->rx, itr: 0);
2603	wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2604	rxq++;
2605	}
2606	}
2607
2608	ice_flush(hw);
2609	}
2610
2611	/**
2612	* ice_vsi_free_irq - Free the IRQ association with the OS
2613	* @vsi: the VSI being configured
2614	*/
2615	void ice_vsi_free_irq(struct ice_vsi *vsi)
2616	{
2617	struct ice_pf *pf = vsi->back;
2618	int i;
2619
2620	if (!vsi->q_vectors || !vsi->irqs_ready)
2621	return;
2622
2623	ice_vsi_release_msix(vsi);
2624	if (vsi->type == ICE_VSI_VF)
2625	return;
2626
2627	vsi->irqs_ready = false;
2628	ice_free_cpu_rx_rmap(vsi);
2629
2630	ice_for_each_q_vector(vsi, i) {
2631	int irq_num;
2632
2633	irq_num = vsi->q_vectors[i]->irq.virq;
2634
2635	/* free only the irqs that were actually requested */
2636	if (!vsi->q_vectors[i] ||
2637	!(vsi->q_vectors[i]->num_ring_tx ||
2638	vsi->q_vectors[i]->num_ring_rx))
2639	continue;
2640
2641	/* clear the affinity notifier in the IRQ descriptor */
2642	if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2643	irq_set_affinity_notifier(irq: irq_num, NULL);
2644
2645	/* clear the affinity_mask in the IRQ descriptor */
2646	irq_set_affinity_hint(irq: irq_num, NULL);
2647	synchronize_irq(irq: irq_num);
2648	devm_free_irq(ice_pf_to_dev(pf), irq: irq_num, dev_id: vsi->q_vectors[i]);
2649	}
2650	}
2651
2652	/**
2653	* ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2654	* @vsi: the VSI having resources freed
2655	*/
2656	void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2657	{
2658	int i;
2659
2660	if (!vsi->tx_rings)
2661	return;
2662
2663	ice_for_each_txq(vsi, i)
2664	if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2665	ice_free_tx_ring(tx_ring: vsi->tx_rings[i]);
2666	}
2667
2668	/**
2669	* ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2670	* @vsi: the VSI having resources freed
2671	*/
2672	void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2673	{
2674	int i;
2675
2676	if (!vsi->rx_rings)
2677	return;
2678
2679	ice_for_each_rxq(vsi, i)
2680	if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2681	ice_free_rx_ring(rx_ring: vsi->rx_rings[i]);
2682	}
2683
2684	/**
2685	* ice_vsi_close - Shut down a VSI
2686	* @vsi: the VSI being shut down
2687	*/
2688	void ice_vsi_close(struct ice_vsi *vsi)
2689	{
2690	if (!test_and_set_bit(nr: ICE_VSI_DOWN, addr: vsi->state))
2691	ice_down(vsi);
2692
2693	ice_vsi_free_irq(vsi);
2694	ice_vsi_free_tx_rings(vsi);
2695	ice_vsi_free_rx_rings(vsi);
2696	}
2697
2698	/**
2699	* ice_ena_vsi - resume a VSI
2700	* @vsi: the VSI being resume
2701	* @locked: is the rtnl_lock already held
2702	*/
2703	int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2704	{
2705	int err = 0;
2706
2707	if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2708	return 0;
2709
2710	clear_bit(nr: ICE_VSI_NEEDS_RESTART, addr: vsi->state);
2711
2712	if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2713	if (netif_running(dev: vsi->netdev)) {
2714	if (!locked)
2715	rtnl_lock();
2716
2717	err = ice_open_internal(netdev: vsi->netdev);
2718
2719	if (!locked)
2720	rtnl_unlock();
2721	}
2722	} else if (vsi->type == ICE_VSI_CTRL) {
2723	err = ice_vsi_open_ctrl(vsi);
2724	}
2725
2726	return err;
2727	}
2728
2729	/**
2730	* ice_dis_vsi - pause a VSI
2731	* @vsi: the VSI being paused
2732	* @locked: is the rtnl_lock already held
2733	*/
2734	void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2735	{
2736	if (test_bit(ICE_VSI_DOWN, vsi->state))
2737	return;
2738
2739	set_bit(nr: ICE_VSI_NEEDS_RESTART, addr: vsi->state);
2740
2741	if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2742	if (netif_running(dev: vsi->netdev)) {
2743	if (!locked)
2744	rtnl_lock();
2745
2746	ice_vsi_close(vsi);
2747
2748	if (!locked)
2749	rtnl_unlock();
2750	} else {
2751	ice_vsi_close(vsi);
2752	}
2753	} else if (vsi->type == ICE_VSI_CTRL ||
2754	vsi->type == ICE_VSI_SWITCHDEV_CTRL) {
2755	ice_vsi_close(vsi);
2756	}
2757	}
2758
2759	/**
2760	* __ice_queue_set_napi - Set the napi instance for the queue
2761	* @dev: device to which NAPI and queue belong
2762	* @queue_index: Index of queue
2763	* @type: queue type as RX or TX
2764	* @napi: NAPI context
2765	* @locked: is the rtnl_lock already held
2766	*
2767	* Set the napi instance for the queue. Caller indicates the lock status.
2768	*/
2769	static void
2770	__ice_queue_set_napi(struct net_device *dev, unsigned int queue_index,
2771	enum netdev_queue_type type, struct napi_struct *napi,
2772	bool locked)
2773	{
2774	if (!locked)
2775	rtnl_lock();
2776	netif_queue_set_napi(dev, queue_index, type, napi);
2777	if (!locked)
2778	rtnl_unlock();
2779	}
2780
2781	/**
2782	* ice_queue_set_napi - Set the napi instance for the queue
2783	* @vsi: VSI being configured
2784	* @queue_index: Index of queue
2785	* @type: queue type as RX or TX
2786	* @napi: NAPI context
2787	*
2788	* Set the napi instance for the queue. The rtnl lock state is derived from the
2789	* execution path.
2790	*/
2791	void
2792	ice_queue_set_napi(struct ice_vsi *vsi, unsigned int queue_index,
2793	enum netdev_queue_type type, struct napi_struct *napi)
2794	{
2795	struct ice_pf *pf = vsi->back;
2796
2797	if (!vsi->netdev)
2798	return;
2799
2800	if (current_work() == &pf->serv_task ||
2801	test_bit(ICE_PREPARED_FOR_RESET, pf->state) ||
2802	test_bit(ICE_DOWN, pf->state) ||
2803	test_bit(ICE_SUSPENDED, pf->state))
2804	__ice_queue_set_napi(dev: vsi->netdev, queue_index, type, napi,
2805	locked: false);
2806	else
2807	__ice_queue_set_napi(dev: vsi->netdev, queue_index, type, napi,
2808	locked: true);
2809	}
2810
2811	/**
2812	* __ice_q_vector_set_napi_queues - Map queue[s] associated with the napi
2813	* @q_vector: q_vector pointer
2814	* @locked: is the rtnl_lock already held
2815	*
2816	* Associate the q_vector napi with all the queue[s] on the vector.
2817	* Caller indicates the lock status.
2818	*/
2819	void __ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector, bool locked)
2820	{
2821	struct ice_rx_ring *rx_ring;
2822	struct ice_tx_ring *tx_ring;
2823
2824	ice_for_each_rx_ring(rx_ring, q_vector->rx)
2825	__ice_queue_set_napi(dev: q_vector->vsi->netdev, queue_index: rx_ring->q_index,
2826	type: NETDEV_QUEUE_TYPE_RX, napi: &q_vector->napi,
2827	locked);
2828
2829	ice_for_each_tx_ring(tx_ring, q_vector->tx)
2830	__ice_queue_set_napi(dev: q_vector->vsi->netdev, queue_index: tx_ring->q_index,
2831	type: NETDEV_QUEUE_TYPE_TX, napi: &q_vector->napi,
2832	locked);
2833	/* Also set the interrupt number for the NAPI */
2834	netif_napi_set_irq(napi: &q_vector->napi, irq: q_vector->irq.virq);
2835	}
2836
2837	/**
2838	* ice_q_vector_set_napi_queues - Map queue[s] associated with the napi
2839	* @q_vector: q_vector pointer
2840	*
2841	* Associate the q_vector napi with all the queue[s] on the vector
2842	*/
2843	void ice_q_vector_set_napi_queues(struct ice_q_vector *q_vector)
2844	{
2845	struct ice_rx_ring *rx_ring;
2846	struct ice_tx_ring *tx_ring;
2847
2848	ice_for_each_rx_ring(rx_ring, q_vector->rx)
2849	ice_queue_set_napi(vsi: q_vector->vsi, queue_index: rx_ring->q_index,
2850	type: NETDEV_QUEUE_TYPE_RX, napi: &q_vector->napi);
2851
2852	ice_for_each_tx_ring(tx_ring, q_vector->tx)
2853	ice_queue_set_napi(vsi: q_vector->vsi, queue_index: tx_ring->q_index,
2854	type: NETDEV_QUEUE_TYPE_TX, napi: &q_vector->napi);
2855	/* Also set the interrupt number for the NAPI */
2856	netif_napi_set_irq(napi: &q_vector->napi, irq: q_vector->irq.virq);
2857	}
2858
2859	/**
2860	* ice_vsi_set_napi_queues
2861	* @vsi: VSI pointer
2862	*
2863	* Associate queue[s] with napi for all vectors
2864	*/
2865	void ice_vsi_set_napi_queues(struct ice_vsi *vsi)
2866	{
2867	int i;
2868
2869	if (!vsi->netdev)
2870	return;
2871
2872	ice_for_each_q_vector(vsi, i)
2873	ice_q_vector_set_napi_queues(q_vector: vsi->q_vectors[i]);
2874	}
2875
2876	/**
2877	* ice_vsi_release - Delete a VSI and free its resources
2878	* @vsi: the VSI being removed
2879	*
2880	* Returns 0 on success or < 0 on error
2881	*/
2882	int ice_vsi_release(struct ice_vsi *vsi)
2883	{
2884	struct ice_pf *pf;
2885
2886	if (!vsi->back)
2887	return -ENODEV;
2888	pf = vsi->back;
2889
2890	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2891	ice_rss_clean(vsi);
2892
2893	ice_vsi_close(vsi);
2894	ice_vsi_decfg(vsi);
2895
2896	/* retain SW VSI data structure since it is needed to unregister and
2897	* free VSI netdev when PF is not in reset recovery pending state,\
2898	* for ex: during rmmod.
2899	*/
2900	if (!ice_is_reset_in_progress(state: pf->state))
2901	ice_vsi_delete(vsi);
2902
2903	return 0;
2904	}
2905
2906	/**
2907	* ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
2908	* @vsi: VSI connected with q_vectors
2909	* @coalesce: array of struct with stored coalesce
2910	*
2911	* Returns array size.
2912	*/
2913	static int
2914	ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
2915	struct ice_coalesce_stored *coalesce)
2916	{
2917	int i;
2918
2919	ice_for_each_q_vector(vsi, i) {
2920	struct ice_q_vector *q_vector = vsi->q_vectors[i];
2921
2922	coalesce[i].itr_tx = q_vector->tx.itr_settings;
2923	coalesce[i].itr_rx = q_vector->rx.itr_settings;
2924	coalesce[i].intrl = q_vector->intrl;
2925
2926	if (i < vsi->num_txq)
2927	coalesce[i].tx_valid = true;
2928	if (i < vsi->num_rxq)
2929	coalesce[i].rx_valid = true;
2930	}
2931
2932	return vsi->num_q_vectors;
2933	}
2934
2935	/**
2936	* ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
2937	* @vsi: VSI connected with q_vectors
2938	* @coalesce: pointer to array of struct with stored coalesce
2939	* @size: size of coalesce array
2940	*
2941	* Before this function, ice_vsi_rebuild_get_coalesce should be called to save
2942	* ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
2943	* to default value.
2944	*/
2945	static void
2946	ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
2947	struct ice_coalesce_stored *coalesce, int size)
2948	{
2949	struct ice_ring_container *rc;
2950	int i;
2951
2952	if ((size && !coalesce) || !vsi)
2953	return;
2954
2955	/* There are a couple of cases that have to be handled here:
2956	* 1. The case where the number of queue vectors stays the same, but
2957	* the number of Tx or Rx rings changes (the first for loop)
2958	* 2. The case where the number of queue vectors increased (the
2959	* second for loop)
2960	*/
2961	for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
2962	/* There are 2 cases to handle here and they are the same for
2963	* both Tx and Rx:
2964	* if the entry was valid previously (coalesce[i].[tr]x_valid
2965	* and the loop variable is less than the number of rings
2966	* allocated, then write the previous values
2967	*
2968	* if the entry was not valid previously, but the number of
2969	* rings is less than are allocated (this means the number of
2970	* rings increased from previously), then write out the
2971	* values in the first element
2972	*
2973	* Also, always write the ITR, even if in ITR_IS_DYNAMIC
2974	* as there is no harm because the dynamic algorithm
2975	* will just overwrite.
2976	*/
2977	if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
2978	rc = &vsi->q_vectors[i]->rx;
2979	rc->itr_settings = coalesce[i].itr_rx;
2980	ice_write_itr(rc, itr: rc->itr_setting);
2981	} else if (i < vsi->alloc_rxq) {
2982	rc = &vsi->q_vectors[i]->rx;
2983	rc->itr_settings = coalesce[0].itr_rx;
2984	ice_write_itr(rc, itr: rc->itr_setting);
2985	}
2986
2987	if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
2988	rc = &vsi->q_vectors[i]->tx;
2989	rc->itr_settings = coalesce[i].itr_tx;
2990	ice_write_itr(rc, itr: rc->itr_setting);
2991	} else if (i < vsi->alloc_txq) {
2992	rc = &vsi->q_vectors[i]->tx;
2993	rc->itr_settings = coalesce[0].itr_tx;
2994	ice_write_itr(rc, itr: rc->itr_setting);
2995	}
2996
2997	vsi->q_vectors[i]->intrl = coalesce[i].intrl;
2998	ice_set_q_vector_intrl(q_vector: vsi->q_vectors[i]);
2999	}
3000
3001	/* the number of queue vectors increased so write whatever is in
3002	* the first element
3003	*/
3004	for (; i < vsi->num_q_vectors; i++) {
3005	/* transmit */
3006	rc = &vsi->q_vectors[i]->tx;
3007	rc->itr_settings = coalesce[0].itr_tx;
3008	ice_write_itr(rc, itr: rc->itr_setting);
3009
3010	/* receive */
3011	rc = &vsi->q_vectors[i]->rx;
3012	rc->itr_settings = coalesce[0].itr_rx;
3013	ice_write_itr(rc, itr: rc->itr_setting);
3014
3015	vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3016	ice_set_q_vector_intrl(q_vector: vsi->q_vectors[i]);
3017	}
3018	}
3019
3020	/**
3021	* ice_vsi_realloc_stat_arrays - Frees unused stat structures or alloc new ones
3022	* @vsi: VSI pointer
3023	*/
3024	static int
3025	ice_vsi_realloc_stat_arrays(struct ice_vsi *vsi)
3026	{
3027	u16 req_txq = vsi->req_txq ? vsi->req_txq : vsi->alloc_txq;
3028	u16 req_rxq = vsi->req_rxq ? vsi->req_rxq : vsi->alloc_rxq;
3029	struct ice_ring_stats **tx_ring_stats;
3030	struct ice_ring_stats **rx_ring_stats;
3031	struct ice_vsi_stats *vsi_stat;
3032	struct ice_pf *pf = vsi->back;
3033	u16 prev_txq = vsi->alloc_txq;
3034	u16 prev_rxq = vsi->alloc_rxq;
3035	int i;
3036
3037	vsi_stat = pf->vsi_stats[vsi->idx];
3038
3039	if (req_txq < prev_txq) {
3040	for (i = req_txq; i < prev_txq; i++) {
3041	if (vsi_stat->tx_ring_stats[i]) {
3042	kfree_rcu(vsi_stat->tx_ring_stats[i], rcu);
3043	WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL);
3044	}
3045	}
3046	}
3047
3048	tx_ring_stats = vsi_stat->tx_ring_stats;
3049	vsi_stat->tx_ring_stats =
3050	krealloc_array(p: vsi_stat->tx_ring_stats, new_n: req_txq,
3051	new_size: sizeof(*vsi_stat->tx_ring_stats),
3052	GFP_KERNEL | __GFP_ZERO);
3053	if (!vsi_stat->tx_ring_stats) {
3054	vsi_stat->tx_ring_stats = tx_ring_stats;
3055	return -ENOMEM;
3056	}
3057
3058	if (req_rxq < prev_rxq) {
3059	for (i = req_rxq; i < prev_rxq; i++) {
3060	if (vsi_stat->rx_ring_stats[i]) {
3061	kfree_rcu(vsi_stat->rx_ring_stats[i], rcu);
3062	WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL);
3063	}
3064	}
3065	}
3066
3067	rx_ring_stats = vsi_stat->rx_ring_stats;
3068	vsi_stat->rx_ring_stats =
3069	krealloc_array(p: vsi_stat->rx_ring_stats, new_n: req_rxq,
3070	new_size: sizeof(*vsi_stat->rx_ring_stats),
3071	GFP_KERNEL | __GFP_ZERO);
3072	if (!vsi_stat->rx_ring_stats) {
3073	vsi_stat->rx_ring_stats = rx_ring_stats;
3074	return -ENOMEM;
3075	}
3076
3077	return 0;
3078	}
3079
3080	/**
3081	* ice_vsi_rebuild - Rebuild VSI after reset
3082	* @vsi: VSI to be rebuild
3083	* @vsi_flags: flags used for VSI rebuild flow
3084	*
3085	* Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or
3086	* ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware.
3087	*
3088	* Returns 0 on success and negative value on failure
3089	*/
3090	int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags)
3091	{
3092	struct ice_vsi_cfg_params params = {};
3093	struct ice_coalesce_stored *coalesce;
3094	int prev_num_q_vectors;
3095	struct ice_pf *pf;
3096	int ret;
3097
3098	if (!vsi)
3099	return -EINVAL;
3100
3101	params = ice_vsi_to_params(vsi);
3102	params.flags = vsi_flags;
3103
3104	pf = vsi->back;
3105	if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf))
3106	return -EINVAL;
3107
3108	ret = ice_vsi_realloc_stat_arrays(vsi);
3109	if (ret)
3110	goto err_vsi_cfg;
3111
3112	ice_vsi_decfg(vsi);
3113	ret = ice_vsi_cfg_def(vsi, params: &params);
3114	if (ret)
3115	goto err_vsi_cfg;
3116
3117	coalesce = kcalloc(n: vsi->num_q_vectors,
3118	size: sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3119	if (!coalesce)
3120	return -ENOMEM;
3121
3122	prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3123
3124	ret = ice_vsi_cfg_tc_lan(pf, vsi);
3125	if (ret) {
3126	if (vsi_flags & ICE_VSI_FLAG_INIT) {
3127	ret = -EIO;
3128	goto err_vsi_cfg_tc_lan;
3129	}
3130
3131	kfree(objp: coalesce);
3132	return ice_schedule_reset(pf, reset: ICE_RESET_PFR);
3133	}
3134
3135	ice_vsi_rebuild_set_coalesce(vsi, coalesce, size: prev_num_q_vectors);
3136	kfree(objp: coalesce);
3137
3138	return 0;
3139
3140	err_vsi_cfg_tc_lan:
3141	ice_vsi_decfg(vsi);
3142	kfree(objp: coalesce);
3143	err_vsi_cfg:
3144	return ret;
3145	}
3146
3147	/**
3148	* ice_is_reset_in_progress - check for a reset in progress
3149	* @state: PF state field
3150	*/
3151	bool ice_is_reset_in_progress(unsigned long *state)
3152	{
3153	return test_bit(ICE_RESET_OICR_RECV, state) ||
3154	test_bit(ICE_PFR_REQ, state) ||
3155	test_bit(ICE_CORER_REQ, state) ||
3156	test_bit(ICE_GLOBR_REQ, state);
3157	}
3158
3159	/**
3160	* ice_wait_for_reset - Wait for driver to finish reset and rebuild
3161	* @pf: pointer to the PF structure
3162	* @timeout: length of time to wait, in jiffies
3163	*
3164	* Wait (sleep) for a short time until the driver finishes cleaning up from
3165	* a device reset. The caller must be able to sleep. Use this to delay
3166	* operations that could fail while the driver is cleaning up after a device
3167	* reset.
3168	*
3169	* Returns 0 on success, -EBUSY if the reset is not finished within the
3170	* timeout, and -ERESTARTSYS if the thread was interrupted.
3171	*/
3172	int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3173	{
3174	long ret;
3175
3176	ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3177	!ice_is_reset_in_progress(pf->state),
3178	timeout);
3179	if (ret < 0)
3180	return ret;
3181	else if (!ret)
3182	return -EBUSY;
3183	else
3184	return 0;
3185	}
3186
3187	/**
3188	* ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3189	* @vsi: VSI being configured
3190	* @ctx: the context buffer returned from AQ VSI update command
3191	*/
3192	static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3193	{
3194	vsi->info.mapping_flags = ctx->info.mapping_flags;
3195	memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3196	sizeof(vsi->info.q_mapping));
3197	memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3198	sizeof(vsi->info.tc_mapping));
3199	}
3200
3201	/**
3202	* ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3203	* @vsi: the VSI being configured
3204	* @ena_tc: TC map to be enabled
3205	*/
3206	void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3207	{
3208	struct net_device *netdev = vsi->netdev;
3209	struct ice_pf *pf = vsi->back;
3210	int numtc = vsi->tc_cfg.numtc;
3211	struct ice_dcbx_cfg *dcbcfg;
3212	u8 netdev_tc;
3213	int i;
3214
3215	if (!netdev)
3216	return;
3217
3218	/* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */
3219	if (vsi->type == ICE_VSI_CHNL)
3220	return;
3221
3222	if (!ena_tc) {
3223	netdev_reset_tc(dev: netdev);
3224	return;
3225	}
3226
3227	if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3228	numtc = vsi->all_numtc;
3229
3230	if (netdev_set_num_tc(dev: netdev, num_tc: numtc))
3231	return;
3232
3233	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3234
3235	ice_for_each_traffic_class(i)
3236	if (vsi->tc_cfg.ena_tc & BIT(i))
3237	netdev_set_tc_queue(dev: netdev,
3238	tc: vsi->tc_cfg.tc_info[i].netdev_tc,
3239	count: vsi->tc_cfg.tc_info[i].qcount_tx,
3240	offset: vsi->tc_cfg.tc_info[i].qoffset);
3241	/* setup TC queue map for CHNL TCs */
3242	ice_for_each_chnl_tc(i) {
3243	if (!(vsi->all_enatc & BIT(i)))
3244	break;
3245	if (!vsi->mqprio_qopt.qopt.count[i])
3246	break;
3247	netdev_set_tc_queue(dev: netdev, tc: i,
3248	count: vsi->mqprio_qopt.qopt.count[i],
3249	offset: vsi->mqprio_qopt.qopt.offset[i]);
3250	}
3251
3252	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3253	return;
3254
3255	for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3256	u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3257
3258	/* Get the mapped netdev TC# for the UP */
3259	netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3260	netdev_set_prio_tc_map(dev: netdev, prio: i, tc: netdev_tc);
3261	}
3262	}
3263
3264	/**
3265	* ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3266	* @vsi: the VSI being configured,
3267	* @ctxt: VSI context structure
3268	* @ena_tc: number of traffic classes to enable
3269	*
3270	* Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3271	*/
3272	static int
3273	ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3274	u8 ena_tc)
3275	{
3276	u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3277	u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3278	int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3279	u16 new_txq, new_rxq;
3280	u8 netdev_tc = 0;
3281	int i;
3282
3283	vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3284
3285	pow = order_base_2(tc0_qcount);
3286	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset);
3287	qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
3288
3289	ice_for_each_traffic_class(i) {
3290	if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3291	/* TC is not enabled */
3292	vsi->tc_cfg.tc_info[i].qoffset = 0;
3293	vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3294	vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3295	vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3296	ctxt->info.tc_mapping[i] = 0;
3297	continue;
3298	}
3299
3300	offset = vsi->mqprio_qopt.qopt.offset[i];
3301	qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3302	qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3303	vsi->tc_cfg.tc_info[i].qoffset = offset;
3304	vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3305	vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3306	vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3307	}
3308
3309	if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3310	ice_for_each_chnl_tc(i) {
3311	if (!(vsi->all_enatc & BIT(i)))
3312	continue;
3313	offset = vsi->mqprio_qopt.qopt.offset[i];
3314	qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3315	qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3316	}
3317	}
3318
3319	new_txq = offset + qcount_tx;
3320	if (new_txq > vsi->alloc_txq) {
3321	dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
3322	new_txq, vsi->alloc_txq);
3323	return -EINVAL;
3324	}
3325
3326	new_rxq = offset + qcount_rx;
3327	if (new_rxq > vsi->alloc_rxq) {
3328	dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
3329	new_rxq, vsi->alloc_rxq);
3330	return -EINVAL;
3331	}
3332
3333	/* Set actual Tx/Rx queue pairs */
3334	vsi->num_txq = new_txq;
3335	vsi->num_rxq = new_rxq;
3336
3337	/* Setup queue TC[0].qmap for given VSI context */
3338	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3339	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3340	ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3341
3342	/* Find queue count available for channel VSIs and starting offset
3343	* for channel VSIs
3344	*/
3345	if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3346	vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3347	vsi->next_base_q = tc0_qcount;
3348	}
3349	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq);
3350	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq);
3351	dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3352	vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3353
3354	return 0;
3355	}
3356
3357	/**
3358	* ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3359	* @vsi: VSI to be configured
3360	* @ena_tc: TC bitmap
3361	*
3362	* VSI queues expected to be quiesced before calling this function
3363	*/
3364	int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3365	{
3366	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3367	struct ice_pf *pf = vsi->back;
3368	struct ice_tc_cfg old_tc_cfg;
3369	struct ice_vsi_ctx *ctx;
3370	struct device *dev;
3371	int i, ret = 0;
3372	u8 num_tc = 0;
3373
3374	dev = ice_pf_to_dev(pf);
3375	if (vsi->tc_cfg.ena_tc == ena_tc &&
3376	vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3377	return 0;
3378
3379	ice_for_each_traffic_class(i) {
3380	/* build bitmap of enabled TCs */
3381	if (ena_tc & BIT(i))
3382	num_tc++;
3383	/* populate max_txqs per TC */
3384	max_txqs[i] = vsi->alloc_txq;
3385	/* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3386	* zero for CHNL VSI, hence use num_txq instead as max_txqs
3387	*/
3388	if (vsi->type == ICE_VSI_CHNL &&
3389	test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3390	max_txqs[i] = vsi->num_txq;
3391	}
3392
3393	memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg));
3394	vsi->tc_cfg.ena_tc = ena_tc;
3395	vsi->tc_cfg.numtc = num_tc;
3396
3397	ctx = kzalloc(size: sizeof(*ctx), GFP_KERNEL);
3398	if (!ctx)
3399	return -ENOMEM;
3400
3401	ctx->vf_num = 0;
3402	ctx->info = vsi->info;
3403
3404	if (vsi->type == ICE_VSI_PF &&
3405	test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3406	ret = ice_vsi_setup_q_map_mqprio(vsi, ctxt: ctx, ena_tc);
3407	else
3408	ret = ice_vsi_setup_q_map(vsi, ctxt: ctx);
3409
3410	if (ret) {
3411	memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg));
3412	goto out;
3413	}
3414
3415	/* must to indicate which section of VSI context are being modified */
3416	ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3417	ret = ice_update_vsi(hw: &pf->hw, vsi_handle: vsi->idx, vsi_ctx: ctx, NULL);
3418	if (ret) {
3419	dev_info(dev, "Failed VSI Update\n");
3420	goto out;
3421	}
3422
3423	if (vsi->type == ICE_VSI_PF &&
3424	test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3425	ret = ice_cfg_vsi_lan(pi: vsi->port_info, vsi_handle: vsi->idx, tc_bitmap: 1, max_lanqs: max_txqs);
3426	else
3427	ret = ice_cfg_vsi_lan(pi: vsi->port_info, vsi_handle: vsi->idx,
3428	tc_bitmap: vsi->tc_cfg.ena_tc, max_lanqs: max_txqs);
3429
3430	if (ret) {
3431	dev_err(dev, "VSI %d failed TC config, error %d\n",
3432	vsi->vsi_num, ret);
3433	goto out;
3434	}
3435	ice_vsi_update_q_map(vsi, ctx);
3436	vsi->info.valid_sections = 0;
3437
3438	ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3439	out:
3440	kfree(objp: ctx);
3441	return ret;
3442	}
3443
3444	/**
3445	* ice_update_ring_stats - Update ring statistics
3446	* @stats: stats to be updated
3447	* @pkts: number of processed packets
3448	* @bytes: number of processed bytes
3449	*
3450	* This function assumes that caller has acquired a u64_stats_sync lock.
3451	*/
3452	static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3453	{
3454	stats->bytes += bytes;
3455	stats->pkts += pkts;
3456	}
3457
3458	/**
3459	* ice_update_tx_ring_stats - Update Tx ring specific counters
3460	* @tx_ring: ring to update
3461	* @pkts: number of processed packets
3462	* @bytes: number of processed bytes
3463	*/
3464	void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3465	{
3466	u64_stats_update_begin(syncp: &tx_ring->ring_stats->syncp);
3467	ice_update_ring_stats(stats: &tx_ring->ring_stats->stats, pkts, bytes);
3468	u64_stats_update_end(syncp: &tx_ring->ring_stats->syncp);
3469	}
3470
3471	/**
3472	* ice_update_rx_ring_stats - Update Rx ring specific counters
3473	* @rx_ring: ring to update
3474	* @pkts: number of processed packets
3475	* @bytes: number of processed bytes
3476	*/
3477	void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3478	{
3479	u64_stats_update_begin(syncp: &rx_ring->ring_stats->syncp);
3480	ice_update_ring_stats(stats: &rx_ring->ring_stats->stats, pkts, bytes);
3481	u64_stats_update_end(syncp: &rx_ring->ring_stats->syncp);
3482	}
3483
3484	/**
3485	* ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3486	* @pi: port info of the switch with default VSI
3487	*
3488	* Return true if the there is a single VSI in default forwarding VSI list
3489	*/
3490	bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi)
3491	{
3492	bool exists = false;
3493
3494	ice_check_if_dflt_vsi(pi, vsi_handle: 0, rule_exists: &exists);
3495	return exists;
3496	}
3497
3498	/**
3499	* ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3500	* @vsi: VSI to compare against default forwarding VSI
3501	*
3502	* If this VSI passed in is the default forwarding VSI then return true, else
3503	* return false
3504	*/
3505	bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi)
3506	{
3507	return ice_check_if_dflt_vsi(pi: vsi->port_info, vsi_handle: vsi->idx, NULL);
3508	}
3509
3510	/**
3511	* ice_set_dflt_vsi - set the default forwarding VSI
3512	* @vsi: VSI getting set as the default forwarding VSI on the switch
3513	*
3514	* If the VSI passed in is already the default VSI and it's enabled just return
3515	* success.
3516	*
3517	* Otherwise try to set the VSI passed in as the switch's default VSI and
3518	* return the result.
3519	*/
3520	int ice_set_dflt_vsi(struct ice_vsi *vsi)
3521	{
3522	struct device *dev;
3523	int status;
3524
3525	if (!vsi)
3526	return -EINVAL;
3527
3528	dev = ice_pf_to_dev(vsi->back);
3529
3530	if (ice_lag_is_switchdev_running(pf: vsi->back)) {
3531	dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n",
3532	vsi->vsi_num);
3533	return 0;
3534	}
3535
3536	/* the VSI passed in is already the default VSI */
3537	if (ice_is_vsi_dflt_vsi(vsi)) {
3538	dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3539	vsi->vsi_num);
3540	return 0;
3541	}
3542
3543	status = ice_cfg_dflt_vsi(pi: vsi->port_info, vsi_handle: vsi->idx, set: true, ICE_FLTR_RX);
3544	if (status) {
3545	dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3546	vsi->vsi_num, status);
3547	return status;
3548	}
3549
3550	return 0;
3551	}
3552
3553	/**
3554	* ice_clear_dflt_vsi - clear the default forwarding VSI
3555	* @vsi: VSI to remove from filter list
3556	*
3557	* If the switch has no default VSI or it's not enabled then return error.
3558	*
3559	* Otherwise try to clear the default VSI and return the result.
3560	*/
3561	int ice_clear_dflt_vsi(struct ice_vsi *vsi)
3562	{
3563	struct device *dev;
3564	int status;
3565
3566	if (!vsi)
3567	return -EINVAL;
3568
3569	dev = ice_pf_to_dev(vsi->back);
3570
3571	/* there is no default VSI configured */
3572	if (!ice_is_dflt_vsi_in_use(pi: vsi->port_info))
3573	return -ENODEV;
3574
3575	status = ice_cfg_dflt_vsi(pi: vsi->port_info, vsi_handle: vsi->idx, set: false,
3576	ICE_FLTR_RX);
3577	if (status) {
3578	dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3579	vsi->vsi_num, status);
3580	return -EIO;
3581	}
3582
3583	return 0;
3584	}
3585
3586	/**
3587	* ice_get_link_speed_mbps - get link speed in Mbps
3588	* @vsi: the VSI whose link speed is being queried
3589	*
3590	* Return current VSI link speed and 0 if the speed is unknown.
3591	*/
3592	int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3593	{
3594	unsigned int link_speed;
3595
3596	link_speed = vsi->port_info->phy.link_info.link_speed;
3597
3598	return (int)ice_get_link_speed(index: fls(x: link_speed) - 1);
3599	}
3600
3601	/**
3602	* ice_get_link_speed_kbps - get link speed in Kbps
3603	* @vsi: the VSI whose link speed is being queried
3604	*
3605	* Return current VSI link speed and 0 if the speed is unknown.
3606	*/
3607	int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3608	{
3609	int speed_mbps;
3610
3611	speed_mbps = ice_get_link_speed_mbps(vsi);
3612
3613	return speed_mbps * 1000;
3614	}
3615
3616	/**
3617	* ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3618	* @vsi: VSI to be configured
3619	* @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3620	*
3621	* If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3622	* profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3623	* on TC 0.
3624	*/
3625	int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3626	{
3627	struct ice_pf *pf = vsi->back;
3628	struct device *dev;
3629	int status;
3630	int speed;
3631
3632	dev = ice_pf_to_dev(pf);
3633	if (!vsi->port_info) {
3634	dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3635	vsi->idx, vsi->type);
3636	return -EINVAL;
3637	}
3638
3639	speed = ice_get_link_speed_kbps(vsi);
3640	if (min_tx_rate > (u64)speed) {
3641	dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3642	min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3643	speed);
3644	return -EINVAL;
3645	}
3646
3647	/* Configure min BW for VSI limit */
3648	if (min_tx_rate) {
3649	status = ice_cfg_vsi_bw_lmt_per_tc(pi: vsi->port_info, vsi_handle: vsi->idx, tc: 0,
3650	rl_type: ICE_MIN_BW, bw: min_tx_rate);
3651	if (status) {
3652	dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3653	min_tx_rate, ice_vsi_type_str(vsi->type),
3654	vsi->idx);
3655	return status;
3656	}
3657
3658	dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3659	min_tx_rate, ice_vsi_type_str(vsi->type));
3660	} else {
3661	status = ice_cfg_vsi_bw_dflt_lmt_per_tc(pi: vsi->port_info,
3662	vsi_handle: vsi->idx, tc: 0,
3663	rl_type: ICE_MIN_BW);
3664	if (status) {
3665	dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3666	ice_vsi_type_str(vsi->type), vsi->idx);
3667	return status;
3668	}
3669
3670	dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3671	ice_vsi_type_str(vsi->type), vsi->idx);
3672	}
3673
3674	return 0;
3675	}
3676
3677	/**
3678	* ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3679	* @vsi: VSI to be configured
3680	* @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3681	*
3682	* If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3683	* profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3684	* on TC 0.
3685	*/
3686	int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3687	{
3688	struct ice_pf *pf = vsi->back;
3689	struct device *dev;
3690	int status;
3691	int speed;
3692
3693	dev = ice_pf_to_dev(pf);
3694	if (!vsi->port_info) {
3695	dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3696	vsi->idx, vsi->type);
3697	return -EINVAL;
3698	}
3699
3700	speed = ice_get_link_speed_kbps(vsi);
3701	if (max_tx_rate > (u64)speed) {
3702	dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3703	max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3704	speed);
3705	return -EINVAL;
3706	}
3707
3708	/* Configure max BW for VSI limit */
3709	if (max_tx_rate) {
3710	status = ice_cfg_vsi_bw_lmt_per_tc(pi: vsi->port_info, vsi_handle: vsi->idx, tc: 0,
3711	rl_type: ICE_MAX_BW, bw: max_tx_rate);
3712	if (status) {
3713	dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3714	max_tx_rate, ice_vsi_type_str(vsi->type),
3715	vsi->idx);
3716	return status;
3717	}
3718
3719	dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3720	max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3721	} else {
3722	status = ice_cfg_vsi_bw_dflt_lmt_per_tc(pi: vsi->port_info,
3723	vsi_handle: vsi->idx, tc: 0,
3724	rl_type: ICE_MAX_BW);
3725	if (status) {
3726	dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3727	ice_vsi_type_str(vsi->type), vsi->idx);
3728	return status;
3729	}
3730
3731	dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3732	ice_vsi_type_str(vsi->type), vsi->idx);
3733	}
3734
3735	return 0;
3736	}
3737
3738	/**
3739	* ice_set_link - turn on/off physical link
3740	* @vsi: VSI to modify physical link on
3741	* @ena: turn on/off physical link
3742	*/
3743	int ice_set_link(struct ice_vsi *vsi, bool ena)
3744	{
3745	struct device *dev = ice_pf_to_dev(vsi->back);
3746	struct ice_port_info *pi = vsi->port_info;
3747	struct ice_hw *hw = pi->hw;
3748	int status;
3749
3750	if (vsi->type != ICE_VSI_PF)
3751	return -EINVAL;
3752
3753	status = ice_aq_set_link_restart_an(pi, ena_link: ena, NULL);
3754
3755	/* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.
3756	* this is not a fatal error, so print a warning message and return
3757	* a success code. Return an error if FW returns an error code other
3758	* than ICE_AQ_RC_EMODE
3759	*/
3760	if (status == -EIO) {
3761	if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
3762	dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
3763	(ena ? "ON" : "OFF"), status,
3764	ice_aq_str(hw->adminq.sq_last_status));
3765	} else if (status) {
3766	dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
3767	(ena ? "ON" : "OFF"), status,
3768	ice_aq_str(hw->adminq.sq_last_status));
3769	return status;
3770	}
3771
3772	return 0;
3773	}
3774
3775	/**
3776	* ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
3777	* @vsi: VSI used to add VLAN filters
3778	*
3779	* In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
3780	* on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
3781	* matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
3782	* ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
3783	*
3784	* For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
3785	* when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
3786	* traffic in SVM, since the VLAN TPID isn't part of filtering.
3787	*
3788	* If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
3789	* added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
3790	* part of filtering.
3791	*/
3792	int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
3793	{
3794	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3795	struct ice_vlan vlan;
3796	int err;
3797
3798	vlan = ICE_VLAN(0, 0, 0);
3799	err = vlan_ops->add_vlan(vsi, &vlan);
3800	if (err && err != -EEXIST)
3801	return err;
3802
3803	/* in SVM both VLAN 0 filters are identical */
3804	if (!ice_is_dvm_ena(hw: &vsi->back->hw))
3805	return 0;
3806
3807	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3808	err = vlan_ops->add_vlan(vsi, &vlan);
3809	if (err && err != -EEXIST)
3810	return err;
3811
3812	return 0;
3813	}
3814
3815	/**
3816	* ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
3817	* @vsi: VSI used to add VLAN filters
3818	*
3819	* Delete the VLAN 0 filters in the same manner that they were added in
3820	* ice_vsi_add_vlan_zero.
3821	*/
3822	int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
3823	{
3824	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3825	struct ice_vlan vlan;
3826	int err;
3827
3828	vlan = ICE_VLAN(0, 0, 0);
3829	err = vlan_ops->del_vlan(vsi, &vlan);
3830	if (err && err != -EEXIST)
3831	return err;
3832
3833	/* in SVM both VLAN 0 filters are identical */
3834	if (!ice_is_dvm_ena(hw: &vsi->back->hw))
3835	return 0;
3836
3837	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3838	err = vlan_ops->del_vlan(vsi, &vlan);
3839	if (err && err != -EEXIST)
3840	return err;
3841
3842	/* when deleting the last VLAN filter, make sure to disable the VLAN
3843	* promisc mode so the filter isn't left by accident
3844	*/
3845	return ice_clear_vsi_promisc(hw: &vsi->back->hw, vsi_handle: vsi->idx,
3846	ICE_MCAST_VLAN_PROMISC_BITS, vid: 0);
3847	}
3848
3849	/**
3850	* ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
3851	* @vsi: VSI used to get the VLAN mode
3852	*
3853	* If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
3854	* then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
3855	*/
3856	static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
3857	{
3858	#define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2
3859	#define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1
3860	/* no VLAN 0 filter is created when a port VLAN is active */
3861	if (vsi->type == ICE_VSI_VF) {
3862	if (WARN_ON(!vsi->vf))
3863	return 0;
3864
3865	if (ice_vf_is_port_vlan_ena(vf: vsi->vf))
3866	return 0;
3867	}
3868
3869	if (ice_is_dvm_ena(hw: &vsi->back->hw))
3870	return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
3871	else
3872	return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
3873	}
3874
3875	/**
3876	* ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
3877	* @vsi: VSI used to determine if any non-zero VLANs have been added
3878	*/
3879	bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
3880	{
3881	return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
3882	}
3883
3884	/**
3885	* ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
3886	* @vsi: VSI used to get the number of non-zero VLANs added
3887	*/
3888	u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
3889	{
3890	return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
3891	}
3892
3893	/**
3894	* ice_is_feature_supported
3895	* @pf: pointer to the struct ice_pf instance
3896	* @f: feature enum to be checked
3897	*
3898	* returns true if feature is supported, false otherwise
3899	*/
3900	bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
3901	{
3902	if (f < 0 || f >= ICE_F_MAX)
3903	return false;
3904
3905	return test_bit(f, pf->features);
3906	}
3907
3908	/**
3909	* ice_set_feature_support
3910	* @pf: pointer to the struct ice_pf instance
3911	* @f: feature enum to set
3912	*/
3913	void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
3914	{
3915	if (f < 0 || f >= ICE_F_MAX)
3916	return;
3917
3918	set_bit(nr: f, addr: pf->features);
3919	}
3920
3921	/**
3922	* ice_clear_feature_support
3923	* @pf: pointer to the struct ice_pf instance
3924	* @f: feature enum to clear
3925	*/
3926	void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
3927	{
3928	if (f < 0 || f >= ICE_F_MAX)
3929	return;
3930
3931	clear_bit(nr: f, addr: pf->features);
3932	}
3933
3934	/**
3935	* ice_init_feature_support
3936	* @pf: pointer to the struct ice_pf instance
3937	*
3938	* called during init to setup supported feature
3939	*/
3940	void ice_init_feature_support(struct ice_pf *pf)
3941	{
3942	switch (pf->hw.device_id) {
3943	case ICE_DEV_ID_E810C_BACKPLANE:
3944	case ICE_DEV_ID_E810C_QSFP:
3945	case ICE_DEV_ID_E810C_SFP:
3946	case ICE_DEV_ID_E810_XXV_BACKPLANE:
3947	case ICE_DEV_ID_E810_XXV_QSFP:
3948	case ICE_DEV_ID_E810_XXV_SFP:
3949	ice_set_feature_support(pf, f: ICE_F_DSCP);
3950	if (ice_is_phy_rclk_in_netlist(hw: &pf->hw))
3951	ice_set_feature_support(pf, f: ICE_F_PHY_RCLK);
3952	/* If we don't own the timer - don't enable other caps */
3953	if (!ice_pf_src_tmr_owned(pf))
3954	break;
3955	if (ice_is_cgu_in_netlist(hw: &pf->hw))
3956	ice_set_feature_support(pf, f: ICE_F_CGU);
3957	if (ice_is_clock_mux_in_netlist(hw: &pf->hw))
3958	ice_set_feature_support(pf, f: ICE_F_SMA_CTRL);
3959	if (ice_gnss_is_gps_present(hw: &pf->hw))
3960	ice_set_feature_support(pf, f: ICE_F_GNSS);
3961	break;
3962	default:
3963	break;
3964	}
3965	}
3966
3967	/**
3968	* ice_vsi_update_security - update security block in VSI
3969	* @vsi: pointer to VSI structure
3970	* @fill: function pointer to fill ctx
3971	*/
3972	int
3973	ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
3974	{
3975	struct ice_vsi_ctx ctx = { 0 };
3976
3977	ctx.info = vsi->info;
3978	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
3979	fill(&ctx);
3980
3981	if (ice_update_vsi(hw: &vsi->back->hw, vsi_handle: vsi->idx, vsi_ctx: &ctx, NULL))
3982	return -ENODEV;
3983
3984	vsi->info = ctx.info;
3985	return 0;
3986	}
3987
3988	/**
3989	* ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
3990	* @ctx: pointer to VSI ctx structure
3991	*/
3992	void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
3993	{
3994	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
3995	(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
3996	ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
3997	}
3998
3999	/**
4000	* ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4001	* @ctx: pointer to VSI ctx structure
4002	*/
4003	void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4004	{
4005	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4006	~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4007	ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4008	}
4009
4010	/**
4011	* ice_vsi_ctx_set_allow_override - allow destination override on VSI
4012	* @ctx: pointer to VSI ctx structure
4013	*/
4014	void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)
4015	{
4016	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4017	}
4018
4019	/**
4020	* ice_vsi_ctx_clear_allow_override - turn off destination override on VSI
4021	* @ctx: pointer to VSI ctx structure
4022	*/
4023	void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)
4024	{
4025	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4026	}
4027
4028	/**
4029	* ice_vsi_update_local_lb - update sw block in VSI with local loopback bit
4030	* @vsi: pointer to VSI structure
4031	* @set: set or unset the bit
4032	*/
4033	int
4034	ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set)
4035	{
4036	struct ice_vsi_ctx ctx = {
4037	.info = vsi->info,
4038	};
4039
4040	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
4041	if (set)
4042	ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB;
4043	else
4044	ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB;
4045
4046	if (ice_update_vsi(hw: &vsi->back->hw, vsi_handle: vsi->idx, vsi_ctx: &ctx, NULL))
4047	return -ENODEV;
4048
4049	vsi->info = ctx.info;
4050	return 0;
4051	}
4052