1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs |
4 | * |
5 | * Copyright (C) 2016 Intel Corporation |
6 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
7 | */ |
8 | |
9 | #include <linux/bitops.h> |
10 | #include <linux/module.h> |
11 | #include <linux/pci.h> |
12 | #include <linux/rational.h> |
13 | |
14 | #include <linux/dmaengine.h> |
15 | #include <linux/dma/dw.h> |
16 | |
17 | #include "8250_dwlib.h" |
18 | |
19 | #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936 |
20 | |
21 | #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a |
22 | #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c |
23 | |
24 | #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a |
25 | #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c |
26 | |
27 | #define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96 |
28 | #define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97 |
29 | #define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98 |
30 | #define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99 |
31 | #define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a |
32 | #define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b |
33 | |
34 | #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3 |
35 | #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4 |
36 | |
37 | /* Intel LPSS specific registers */ |
38 | |
39 | #define BYT_PRV_CLK 0x800 |
40 | #define BYT_PRV_CLK_EN BIT(0) |
41 | #define BYT_PRV_CLK_M_VAL_SHIFT 1 |
42 | #define BYT_PRV_CLK_N_VAL_SHIFT 16 |
43 | #define BYT_PRV_CLK_UPDATE BIT(31) |
44 | |
45 | #define BYT_TX_OVF_INT 0x820 |
46 | #define BYT_TX_OVF_INT_MASK BIT(1) |
47 | |
48 | struct lpss8250; |
49 | |
50 | struct lpss8250_board { |
51 | unsigned long freq; |
52 | unsigned int base_baud; |
53 | int (*setup)(struct lpss8250 *, struct uart_port *p); |
54 | void (*exit)(struct lpss8250 *); |
55 | }; |
56 | |
57 | struct lpss8250 { |
58 | struct dw8250_port_data data; |
59 | struct lpss8250_board *board; |
60 | |
61 | /* DMA parameters */ |
62 | struct dw_dma_chip dma_chip; |
63 | struct dw_dma_slave dma_param; |
64 | u8 dma_maxburst; |
65 | }; |
66 | |
67 | static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data) |
68 | { |
69 | return container_of(data, struct lpss8250, data); |
70 | } |
71 | |
72 | static void byt_set_termios(struct uart_port *p, struct ktermios *termios, |
73 | const struct ktermios *old) |
74 | { |
75 | unsigned int baud = tty_termios_baud_rate(termios); |
76 | struct lpss8250 *lpss = to_lpss8250(data: p->private_data); |
77 | unsigned long fref = lpss->board->freq, fuart = baud * 16; |
78 | unsigned long w = BIT(15) - 1; |
79 | unsigned long m, n; |
80 | u32 reg; |
81 | |
82 | /* Gracefully handle the B0 case: fall back to B9600 */ |
83 | fuart = fuart ? fuart : 9600 * 16; |
84 | |
85 | /* Get Fuart closer to Fref */ |
86 | fuart *= rounddown_pow_of_two(fref / fuart); |
87 | |
88 | /* |
89 | * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the |
90 | * dividers must be adjusted. |
91 | * |
92 | * uartclk = (m / n) * 100 MHz, where m <= n |
93 | */ |
94 | rational_best_approximation(given_numerator: fuart, given_denominator: fref, max_numerator: w, max_denominator: w, best_numerator: &m, best_denominator: &n); |
95 | p->uartclk = fuart; |
96 | |
97 | /* Reset the clock */ |
98 | reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT); |
99 | writel(val: reg, addr: p->membase + BYT_PRV_CLK); |
100 | reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE; |
101 | writel(val: reg, addr: p->membase + BYT_PRV_CLK); |
102 | |
103 | dw8250_do_set_termios(p, termios, old); |
104 | } |
105 | |
106 | static unsigned int byt_get_mctrl(struct uart_port *port) |
107 | { |
108 | unsigned int ret = serial8250_do_get_mctrl(port); |
109 | |
110 | /* Force DCD and DSR signals to permanently be reported as active */ |
111 | ret |= TIOCM_CAR | TIOCM_DSR; |
112 | |
113 | return ret; |
114 | } |
115 | |
116 | static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
117 | { |
118 | struct dw_dma_slave *param = &lpss->dma_param; |
119 | struct pci_dev *pdev = to_pci_dev(port->dev); |
120 | struct pci_dev *dma_dev; |
121 | |
122 | switch (pdev->device) { |
123 | case PCI_DEVICE_ID_INTEL_BYT_UART1: |
124 | case PCI_DEVICE_ID_INTEL_BSW_UART1: |
125 | case PCI_DEVICE_ID_INTEL_BDW_UART1: |
126 | param->src_id = 3; |
127 | param->dst_id = 2; |
128 | break; |
129 | case PCI_DEVICE_ID_INTEL_BYT_UART2: |
130 | case PCI_DEVICE_ID_INTEL_BSW_UART2: |
131 | case PCI_DEVICE_ID_INTEL_BDW_UART2: |
132 | param->src_id = 5; |
133 | param->dst_id = 4; |
134 | break; |
135 | default: |
136 | return -EINVAL; |
137 | } |
138 | |
139 | dma_dev = pci_get_slot(bus: pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0)); |
140 | |
141 | param->dma_dev = &dma_dev->dev; |
142 | param->m_master = 0; |
143 | param->p_master = 1; |
144 | |
145 | lpss->dma_maxburst = 16; |
146 | |
147 | port->set_termios = byt_set_termios; |
148 | port->get_mctrl = byt_get_mctrl; |
149 | |
150 | /* Disable TX counter interrupts */ |
151 | writel(BYT_TX_OVF_INT_MASK, addr: port->membase + BYT_TX_OVF_INT); |
152 | |
153 | return 0; |
154 | } |
155 | |
156 | static void byt_serial_exit(struct lpss8250 *lpss) |
157 | { |
158 | struct dw_dma_slave *param = &lpss->dma_param; |
159 | |
160 | /* Paired with pci_get_slot() in the byt_serial_setup() above */ |
161 | put_device(dev: param->dma_dev); |
162 | } |
163 | |
164 | static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
165 | { |
166 | struct uart_8250_dma *dma = &lpss->data.dma; |
167 | struct uart_8250_port *up = up_to_u8250p(up: port); |
168 | |
169 | /* |
170 | * This simply makes the checks in the 8250_port to try the DMA |
171 | * channel request which in turn uses the magic of ACPI tables |
172 | * parsing (see drivers/dma/acpi-dma.c for the details) and |
173 | * matching with the registered General Purpose DMA controllers. |
174 | */ |
175 | up->dma = dma; |
176 | |
177 | lpss->dma_maxburst = 16; |
178 | |
179 | port->set_termios = dw8250_do_set_termios; |
180 | |
181 | return 0; |
182 | } |
183 | |
184 | static void ehl_serial_exit(struct lpss8250 *lpss) |
185 | { |
186 | struct uart_8250_port *up = serial8250_get_port(line: lpss->data.line); |
187 | |
188 | up->dma = NULL; |
189 | } |
190 | |
191 | #ifdef CONFIG_SERIAL_8250_DMA |
192 | static const struct dw_dma_platform_data qrk_serial_dma_pdata = { |
193 | .nr_channels = 2, |
194 | .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, |
195 | .chan_priority = CHAN_PRIORITY_ASCENDING, |
196 | .block_size = 4095, |
197 | .nr_masters = 1, |
198 | .data_width = {4}, |
199 | .multi_block = {0}, |
200 | }; |
201 | |
202 | static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) |
203 | { |
204 | struct uart_8250_dma *dma = &lpss->data.dma; |
205 | struct dw_dma_chip *chip = &lpss->dma_chip; |
206 | struct dw_dma_slave *param = &lpss->dma_param; |
207 | struct pci_dev *pdev = to_pci_dev(port->dev); |
208 | int ret; |
209 | |
210 | chip->pdata = &qrk_serial_dma_pdata; |
211 | chip->dev = &pdev->dev; |
212 | chip->id = pdev->devfn; |
213 | chip->irq = pci_irq_vector(dev: pdev, nr: 0); |
214 | chip->regs = pci_ioremap_bar(pdev, bar: 1); |
215 | if (!chip->regs) |
216 | return; |
217 | |
218 | /* Falling back to PIO mode if DMA probing fails */ |
219 | ret = dw_dma_probe(chip); |
220 | if (ret) |
221 | return; |
222 | |
223 | pci_try_set_mwi(dev: pdev); |
224 | |
225 | /* Special DMA address for UART */ |
226 | dma->rx_dma_addr = 0xfffff000; |
227 | dma->tx_dma_addr = 0xfffff000; |
228 | |
229 | param->dma_dev = &pdev->dev; |
230 | param->src_id = 0; |
231 | param->dst_id = 1; |
232 | param->hs_polarity = true; |
233 | |
234 | lpss->dma_maxburst = 8; |
235 | } |
236 | |
237 | static void qrk_serial_exit_dma(struct lpss8250 *lpss) |
238 | { |
239 | struct dw_dma_chip *chip = &lpss->dma_chip; |
240 | struct dw_dma_slave *param = &lpss->dma_param; |
241 | |
242 | if (!param->dma_dev) |
243 | return; |
244 | |
245 | dw_dma_remove(chip); |
246 | |
247 | pci_iounmap(to_pci_dev(chip->dev), chip->regs); |
248 | } |
249 | #else /* CONFIG_SERIAL_8250_DMA */ |
250 | static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {} |
251 | static void qrk_serial_exit_dma(struct lpss8250 *lpss) {} |
252 | #endif /* !CONFIG_SERIAL_8250_DMA */ |
253 | |
254 | static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
255 | { |
256 | qrk_serial_setup_dma(lpss, port); |
257 | return 0; |
258 | } |
259 | |
260 | static void qrk_serial_exit(struct lpss8250 *lpss) |
261 | { |
262 | qrk_serial_exit_dma(lpss); |
263 | } |
264 | |
265 | static bool lpss8250_dma_filter(struct dma_chan *chan, void *param) |
266 | { |
267 | struct dw_dma_slave *dws = param; |
268 | |
269 | if (dws->dma_dev != chan->device->dev) |
270 | return false; |
271 | |
272 | chan->private = dws; |
273 | return true; |
274 | } |
275 | |
276 | static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port) |
277 | { |
278 | struct uart_8250_dma *dma = &lpss->data.dma; |
279 | struct dw_dma_slave *rx_param, *tx_param; |
280 | struct device *dev = port->port.dev; |
281 | |
282 | if (!lpss->dma_param.dma_dev) { |
283 | dma = port->dma; |
284 | if (dma) |
285 | goto out_configuration_only; |
286 | |
287 | return 0; |
288 | } |
289 | |
290 | rx_param = devm_kmemdup(dev, src: &lpss->dma_param, len: sizeof(*rx_param), GFP_KERNEL); |
291 | if (!rx_param) |
292 | return -ENOMEM; |
293 | |
294 | tx_param = devm_kmemdup(dev, src: &lpss->dma_param, len: sizeof(*tx_param), GFP_KERNEL); |
295 | if (!tx_param) |
296 | return -ENOMEM; |
297 | |
298 | dma->fn = lpss8250_dma_filter; |
299 | dma->rx_param = rx_param; |
300 | dma->tx_param = tx_param; |
301 | |
302 | port->dma = dma; |
303 | |
304 | out_configuration_only: |
305 | dma->rxconf.src_maxburst = lpss->dma_maxburst; |
306 | dma->txconf.dst_maxburst = lpss->dma_maxburst; |
307 | |
308 | return 0; |
309 | } |
310 | |
311 | static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
312 | { |
313 | struct uart_8250_port uart; |
314 | struct lpss8250 *lpss; |
315 | int ret; |
316 | |
317 | ret = pcim_enable_device(pdev); |
318 | if (ret) |
319 | return ret; |
320 | |
321 | pci_set_master(dev: pdev); |
322 | |
323 | lpss = devm_kzalloc(dev: &pdev->dev, size: sizeof(*lpss), GFP_KERNEL); |
324 | if (!lpss) |
325 | return -ENOMEM; |
326 | |
327 | ret = pci_alloc_irq_vectors(dev: pdev, min_vecs: 1, max_vecs: 1, PCI_IRQ_ALL_TYPES); |
328 | if (ret < 0) |
329 | return ret; |
330 | |
331 | lpss->board = (struct lpss8250_board *)id->driver_data; |
332 | |
333 | memset(&uart, 0, sizeof(struct uart_8250_port)); |
334 | |
335 | uart.port.dev = &pdev->dev; |
336 | uart.port.irq = pci_irq_vector(dev: pdev, nr: 0); |
337 | uart.port.private_data = &lpss->data; |
338 | uart.port.type = PORT_16550A; |
339 | uart.port.iotype = UPIO_MEM32; |
340 | uart.port.regshift = 2; |
341 | uart.port.uartclk = lpss->board->base_baud * 16; |
342 | uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
343 | uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE; |
344 | uart.port.mapbase = pci_resource_start(pdev, 0); |
345 | uart.port.membase = pcim_iomap(pdev, bar: 0, maxlen: 0); |
346 | if (!uart.port.membase) |
347 | return -ENOMEM; |
348 | |
349 | ret = lpss->board->setup(lpss, &uart.port); |
350 | if (ret) |
351 | return ret; |
352 | |
353 | dw8250_setup_port(p: &uart.port); |
354 | |
355 | ret = lpss8250_dma_setup(lpss, port: &uart); |
356 | if (ret) |
357 | goto err_exit; |
358 | |
359 | ret = serial8250_register_8250_port(&uart); |
360 | if (ret < 0) |
361 | goto err_exit; |
362 | |
363 | lpss->data.line = ret; |
364 | |
365 | pci_set_drvdata(pdev, data: lpss); |
366 | return 0; |
367 | |
368 | err_exit: |
369 | lpss->board->exit(lpss); |
370 | pci_free_irq_vectors(dev: pdev); |
371 | return ret; |
372 | } |
373 | |
374 | static void lpss8250_remove(struct pci_dev *pdev) |
375 | { |
376 | struct lpss8250 *lpss = pci_get_drvdata(pdev); |
377 | |
378 | serial8250_unregister_port(line: lpss->data.line); |
379 | |
380 | lpss->board->exit(lpss); |
381 | pci_free_irq_vectors(dev: pdev); |
382 | } |
383 | |
384 | static const struct lpss8250_board byt_board = { |
385 | .freq = 100000000, |
386 | .base_baud = 2764800, |
387 | .setup = byt_serial_setup, |
388 | .exit = byt_serial_exit, |
389 | }; |
390 | |
391 | static const struct lpss8250_board ehl_board = { |
392 | .freq = 200000000, |
393 | .base_baud = 12500000, |
394 | .setup = ehl_serial_setup, |
395 | .exit = ehl_serial_exit, |
396 | }; |
397 | |
398 | static const struct lpss8250_board qrk_board = { |
399 | .freq = 44236800, |
400 | .base_baud = 2764800, |
401 | .setup = qrk_serial_setup, |
402 | .exit = qrk_serial_exit, |
403 | }; |
404 | |
405 | static const struct pci_device_id pci_ids[] = { |
406 | { PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) }, |
407 | { PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) }, |
408 | { PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) }, |
409 | { PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) }, |
410 | { PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) }, |
411 | { PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) }, |
412 | { PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) }, |
413 | { PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) }, |
414 | { PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) }, |
415 | { PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) }, |
416 | { PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) }, |
417 | { PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) }, |
418 | { PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) }, |
419 | { } |
420 | }; |
421 | MODULE_DEVICE_TABLE(pci, pci_ids); |
422 | |
423 | static struct pci_driver lpss8250_pci_driver = { |
424 | .name = "8250_lpss" , |
425 | .id_table = pci_ids, |
426 | .probe = lpss8250_probe, |
427 | .remove = lpss8250_remove, |
428 | }; |
429 | |
430 | module_pci_driver(lpss8250_pci_driver); |
431 | |
432 | MODULE_AUTHOR("Intel Corporation" ); |
433 | MODULE_LICENSE("GPL v2" ); |
434 | MODULE_DESCRIPTION("Intel LPSS UART driver" ); |
435 | |