1 | /* |
---|---|

2 | * Testsuite for BPF interpreter and BPF JIT compiler |

3 | * |

4 | * Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com |

5 | * |

6 | * This program is free software; you can redistribute it and/or |

7 | * modify it under the terms of version 2 of the GNU General Public |

8 | * License as published by the Free Software Foundation. |

9 | * |

10 | * This program is distributed in the hope that it will be useful, but |

11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |

12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |

13 | * General Public License for more details. |

14 | */ |

15 | |

16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |

17 | |

18 | #include <linux/init.h> |

19 | #include <linux/module.h> |

20 | #include <linux/filter.h> |

21 | #include <linux/bpf.h> |

22 | #include <linux/skbuff.h> |

23 | #include <linux/netdevice.h> |

24 | #include <linux/if_vlan.h> |

25 | #include <linux/random.h> |

26 | #include <linux/highmem.h> |

27 | #include <linux/sched.h> |

28 | |

29 | /* General test specific settings */ |

30 | #define MAX_SUBTESTS 3 |

31 | #define MAX_TESTRUNS 1000 |

32 | #define MAX_DATA 128 |

33 | #define MAX_INSNS 512 |

34 | #define MAX_K 0xffffFFFF |

35 | |

36 | /* Few constants used to init test 'skb' */ |

37 | #define SKB_TYPE 3 |

38 | #define SKB_MARK 0x1234aaaa |

39 | #define SKB_HASH 0x1234aaab |

40 | #define SKB_QUEUE_MAP 123 |

41 | #define SKB_VLAN_TCI 0xffff |

42 | #define SKB_VLAN_PRESENT 1 |

43 | #define SKB_DEV_IFINDEX 577 |

44 | #define SKB_DEV_TYPE 588 |

45 | |

46 | /* Redefine REGs to make tests less verbose */ |

47 | #define R0 BPF_REG_0 |

48 | #define R1 BPF_REG_1 |

49 | #define R2 BPF_REG_2 |

50 | #define R3 BPF_REG_3 |

51 | #define R4 BPF_REG_4 |

52 | #define R5 BPF_REG_5 |

53 | #define R6 BPF_REG_6 |

54 | #define R7 BPF_REG_7 |

55 | #define R8 BPF_REG_8 |

56 | #define R9 BPF_REG_9 |

57 | #define R10 BPF_REG_10 |

58 | |

59 | /* Flags that can be passed to test cases */ |

60 | #define FLAG_NO_DATA BIT(0) |

61 | #define FLAG_EXPECTED_FAIL BIT(1) |

62 | #define FLAG_SKB_FRAG BIT(2) |

63 | |

64 | enum { |

65 | CLASSIC = BIT(6), /* Old BPF instructions only. */ |

66 | INTERNAL = BIT(7), /* Extended instruction set. */ |

67 | }; |

68 | |

69 | #define TEST_TYPE_MASK (CLASSIC | INTERNAL) |

70 | |

71 | struct bpf_test { |

72 | const char *descr; |

73 | union { |

74 | struct sock_filter insns[MAX_INSNS]; |

75 | struct bpf_insn insns_int[MAX_INSNS]; |

76 | struct { |

77 | void *insns; |

78 | unsigned int len; |

79 | } ptr; |

80 | } u; |

81 | __u8 aux; |

82 | __u8 data[MAX_DATA]; |

83 | struct { |

84 | int data_size; |

85 | __u32 result; |

86 | } test[MAX_SUBTESTS]; |

87 | int (*fill_helper)(struct bpf_test *self); |

88 | int expected_errcode; /* used when FLAG_EXPECTED_FAIL is set in the aux */ |

89 | __u8 frag_data[MAX_DATA]; |

90 | int stack_depth; /* for eBPF only, since tests don't call verifier */ |

91 | }; |

92 | |

93 | /* Large test cases need separate allocation and fill handler. */ |

94 | |

95 | static int bpf_fill_maxinsns1(struct bpf_test *self) |

96 | { |

97 | unsigned int len = BPF_MAXINSNS; |

98 | struct sock_filter *insn; |

99 | __u32 k = ~0; |

100 | int i; |

101 | |

102 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

103 | if (!insn) |

104 | return -ENOMEM; |

105 | |

106 | for (i = 0; i < len; i++, k--) |

107 | insn[i] = __BPF_STMT(BPF_RET | BPF_K, k); |

108 | |

109 | self->u.ptr.insns = insn; |

110 | self->u.ptr.len = len; |

111 | |

112 | return 0; |

113 | } |

114 | |

115 | static int bpf_fill_maxinsns2(struct bpf_test *self) |

116 | { |

117 | unsigned int len = BPF_MAXINSNS; |

118 | struct sock_filter *insn; |

119 | int i; |

120 | |

121 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

122 | if (!insn) |

123 | return -ENOMEM; |

124 | |

125 | for (i = 0; i < len; i++) |

126 | insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); |

127 | |

128 | self->u.ptr.insns = insn; |

129 | self->u.ptr.len = len; |

130 | |

131 | return 0; |

132 | } |

133 | |

134 | static int bpf_fill_maxinsns3(struct bpf_test *self) |

135 | { |

136 | unsigned int len = BPF_MAXINSNS; |

137 | struct sock_filter *insn; |

138 | struct rnd_state rnd; |

139 | int i; |

140 | |

141 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

142 | if (!insn) |

143 | return -ENOMEM; |

144 | |

145 | prandom_seed_state(&rnd, 3141592653589793238ULL); |

146 | |

147 | for (i = 0; i < len - 1; i++) { |

148 | __u32 k = prandom_u32_state(&rnd); |

149 | |

150 | insn[i] = __BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, k); |

151 | } |

152 | |

153 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); |

154 | |

155 | self->u.ptr.insns = insn; |

156 | self->u.ptr.len = len; |

157 | |

158 | return 0; |

159 | } |

160 | |

161 | static int bpf_fill_maxinsns4(struct bpf_test *self) |

162 | { |

163 | unsigned int len = BPF_MAXINSNS + 1; |

164 | struct sock_filter *insn; |

165 | int i; |

166 | |

167 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

168 | if (!insn) |

169 | return -ENOMEM; |

170 | |

171 | for (i = 0; i < len; i++) |

172 | insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); |

173 | |

174 | self->u.ptr.insns = insn; |

175 | self->u.ptr.len = len; |

176 | |

177 | return 0; |

178 | } |

179 | |

180 | static int bpf_fill_maxinsns5(struct bpf_test *self) |

181 | { |

182 | unsigned int len = BPF_MAXINSNS; |

183 | struct sock_filter *insn; |

184 | int i; |

185 | |

186 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

187 | if (!insn) |

188 | return -ENOMEM; |

189 | |

190 | insn[0] = __BPF_JUMP(BPF_JMP | BPF_JA, len - 2, 0, 0); |

191 | |

192 | for (i = 1; i < len - 1; i++) |

193 | insn[i] = __BPF_STMT(BPF_RET | BPF_K, 0xfefefefe); |

194 | |

195 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xabababab); |

196 | |

197 | self->u.ptr.insns = insn; |

198 | self->u.ptr.len = len; |

199 | |

200 | return 0; |

201 | } |

202 | |

203 | static int bpf_fill_maxinsns6(struct bpf_test *self) |

204 | { |

205 | unsigned int len = BPF_MAXINSNS; |

206 | struct sock_filter *insn; |

207 | int i; |

208 | |

209 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

210 | if (!insn) |

211 | return -ENOMEM; |

212 | |

213 | for (i = 0; i < len - 1; i++) |

214 | insn[i] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + |

215 | SKF_AD_VLAN_TAG_PRESENT); |

216 | |

217 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); |

218 | |

219 | self->u.ptr.insns = insn; |

220 | self->u.ptr.len = len; |

221 | |

222 | return 0; |

223 | } |

224 | |

225 | static int bpf_fill_maxinsns7(struct bpf_test *self) |

226 | { |

227 | unsigned int len = BPF_MAXINSNS; |

228 | struct sock_filter *insn; |

229 | int i; |

230 | |

231 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

232 | if (!insn) |

233 | return -ENOMEM; |

234 | |

235 | for (i = 0; i < len - 4; i++) |

236 | insn[i] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + |

237 | SKF_AD_CPU); |

238 | |

239 | insn[len - 4] = __BPF_STMT(BPF_MISC | BPF_TAX, 0); |

240 | insn[len - 3] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, SKF_AD_OFF + |

241 | SKF_AD_CPU); |

242 | insn[len - 2] = __BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0); |

243 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); |

244 | |

245 | self->u.ptr.insns = insn; |

246 | self->u.ptr.len = len; |

247 | |

248 | return 0; |

249 | } |

250 | |

251 | static int bpf_fill_maxinsns8(struct bpf_test *self) |

252 | { |

253 | unsigned int len = BPF_MAXINSNS; |

254 | struct sock_filter *insn; |

255 | int i, jmp_off = len - 3; |

256 | |

257 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

258 | if (!insn) |

259 | return -ENOMEM; |

260 | |

261 | insn[0] = __BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff); |

262 | |

263 | for (i = 1; i < len - 1; i++) |

264 | insn[i] = __BPF_JUMP(BPF_JMP | BPF_JGT, 0xffffffff, jmp_off--, 0); |

265 | |

266 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); |

267 | |

268 | self->u.ptr.insns = insn; |

269 | self->u.ptr.len = len; |

270 | |

271 | return 0; |

272 | } |

273 | |

274 | static int bpf_fill_maxinsns9(struct bpf_test *self) |

275 | { |

276 | unsigned int len = BPF_MAXINSNS; |

277 | struct bpf_insn *insn; |

278 | int i; |

279 | |

280 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

281 | if (!insn) |

282 | return -ENOMEM; |

283 | |

284 | insn[0] = BPF_JMP_IMM(BPF_JA, 0, 0, len - 2); |

285 | insn[1] = BPF_ALU32_IMM(BPF_MOV, R0, 0xcbababab); |

286 | insn[2] = BPF_EXIT_INSN(); |

287 | |

288 | for (i = 3; i < len - 2; i++) |

289 | insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xfefefefe); |

290 | |

291 | insn[len - 2] = BPF_EXIT_INSN(); |

292 | insn[len - 1] = BPF_JMP_IMM(BPF_JA, 0, 0, -(len - 1)); |

293 | |

294 | self->u.ptr.insns = insn; |

295 | self->u.ptr.len = len; |

296 | |

297 | return 0; |

298 | } |

299 | |

300 | static int bpf_fill_maxinsns10(struct bpf_test *self) |

301 | { |

302 | unsigned int len = BPF_MAXINSNS, hlen = len - 2; |

303 | struct bpf_insn *insn; |

304 | int i; |

305 | |

306 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

307 | if (!insn) |

308 | return -ENOMEM; |

309 | |

310 | for (i = 0; i < hlen / 2; i++) |

311 | insn[i] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen - 2 - 2 * i); |

312 | for (i = hlen - 1; i > hlen / 2; i--) |

313 | insn[i] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen - 1 - 2 * i); |

314 | |

315 | insn[hlen / 2] = BPF_JMP_IMM(BPF_JA, 0, 0, hlen / 2 - 1); |

316 | insn[hlen] = BPF_ALU32_IMM(BPF_MOV, R0, 0xabababac); |

317 | insn[hlen + 1] = BPF_EXIT_INSN(); |

318 | |

319 | self->u.ptr.insns = insn; |

320 | self->u.ptr.len = len; |

321 | |

322 | return 0; |

323 | } |

324 | |

325 | static int __bpf_fill_ja(struct bpf_test *self, unsigned int len, |

326 | unsigned int plen) |

327 | { |

328 | struct sock_filter *insn; |

329 | unsigned int rlen; |

330 | int i, j; |

331 | |

332 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

333 | if (!insn) |

334 | return -ENOMEM; |

335 | |

336 | rlen = (len % plen) - 1; |

337 | |

338 | for (i = 0; i + plen < len; i += plen) |

339 | for (j = 0; j < plen; j++) |

340 | insn[i + j] = __BPF_JUMP(BPF_JMP | BPF_JA, |

341 | plen - 1 - j, 0, 0); |

342 | for (j = 0; j < rlen; j++) |

343 | insn[i + j] = __BPF_JUMP(BPF_JMP | BPF_JA, rlen - 1 - j, |

344 | 0, 0); |

345 | |

346 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xababcbac); |

347 | |

348 | self->u.ptr.insns = insn; |

349 | self->u.ptr.len = len; |

350 | |

351 | return 0; |

352 | } |

353 | |

354 | static int bpf_fill_maxinsns11(struct bpf_test *self) |

355 | { |

356 | /* Hits 70 passes on x86_64, so cannot get JITed there. */ |

357 | return __bpf_fill_ja(self, BPF_MAXINSNS, 68); |

358 | } |

359 | |

360 | static int bpf_fill_maxinsns12(struct bpf_test *self) |

361 | { |

362 | unsigned int len = BPF_MAXINSNS; |

363 | struct sock_filter *insn; |

364 | int i = 0; |

365 | |

366 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

367 | if (!insn) |

368 | return -ENOMEM; |

369 | |

370 | insn[0] = __BPF_JUMP(BPF_JMP | BPF_JA, len - 2, 0, 0); |

371 | |

372 | for (i = 1; i < len - 1; i++) |

373 | insn[i] = __BPF_STMT(BPF_LDX | BPF_B | BPF_MSH, 0); |

374 | |

375 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xabababab); |

376 | |

377 | self->u.ptr.insns = insn; |

378 | self->u.ptr.len = len; |

379 | |

380 | return 0; |

381 | } |

382 | |

383 | static int bpf_fill_maxinsns13(struct bpf_test *self) |

384 | { |

385 | unsigned int len = BPF_MAXINSNS; |

386 | struct sock_filter *insn; |

387 | int i = 0; |

388 | |

389 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

390 | if (!insn) |

391 | return -ENOMEM; |

392 | |

393 | for (i = 0; i < len - 3; i++) |

394 | insn[i] = __BPF_STMT(BPF_LDX | BPF_B | BPF_MSH, 0); |

395 | |

396 | insn[len - 3] = __BPF_STMT(BPF_LD | BPF_IMM, 0xabababab); |

397 | insn[len - 2] = __BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0); |

398 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_A, 0); |

399 | |

400 | self->u.ptr.insns = insn; |

401 | self->u.ptr.len = len; |

402 | |

403 | return 0; |

404 | } |

405 | |

406 | static int bpf_fill_ja(struct bpf_test *self) |

407 | { |

408 | /* Hits exactly 11 passes on x86_64 JIT. */ |

409 | return __bpf_fill_ja(self, 12, 9); |

410 | } |

411 | |

412 | static int bpf_fill_ld_abs_get_processor_id(struct bpf_test *self) |

413 | { |

414 | unsigned int len = BPF_MAXINSNS; |

415 | struct sock_filter *insn; |

416 | int i; |

417 | |

418 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

419 | if (!insn) |

420 | return -ENOMEM; |

421 | |

422 | for (i = 0; i < len - 1; i += 2) { |

423 | insn[i] = __BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 0); |

424 | insn[i + 1] = __BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

425 | SKF_AD_OFF + SKF_AD_CPU); |

426 | } |

427 | |

428 | insn[len - 1] = __BPF_STMT(BPF_RET | BPF_K, 0xbee); |

429 | |

430 | self->u.ptr.insns = insn; |

431 | self->u.ptr.len = len; |

432 | |

433 | return 0; |

434 | } |

435 | |

436 | static int __bpf_fill_stxdw(struct bpf_test *self, int size) |

437 | { |

438 | unsigned int len = BPF_MAXINSNS; |

439 | struct bpf_insn *insn; |

440 | int i; |

441 | |

442 | insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL); |

443 | if (!insn) |

444 | return -ENOMEM; |

445 | |

446 | insn[0] = BPF_ALU32_IMM(BPF_MOV, R0, 1); |

447 | insn[1] = BPF_ST_MEM(size, R10, -40, 42); |

448 | |

449 | for (i = 2; i < len - 2; i++) |

450 | insn[i] = BPF_STX_XADD(size, R10, R0, -40); |

451 | |

452 | insn[len - 2] = BPF_LDX_MEM(size, R0, R10, -40); |

453 | insn[len - 1] = BPF_EXIT_INSN(); |

454 | |

455 | self->u.ptr.insns = insn; |

456 | self->u.ptr.len = len; |

457 | self->stack_depth = 40; |

458 | |

459 | return 0; |

460 | } |

461 | |

462 | static int bpf_fill_stxw(struct bpf_test *self) |

463 | { |

464 | return __bpf_fill_stxdw(self, BPF_W); |

465 | } |

466 | |

467 | static int bpf_fill_stxdw(struct bpf_test *self) |

468 | { |

469 | return __bpf_fill_stxdw(self, BPF_DW); |

470 | } |

471 | |

472 | static struct bpf_test tests[] = { |

473 | { |

474 | "TAX", |

475 | .u.insns = { |

476 | BPF_STMT(BPF_LD | BPF_IMM, 1), |

477 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

478 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

479 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

480 | BPF_STMT(BPF_ALU | BPF_NEG, 0), /* A == -3 */ |

481 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

482 | BPF_STMT(BPF_LD | BPF_LEN, 0), |

483 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

484 | BPF_STMT(BPF_MISC | BPF_TAX, 0), /* X == len - 3 */ |

485 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 1), |

486 | BPF_STMT(BPF_RET | BPF_A, 0) |

487 | }, |

488 | CLASSIC, |

489 | { 10, 20, 30, 40, 50 }, |

490 | { { 2, 10 }, { 3, 20 }, { 4, 30 } }, |

491 | }, |

492 | { |

493 | "TXA", |

494 | .u.insns = { |

495 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

496 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

497 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

498 | BPF_STMT(BPF_RET | BPF_A, 0) /* A == len * 2 */ |

499 | }, |

500 | CLASSIC, |

501 | { 10, 20, 30, 40, 50 }, |

502 | { { 1, 2 }, { 3, 6 }, { 4, 8 } }, |

503 | }, |

504 | { |

505 | "ADD_SUB_MUL_K", |

506 | .u.insns = { |

507 | BPF_STMT(BPF_LD | BPF_IMM, 1), |

508 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 2), |

509 | BPF_STMT(BPF_LDX | BPF_IMM, 3), |

510 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0), |

511 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 0xffffffff), |

512 | BPF_STMT(BPF_ALU | BPF_MUL | BPF_K, 3), |

513 | BPF_STMT(BPF_RET | BPF_A, 0) |

514 | }, |

515 | CLASSIC | FLAG_NO_DATA, |

516 | { }, |

517 | { { 0, 0xfffffffd } } |

518 | }, |

519 | { |

520 | "DIV_MOD_KX", |

521 | .u.insns = { |

522 | BPF_STMT(BPF_LD | BPF_IMM, 8), |

523 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 2), |

524 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

525 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), |

526 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_X, 0), |

527 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

528 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), |

529 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 0x70000000), |

530 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

531 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), |

532 | BPF_STMT(BPF_ALU | BPF_MOD | BPF_X, 0), |

533 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

534 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), |

535 | BPF_STMT(BPF_ALU | BPF_MOD | BPF_K, 0x70000000), |

536 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

537 | BPF_STMT(BPF_RET | BPF_A, 0) |

538 | }, |

539 | CLASSIC | FLAG_NO_DATA, |

540 | { }, |

541 | { { 0, 0x20000000 } } |

542 | }, |

543 | { |

544 | "AND_OR_LSH_K", |

545 | .u.insns = { |

546 | BPF_STMT(BPF_LD | BPF_IMM, 0xff), |

547 | BPF_STMT(BPF_ALU | BPF_AND | BPF_K, 0xf0), |

548 | BPF_STMT(BPF_ALU | BPF_LSH | BPF_K, 27), |

549 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

550 | BPF_STMT(BPF_LD | BPF_IMM, 0xf), |

551 | BPF_STMT(BPF_ALU | BPF_OR | BPF_K, 0xf0), |

552 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

553 | BPF_STMT(BPF_RET | BPF_A, 0) |

554 | }, |

555 | CLASSIC | FLAG_NO_DATA, |

556 | { }, |

557 | { { 0, 0x800000ff }, { 1, 0x800000ff } }, |

558 | }, |

559 | { |

560 | "LD_IMM_0", |

561 | .u.insns = { |

562 | BPF_STMT(BPF_LD | BPF_IMM, 0), /* ld #0 */ |

563 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0, 1, 0), |

564 | BPF_STMT(BPF_RET | BPF_K, 0), |

565 | BPF_STMT(BPF_RET | BPF_K, 1), |

566 | }, |

567 | CLASSIC, |

568 | { }, |

569 | { { 1, 1 } }, |

570 | }, |

571 | { |

572 | "LD_IND", |

573 | .u.insns = { |

574 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

575 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, MAX_K), |

576 | BPF_STMT(BPF_RET | BPF_K, 1) |

577 | }, |

578 | CLASSIC, |

579 | { }, |

580 | { { 1, 0 }, { 10, 0 }, { 60, 0 } }, |

581 | }, |

582 | { |

583 | "LD_ABS", |

584 | .u.insns = { |

585 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, 1000), |

586 | BPF_STMT(BPF_RET | BPF_K, 1) |

587 | }, |

588 | CLASSIC, |

589 | { }, |

590 | { { 1, 0 }, { 10, 0 }, { 60, 0 } }, |

591 | }, |

592 | { |

593 | "LD_ABS_LL", |

594 | .u.insns = { |

595 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_LL_OFF), |

596 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

597 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_LL_OFF + 1), |

598 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

599 | BPF_STMT(BPF_RET | BPF_A, 0) |

600 | }, |

601 | CLASSIC, |

602 | { 1, 2, 3 }, |

603 | { { 1, 0 }, { 2, 3 } }, |

604 | }, |

605 | { |

606 | "LD_IND_LL", |

607 | .u.insns = { |

608 | BPF_STMT(BPF_LD | BPF_IMM, SKF_LL_OFF - 1), |

609 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

610 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

611 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

612 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 0), |

613 | BPF_STMT(BPF_RET | BPF_A, 0) |

614 | }, |

615 | CLASSIC, |

616 | { 1, 2, 3, 0xff }, |

617 | { { 1, 1 }, { 3, 3 }, { 4, 0xff } }, |

618 | }, |

619 | { |

620 | "LD_ABS_NET", |

621 | .u.insns = { |

622 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_NET_OFF), |

623 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

624 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_NET_OFF + 1), |

625 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

626 | BPF_STMT(BPF_RET | BPF_A, 0) |

627 | }, |

628 | CLASSIC, |

629 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3 }, |

630 | { { 15, 0 }, { 16, 3 } }, |

631 | }, |

632 | { |

633 | "LD_IND_NET", |

634 | .u.insns = { |

635 | BPF_STMT(BPF_LD | BPF_IMM, SKF_NET_OFF - 15), |

636 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

637 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

638 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

639 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 0), |

640 | BPF_STMT(BPF_RET | BPF_A, 0) |

641 | }, |

642 | CLASSIC, |

643 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3 }, |

644 | { { 14, 0 }, { 15, 1 }, { 17, 3 } }, |

645 | }, |

646 | { |

647 | "LD_PKTTYPE", |

648 | .u.insns = { |

649 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

650 | SKF_AD_OFF + SKF_AD_PKTTYPE), |

651 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), |

652 | BPF_STMT(BPF_RET | BPF_K, 1), |

653 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

654 | SKF_AD_OFF + SKF_AD_PKTTYPE), |

655 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), |

656 | BPF_STMT(BPF_RET | BPF_K, 1), |

657 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

658 | SKF_AD_OFF + SKF_AD_PKTTYPE), |

659 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), |

660 | BPF_STMT(BPF_RET | BPF_K, 1), |

661 | BPF_STMT(BPF_RET | BPF_A, 0) |

662 | }, |

663 | CLASSIC, |

664 | { }, |

665 | { { 1, 3 }, { 10, 3 } }, |

666 | }, |

667 | { |

668 | "LD_MARK", |

669 | .u.insns = { |

670 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

671 | SKF_AD_OFF + SKF_AD_MARK), |

672 | BPF_STMT(BPF_RET | BPF_A, 0) |

673 | }, |

674 | CLASSIC, |

675 | { }, |

676 | { { 1, SKB_MARK}, { 10, SKB_MARK} }, |

677 | }, |

678 | { |

679 | "LD_RXHASH", |

680 | .u.insns = { |

681 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

682 | SKF_AD_OFF + SKF_AD_RXHASH), |

683 | BPF_STMT(BPF_RET | BPF_A, 0) |

684 | }, |

685 | CLASSIC, |

686 | { }, |

687 | { { 1, SKB_HASH}, { 10, SKB_HASH} }, |

688 | }, |

689 | { |

690 | "LD_QUEUE", |

691 | .u.insns = { |

692 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

693 | SKF_AD_OFF + SKF_AD_QUEUE), |

694 | BPF_STMT(BPF_RET | BPF_A, 0) |

695 | }, |

696 | CLASSIC, |

697 | { }, |

698 | { { 1, SKB_QUEUE_MAP }, { 10, SKB_QUEUE_MAP } }, |

699 | }, |

700 | { |

701 | "LD_PROTOCOL", |

702 | .u.insns = { |

703 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 1), |

704 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 20, 1, 0), |

705 | BPF_STMT(BPF_RET | BPF_K, 0), |

706 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

707 | SKF_AD_OFF + SKF_AD_PROTOCOL), |

708 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

709 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), |

710 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 30, 1, 0), |

711 | BPF_STMT(BPF_RET | BPF_K, 0), |

712 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

713 | BPF_STMT(BPF_RET | BPF_A, 0) |

714 | }, |

715 | CLASSIC, |

716 | { 10, 20, 30 }, |

717 | { { 10, ETH_P_IP }, { 100, ETH_P_IP } }, |

718 | }, |

719 | { |

720 | "LD_VLAN_TAG", |

721 | .u.insns = { |

722 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

723 | SKF_AD_OFF + SKF_AD_VLAN_TAG), |

724 | BPF_STMT(BPF_RET | BPF_A, 0) |

725 | }, |

726 | CLASSIC, |

727 | { }, |

728 | { |

729 | { 1, SKB_VLAN_TCI }, |

730 | { 10, SKB_VLAN_TCI } |

731 | }, |

732 | }, |

733 | { |

734 | "LD_VLAN_TAG_PRESENT", |

735 | .u.insns = { |

736 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

737 | SKF_AD_OFF + SKF_AD_VLAN_TAG_PRESENT), |

738 | BPF_STMT(BPF_RET | BPF_A, 0) |

739 | }, |

740 | CLASSIC, |

741 | { }, |

742 | { |

743 | { 1, SKB_VLAN_PRESENT }, |

744 | { 10, SKB_VLAN_PRESENT } |

745 | }, |

746 | }, |

747 | { |

748 | "LD_IFINDEX", |

749 | .u.insns = { |

750 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

751 | SKF_AD_OFF + SKF_AD_IFINDEX), |

752 | BPF_STMT(BPF_RET | BPF_A, 0) |

753 | }, |

754 | CLASSIC, |

755 | { }, |

756 | { { 1, SKB_DEV_IFINDEX }, { 10, SKB_DEV_IFINDEX } }, |

757 | }, |

758 | { |

759 | "LD_HATYPE", |

760 | .u.insns = { |

761 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

762 | SKF_AD_OFF + SKF_AD_HATYPE), |

763 | BPF_STMT(BPF_RET | BPF_A, 0) |

764 | }, |

765 | CLASSIC, |

766 | { }, |

767 | { { 1, SKB_DEV_TYPE }, { 10, SKB_DEV_TYPE } }, |

768 | }, |

769 | { |

770 | "LD_CPU", |

771 | .u.insns = { |

772 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

773 | SKF_AD_OFF + SKF_AD_CPU), |

774 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

775 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

776 | SKF_AD_OFF + SKF_AD_CPU), |

777 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0), |

778 | BPF_STMT(BPF_RET | BPF_A, 0) |

779 | }, |

780 | CLASSIC, |

781 | { }, |

782 | { { 1, 0 }, { 10, 0 } }, |

783 | }, |

784 | { |

785 | "LD_NLATTR", |

786 | .u.insns = { |

787 | BPF_STMT(BPF_LDX | BPF_IMM, 2), |

788 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

789 | BPF_STMT(BPF_LDX | BPF_IMM, 3), |

790 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

791 | SKF_AD_OFF + SKF_AD_NLATTR), |

792 | BPF_STMT(BPF_RET | BPF_A, 0) |

793 | }, |

794 | CLASSIC, |

795 | #ifdef __BIG_ENDIAN |

796 | { 0xff, 0xff, 0, 4, 0, 2, 0, 4, 0, 3 }, |

797 | #else |

798 | { 0xff, 0xff, 4, 0, 2, 0, 4, 0, 3, 0 }, |

799 | #endif |

800 | { { 4, 0 }, { 20, 6 } }, |

801 | }, |

802 | { |

803 | "LD_NLATTR_NEST", |

804 | .u.insns = { |

805 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

806 | BPF_STMT(BPF_LDX | BPF_IMM, 3), |

807 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

808 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

809 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

810 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

811 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

812 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

813 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

814 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

815 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

816 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

817 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

818 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

819 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

820 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

821 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

822 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

823 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

824 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

825 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

826 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

827 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

828 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

829 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), |

830 | BPF_STMT(BPF_RET | BPF_A, 0) |

831 | }, |

832 | CLASSIC, |

833 | #ifdef __BIG_ENDIAN |

834 | { 0xff, 0xff, 0, 12, 0, 1, 0, 4, 0, 2, 0, 4, 0, 3 }, |

835 | #else |

836 | { 0xff, 0xff, 12, 0, 1, 0, 4, 0, 2, 0, 4, 0, 3, 0 }, |

837 | #endif |

838 | { { 4, 0 }, { 20, 10 } }, |

839 | }, |

840 | { |

841 | "LD_PAYLOAD_OFF", |

842 | .u.insns = { |

843 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

844 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), |

845 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

846 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), |

847 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

848 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), |

849 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

850 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), |

851 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

852 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), |

853 | BPF_STMT(BPF_RET | BPF_A, 0) |

854 | }, |

855 | CLASSIC, |

856 | /* 00:00:00:00:00:00 > 00:00:00:00:00:00, ethtype IPv4 (0x0800), |

857 | * length 98: 127.0.0.1 > 127.0.0.1: ICMP echo request, |

858 | * id 9737, seq 1, length 64 |

859 | */ |

860 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |

861 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |

862 | 0x08, 0x00, |

863 | 0x45, 0x00, 0x00, 0x54, 0xac, 0x8b, 0x40, 0x00, 0x40, |

864 | 0x01, 0x90, 0x1b, 0x7f, 0x00, 0x00, 0x01 }, |

865 | { { 30, 0 }, { 100, 42 } }, |

866 | }, |

867 | { |

868 | "LD_ANC_XOR", |

869 | .u.insns = { |

870 | BPF_STMT(BPF_LD | BPF_IMM, 10), |

871 | BPF_STMT(BPF_LDX | BPF_IMM, 300), |

872 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

873 | SKF_AD_OFF + SKF_AD_ALU_XOR_X), |

874 | BPF_STMT(BPF_RET | BPF_A, 0) |

875 | }, |

876 | CLASSIC, |

877 | { }, |

878 | { { 4, 10 ^ 300 }, { 20, 10 ^ 300 } }, |

879 | }, |

880 | { |

881 | "SPILL_FILL", |

882 | .u.insns = { |

883 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

884 | BPF_STMT(BPF_LD | BPF_IMM, 2), |

885 | BPF_STMT(BPF_ALU | BPF_RSH, 1), |

886 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), |

887 | BPF_STMT(BPF_ST, 1), /* M1 = 1 ^ len */ |

888 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_K, 0x80000000), |

889 | BPF_STMT(BPF_ST, 2), /* M2 = 1 ^ len ^ 0x80000000 */ |

890 | BPF_STMT(BPF_STX, 15), /* M3 = len */ |

891 | BPF_STMT(BPF_LDX | BPF_MEM, 1), |

892 | BPF_STMT(BPF_LD | BPF_MEM, 2), |

893 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), |

894 | BPF_STMT(BPF_LDX | BPF_MEM, 15), |

895 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), |

896 | BPF_STMT(BPF_RET | BPF_A, 0) |

897 | }, |

898 | CLASSIC, |

899 | { }, |

900 | { { 1, 0x80000001 }, { 2, 0x80000002 }, { 60, 0x80000000 ^ 60 } } |

901 | }, |

902 | { |

903 | "JEQ", |

904 | .u.insns = { |

905 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

906 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), |

907 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_X, 0, 0, 1), |

908 | BPF_STMT(BPF_RET | BPF_K, 1), |

909 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

910 | }, |

911 | CLASSIC, |

912 | { 3, 3, 3, 3, 3 }, |

913 | { { 1, 0 }, { 3, 1 }, { 4, MAX_K } }, |

914 | }, |

915 | { |

916 | "JGT", |

917 | .u.insns = { |

918 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

919 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), |

920 | BPF_JUMP(BPF_JMP | BPF_JGT | BPF_X, 0, 0, 1), |

921 | BPF_STMT(BPF_RET | BPF_K, 1), |

922 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

923 | }, |

924 | CLASSIC, |

925 | { 4, 4, 4, 3, 3 }, |

926 | { { 2, 0 }, { 3, 1 }, { 4, MAX_K } }, |

927 | }, |

928 | { |

929 | "JGE (jt 0), test 1", |

930 | .u.insns = { |

931 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

932 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), |

933 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_X, 0, 0, 1), |

934 | BPF_STMT(BPF_RET | BPF_K, 1), |

935 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

936 | }, |

937 | CLASSIC, |

938 | { 4, 4, 4, 3, 3 }, |

939 | { { 2, 0 }, { 3, 1 }, { 4, 1 } }, |

940 | }, |

941 | { |

942 | "JGE (jt 0), test 2", |

943 | .u.insns = { |

944 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

945 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), |

946 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_X, 0, 0, 1), |

947 | BPF_STMT(BPF_RET | BPF_K, 1), |

948 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

949 | }, |

950 | CLASSIC, |

951 | { 4, 4, 5, 3, 3 }, |

952 | { { 4, 1 }, { 5, 1 }, { 6, MAX_K } }, |

953 | }, |

954 | { |

955 | "JGE", |

956 | .u.insns = { |

957 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

958 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, MAX_K), |

959 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 1, 1, 0), |

960 | BPF_STMT(BPF_RET | BPF_K, 10), |

961 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 2, 1, 0), |

962 | BPF_STMT(BPF_RET | BPF_K, 20), |

963 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 3, 1, 0), |

964 | BPF_STMT(BPF_RET | BPF_K, 30), |

965 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 4, 1, 0), |

966 | BPF_STMT(BPF_RET | BPF_K, 40), |

967 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

968 | }, |

969 | CLASSIC, |

970 | { 1, 2, 3, 4, 5 }, |

971 | { { 1, 20 }, { 3, 40 }, { 5, MAX_K } }, |

972 | }, |

973 | { |

974 | "JSET", |

975 | .u.insns = { |

976 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), |

977 | BPF_JUMP(BPF_JMP | BPF_JA, 1, 1, 1), |

978 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), |

979 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), |

980 | BPF_STMT(BPF_LDX | BPF_LEN, 0), |

981 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

982 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_K, 4), |

983 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

984 | BPF_STMT(BPF_LD | BPF_W | BPF_IND, 0), |

985 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 1, 0, 1), |

986 | BPF_STMT(BPF_RET | BPF_K, 10), |

987 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0x80000000, 0, 1), |

988 | BPF_STMT(BPF_RET | BPF_K, 20), |

989 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), |

990 | BPF_STMT(BPF_RET | BPF_K, 30), |

991 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), |

992 | BPF_STMT(BPF_RET | BPF_K, 30), |

993 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), |

994 | BPF_STMT(BPF_RET | BPF_K, 30), |

995 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), |

996 | BPF_STMT(BPF_RET | BPF_K, 30), |

997 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), |

998 | BPF_STMT(BPF_RET | BPF_K, 30), |

999 | BPF_STMT(BPF_RET | BPF_K, MAX_K) |

1000 | }, |

1001 | CLASSIC, |

1002 | { 0, 0xAA, 0x55, 1 }, |

1003 | { { 4, 10 }, { 5, 20 }, { 6, MAX_K } }, |

1004 | }, |

1005 | { |

1006 | "tcpdump port 22", |

1007 | .u.insns = { |

1008 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 12), |

1009 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x86dd, 0, 8), /* IPv6 */ |

1010 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 20), |

1011 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x84, 2, 0), |

1012 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x6, 1, 0), |

1013 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x11, 0, 17), |

1014 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 54), |

1015 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 14, 0), |

1016 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 56), |

1017 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 12, 13), |

1018 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x0800, 0, 12), /* IPv4 */ |

1019 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 23), |

1020 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x84, 2, 0), |

1021 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x6, 1, 0), |

1022 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x11, 0, 8), |

1023 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 20), |

1024 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0x1fff, 6, 0), |

1025 | BPF_STMT(BPF_LDX | BPF_B | BPF_MSH, 14), |

1026 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, 14), |

1027 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 2, 0), |

1028 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, 16), |

1029 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 0, 1), |

1030 | BPF_STMT(BPF_RET | BPF_K, 0xffff), |

1031 | BPF_STMT(BPF_RET | BPF_K, 0), |

1032 | }, |

1033 | CLASSIC, |

1034 | /* 3c:07:54:43:e5:76 > 10:bf:48:d6:43:d6, ethertype IPv4(0x0800) |

1035 | * length 114: 10.1.1.149.49700 > 10.1.2.10.22: Flags [P.], |

1036 | * seq 1305692979:1305693027, ack 3650467037, win 65535, |

1037 | * options [nop,nop,TS val 2502645400 ecr 3971138], length 48 |

1038 | */ |

1039 | { 0x10, 0xbf, 0x48, 0xd6, 0x43, 0xd6, |

1040 | 0x3c, 0x07, 0x54, 0x43, 0xe5, 0x76, |

1041 | 0x08, 0x00, |

1042 | 0x45, 0x10, 0x00, 0x64, 0x75, 0xb5, |

1043 | 0x40, 0x00, 0x40, 0x06, 0xad, 0x2e, /* IP header */ |

1044 | 0x0a, 0x01, 0x01, 0x95, /* ip src */ |

1045 | 0x0a, 0x01, 0x02, 0x0a, /* ip dst */ |

1046 | 0xc2, 0x24, |

1047 | 0x00, 0x16 /* dst port */ }, |

1048 | { { 10, 0 }, { 30, 0 }, { 100, 65535 } }, |

1049 | }, |

1050 | { |

1051 | "tcpdump complex", |

1052 | .u.insns = { |

1053 | /* tcpdump -nei eth0 'tcp port 22 and (((ip[2:2] - |

1054 | * ((ip[0]&0xf)<<2)) - ((tcp[12]&0xf0)>>2)) != 0) and |

1055 | * (len > 115 or len < 30000000000)' -d |

1056 | */ |

1057 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 12), |

1058 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x86dd, 30, 0), |

1059 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x800, 0, 29), |

1060 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 23), |

1061 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 0x6, 0, 27), |

1062 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 20), |

1063 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0x1fff, 25, 0), |

1064 | BPF_STMT(BPF_LDX | BPF_B | BPF_MSH, 14), |

1065 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, 14), |

1066 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 2, 0), |

1067 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, 16), |

1068 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 22, 0, 20), |

1069 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 16), |

1070 | BPF_STMT(BPF_ST, 1), |

1071 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 14), |

1072 | BPF_STMT(BPF_ALU | BPF_AND | BPF_K, 0xf), |

1073 | BPF_STMT(BPF_ALU | BPF_LSH | BPF_K, 2), |

1074 | BPF_STMT(BPF_MISC | BPF_TAX, 0x5), /* libpcap emits K on TAX */ |

1075 | BPF_STMT(BPF_LD | BPF_MEM, 1), |

1076 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0), |

1077 | BPF_STMT(BPF_ST, 5), |

1078 | BPF_STMT(BPF_LDX | BPF_B | BPF_MSH, 14), |

1079 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 26), |

1080 | BPF_STMT(BPF_ALU | BPF_AND | BPF_K, 0xf0), |

1081 | BPF_STMT(BPF_ALU | BPF_RSH | BPF_K, 2), |

1082 | BPF_STMT(BPF_MISC | BPF_TAX, 0x9), /* libpcap emits K on TAX */ |

1083 | BPF_STMT(BPF_LD | BPF_MEM, 5), |

1084 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_X, 0, 4, 0), |

1085 | BPF_STMT(BPF_LD | BPF_LEN, 0), |

1086 | BPF_JUMP(BPF_JMP | BPF_JGT | BPF_K, 0x73, 1, 0), |

1087 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 0xfc23ac00, 1, 0), |

1088 | BPF_STMT(BPF_RET | BPF_K, 0xffff), |

1089 | BPF_STMT(BPF_RET | BPF_K, 0), |

1090 | }, |

1091 | CLASSIC, |

1092 | { 0x10, 0xbf, 0x48, 0xd6, 0x43, 0xd6, |

1093 | 0x3c, 0x07, 0x54, 0x43, 0xe5, 0x76, |

1094 | 0x08, 0x00, |

1095 | 0x45, 0x10, 0x00, 0x64, 0x75, 0xb5, |

1096 | 0x40, 0x00, 0x40, 0x06, 0xad, 0x2e, /* IP header */ |

1097 | 0x0a, 0x01, 0x01, 0x95, /* ip src */ |

1098 | 0x0a, 0x01, 0x02, 0x0a, /* ip dst */ |

1099 | 0xc2, 0x24, |

1100 | 0x00, 0x16 /* dst port */ }, |

1101 | { { 10, 0 }, { 30, 0 }, { 100, 65535 } }, |

1102 | }, |

1103 | { |

1104 | "RET_A", |

1105 | .u.insns = { |

1106 | /* check that unitialized X and A contain zeros */ |

1107 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

1108 | BPF_STMT(BPF_RET | BPF_A, 0) |

1109 | }, |

1110 | CLASSIC, |

1111 | { }, |

1112 | { {1, 0}, {2, 0} }, |

1113 | }, |

1114 | { |

1115 | "INT: ADD trivial", |

1116 | .u.insns_int = { |

1117 | BPF_ALU64_IMM(BPF_MOV, R1, 1), |

1118 | BPF_ALU64_IMM(BPF_ADD, R1, 2), |

1119 | BPF_ALU64_IMM(BPF_MOV, R2, 3), |

1120 | BPF_ALU64_REG(BPF_SUB, R1, R2), |

1121 | BPF_ALU64_IMM(BPF_ADD, R1, -1), |

1122 | BPF_ALU64_IMM(BPF_MUL, R1, 3), |

1123 | BPF_ALU64_REG(BPF_MOV, R0, R1), |

1124 | BPF_EXIT_INSN(), |

1125 | }, |

1126 | INTERNAL, |

1127 | { }, |

1128 | { { 0, 0xfffffffd } } |

1129 | }, |

1130 | { |

1131 | "INT: MUL_X", |

1132 | .u.insns_int = { |

1133 | BPF_ALU64_IMM(BPF_MOV, R0, -1), |

1134 | BPF_ALU64_IMM(BPF_MOV, R1, -1), |

1135 | BPF_ALU64_IMM(BPF_MOV, R2, 3), |

1136 | BPF_ALU64_REG(BPF_MUL, R1, R2), |

1137 | BPF_JMP_IMM(BPF_JEQ, R1, 0xfffffffd, 1), |

1138 | BPF_EXIT_INSN(), |

1139 | BPF_ALU64_IMM(BPF_MOV, R0, 1), |

1140 | BPF_EXIT_INSN(), |

1141 | }, |

1142 | INTERNAL, |

1143 | { }, |

1144 | { { 0, 1 } } |

1145 | }, |

1146 | { |

1147 | "INT: MUL_X2", |

1148 | .u.insns_int = { |

1149 | BPF_ALU32_IMM(BPF_MOV, R0, -1), |

1150 | BPF_ALU32_IMM(BPF_MOV, R1, -1), |

1151 | BPF_ALU32_IMM(BPF_MOV, R2, 3), |

1152 | BPF_ALU64_REG(BPF_MUL, R1, R2), |

1153 | BPF_ALU64_IMM(BPF_RSH, R1, 8), |

1154 | BPF_JMP_IMM(BPF_JEQ, R1, 0x2ffffff, 1), |

1155 | BPF_EXIT_INSN(), |

1156 | BPF_ALU32_IMM(BPF_MOV, R0, 1), |

1157 | BPF_EXIT_INSN(), |

1158 | }, |

1159 | INTERNAL, |

1160 | { }, |

1161 | { { 0, 1 } } |

1162 | }, |

1163 | { |

1164 | "INT: MUL32_X", |

1165 | .u.insns_int = { |

1166 | BPF_ALU32_IMM(BPF_MOV, R0, -1), |

1167 | BPF_ALU64_IMM(BPF_MOV, R1, -1), |

1168 | BPF_ALU32_IMM(BPF_MOV, R2, 3), |

1169 | BPF_ALU32_REG(BPF_MUL, R1, R2), |

1170 | BPF_ALU64_IMM(BPF_RSH, R1, 8), |

1171 | BPF_JMP_IMM(BPF_JEQ, R1, 0xffffff, 1), |

1172 | BPF_EXIT_INSN(), |

1173 | BPF_ALU32_IMM(BPF_MOV, R0, 1), |

1174 | BPF_EXIT_INSN(), |

1175 | }, |

1176 | INTERNAL, |

1177 | { }, |

1178 | { { 0, 1 } } |

1179 | }, |

1180 | { |

1181 | /* Have to test all register combinations, since |

1182 | * JITing of different registers will produce |

1183 | * different asm code. |

1184 | */ |

1185 | "INT: ADD 64-bit", |

1186 | .u.insns_int = { |

1187 | BPF_ALU64_IMM(BPF_MOV, R0, 0), |

1188 | BPF_ALU64_IMM(BPF_MOV, R1, 1), |

1189 | BPF_ALU64_IMM(BPF_MOV, R2, 2), |

1190 | BPF_ALU64_IMM(BPF_MOV, R3, 3), |

1191 | BPF_ALU64_IMM(BPF_MOV, R4, 4), |

1192 | BPF_ALU64_IMM(BPF_MOV, R5, 5), |

1193 | BPF_ALU64_IMM(BPF_MOV, R6, 6), |

1194 | BPF_ALU64_IMM(BPF_MOV, R7, 7), |

1195 | BPF_ALU64_IMM(BPF_MOV, R8, 8), |

1196 | BPF_ALU64_IMM(BPF_MOV, R9, 9), |

1197 | BPF_ALU64_IMM(BPF_ADD, R0, 20), |

1198 | BPF_ALU64_IMM(BPF_ADD, R1, 20), |

1199 | BPF_ALU64_IMM(BPF_ADD, R2, 20), |

1200 | BPF_ALU64_IMM(BPF_ADD, R3, 20), |

1201 | BPF_ALU64_IMM(BPF_ADD, R4, 20), |

1202 | BPF_ALU64_IMM(BPF_ADD, R5, 20), |

1203 | BPF_ALU64_IMM(BPF_ADD, R6, 20), |

1204 | BPF_ALU64_IMM(BPF_ADD, R7, 20), |

1205 | BPF_ALU64_IMM(BPF_ADD, R8, 20), |

1206 | BPF_ALU64_IMM(BPF_ADD, R9, 20), |

1207 | BPF_ALU64_IMM(BPF_SUB, R0, 10), |

1208 | BPF_ALU64_IMM(BPF_SUB, R1, 10), |

1209 | BPF_ALU64_IMM(BPF_SUB, R2, 10), |

1210 | BPF_ALU64_IMM(BPF_SUB, R3, 10), |

1211 | BPF_ALU64_IMM(BPF_SUB, R4, 10), |

1212 | BPF_ALU64_IMM(BPF_SUB, R5, 10), |

1213 | BPF_ALU64_IMM(BPF_SUB, R6, 10), |

1214 | BPF_ALU64_IMM(BPF_SUB, R7, 10), |

1215 | BPF_ALU64_IMM(BPF_SUB, R8, 10), |

1216 | BPF_ALU64_IMM(BPF_SUB, R9, 10), |

1217 | BPF_ALU64_REG(BPF_ADD, R0, R0), |

1218 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

1219 | BPF_ALU64_REG(BPF_ADD, R0, R2), |

1220 | BPF_ALU64_REG(BPF_ADD, R0, R3), |

1221 | BPF_ALU64_REG(BPF_ADD, R0, R4), |

1222 | BPF_ALU64_REG(BPF_ADD, R0, R5), |

1223 | BPF_ALU64_REG(BPF_ADD, R0, R6), |

1224 | BPF_ALU64_REG(BPF_ADD, R0, R7), |

1225 | BPF_ALU64_REG(BPF_ADD, R0, R8), |

1226 | BPF_ALU64_REG(BPF_ADD, R0, R9), /* R0 == 155 */ |

1227 | BPF_JMP_IMM(BPF_JEQ, R0, 155, 1), |

1228 | BPF_EXIT_INSN(), |

1229 | BPF_ALU64_REG(BPF_ADD, R1, R0), |

1230 | BPF_ALU64_REG(BPF_ADD, R1, R1), |

1231 | BPF_ALU64_REG(BPF_ADD, R1, R2), |

1232 | BPF_ALU64_REG(BPF_ADD, R1, R3), |

1233 | BPF_ALU64_REG(BPF_ADD, R1, R4), |

1234 | BPF_ALU64_REG(BPF_ADD, R1, R5), |

1235 | BPF_ALU64_REG(BPF_ADD, R1, R6), |

1236 | BPF_ALU64_REG(BPF_ADD, R1, R7), |

1237 | BPF_ALU64_REG(BPF_ADD, R1, R8), |

1238 | BPF_ALU64_REG(BPF_ADD, R1, R9), /* R1 == 456 */ |

1239 | BPF_JMP_IMM(BPF_JEQ, R1, 456, 1), |

1240 | BPF_EXIT_INSN(), |

1241 | BPF_ALU64_REG(BPF_ADD, R2, R0), |

1242 | BPF_ALU64_REG(BPF_ADD, R2, R1), |

1243 | BPF_ALU64_REG(BPF_ADD, R2, R2), |

1244 | BPF_ALU64_REG(BPF_ADD, R2, R3), |

1245 | BPF_ALU64_REG(BPF_ADD, R2, R4), |

1246 | BPF_ALU64_REG(BPF_ADD, R2, R5), |

1247 | BPF_ALU64_REG(BPF_ADD, R2, R6), |

1248 | BPF_ALU64_REG(BPF_ADD, R2, R7), |

1249 | BPF_ALU64_REG(BPF_ADD, R2, R8), |

1250 | BPF_ALU64_REG(BPF_ADD, R2, R9), /* R2 == 1358 */ |

1251 | BPF_JMP_IMM(BPF_JEQ, R2, 1358, 1), |

1252 | BPF_EXIT_INSN(), |

1253 | BPF_ALU64_REG(BPF_ADD, R3, R0), |

1254 | BPF_ALU64_REG(BPF_ADD, R3, R1), |

1255 | BPF_ALU64_REG(BPF_ADD, R3, R2), |

1256 | BPF_ALU64_REG(BPF_ADD, R3, R3), |

1257 | BPF_ALU64_REG(BPF_ADD, R3, R4), |

1258 | BPF_ALU64_REG(BPF_ADD, R3, R5), |

1259 | BPF_ALU64_REG(BPF_ADD, R3, R6), |

1260 | BPF_ALU64_REG(BPF_ADD, R3, R7), |

1261 | BPF_ALU64_REG(BPF_ADD, R3, R8), |

1262 | BPF_ALU64_REG(BPF_ADD, R3, R9), /* R3 == 4063 */ |

1263 | BPF_JMP_IMM(BPF_JEQ, R3, 4063, 1), |

1264 | BPF_EXIT_INSN(), |

1265 | BPF_ALU64_REG(BPF_ADD, R4, R0), |

1266 | BPF_ALU64_REG(BPF_ADD, R4, R1), |

1267 | BPF_ALU64_REG(BPF_ADD, R4, R2), |

1268 | BPF_ALU64_REG(BPF_ADD, R4, R3), |

1269 | BPF_ALU64_REG(BPF_ADD, R4, R4), |

1270 | BPF_ALU64_REG(BPF_ADD, R4, R5), |

1271 | BPF_ALU64_REG(BPF_ADD, R4, R6), |

1272 | BPF_ALU64_REG(BPF_ADD, R4, R7), |

1273 | BPF_ALU64_REG(BPF_ADD, R4, R8), |

1274 | BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */ |

1275 | BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1), |

1276 | BPF_EXIT_INSN(), |

1277 | BPF_ALU64_REG(BPF_ADD, R5, R0), |

1278 | BPF_ALU64_REG(BPF_ADD, R5, R1), |

1279 | BPF_ALU64_REG(BPF_ADD, R5, R2), |

1280 | BPF_ALU64_REG(BPF_ADD, R5, R3), |

1281 | BPF_ALU64_REG(BPF_ADD, R5, R4), |

1282 | BPF_ALU64_REG(BPF_ADD, R5, R5), |

1283 | BPF_ALU64_REG(BPF_ADD, R5, R6), |

1284 | BPF_ALU64_REG(BPF_ADD, R5, R7), |

1285 | BPF_ALU64_REG(BPF_ADD, R5, R8), |

1286 | BPF_ALU64_REG(BPF_ADD, R5, R9), /* R5 == 36518 */ |

1287 | BPF_JMP_IMM(BPF_JEQ, R5, 36518, 1), |

1288 | BPF_EXIT_INSN(), |

1289 | BPF_ALU64_REG(BPF_ADD, R6, R0), |

1290 | BPF_ALU64_REG(BPF_ADD, R6, R1), |

1291 | BPF_ALU64_REG(BPF_ADD, R6, R2), |

1292 | BPF_ALU64_REG(BPF_ADD, R6, R3), |

1293 | BPF_ALU64_REG(BPF_ADD, R6, R4), |

1294 | BPF_ALU64_REG(BPF_ADD, R6, R5), |

1295 | BPF_ALU64_REG(BPF_ADD, R6, R6), |

1296 | BPF_ALU64_REG(BPF_ADD, R6, R7), |

1297 | BPF_ALU64_REG(BPF_ADD, R6, R8), |

1298 | BPF_ALU64_REG(BPF_ADD, R6, R9), /* R6 == 109540 */ |

1299 | BPF_JMP_IMM(BPF_JEQ, R6, 109540, 1), |

1300 | BPF_EXIT_INSN(), |

1301 | BPF_ALU64_REG(BPF_ADD, R7, R0), |

1302 | BPF_ALU64_REG(BPF_ADD, R7, R1), |

1303 | BPF_ALU64_REG(BPF_ADD, R7, R2), |

1304 | BPF_ALU64_REG(BPF_ADD, R7, R3), |

1305 | BPF_ALU64_REG(BPF_ADD, R7, R4), |

1306 | BPF_ALU64_REG(BPF_ADD, R7, R5), |

1307 | BPF_ALU64_REG(BPF_ADD, R7, R6), |

1308 | BPF_ALU64_REG(BPF_ADD, R7, R7), |

1309 | BPF_ALU64_REG(BPF_ADD, R7, R8), |

1310 | BPF_ALU64_REG(BPF_ADD, R7, R9), /* R7 == 328605 */ |

1311 | BPF_JMP_IMM(BPF_JEQ, R7, 328605, 1), |

1312 | BPF_EXIT_INSN(), |

1313 | BPF_ALU64_REG(BPF_ADD, R8, R0), |

1314 | BPF_ALU64_REG(BPF_ADD, R8, R1), |

1315 | BPF_ALU64_REG(BPF_ADD, R8, R2), |

1316 | BPF_ALU64_REG(BPF_ADD, R8, R3), |

1317 | BPF_ALU64_REG(BPF_ADD, R8, R4), |

1318 | BPF_ALU64_REG(BPF_ADD, R8, R5), |

1319 | BPF_ALU64_REG(BPF_ADD, R8, R6), |

1320 | BPF_ALU64_REG(BPF_ADD, R8, R7), |

1321 | BPF_ALU64_REG(BPF_ADD, R8, R8), |

1322 | BPF_ALU64_REG(BPF_ADD, R8, R9), /* R8 == 985799 */ |

1323 | BPF_JMP_IMM(BPF_JEQ, R8, 985799, 1), |

1324 | BPF_EXIT_INSN(), |

1325 | BPF_ALU64_REG(BPF_ADD, R9, R0), |

1326 | BPF_ALU64_REG(BPF_ADD, R9, R1), |

1327 | BPF_ALU64_REG(BPF_ADD, R9, R2), |

1328 | BPF_ALU64_REG(BPF_ADD, R9, R3), |

1329 | BPF_ALU64_REG(BPF_ADD, R9, R4), |

1330 | BPF_ALU64_REG(BPF_ADD, R9, R5), |

1331 | BPF_ALU64_REG(BPF_ADD, R9, R6), |

1332 | BPF_ALU64_REG(BPF_ADD, R9, R7), |

1333 | BPF_ALU64_REG(BPF_ADD, R9, R8), |

1334 | BPF_ALU64_REG(BPF_ADD, R9, R9), /* R9 == 2957380 */ |

1335 | BPF_ALU64_REG(BPF_MOV, R0, R9), |

1336 | BPF_EXIT_INSN(), |

1337 | }, |

1338 | INTERNAL, |

1339 | { }, |

1340 | { { 0, 2957380 } } |

1341 | }, |

1342 | { |

1343 | "INT: ADD 32-bit", |

1344 | .u.insns_int = { |

1345 | BPF_ALU32_IMM(BPF_MOV, R0, 20), |

1346 | BPF_ALU32_IMM(BPF_MOV, R1, 1), |

1347 | BPF_ALU32_IMM(BPF_MOV, R2, 2), |

1348 | BPF_ALU32_IMM(BPF_MOV, R3, 3), |

1349 | BPF_ALU32_IMM(BPF_MOV, R4, 4), |

1350 | BPF_ALU32_IMM(BPF_MOV, R5, 5), |

1351 | BPF_ALU32_IMM(BPF_MOV, R6, 6), |

1352 | BPF_ALU32_IMM(BPF_MOV, R7, 7), |

1353 | BPF_ALU32_IMM(BPF_MOV, R8, 8), |

1354 | BPF_ALU32_IMM(BPF_MOV, R9, 9), |

1355 | BPF_ALU64_IMM(BPF_ADD, R1, 10), |

1356 | BPF_ALU64_IMM(BPF_ADD, R2, 10), |

1357 | BPF_ALU64_IMM(BPF_ADD, R3, 10), |

1358 | BPF_ALU64_IMM(BPF_ADD, R4, 10), |

1359 | BPF_ALU64_IMM(BPF_ADD, R5, 10), |

1360 | BPF_ALU64_IMM(BPF_ADD, R6, 10), |

1361 | BPF_ALU64_IMM(BPF_ADD, R7, 10), |

1362 | BPF_ALU64_IMM(BPF_ADD, R8, 10), |

1363 | BPF_ALU64_IMM(BPF_ADD, R9, 10), |

1364 | BPF_ALU32_REG(BPF_ADD, R0, R1), |

1365 | BPF_ALU32_REG(BPF_ADD, R0, R2), |

1366 | BPF_ALU32_REG(BPF_ADD, R0, R3), |

1367 | BPF_ALU32_REG(BPF_ADD, R0, R4), |

1368 | BPF_ALU32_REG(BPF_ADD, R0, R5), |

1369 | BPF_ALU32_REG(BPF_ADD, R0, R6), |

1370 | BPF_ALU32_REG(BPF_ADD, R0, R7), |

1371 | BPF_ALU32_REG(BPF_ADD, R0, R8), |

1372 | BPF_ALU32_REG(BPF_ADD, R0, R9), /* R0 == 155 */ |

1373 | BPF_JMP_IMM(BPF_JEQ, R0, 155, 1), |

1374 | BPF_EXIT_INSN(), |

1375 | BPF_ALU32_REG(BPF_ADD, R1, R0), |

1376 | BPF_ALU32_REG(BPF_ADD, R1, R1), |

1377 | BPF_ALU32_REG(BPF_ADD, R1, R2), |

1378 | BPF_ALU32_REG(BPF_ADD, R1, R3), |

1379 | BPF_ALU32_REG(BPF_ADD, R1, R4), |

1380 | BPF_ALU32_REG(BPF_ADD, R1, R5), |

1381 | BPF_ALU32_REG(BPF_ADD, R1, R6), |

1382 | BPF_ALU32_REG(BPF_ADD, R1, R7), |

1383 | BPF_ALU32_REG(BPF_ADD, R1, R8), |

1384 | BPF_ALU32_REG(BPF_ADD, R1, R9), /* R1 == 456 */ |

1385 | BPF_JMP_IMM(BPF_JEQ, R1, 456, 1), |

1386 | BPF_EXIT_INSN(), |

1387 | BPF_ALU32_REG(BPF_ADD, R2, R0), |

1388 | BPF_ALU32_REG(BPF_ADD, R2, R1), |

1389 | BPF_ALU32_REG(BPF_ADD, R2, R2), |

1390 | BPF_ALU32_REG(BPF_ADD, R2, R3), |

1391 | BPF_ALU32_REG(BPF_ADD, R2, R4), |

1392 | BPF_ALU32_REG(BPF_ADD, R2, R5), |

1393 | BPF_ALU32_REG(BPF_ADD, R2, R6), |

1394 | BPF_ALU32_REG(BPF_ADD, R2, R7), |

1395 | BPF_ALU32_REG(BPF_ADD, R2, R8), |

1396 | BPF_ALU32_REG(BPF_ADD, R2, R9), /* R2 == 1358 */ |

1397 | BPF_JMP_IMM(BPF_JEQ, R2, 1358, 1), |

1398 | BPF_EXIT_INSN(), |

1399 | BPF_ALU32_REG(BPF_ADD, R3, R0), |

1400 | BPF_ALU32_REG(BPF_ADD, R3, R1), |

1401 | BPF_ALU32_REG(BPF_ADD, R3, R2), |

1402 | BPF_ALU32_REG(BPF_ADD, R3, R3), |

1403 | BPF_ALU32_REG(BPF_ADD, R3, R4), |

1404 | BPF_ALU32_REG(BPF_ADD, R3, R5), |

1405 | BPF_ALU32_REG(BPF_ADD, R3, R6), |

1406 | BPF_ALU32_REG(BPF_ADD, R3, R7), |

1407 | BPF_ALU32_REG(BPF_ADD, R3, R8), |

1408 | BPF_ALU32_REG(BPF_ADD, R3, R9), /* R3 == 4063 */ |

1409 | BPF_JMP_IMM(BPF_JEQ, R3, 4063, 1), |

1410 | BPF_EXIT_INSN(), |

1411 | BPF_ALU32_REG(BPF_ADD, R4, R0), |

1412 | BPF_ALU32_REG(BPF_ADD, R4, R1), |

1413 | BPF_ALU32_REG(BPF_ADD, R4, R2), |

1414 | BPF_ALU32_REG(BPF_ADD, R4, R3), |

1415 | BPF_ALU32_REG(BPF_ADD, R4, R4), |

1416 | BPF_ALU32_REG(BPF_ADD, R4, R5), |

1417 | BPF_ALU32_REG(BPF_ADD, R4, R6), |

1418 | BPF_ALU32_REG(BPF_ADD, R4, R7), |

1419 | BPF_ALU32_REG(BPF_ADD, R4, R8), |

1420 | BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */ |

1421 | BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1), |

1422 | BPF_EXIT_INSN(), |

1423 | BPF_ALU32_REG(BPF_ADD, R5, R0), |

1424 | BPF_ALU32_REG(BPF_ADD, R5, R1), |

1425 | BPF_ALU32_REG(BPF_ADD, R5, R2), |

1426 | BPF_ALU32_REG(BPF_ADD, R5, R3), |

1427 | BPF_ALU32_REG(BPF_ADD, R5, R4), |

1428 | BPF_ALU32_REG(BPF_ADD, R5, R5), |

1429 | BPF_ALU32_REG(BPF_ADD, R5, R6), |

1430 | BPF_ALU32_REG(BPF_ADD, R5, R7), |

1431 | BPF_ALU32_REG(BPF_ADD, R5, R8), |

1432 | BPF_ALU32_REG(BPF_ADD, R5, R9), /* R5 == 36518 */ |

1433 | BPF_JMP_IMM(BPF_JEQ, R5, 36518, 1), |

1434 | BPF_EXIT_INSN(), |

1435 | BPF_ALU32_REG(BPF_ADD, R6, R0), |

1436 | BPF_ALU32_REG(BPF_ADD, R6, R1), |

1437 | BPF_ALU32_REG(BPF_ADD, R6, R2), |

1438 | BPF_ALU32_REG(BPF_ADD, R6, R3), |

1439 | BPF_ALU32_REG(BPF_ADD, R6, R4), |

1440 | BPF_ALU32_REG(BPF_ADD, R6, R5), |

1441 | BPF_ALU32_REG(BPF_ADD, R6, R6), |

1442 | BPF_ALU32_REG(BPF_ADD, R6, R7), |

1443 | BPF_ALU32_REG(BPF_ADD, R6, R8), |

1444 | BPF_ALU32_REG(BPF_ADD, R6, R9), /* R6 == 109540 */ |

1445 | BPF_JMP_IMM(BPF_JEQ, R6, 109540, 1), |

1446 | BPF_EXIT_INSN(), |

1447 | BPF_ALU32_REG(BPF_ADD, R7, R0), |

1448 | BPF_ALU32_REG(BPF_ADD, R7, R1), |

1449 | BPF_ALU32_REG(BPF_ADD, R7, R2), |

1450 | BPF_ALU32_REG(BPF_ADD, R7, R3), |

1451 | BPF_ALU32_REG(BPF_ADD, R7, R4), |

1452 | BPF_ALU32_REG(BPF_ADD, R7, R5), |

1453 | BPF_ALU32_REG(BPF_ADD, R7, R6), |

1454 | BPF_ALU32_REG(BPF_ADD, R7, R7), |

1455 | BPF_ALU32_REG(BPF_ADD, R7, R8), |

1456 | BPF_ALU32_REG(BPF_ADD, R7, R9), /* R7 == 328605 */ |

1457 | BPF_JMP_IMM(BPF_JEQ, R7, 328605, 1), |

1458 | BPF_EXIT_INSN(), |

1459 | BPF_ALU32_REG(BPF_ADD, R8, R0), |

1460 | BPF_ALU32_REG(BPF_ADD, R8, R1), |

1461 | BPF_ALU32_REG(BPF_ADD, R8, R2), |

1462 | BPF_ALU32_REG(BPF_ADD, R8, R3), |

1463 | BPF_ALU32_REG(BPF_ADD, R8, R4), |

1464 | BPF_ALU32_REG(BPF_ADD, R8, R5), |

1465 | BPF_ALU32_REG(BPF_ADD, R8, R6), |

1466 | BPF_ALU32_REG(BPF_ADD, R8, R7), |

1467 | BPF_ALU32_REG(BPF_ADD, R8, R8), |

1468 | BPF_ALU32_REG(BPF_ADD, R8, R9), /* R8 == 985799 */ |

1469 | BPF_JMP_IMM(BPF_JEQ, R8, 985799, 1), |

1470 | BPF_EXIT_INSN(), |

1471 | BPF_ALU32_REG(BPF_ADD, R9, R0), |

1472 | BPF_ALU32_REG(BPF_ADD, R9, R1), |

1473 | BPF_ALU32_REG(BPF_ADD, R9, R2), |

1474 | BPF_ALU32_REG(BPF_ADD, R9, R3), |

1475 | BPF_ALU32_REG(BPF_ADD, R9, R4), |

1476 | BPF_ALU32_REG(BPF_ADD, R9, R5), |

1477 | BPF_ALU32_REG(BPF_ADD, R9, R6), |

1478 | BPF_ALU32_REG(BPF_ADD, R9, R7), |

1479 | BPF_ALU32_REG(BPF_ADD, R9, R8), |

1480 | BPF_ALU32_REG(BPF_ADD, R9, R9), /* R9 == 2957380 */ |

1481 | BPF_ALU32_REG(BPF_MOV, R0, R9), |

1482 | BPF_EXIT_INSN(), |

1483 | }, |

1484 | INTERNAL, |

1485 | { }, |

1486 | { { 0, 2957380 } } |

1487 | }, |

1488 | { /* Mainly checking JIT here. */ |

1489 | "INT: SUB", |

1490 | .u.insns_int = { |

1491 | BPF_ALU64_IMM(BPF_MOV, R0, 0), |

1492 | BPF_ALU64_IMM(BPF_MOV, R1, 1), |

1493 | BPF_ALU64_IMM(BPF_MOV, R2, 2), |

1494 | BPF_ALU64_IMM(BPF_MOV, R3, 3), |

1495 | BPF_ALU64_IMM(BPF_MOV, R4, 4), |

1496 | BPF_ALU64_IMM(BPF_MOV, R5, 5), |

1497 | BPF_ALU64_IMM(BPF_MOV, R6, 6), |

1498 | BPF_ALU64_IMM(BPF_MOV, R7, 7), |

1499 | BPF_ALU64_IMM(BPF_MOV, R8, 8), |

1500 | BPF_ALU64_IMM(BPF_MOV, R9, 9), |

1501 | BPF_ALU64_REG(BPF_SUB, R0, R0), |

1502 | BPF_ALU64_REG(BPF_SUB, R0, R1), |

1503 | BPF_ALU64_REG(BPF_SUB, R0, R2), |

1504 | BPF_ALU64_REG(BPF_SUB, R0, R3), |

1505 | BPF_ALU64_REG(BPF_SUB, R0, R4), |

1506 | BPF_ALU64_REG(BPF_SUB, R0, R5), |

1507 | BPF_ALU64_REG(BPF_SUB, R0, R6), |

1508 | BPF_ALU64_REG(BPF_SUB, R0, R7), |

1509 | BPF_ALU64_REG(BPF_SUB, R0, R8), |

1510 | BPF_ALU64_REG(BPF_SUB, R0, R9), |

1511 | BPF_ALU64_IMM(BPF_SUB, R0, 10), |

1512 | BPF_JMP_IMM(BPF_JEQ, R0, -55, 1), |

1513 | BPF_EXIT_INSN(), |

1514 | BPF_ALU64_REG(BPF_SUB, R1, R0), |

1515 | BPF_ALU64_REG(BPF_SUB, R1, R2), |

1516 | BPF_ALU64_REG(BPF_SUB, R1, R3), |

1517 | BPF_ALU64_REG(BPF_SUB, R1, R4), |

1518 | BPF_ALU64_REG(BPF_SUB, R1, R5), |

1519 | BPF_ALU64_REG(BPF_SUB, R1, R6), |

1520 | BPF_ALU64_REG(BPF_SUB, R1, R7), |

1521 | BPF_ALU64_REG(BPF_SUB, R1, R8), |

1522 | BPF_ALU64_REG(BPF_SUB, R1, R9), |

1523 | BPF_ALU64_IMM(BPF_SUB, R1, 10), |

1524 | BPF_ALU64_REG(BPF_SUB, R2, R0), |

1525 | BPF_ALU64_REG(BPF_SUB, R2, R1), |

1526 | BPF_ALU64_REG(BPF_SUB, R2, R3), |

1527 | BPF_ALU64_REG(BPF_SUB, R2, R4), |

1528 | BPF_ALU64_REG(BPF_SUB, R2, R5), |

1529 | BPF_ALU64_REG(BPF_SUB, R2, R6), |

1530 | BPF_ALU64_REG(BPF_SUB, R2, R7), |

1531 | BPF_ALU64_REG(BPF_SUB, R2, R8), |

1532 | BPF_ALU64_REG(BPF_SUB, R2, R9), |

1533 | BPF_ALU64_IMM(BPF_SUB, R2, 10), |

1534 | BPF_ALU64_REG(BPF_SUB, R3, R0), |

1535 | BPF_ALU64_REG(BPF_SUB, R3, R1), |

1536 | BPF_ALU64_REG(BPF_SUB, R3, R2), |

1537 | BPF_ALU64_REG(BPF_SUB, R3, R4), |

1538 | BPF_ALU64_REG(BPF_SUB, R3, R5), |

1539 | BPF_ALU64_REG(BPF_SUB, R3, R6), |

1540 | BPF_ALU64_REG(BPF_SUB, R3, R7), |

1541 | BPF_ALU64_REG(BPF_SUB, R3, R8), |

1542 | BPF_ALU64_REG(BPF_SUB, R3, R9), |

1543 | BPF_ALU64_IMM(BPF_SUB, R3, 10), |

1544 | BPF_ALU64_REG(BPF_SUB, R4, R0), |

1545 | BPF_ALU64_REG(BPF_SUB, R4, R1), |

1546 | BPF_ALU64_REG(BPF_SUB, R4, R2), |

1547 | BPF_ALU64_REG(BPF_SUB, R4, R3), |

1548 | BPF_ALU64_REG(BPF_SUB, R4, R5), |

1549 | BPF_ALU64_REG(BPF_SUB, R4, R6), |

1550 | BPF_ALU64_REG(BPF_SUB, R4, R7), |

1551 | BPF_ALU64_REG(BPF_SUB, R4, R8), |

1552 | BPF_ALU64_REG(BPF_SUB, R4, R9), |

1553 | BPF_ALU64_IMM(BPF_SUB, R4, 10), |

1554 | BPF_ALU64_REG(BPF_SUB, R5, R0), |

1555 | BPF_ALU64_REG(BPF_SUB, R5, R1), |

1556 | BPF_ALU64_REG(BPF_SUB, R5, R2), |

1557 | BPF_ALU64_REG(BPF_SUB, R5, R3), |

1558 | BPF_ALU64_REG(BPF_SUB, R5, R4), |

1559 | BPF_ALU64_REG(BPF_SUB, R5, R6), |

1560 | BPF_ALU64_REG(BPF_SUB, R5, R7), |

1561 | BPF_ALU64_REG(BPF_SUB, R5, R8), |

1562 | BPF_ALU64_REG(BPF_SUB, R5, R9), |

1563 | BPF_ALU64_IMM(BPF_SUB, R5, 10), |

1564 | BPF_ALU64_REG(BPF_SUB, R6, R0), |

1565 | BPF_ALU64_REG(BPF_SUB, R6, R1), |

1566 | BPF_ALU64_REG(BPF_SUB, R6, R2), |

1567 | BPF_ALU64_REG(BPF_SUB, R6, R3), |

1568 | BPF_ALU64_REG(BPF_SUB, R6, R4), |

1569 | BPF_ALU64_REG(BPF_SUB, R6, R5), |

1570 | BPF_ALU64_REG(BPF_SUB, R6, R7), |

1571 | BPF_ALU64_REG(BPF_SUB, R6, R8), |

1572 | BPF_ALU64_REG(BPF_SUB, R6, R9), |

1573 | BPF_ALU64_IMM(BPF_SUB, R6, 10), |

1574 | BPF_ALU64_REG(BPF_SUB, R7, R0), |

1575 | BPF_ALU64_REG(BPF_SUB, R7, R1), |

1576 | BPF_ALU64_REG(BPF_SUB, R7, R2), |

1577 | BPF_ALU64_REG(BPF_SUB, R7, R3), |

1578 | BPF_ALU64_REG(BPF_SUB, R7, R4), |

1579 | BPF_ALU64_REG(BPF_SUB, R7, R5), |

1580 | BPF_ALU64_REG(BPF_SUB, R7, R6), |

1581 | BPF_ALU64_REG(BPF_SUB, R7, R8), |

1582 | BPF_ALU64_REG(BPF_SUB, R7, R9), |

1583 | BPF_ALU64_IMM(BPF_SUB, R7, 10), |

1584 | BPF_ALU64_REG(BPF_SUB, R8, R0), |

1585 | BPF_ALU64_REG(BPF_SUB, R8, R1), |

1586 | BPF_ALU64_REG(BPF_SUB, R8, R2), |

1587 | BPF_ALU64_REG(BPF_SUB, R8, R3), |

1588 | BPF_ALU64_REG(BPF_SUB, R8, R4), |

1589 | BPF_ALU64_REG(BPF_SUB, R8, R5), |

1590 | BPF_ALU64_REG(BPF_SUB, R8, R6), |

1591 | BPF_ALU64_REG(BPF_SUB, R8, R7), |

1592 | BPF_ALU64_REG(BPF_SUB, R8, R9), |

1593 | BPF_ALU64_IMM(BPF_SUB, R8, 10), |

1594 | BPF_ALU64_REG(BPF_SUB, R9, R0), |

1595 | BPF_ALU64_REG(BPF_SUB, R9, R1), |

1596 | BPF_ALU64_REG(BPF_SUB, R9, R2), |

1597 | BPF_ALU64_REG(BPF_SUB, R9, R3), |

1598 | BPF_ALU64_REG(BPF_SUB, R9, R4), |

1599 | BPF_ALU64_REG(BPF_SUB, R9, R5), |

1600 | BPF_ALU64_REG(BPF_SUB, R9, R6), |

1601 | BPF_ALU64_REG(BPF_SUB, R9, R7), |

1602 | BPF_ALU64_REG(BPF_SUB, R9, R8), |

1603 | BPF_ALU64_IMM(BPF_SUB, R9, 10), |

1604 | BPF_ALU64_IMM(BPF_SUB, R0, 10), |

1605 | BPF_ALU64_IMM(BPF_NEG, R0, 0), |

1606 | BPF_ALU64_REG(BPF_SUB, R0, R1), |

1607 | BPF_ALU64_REG(BPF_SUB, R0, R2), |

1608 | BPF_ALU64_REG(BPF_SUB, R0, R3), |

1609 | BPF_ALU64_REG(BPF_SUB, R0, R4), |

1610 | BPF_ALU64_REG(BPF_SUB, R0, R5), |

1611 | BPF_ALU64_REG(BPF_SUB, R0, R6), |

1612 | BPF_ALU64_REG(BPF_SUB, R0, R7), |

1613 | BPF_ALU64_REG(BPF_SUB, R0, R8), |

1614 | BPF_ALU64_REG(BPF_SUB, R0, R9), |

1615 | BPF_EXIT_INSN(), |

1616 | }, |

1617 | INTERNAL, |

1618 | { }, |

1619 | { { 0, 11 } } |

1620 | }, |

1621 | { /* Mainly checking JIT here. */ |

1622 | "INT: XOR", |

1623 | .u.insns_int = { |

1624 | BPF_ALU64_REG(BPF_SUB, R0, R0), |

1625 | BPF_ALU64_REG(BPF_XOR, R1, R1), |

1626 | BPF_JMP_REG(BPF_JEQ, R0, R1, 1), |

1627 | BPF_EXIT_INSN(), |

1628 | BPF_ALU64_IMM(BPF_MOV, R0, 10), |

1629 | BPF_ALU64_IMM(BPF_MOV, R1, -1), |

1630 | BPF_ALU64_REG(BPF_SUB, R1, R1), |

1631 | BPF_ALU64_REG(BPF_XOR, R2, R2), |

1632 | BPF_JMP_REG(BPF_JEQ, R1, R2, 1), |

1633 | BPF_EXIT_INSN(), |

1634 | BPF_ALU64_REG(BPF_SUB, R2, R2), |

1635 | BPF_ALU64_REG(BPF_XOR, R3, R3), |

1636 | BPF_ALU64_IMM(BPF_MOV, R0, 10), |

1637 | BPF_ALU64_IMM(BPF_MOV, R1, -1), |

1638 | BPF_JMP_REG(BPF_JEQ, R2, R3, 1), |

1639 | BPF_EXIT_INSN(), |

1640 | BPF_ALU64_REG(BPF_SUB, R3, R3), |

1641 | BPF_ALU64_REG(BPF_XOR, R4, R4), |

1642 | BPF_ALU64_IMM(BPF_MOV, R2, 1), |

1643 | BPF_ALU64_IMM(BPF_MOV, R5, -1), |

1644 | BPF_JMP_REG(BPF_JEQ, R3, R4, 1), |

1645 | BPF_EXIT_INSN(), |

1646 | BPF_ALU64_REG(BPF_SUB, R4, R4), |

1647 | BPF_ALU64_REG(BPF_XOR, R5, R5), |

1648 | BPF_ALU64_IMM(BPF_MOV, R3, 1), |

1649 | BPF_ALU64_IMM(BPF_MOV, R7, -1), |

1650 | BPF_JMP_REG(BPF_JEQ, R5, R4, 1), |

1651 | BPF_EXIT_INSN(), |

1652 | BPF_ALU64_IMM(BPF_MOV, R5, 1), |

1653 | BPF_ALU64_REG(BPF_SUB, R5, R5), |

1654 | BPF_ALU64_REG(BPF_XOR, R6, R6), |

1655 | BPF_ALU64_IMM(BPF_MOV, R1, 1), |

1656 | BPF_ALU64_IMM(BPF_MOV, R8, -1), |

1657 | BPF_JMP_REG(BPF_JEQ, R5, R6, 1), |

1658 | BPF_EXIT_INSN(), |

1659 | BPF_ALU64_REG(BPF_SUB, R6, R6), |

1660 | BPF_ALU64_REG(BPF_XOR, R7, R7), |

1661 | BPF_JMP_REG(BPF_JEQ, R7, R6, 1), |

1662 | BPF_EXIT_INSN(), |

1663 | BPF_ALU64_REG(BPF_SUB, R7, R7), |

1664 | BPF_ALU64_REG(BPF_XOR, R8, R8), |

1665 | BPF_JMP_REG(BPF_JEQ, R7, R8, 1), |

1666 | BPF_EXIT_INSN(), |

1667 | BPF_ALU64_REG(BPF_SUB, R8, R8), |

1668 | BPF_ALU64_REG(BPF_XOR, R9, R9), |

1669 | BPF_JMP_REG(BPF_JEQ, R9, R8, 1), |

1670 | BPF_EXIT_INSN(), |

1671 | BPF_ALU64_REG(BPF_SUB, R9, R9), |

1672 | BPF_ALU64_REG(BPF_XOR, R0, R0), |

1673 | BPF_JMP_REG(BPF_JEQ, R9, R0, 1), |

1674 | BPF_EXIT_INSN(), |

1675 | BPF_ALU64_REG(BPF_SUB, R1, R1), |

1676 | BPF_ALU64_REG(BPF_XOR, R0, R0), |

1677 | BPF_JMP_REG(BPF_JEQ, R9, R0, 2), |

1678 | BPF_ALU64_IMM(BPF_MOV, R0, 0), |

1679 | BPF_EXIT_INSN(), |

1680 | BPF_ALU64_IMM(BPF_MOV, R0, 1), |

1681 | BPF_EXIT_INSN(), |

1682 | }, |

1683 | INTERNAL, |

1684 | { }, |

1685 | { { 0, 1 } } |

1686 | }, |

1687 | { /* Mainly checking JIT here. */ |

1688 | "INT: MUL", |

1689 | .u.insns_int = { |

1690 | BPF_ALU64_IMM(BPF_MOV, R0, 11), |

1691 | BPF_ALU64_IMM(BPF_MOV, R1, 1), |

1692 | BPF_ALU64_IMM(BPF_MOV, R2, 2), |

1693 | BPF_ALU64_IMM(BPF_MOV, R3, 3), |

1694 | BPF_ALU64_IMM(BPF_MOV, R4, 4), |

1695 | BPF_ALU64_IMM(BPF_MOV, R5, 5), |

1696 | BPF_ALU64_IMM(BPF_MOV, R6, 6), |

1697 | BPF_ALU64_IMM(BPF_MOV, R7, 7), |

1698 | BPF_ALU64_IMM(BPF_MOV, R8, 8), |

1699 | BPF_ALU64_IMM(BPF_MOV, R9, 9), |

1700 | BPF_ALU64_REG(BPF_MUL, R0, R0), |

1701 | BPF_ALU64_REG(BPF_MUL, R0, R1), |

1702 | BPF_ALU64_REG(BPF_MUL, R0, R2), |

1703 | BPF_ALU64_REG(BPF_MUL, R0, R3), |

1704 | BPF_ALU64_REG(BPF_MUL, R0, R4), |

1705 | BPF_ALU64_REG(BPF_MUL, R0, R5), |

1706 | BPF_ALU64_REG(BPF_MUL, R0, R6), |

1707 | BPF_ALU64_REG(BPF_MUL, R0, R7), |

1708 | BPF_ALU64_REG(BPF_MUL, R0, R8), |

1709 | BPF_ALU64_REG(BPF_MUL, R0, R9), |

1710 | BPF_ALU64_IMM(BPF_MUL, R0, 10), |

1711 | BPF_JMP_IMM(BPF_JEQ, R0, 439084800, 1), |

1712 | BPF_EXIT_INSN(), |

1713 | BPF_ALU64_REG(BPF_MUL, R1, R0), |

1714 | BPF_ALU64_REG(BPF_MUL, R1, R2), |

1715 | BPF_ALU64_REG(BPF_MUL, R1, R3), |

1716 | BPF_ALU64_REG(BPF_MUL, R1, R4), |

1717 | BPF_ALU64_REG(BPF_MUL, R1, R5), |

1718 | BPF_ALU64_REG(BPF_MUL, R1, R6), |

1719 | BPF_ALU64_REG(BPF_MUL, R1, R7), |

1720 | BPF_ALU64_REG(BPF_MUL, R1, R8), |

1721 | BPF_ALU64_REG(BPF_MUL, R1, R9), |

1722 | BPF_ALU64_IMM(BPF_MUL, R1, 10), |

1723 | BPF_ALU64_REG(BPF_MOV, R2, R1), |

1724 | BPF_ALU64_IMM(BPF_RSH, R2, 32), |

1725 | BPF_JMP_IMM(BPF_JEQ, R2, 0x5a924, 1), |

1726 | BPF_EXIT_INSN(), |

1727 | BPF_ALU64_IMM(BPF_LSH, R1, 32), |

1728 | BPF_ALU64_IMM(BPF_ARSH, R1, 32), |

1729 | BPF_JMP_IMM(BPF_JEQ, R1, 0xebb90000, 1), |

1730 | BPF_EXIT_INSN(), |

1731 | BPF_ALU64_REG(BPF_MUL, R2, R0), |

1732 | BPF_ALU64_REG(BPF_MUL, R2, R1), |

1733 | BPF_ALU64_REG(BPF_MUL, R2, R3), |

1734 | BPF_ALU64_REG(BPF_MUL, R2, R4), |

1735 | BPF_ALU64_REG(BPF_MUL, R2, R5), |

1736 | BPF_ALU64_REG(BPF_MUL, R2, R6), |

1737 | BPF_ALU64_REG(BPF_MUL, R2, R7), |

1738 | BPF_ALU64_REG(BPF_MUL, R2, R8), |

1739 | BPF_ALU64_REG(BPF_MUL, R2, R9), |

1740 | BPF_ALU64_IMM(BPF_MUL, R2, 10), |

1741 | BPF_ALU64_IMM(BPF_RSH, R2, 32), |

1742 | BPF_ALU64_REG(BPF_MOV, R0, R2), |

1743 | BPF_EXIT_INSN(), |

1744 | }, |

1745 | INTERNAL, |

1746 | { }, |

1747 | { { 0, 0x35d97ef2 } } |

1748 | }, |

1749 | { /* Mainly checking JIT here. */ |

1750 | "MOV REG64", |

1751 | .u.insns_int = { |

1752 | BPF_LD_IMM64(R0, 0xffffffffffffffffLL), |

1753 | BPF_MOV64_REG(R1, R0), |

1754 | BPF_MOV64_REG(R2, R1), |

1755 | BPF_MOV64_REG(R3, R2), |

1756 | BPF_MOV64_REG(R4, R3), |

1757 | BPF_MOV64_REG(R5, R4), |

1758 | BPF_MOV64_REG(R6, R5), |

1759 | BPF_MOV64_REG(R7, R6), |

1760 | BPF_MOV64_REG(R8, R7), |

1761 | BPF_MOV64_REG(R9, R8), |

1762 | BPF_ALU64_IMM(BPF_MOV, R0, 0), |

1763 | BPF_ALU64_IMM(BPF_MOV, R1, 0), |

1764 | BPF_ALU64_IMM(BPF_MOV, R2, 0), |

1765 | BPF_ALU64_IMM(BPF_MOV, R3, 0), |

1766 | BPF_ALU64_IMM(BPF_MOV, R4, 0), |

1767 | BPF_ALU64_IMM(BPF_MOV, R5, 0), |

1768 | BPF_ALU64_IMM(BPF_MOV, R6, 0), |

1769 | BPF_ALU64_IMM(BPF_MOV, R7, 0), |

1770 | BPF_ALU64_IMM(BPF_MOV, R8, 0), |

1771 | BPF_ALU64_IMM(BPF_MOV, R9, 0), |

1772 | BPF_ALU64_REG(BPF_ADD, R0, R0), |

1773 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

1774 | BPF_ALU64_REG(BPF_ADD, R0, R2), |

1775 | BPF_ALU64_REG(BPF_ADD, R0, R3), |

1776 | BPF_ALU64_REG(BPF_ADD, R0, R4), |

1777 | BPF_ALU64_REG(BPF_ADD, R0, R5), |

1778 | BPF_ALU64_REG(BPF_ADD, R0, R6), |

1779 | BPF_ALU64_REG(BPF_ADD, R0, R7), |

1780 | BPF_ALU64_REG(BPF_ADD, R0, R8), |

1781 | BPF_ALU64_REG(BPF_ADD, R0, R9), |

1782 | BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe), |

1783 | BPF_EXIT_INSN(), |

1784 | }, |

1785 | INTERNAL, |

1786 | { }, |

1787 | { { 0, 0xfefe } } |

1788 | }, |

1789 | { /* Mainly checking JIT here. */ |

1790 | "MOV REG32", |

1791 | .u.insns_int = { |

1792 | BPF_LD_IMM64(R0, 0xffffffffffffffffLL), |

1793 | BPF_MOV64_REG(R1, R0), |

1794 | BPF_MOV64_REG(R2, R1), |

1795 | BPF_MOV64_REG(R3, R2), |

1796 | BPF_MOV64_REG(R4, R3), |

1797 | BPF_MOV64_REG(R5, R4), |

1798 | BPF_MOV64_REG(R6, R5), |

1799 | BPF_MOV64_REG(R7, R6), |

1800 | BPF_MOV64_REG(R8, R7), |

1801 | BPF_MOV64_REG(R9, R8), |

1802 | BPF_ALU32_IMM(BPF_MOV, R0, 0), |

1803 | BPF_ALU32_IMM(BPF_MOV, R1, 0), |

1804 | BPF_ALU32_IMM(BPF_MOV, R2, 0), |

1805 | BPF_ALU32_IMM(BPF_MOV, R3, 0), |

1806 | BPF_ALU32_IMM(BPF_MOV, R4, 0), |

1807 | BPF_ALU32_IMM(BPF_MOV, R5, 0), |

1808 | BPF_ALU32_IMM(BPF_MOV, R6, 0), |

1809 | BPF_ALU32_IMM(BPF_MOV, R7, 0), |

1810 | BPF_ALU32_IMM(BPF_MOV, R8, 0), |

1811 | BPF_ALU32_IMM(BPF_MOV, R9, 0), |

1812 | BPF_ALU64_REG(BPF_ADD, R0, R0), |

1813 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

1814 | BPF_ALU64_REG(BPF_ADD, R0, R2), |

1815 | BPF_ALU64_REG(BPF_ADD, R0, R3), |

1816 | BPF_ALU64_REG(BPF_ADD, R0, R4), |

1817 | BPF_ALU64_REG(BPF_ADD, R0, R5), |

1818 | BPF_ALU64_REG(BPF_ADD, R0, R6), |

1819 | BPF_ALU64_REG(BPF_ADD, R0, R7), |

1820 | BPF_ALU64_REG(BPF_ADD, R0, R8), |

1821 | BPF_ALU64_REG(BPF_ADD, R0, R9), |

1822 | BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe), |

1823 | BPF_EXIT_INSN(), |

1824 | }, |

1825 | INTERNAL, |

1826 | { }, |

1827 | { { 0, 0xfefe } } |

1828 | }, |

1829 | { /* Mainly checking JIT here. */ |

1830 | "LD IMM64", |

1831 | .u.insns_int = { |

1832 | BPF_LD_IMM64(R0, 0xffffffffffffffffLL), |

1833 | BPF_MOV64_REG(R1, R0), |

1834 | BPF_MOV64_REG(R2, R1), |

1835 | BPF_MOV64_REG(R3, R2), |

1836 | BPF_MOV64_REG(R4, R3), |

1837 | BPF_MOV64_REG(R5, R4), |

1838 | BPF_MOV64_REG(R6, R5), |

1839 | BPF_MOV64_REG(R7, R6), |

1840 | BPF_MOV64_REG(R8, R7), |

1841 | BPF_MOV64_REG(R9, R8), |

1842 | BPF_LD_IMM64(R0, 0x0LL), |

1843 | BPF_LD_IMM64(R1, 0x0LL), |

1844 | BPF_LD_IMM64(R2, 0x0LL), |

1845 | BPF_LD_IMM64(R3, 0x0LL), |

1846 | BPF_LD_IMM64(R4, 0x0LL), |

1847 | BPF_LD_IMM64(R5, 0x0LL), |

1848 | BPF_LD_IMM64(R6, 0x0LL), |

1849 | BPF_LD_IMM64(R7, 0x0LL), |

1850 | BPF_LD_IMM64(R8, 0x0LL), |

1851 | BPF_LD_IMM64(R9, 0x0LL), |

1852 | BPF_ALU64_REG(BPF_ADD, R0, R0), |

1853 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

1854 | BPF_ALU64_REG(BPF_ADD, R0, R2), |

1855 | BPF_ALU64_REG(BPF_ADD, R0, R3), |

1856 | BPF_ALU64_REG(BPF_ADD, R0, R4), |

1857 | BPF_ALU64_REG(BPF_ADD, R0, R5), |

1858 | BPF_ALU64_REG(BPF_ADD, R0, R6), |

1859 | BPF_ALU64_REG(BPF_ADD, R0, R7), |

1860 | BPF_ALU64_REG(BPF_ADD, R0, R8), |

1861 | BPF_ALU64_REG(BPF_ADD, R0, R9), |

1862 | BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe), |

1863 | BPF_EXIT_INSN(), |

1864 | }, |

1865 | INTERNAL, |

1866 | { }, |

1867 | { { 0, 0xfefe } } |

1868 | }, |

1869 | { |

1870 | "INT: ALU MIX", |

1871 | .u.insns_int = { |

1872 | BPF_ALU64_IMM(BPF_MOV, R0, 11), |

1873 | BPF_ALU64_IMM(BPF_ADD, R0, -1), |

1874 | BPF_ALU64_IMM(BPF_MOV, R2, 2), |

1875 | BPF_ALU64_IMM(BPF_XOR, R2, 3), |

1876 | BPF_ALU64_REG(BPF_DIV, R0, R2), |

1877 | BPF_JMP_IMM(BPF_JEQ, R0, 10, 1), |

1878 | BPF_EXIT_INSN(), |

1879 | BPF_ALU64_IMM(BPF_MOD, R0, 3), |

1880 | BPF_JMP_IMM(BPF_JEQ, R0, 1, 1), |

1881 | BPF_EXIT_INSN(), |

1882 | BPF_ALU64_IMM(BPF_MOV, R0, -1), |

1883 | BPF_EXIT_INSN(), |

1884 | }, |

1885 | INTERNAL, |

1886 | { }, |

1887 | { { 0, -1 } } |

1888 | }, |

1889 | { |

1890 | "INT: shifts by register", |

1891 | .u.insns_int = { |

1892 | BPF_MOV64_IMM(R0, -1234), |

1893 | BPF_MOV64_IMM(R1, 1), |

1894 | BPF_ALU32_REG(BPF_RSH, R0, R1), |

1895 | BPF_JMP_IMM(BPF_JEQ, R0, 0x7ffffd97, 1), |

1896 | BPF_EXIT_INSN(), |

1897 | BPF_MOV64_IMM(R2, 1), |

1898 | BPF_ALU64_REG(BPF_LSH, R0, R2), |

1899 | BPF_MOV32_IMM(R4, -1234), |

1900 | BPF_JMP_REG(BPF_JEQ, R0, R4, 1), |

1901 | BPF_EXIT_INSN(), |

1902 | BPF_ALU64_IMM(BPF_AND, R4, 63), |

1903 | BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */ |

1904 | BPF_MOV64_IMM(R3, 47), |

1905 | BPF_ALU64_REG(BPF_ARSH, R0, R3), |

1906 | BPF_JMP_IMM(BPF_JEQ, R0, -617, 1), |

1907 | BPF_EXIT_INSN(), |

1908 | BPF_MOV64_IMM(R2, 1), |

1909 | BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */ |

1910 | BPF_JMP_IMM(BPF_JEQ, R4, 92, 1), |

1911 | BPF_EXIT_INSN(), |

1912 | BPF_MOV64_IMM(R4, 4), |

1913 | BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */ |

1914 | BPF_JMP_IMM(BPF_JEQ, R4, 64, 1), |

1915 | BPF_EXIT_INSN(), |

1916 | BPF_MOV64_IMM(R4, 5), |

1917 | BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */ |

1918 | BPF_JMP_IMM(BPF_JEQ, R4, 160, 1), |

1919 | BPF_EXIT_INSN(), |

1920 | BPF_MOV64_IMM(R0, -1), |

1921 | BPF_EXIT_INSN(), |

1922 | }, |

1923 | INTERNAL, |

1924 | { }, |

1925 | { { 0, -1 } } |

1926 | }, |

1927 | { |

1928 | "check: missing ret", |

1929 | .u.insns = { |

1930 | BPF_STMT(BPF_LD | BPF_IMM, 1), |

1931 | }, |

1932 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

1933 | { }, |

1934 | { }, |

1935 | .fill_helper = NULL, |

1936 | .expected_errcode = -EINVAL, |

1937 | }, |

1938 | { |

1939 | "check: div_k_0", |

1940 | .u.insns = { |

1941 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 0), |

1942 | BPF_STMT(BPF_RET | BPF_K, 0) |

1943 | }, |

1944 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

1945 | { }, |

1946 | { }, |

1947 | .fill_helper = NULL, |

1948 | .expected_errcode = -EINVAL, |

1949 | }, |

1950 | { |

1951 | "check: unknown insn", |

1952 | .u.insns = { |

1953 | /* seccomp insn, rejected in socket filter */ |

1954 | BPF_STMT(BPF_LDX | BPF_W | BPF_ABS, 0), |

1955 | BPF_STMT(BPF_RET | BPF_K, 0) |

1956 | }, |

1957 | CLASSIC | FLAG_EXPECTED_FAIL, |

1958 | { }, |

1959 | { }, |

1960 | .fill_helper = NULL, |

1961 | .expected_errcode = -EINVAL, |

1962 | }, |

1963 | { |

1964 | "check: out of range spill/fill", |

1965 | .u.insns = { |

1966 | BPF_STMT(BPF_STX, 16), |

1967 | BPF_STMT(BPF_RET | BPF_K, 0) |

1968 | }, |

1969 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

1970 | { }, |

1971 | { }, |

1972 | .fill_helper = NULL, |

1973 | .expected_errcode = -EINVAL, |

1974 | }, |

1975 | { |

1976 | "JUMPS + HOLES", |

1977 | .u.insns = { |

1978 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1979 | BPF_JUMP(BPF_JMP | BPF_JGE, 0, 13, 15), |

1980 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1981 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1982 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1983 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1984 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1985 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1986 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1987 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1988 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1989 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1990 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1991 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1992 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1993 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x90c2894d, 3, 4), |

1994 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1995 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x90c2894d, 1, 2), |

1996 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

1997 | BPF_JUMP(BPF_JMP | BPF_JGE, 0, 14, 15), |

1998 | BPF_JUMP(BPF_JMP | BPF_JGE, 0, 13, 14), |

1999 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2000 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2001 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2002 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2003 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2004 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2005 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2006 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2007 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2008 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2009 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2010 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2011 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2012 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x2ac28349, 2, 3), |

2013 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x2ac28349, 1, 2), |

2014 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2015 | BPF_JUMP(BPF_JMP | BPF_JGE, 0, 14, 15), |

2016 | BPF_JUMP(BPF_JMP | BPF_JGE, 0, 13, 14), |

2017 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2018 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2019 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2020 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2021 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2022 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2023 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2024 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2025 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2026 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2027 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2028 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2029 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2030 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x90d2ff41, 2, 3), |

2031 | BPF_JUMP(BPF_JMP | BPF_JEQ, 0x90d2ff41, 1, 2), |

2032 | BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 0), |

2033 | BPF_STMT(BPF_RET | BPF_A, 0), |

2034 | BPF_STMT(BPF_RET | BPF_A, 0), |

2035 | }, |

2036 | CLASSIC, |

2037 | { 0x00, 0x1b, 0x21, 0x3c, 0x9d, 0xf8, |

2038 | 0x90, 0xe2, 0xba, 0x0a, 0x56, 0xb4, |

2039 | 0x08, 0x00, |

2040 | 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, |

2041 | 0x20, 0x00, 0x40, 0x11, 0x00, 0x00, /* IP header */ |

2042 | 0xc0, 0xa8, 0x33, 0x01, |

2043 | 0xc0, 0xa8, 0x33, 0x02, |

2044 | 0xbb, 0xb6, |

2045 | 0xa9, 0xfa, |

2046 | 0x00, 0x14, 0x00, 0x00, |

2047 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2048 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2049 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2050 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2051 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2052 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2053 | 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, |

2054 | 0xcc, 0xcc, 0xcc, 0xcc }, |

2055 | { { 88, 0x001b } } |

2056 | }, |

2057 | { |

2058 | "check: RET X", |

2059 | .u.insns = { |

2060 | BPF_STMT(BPF_RET | BPF_X, 0), |

2061 | }, |

2062 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

2063 | { }, |

2064 | { }, |

2065 | .fill_helper = NULL, |

2066 | .expected_errcode = -EINVAL, |

2067 | }, |

2068 | { |

2069 | "check: LDX + RET X", |

2070 | .u.insns = { |

2071 | BPF_STMT(BPF_LDX | BPF_IMM, 42), |

2072 | BPF_STMT(BPF_RET | BPF_X, 0), |

2073 | }, |

2074 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

2075 | { }, |

2076 | { }, |

2077 | .fill_helper = NULL, |

2078 | .expected_errcode = -EINVAL, |

2079 | }, |

2080 | { /* Mainly checking JIT here. */ |

2081 | "M[]: alt STX + LDX", |

2082 | .u.insns = { |

2083 | BPF_STMT(BPF_LDX | BPF_IMM, 100), |

2084 | BPF_STMT(BPF_STX, 0), |

2085 | BPF_STMT(BPF_LDX | BPF_MEM, 0), |

2086 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2087 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2088 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2089 | BPF_STMT(BPF_STX, 1), |

2090 | BPF_STMT(BPF_LDX | BPF_MEM, 1), |

2091 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2092 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2093 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2094 | BPF_STMT(BPF_STX, 2), |

2095 | BPF_STMT(BPF_LDX | BPF_MEM, 2), |

2096 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2097 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2098 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2099 | BPF_STMT(BPF_STX, 3), |

2100 | BPF_STMT(BPF_LDX | BPF_MEM, 3), |

2101 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2102 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2103 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2104 | BPF_STMT(BPF_STX, 4), |

2105 | BPF_STMT(BPF_LDX | BPF_MEM, 4), |

2106 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2107 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2108 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2109 | BPF_STMT(BPF_STX, 5), |

2110 | BPF_STMT(BPF_LDX | BPF_MEM, 5), |

2111 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2112 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2113 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2114 | BPF_STMT(BPF_STX, 6), |

2115 | BPF_STMT(BPF_LDX | BPF_MEM, 6), |

2116 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2117 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2118 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2119 | BPF_STMT(BPF_STX, 7), |

2120 | BPF_STMT(BPF_LDX | BPF_MEM, 7), |

2121 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2122 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2123 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2124 | BPF_STMT(BPF_STX, 8), |

2125 | BPF_STMT(BPF_LDX | BPF_MEM, 8), |

2126 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2127 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2128 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2129 | BPF_STMT(BPF_STX, 9), |

2130 | BPF_STMT(BPF_LDX | BPF_MEM, 9), |

2131 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2132 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2133 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2134 | BPF_STMT(BPF_STX, 10), |

2135 | BPF_STMT(BPF_LDX | BPF_MEM, 10), |

2136 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2137 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2138 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2139 | BPF_STMT(BPF_STX, 11), |

2140 | BPF_STMT(BPF_LDX | BPF_MEM, 11), |

2141 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2142 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2143 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2144 | BPF_STMT(BPF_STX, 12), |

2145 | BPF_STMT(BPF_LDX | BPF_MEM, 12), |

2146 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2147 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2148 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2149 | BPF_STMT(BPF_STX, 13), |

2150 | BPF_STMT(BPF_LDX | BPF_MEM, 13), |

2151 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2152 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2153 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2154 | BPF_STMT(BPF_STX, 14), |

2155 | BPF_STMT(BPF_LDX | BPF_MEM, 14), |

2156 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2157 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2158 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2159 | BPF_STMT(BPF_STX, 15), |

2160 | BPF_STMT(BPF_LDX | BPF_MEM, 15), |

2161 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2162 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 1), |

2163 | BPF_STMT(BPF_MISC | BPF_TAX, 0), |

2164 | BPF_STMT(BPF_RET | BPF_A, 0), |

2165 | }, |

2166 | CLASSIC | FLAG_NO_DATA, |

2167 | { }, |

2168 | { { 0, 116 } }, |

2169 | }, |

2170 | { /* Mainly checking JIT here. */ |

2171 | "M[]: full STX + full LDX", |

2172 | .u.insns = { |

2173 | BPF_STMT(BPF_LDX | BPF_IMM, 0xbadfeedb), |

2174 | BPF_STMT(BPF_STX, 0), |

2175 | BPF_STMT(BPF_LDX | BPF_IMM, 0xecabedae), |

2176 | BPF_STMT(BPF_STX, 1), |

2177 | BPF_STMT(BPF_LDX | BPF_IMM, 0xafccfeaf), |

2178 | BPF_STMT(BPF_STX, 2), |

2179 | BPF_STMT(BPF_LDX | BPF_IMM, 0xbffdcedc), |

2180 | BPF_STMT(BPF_STX, 3), |

2181 | BPF_STMT(BPF_LDX | BPF_IMM, 0xfbbbdccb), |

2182 | BPF_STMT(BPF_STX, 4), |

2183 | BPF_STMT(BPF_LDX | BPF_IMM, 0xfbabcbda), |

2184 | BPF_STMT(BPF_STX, 5), |

2185 | BPF_STMT(BPF_LDX | BPF_IMM, 0xaedecbdb), |

2186 | BPF_STMT(BPF_STX, 6), |

2187 | BPF_STMT(BPF_LDX | BPF_IMM, 0xadebbade), |

2188 | BPF_STMT(BPF_STX, 7), |

2189 | BPF_STMT(BPF_LDX | BPF_IMM, 0xfcfcfaec), |

2190 | BPF_STMT(BPF_STX, 8), |

2191 | BPF_STMT(BPF_LDX | BPF_IMM, 0xbcdddbdc), |

2192 | BPF_STMT(BPF_STX, 9), |

2193 | BPF_STMT(BPF_LDX | BPF_IMM, 0xfeefdfac), |

2194 | BPF_STMT(BPF_STX, 10), |

2195 | BPF_STMT(BPF_LDX | BPF_IMM, 0xcddcdeea), |

2196 | BPF_STMT(BPF_STX, 11), |

2197 | BPF_STMT(BPF_LDX | BPF_IMM, 0xaccfaebb), |

2198 | BPF_STMT(BPF_STX, 12), |

2199 | BPF_STMT(BPF_LDX | BPF_IMM, 0xbdcccdcf), |

2200 | BPF_STMT(BPF_STX, 13), |

2201 | BPF_STMT(BPF_LDX | BPF_IMM, 0xaaedecde), |

2202 | BPF_STMT(BPF_STX, 14), |

2203 | BPF_STMT(BPF_LDX | BPF_IMM, 0xfaeacdad), |

2204 | BPF_STMT(BPF_STX, 15), |

2205 | BPF_STMT(BPF_LDX | BPF_MEM, 0), |

2206 | BPF_STMT(BPF_MISC | BPF_TXA, 0), |

2207 | BPF_STMT(BPF_LDX | BPF_MEM, 1), |

2208 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2209 | BPF_STMT(BPF_LDX | BPF_MEM, 2), |

2210 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2211 | BPF_STMT(BPF_LDX | BPF_MEM, 3), |

2212 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2213 | BPF_STMT(BPF_LDX | BPF_MEM, 4), |

2214 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2215 | BPF_STMT(BPF_LDX | BPF_MEM, 5), |

2216 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2217 | BPF_STMT(BPF_LDX | BPF_MEM, 6), |

2218 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2219 | BPF_STMT(BPF_LDX | BPF_MEM, 7), |

2220 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2221 | BPF_STMT(BPF_LDX | BPF_MEM, 8), |

2222 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2223 | BPF_STMT(BPF_LDX | BPF_MEM, 9), |

2224 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2225 | BPF_STMT(BPF_LDX | BPF_MEM, 10), |

2226 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2227 | BPF_STMT(BPF_LDX | BPF_MEM, 11), |

2228 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2229 | BPF_STMT(BPF_LDX | BPF_MEM, 12), |

2230 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2231 | BPF_STMT(BPF_LDX | BPF_MEM, 13), |

2232 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2233 | BPF_STMT(BPF_LDX | BPF_MEM, 14), |

2234 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2235 | BPF_STMT(BPF_LDX | BPF_MEM, 15), |

2236 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), |

2237 | BPF_STMT(BPF_RET | BPF_A, 0), |

2238 | }, |

2239 | CLASSIC | FLAG_NO_DATA, |

2240 | { }, |

2241 | { { 0, 0x2a5a5e5 } }, |

2242 | }, |

2243 | { |

2244 | "check: SKF_AD_MAX", |

2245 | .u.insns = { |

2246 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

2247 | SKF_AD_OFF + SKF_AD_MAX), |

2248 | BPF_STMT(BPF_RET | BPF_A, 0), |

2249 | }, |

2250 | CLASSIC | FLAG_NO_DATA | FLAG_EXPECTED_FAIL, |

2251 | { }, |

2252 | { }, |

2253 | .fill_helper = NULL, |

2254 | .expected_errcode = -EINVAL, |

2255 | }, |

2256 | { /* Passes checker but fails during runtime. */ |

2257 | "LD [SKF_AD_OFF-1]", |

2258 | .u.insns = { |

2259 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, |

2260 | SKF_AD_OFF - 1), |

2261 | BPF_STMT(BPF_RET | BPF_K, 1), |

2262 | }, |

2263 | CLASSIC, |

2264 | { }, |

2265 | { { 1, 0 } }, |

2266 | }, |

2267 | { |

2268 | "load 64-bit immediate", |

2269 | .u.insns_int = { |

2270 | BPF_LD_IMM64(R1, 0x567800001234LL), |

2271 | BPF_MOV64_REG(R2, R1), |

2272 | BPF_MOV64_REG(R3, R2), |

2273 | BPF_ALU64_IMM(BPF_RSH, R2, 32), |

2274 | BPF_ALU64_IMM(BPF_LSH, R3, 32), |

2275 | BPF_ALU64_IMM(BPF_RSH, R3, 32), |

2276 | BPF_ALU64_IMM(BPF_MOV, R0, 0), |

2277 | BPF_JMP_IMM(BPF_JEQ, R2, 0x5678, 1), |

2278 | BPF_EXIT_INSN(), |

2279 | BPF_JMP_IMM(BPF_JEQ, R3, 0x1234, 1), |

2280 | BPF_EXIT_INSN(), |

2281 | BPF_LD_IMM64(R0, 0x1ffffffffLL), |

2282 | BPF_ALU64_IMM(BPF_RSH, R0, 32), /* R0 = 1 */ |

2283 | BPF_EXIT_INSN(), |

2284 | }, |

2285 | INTERNAL, |

2286 | { }, |

2287 | { { 0, 1 } } |

2288 | }, |

2289 | /* BPF_ALU | BPF_MOV | BPF_X */ |

2290 | { |

2291 | "ALU_MOV_X: dst = 2", |

2292 | .u.insns_int = { |

2293 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

2294 | BPF_ALU32_REG(BPF_MOV, R0, R1), |

2295 | BPF_EXIT_INSN(), |

2296 | }, |

2297 | INTERNAL, |

2298 | { }, |

2299 | { { 0, 2 } }, |

2300 | }, |

2301 | { |

2302 | "ALU_MOV_X: dst = 4294967295", |

2303 | .u.insns_int = { |

2304 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967295U), |

2305 | BPF_ALU32_REG(BPF_MOV, R0, R1), |

2306 | BPF_EXIT_INSN(), |

2307 | }, |

2308 | INTERNAL, |

2309 | { }, |

2310 | { { 0, 4294967295U } }, |

2311 | }, |

2312 | { |

2313 | "ALU64_MOV_X: dst = 2", |

2314 | .u.insns_int = { |

2315 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

2316 | BPF_ALU64_REG(BPF_MOV, R0, R1), |

2317 | BPF_EXIT_INSN(), |

2318 | }, |

2319 | INTERNAL, |

2320 | { }, |

2321 | { { 0, 2 } }, |

2322 | }, |

2323 | { |

2324 | "ALU64_MOV_X: dst = 4294967295", |

2325 | .u.insns_int = { |

2326 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967295U), |

2327 | BPF_ALU64_REG(BPF_MOV, R0, R1), |

2328 | BPF_EXIT_INSN(), |

2329 | }, |

2330 | INTERNAL, |

2331 | { }, |

2332 | { { 0, 4294967295U } }, |

2333 | }, |

2334 | /* BPF_ALU | BPF_MOV | BPF_K */ |

2335 | { |

2336 | "ALU_MOV_K: dst = 2", |

2337 | .u.insns_int = { |

2338 | BPF_ALU32_IMM(BPF_MOV, R0, 2), |

2339 | BPF_EXIT_INSN(), |

2340 | }, |

2341 | INTERNAL, |

2342 | { }, |

2343 | { { 0, 2 } }, |

2344 | }, |

2345 | { |

2346 | "ALU_MOV_K: dst = 4294967295", |

2347 | .u.insns_int = { |

2348 | BPF_ALU32_IMM(BPF_MOV, R0, 4294967295U), |

2349 | BPF_EXIT_INSN(), |

2350 | }, |

2351 | INTERNAL, |

2352 | { }, |

2353 | { { 0, 4294967295U } }, |

2354 | }, |

2355 | { |

2356 | "ALU_MOV_K: 0x0000ffffffff0000 = 0x00000000ffffffff", |

2357 | .u.insns_int = { |

2358 | BPF_LD_IMM64(R2, 0x0000ffffffff0000LL), |

2359 | BPF_LD_IMM64(R3, 0x00000000ffffffffLL), |

2360 | BPF_ALU32_IMM(BPF_MOV, R2, 0xffffffff), |

2361 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2362 | BPF_MOV32_IMM(R0, 2), |

2363 | BPF_EXIT_INSN(), |

2364 | BPF_MOV32_IMM(R0, 1), |

2365 | BPF_EXIT_INSN(), |

2366 | }, |

2367 | INTERNAL, |

2368 | { }, |

2369 | { { 0, 0x1 } }, |

2370 | }, |

2371 | { |

2372 | "ALU64_MOV_K: dst = 2", |

2373 | .u.insns_int = { |

2374 | BPF_ALU64_IMM(BPF_MOV, R0, 2), |

2375 | BPF_EXIT_INSN(), |

2376 | }, |

2377 | INTERNAL, |

2378 | { }, |

2379 | { { 0, 2 } }, |

2380 | }, |

2381 | { |

2382 | "ALU64_MOV_K: dst = 2147483647", |

2383 | .u.insns_int = { |

2384 | BPF_ALU64_IMM(BPF_MOV, R0, 2147483647), |

2385 | BPF_EXIT_INSN(), |

2386 | }, |

2387 | INTERNAL, |

2388 | { }, |

2389 | { { 0, 2147483647 } }, |

2390 | }, |

2391 | { |

2392 | "ALU64_OR_K: dst = 0x0", |

2393 | .u.insns_int = { |

2394 | BPF_LD_IMM64(R2, 0x0000ffffffff0000LL), |

2395 | BPF_LD_IMM64(R3, 0x0), |

2396 | BPF_ALU64_IMM(BPF_MOV, R2, 0x0), |

2397 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2398 | BPF_MOV32_IMM(R0, 2), |

2399 | BPF_EXIT_INSN(), |

2400 | BPF_MOV32_IMM(R0, 1), |

2401 | BPF_EXIT_INSN(), |

2402 | }, |

2403 | INTERNAL, |

2404 | { }, |

2405 | { { 0, 0x1 } }, |

2406 | }, |

2407 | { |

2408 | "ALU64_MOV_K: dst = -1", |

2409 | .u.insns_int = { |

2410 | BPF_LD_IMM64(R2, 0x0000ffffffff0000LL), |

2411 | BPF_LD_IMM64(R3, 0xffffffffffffffffLL), |

2412 | BPF_ALU64_IMM(BPF_MOV, R2, 0xffffffff), |

2413 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2414 | BPF_MOV32_IMM(R0, 2), |

2415 | BPF_EXIT_INSN(), |

2416 | BPF_MOV32_IMM(R0, 1), |

2417 | BPF_EXIT_INSN(), |

2418 | }, |

2419 | INTERNAL, |

2420 | { }, |

2421 | { { 0, 0x1 } }, |

2422 | }, |

2423 | /* BPF_ALU | BPF_ADD | BPF_X */ |

2424 | { |

2425 | "ALU_ADD_X: 1 + 2 = 3", |

2426 | .u.insns_int = { |

2427 | BPF_LD_IMM64(R0, 1), |

2428 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

2429 | BPF_ALU32_REG(BPF_ADD, R0, R1), |

2430 | BPF_EXIT_INSN(), |

2431 | }, |

2432 | INTERNAL, |

2433 | { }, |

2434 | { { 0, 3 } }, |

2435 | }, |

2436 | { |

2437 | "ALU_ADD_X: 1 + 4294967294 = 4294967295", |

2438 | .u.insns_int = { |

2439 | BPF_LD_IMM64(R0, 1), |

2440 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967294U), |

2441 | BPF_ALU32_REG(BPF_ADD, R0, R1), |

2442 | BPF_EXIT_INSN(), |

2443 | }, |

2444 | INTERNAL, |

2445 | { }, |

2446 | { { 0, 4294967295U } }, |

2447 | }, |

2448 | { |

2449 | "ALU_ADD_X: 2 + 4294967294 = 0", |

2450 | .u.insns_int = { |

2451 | BPF_LD_IMM64(R0, 2), |

2452 | BPF_LD_IMM64(R1, 4294967294U), |

2453 | BPF_ALU32_REG(BPF_ADD, R0, R1), |

2454 | BPF_JMP_IMM(BPF_JEQ, R0, 0, 2), |

2455 | BPF_ALU32_IMM(BPF_MOV, R0, 0), |

2456 | BPF_EXIT_INSN(), |

2457 | BPF_ALU32_IMM(BPF_MOV, R0, 1), |

2458 | BPF_EXIT_INSN(), |

2459 | }, |

2460 | INTERNAL, |

2461 | { }, |

2462 | { { 0, 1 } }, |

2463 | }, |

2464 | { |

2465 | "ALU64_ADD_X: 1 + 2 = 3", |

2466 | .u.insns_int = { |

2467 | BPF_LD_IMM64(R0, 1), |

2468 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

2469 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

2470 | BPF_EXIT_INSN(), |

2471 | }, |

2472 | INTERNAL, |

2473 | { }, |

2474 | { { 0, 3 } }, |

2475 | }, |

2476 | { |

2477 | "ALU64_ADD_X: 1 + 4294967294 = 4294967295", |

2478 | .u.insns_int = { |

2479 | BPF_LD_IMM64(R0, 1), |

2480 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967294U), |

2481 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

2482 | BPF_EXIT_INSN(), |

2483 | }, |

2484 | INTERNAL, |

2485 | { }, |

2486 | { { 0, 4294967295U } }, |

2487 | }, |

2488 | { |

2489 | "ALU64_ADD_X: 2 + 4294967294 = 4294967296", |

2490 | .u.insns_int = { |

2491 | BPF_LD_IMM64(R0, 2), |

2492 | BPF_LD_IMM64(R1, 4294967294U), |

2493 | BPF_LD_IMM64(R2, 4294967296ULL), |

2494 | BPF_ALU64_REG(BPF_ADD, R0, R1), |

2495 | BPF_JMP_REG(BPF_JEQ, R0, R2, 2), |

2496 | BPF_MOV32_IMM(R0, 0), |

2497 | BPF_EXIT_INSN(), |

2498 | BPF_MOV32_IMM(R0, 1), |

2499 | BPF_EXIT_INSN(), |

2500 | }, |

2501 | INTERNAL, |

2502 | { }, |

2503 | { { 0, 1 } }, |

2504 | }, |

2505 | /* BPF_ALU | BPF_ADD | BPF_K */ |

2506 | { |

2507 | "ALU_ADD_K: 1 + 2 = 3", |

2508 | .u.insns_int = { |

2509 | BPF_LD_IMM64(R0, 1), |

2510 | BPF_ALU32_IMM(BPF_ADD, R0, 2), |

2511 | BPF_EXIT_INSN(), |

2512 | }, |

2513 | INTERNAL, |

2514 | { }, |

2515 | { { 0, 3 } }, |

2516 | }, |

2517 | { |

2518 | "ALU_ADD_K: 3 + 0 = 3", |

2519 | .u.insns_int = { |

2520 | BPF_LD_IMM64(R0, 3), |

2521 | BPF_ALU32_IMM(BPF_ADD, R0, 0), |

2522 | BPF_EXIT_INSN(), |

2523 | }, |

2524 | INTERNAL, |

2525 | { }, |

2526 | { { 0, 3 } }, |

2527 | }, |

2528 | { |

2529 | "ALU_ADD_K: 1 + 4294967294 = 4294967295", |

2530 | .u.insns_int = { |

2531 | BPF_LD_IMM64(R0, 1), |

2532 | BPF_ALU32_IMM(BPF_ADD, R0, 4294967294U), |

2533 | BPF_EXIT_INSN(), |

2534 | }, |

2535 | INTERNAL, |

2536 | { }, |

2537 | { { 0, 4294967295U } }, |

2538 | }, |

2539 | { |

2540 | "ALU_ADD_K: 4294967294 + 2 = 0", |

2541 | .u.insns_int = { |

2542 | BPF_LD_IMM64(R0, 4294967294U), |

2543 | BPF_ALU32_IMM(BPF_ADD, R0, 2), |

2544 | BPF_JMP_IMM(BPF_JEQ, R0, 0, 2), |

2545 | BPF_ALU32_IMM(BPF_MOV, R0, 0), |

2546 | BPF_EXIT_INSN(), |

2547 | BPF_ALU32_IMM(BPF_MOV, R0, 1), |

2548 | BPF_EXIT_INSN(), |

2549 | }, |

2550 | INTERNAL, |

2551 | { }, |

2552 | { { 0, 1 } }, |

2553 | }, |

2554 | { |

2555 | "ALU_ADD_K: 0 + (-1) = 0x00000000ffffffff", |

2556 | .u.insns_int = { |

2557 | BPF_LD_IMM64(R2, 0x0), |

2558 | BPF_LD_IMM64(R3, 0x00000000ffffffff), |

2559 | BPF_ALU32_IMM(BPF_ADD, R2, 0xffffffff), |

2560 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2561 | BPF_MOV32_IMM(R0, 2), |

2562 | BPF_EXIT_INSN(), |

2563 | BPF_MOV32_IMM(R0, 1), |

2564 | BPF_EXIT_INSN(), |

2565 | }, |

2566 | INTERNAL, |

2567 | { }, |

2568 | { { 0, 0x1 } }, |

2569 | }, |

2570 | { |

2571 | "ALU_ADD_K: 0 + 0xffff = 0xffff", |

2572 | .u.insns_int = { |

2573 | BPF_LD_IMM64(R2, 0x0), |

2574 | BPF_LD_IMM64(R3, 0xffff), |

2575 | BPF_ALU32_IMM(BPF_ADD, R2, 0xffff), |

2576 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2577 | BPF_MOV32_IMM(R0, 2), |

2578 | BPF_EXIT_INSN(), |

2579 | BPF_MOV32_IMM(R0, 1), |

2580 | BPF_EXIT_INSN(), |

2581 | }, |

2582 | INTERNAL, |

2583 | { }, |

2584 | { { 0, 0x1 } }, |

2585 | }, |

2586 | { |

2587 | "ALU_ADD_K: 0 + 0x7fffffff = 0x7fffffff", |

2588 | .u.insns_int = { |

2589 | BPF_LD_IMM64(R2, 0x0), |

2590 | BPF_LD_IMM64(R3, 0x7fffffff), |

2591 | BPF_ALU32_IMM(BPF_ADD, R2, 0x7fffffff), |

2592 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2593 | BPF_MOV32_IMM(R0, 2), |

2594 | BPF_EXIT_INSN(), |

2595 | BPF_MOV32_IMM(R0, 1), |

2596 | BPF_EXIT_INSN(), |

2597 | }, |

2598 | INTERNAL, |

2599 | { }, |

2600 | { { 0, 0x1 } }, |

2601 | }, |

2602 | { |

2603 | "ALU_ADD_K: 0 + 0x80000000 = 0x80000000", |

2604 | .u.insns_int = { |

2605 | BPF_LD_IMM64(R2, 0x0), |

2606 | BPF_LD_IMM64(R3, 0x80000000), |

2607 | BPF_ALU32_IMM(BPF_ADD, R2, 0x80000000), |

2608 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2609 | BPF_MOV32_IMM(R0, 2), |

2610 | BPF_EXIT_INSN(), |

2611 | BPF_MOV32_IMM(R0, 1), |

2612 | BPF_EXIT_INSN(), |

2613 | }, |

2614 | INTERNAL, |

2615 | { }, |

2616 | { { 0, 0x1 } }, |

2617 | }, |

2618 | { |

2619 | "ALU_ADD_K: 0 + 0x80008000 = 0x80008000", |

2620 | .u.insns_int = { |

2621 | BPF_LD_IMM64(R2, 0x0), |

2622 | BPF_LD_IMM64(R3, 0x80008000), |

2623 | BPF_ALU32_IMM(BPF_ADD, R2, 0x80008000), |

2624 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2625 | BPF_MOV32_IMM(R0, 2), |

2626 | BPF_EXIT_INSN(), |

2627 | BPF_MOV32_IMM(R0, 1), |

2628 | BPF_EXIT_INSN(), |

2629 | }, |

2630 | INTERNAL, |

2631 | { }, |

2632 | { { 0, 0x1 } }, |

2633 | }, |

2634 | { |

2635 | "ALU64_ADD_K: 1 + 2 = 3", |

2636 | .u.insns_int = { |

2637 | BPF_LD_IMM64(R0, 1), |

2638 | BPF_ALU64_IMM(BPF_ADD, R0, 2), |

2639 | BPF_EXIT_INSN(), |

2640 | }, |

2641 | INTERNAL, |

2642 | { }, |

2643 | { { 0, 3 } }, |

2644 | }, |

2645 | { |

2646 | "ALU64_ADD_K: 3 + 0 = 3", |

2647 | .u.insns_int = { |

2648 | BPF_LD_IMM64(R0, 3), |

2649 | BPF_ALU64_IMM(BPF_ADD, R0, 0), |

2650 | BPF_EXIT_INSN(), |

2651 | }, |

2652 | INTERNAL, |

2653 | { }, |

2654 | { { 0, 3 } }, |

2655 | }, |

2656 | { |

2657 | "ALU64_ADD_K: 1 + 2147483646 = 2147483647", |

2658 | .u.insns_int = { |

2659 | BPF_LD_IMM64(R0, 1), |

2660 | BPF_ALU64_IMM(BPF_ADD, R0, 2147483646), |

2661 | BPF_EXIT_INSN(), |

2662 | }, |

2663 | INTERNAL, |

2664 | { }, |

2665 | { { 0, 2147483647 } }, |

2666 | }, |

2667 | { |

2668 | "ALU64_ADD_K: 4294967294 + 2 = 4294967296", |

2669 | .u.insns_int = { |

2670 | BPF_LD_IMM64(R0, 4294967294U), |

2671 | BPF_LD_IMM64(R1, 4294967296ULL), |

2672 | BPF_ALU64_IMM(BPF_ADD, R0, 2), |

2673 | BPF_JMP_REG(BPF_JEQ, R0, R1, 2), |

2674 | BPF_ALU32_IMM(BPF_MOV, R0, 0), |

2675 | BPF_EXIT_INSN(), |

2676 | BPF_ALU32_IMM(BPF_MOV, R0, 1), |

2677 | BPF_EXIT_INSN(), |

2678 | }, |

2679 | INTERNAL, |

2680 | { }, |

2681 | { { 0, 1 } }, |

2682 | }, |

2683 | { |

2684 | "ALU64_ADD_K: 2147483646 + -2147483647 = -1", |

2685 | .u.insns_int = { |

2686 | BPF_LD_IMM64(R0, 2147483646), |

2687 | BPF_ALU64_IMM(BPF_ADD, R0, -2147483647), |

2688 | BPF_EXIT_INSN(), |

2689 | }, |

2690 | INTERNAL, |

2691 | { }, |

2692 | { { 0, -1 } }, |

2693 | }, |

2694 | { |

2695 | "ALU64_ADD_K: 1 + 0 = 1", |

2696 | .u.insns_int = { |

2697 | BPF_LD_IMM64(R2, 0x1), |

2698 | BPF_LD_IMM64(R3, 0x1), |

2699 | BPF_ALU64_IMM(BPF_ADD, R2, 0x0), |

2700 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2701 | BPF_MOV32_IMM(R0, 2), |

2702 | BPF_EXIT_INSN(), |

2703 | BPF_MOV32_IMM(R0, 1), |

2704 | BPF_EXIT_INSN(), |

2705 | }, |

2706 | INTERNAL, |

2707 | { }, |

2708 | { { 0, 0x1 } }, |

2709 | }, |

2710 | { |

2711 | "ALU64_ADD_K: 0 + (-1) = 0xffffffffffffffff", |

2712 | .u.insns_int = { |

2713 | BPF_LD_IMM64(R2, 0x0), |

2714 | BPF_LD_IMM64(R3, 0xffffffffffffffffLL), |

2715 | BPF_ALU64_IMM(BPF_ADD, R2, 0xffffffff), |

2716 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2717 | BPF_MOV32_IMM(R0, 2), |

2718 | BPF_EXIT_INSN(), |

2719 | BPF_MOV32_IMM(R0, 1), |

2720 | BPF_EXIT_INSN(), |

2721 | }, |

2722 | INTERNAL, |

2723 | { }, |

2724 | { { 0, 0x1 } }, |

2725 | }, |

2726 | { |

2727 | "ALU64_ADD_K: 0 + 0xffff = 0xffff", |

2728 | .u.insns_int = { |

2729 | BPF_LD_IMM64(R2, 0x0), |

2730 | BPF_LD_IMM64(R3, 0xffff), |

2731 | BPF_ALU64_IMM(BPF_ADD, R2, 0xffff), |

2732 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2733 | BPF_MOV32_IMM(R0, 2), |

2734 | BPF_EXIT_INSN(), |

2735 | BPF_MOV32_IMM(R0, 1), |

2736 | BPF_EXIT_INSN(), |

2737 | }, |

2738 | INTERNAL, |

2739 | { }, |

2740 | { { 0, 0x1 } }, |

2741 | }, |

2742 | { |

2743 | "ALU64_ADD_K: 0 + 0x7fffffff = 0x7fffffff", |

2744 | .u.insns_int = { |

2745 | BPF_LD_IMM64(R2, 0x0), |

2746 | BPF_LD_IMM64(R3, 0x7fffffff), |

2747 | BPF_ALU64_IMM(BPF_ADD, R2, 0x7fffffff), |

2748 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2749 | BPF_MOV32_IMM(R0, 2), |

2750 | BPF_EXIT_INSN(), |

2751 | BPF_MOV32_IMM(R0, 1), |

2752 | BPF_EXIT_INSN(), |

2753 | }, |

2754 | INTERNAL, |

2755 | { }, |

2756 | { { 0, 0x1 } }, |

2757 | }, |

2758 | { |

2759 | "ALU64_ADD_K: 0 + 0x80000000 = 0xffffffff80000000", |

2760 | .u.insns_int = { |

2761 | BPF_LD_IMM64(R2, 0x0), |

2762 | BPF_LD_IMM64(R3, 0xffffffff80000000LL), |

2763 | BPF_ALU64_IMM(BPF_ADD, R2, 0x80000000), |

2764 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2765 | BPF_MOV32_IMM(R0, 2), |

2766 | BPF_EXIT_INSN(), |

2767 | BPF_MOV32_IMM(R0, 1), |

2768 | BPF_EXIT_INSN(), |

2769 | }, |

2770 | INTERNAL, |

2771 | { }, |

2772 | { { 0, 0x1 } }, |

2773 | }, |

2774 | { |

2775 | "ALU_ADD_K: 0 + 0x80008000 = 0xffffffff80008000", |

2776 | .u.insns_int = { |

2777 | BPF_LD_IMM64(R2, 0x0), |

2778 | BPF_LD_IMM64(R3, 0xffffffff80008000LL), |

2779 | BPF_ALU64_IMM(BPF_ADD, R2, 0x80008000), |

2780 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

2781 | BPF_MOV32_IMM(R0, 2), |

2782 | BPF_EXIT_INSN(), |

2783 | BPF_MOV32_IMM(R0, 1), |

2784 | BPF_EXIT_INSN(), |

2785 | }, |

2786 | INTERNAL, |

2787 | { }, |

2788 | { { 0, 0x1 } }, |

2789 | }, |

2790 | /* BPF_ALU | BPF_SUB | BPF_X */ |

2791 | { |

2792 | "ALU_SUB_X: 3 - 1 = 2", |

2793 | .u.insns_int = { |

2794 | BPF_LD_IMM64(R0, 3), |

2795 | BPF_ALU32_IMM(BPF_MOV, R1, 1), |

2796 | BPF_ALU32_REG(BPF_SUB, R0, R1), |

2797 | BPF_EXIT_INSN(), |

2798 | }, |

2799 | INTERNAL, |

2800 | { }, |

2801 | { { 0, 2 } }, |

2802 | }, |

2803 | { |

2804 | "ALU_SUB_X: 4294967295 - 4294967294 = 1", |

2805 | .u.insns_int = { |

2806 | BPF_LD_IMM64(R0, 4294967295U), |

2807 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967294U), |

2808 | BPF_ALU32_REG(BPF_SUB, R0, R1), |

2809 | BPF_EXIT_INSN(), |

2810 | }, |

2811 | INTERNAL, |

2812 | { }, |

2813 | { { 0, 1 } }, |

2814 | }, |

2815 | { |

2816 | "ALU64_SUB_X: 3 - 1 = 2", |

2817 | .u.insns_int = { |

2818 | BPF_LD_IMM64(R0, 3), |

2819 | BPF_ALU32_IMM(BPF_MOV, R1, 1), |

2820 | BPF_ALU64_REG(BPF_SUB, R0, R1), |

2821 | BPF_EXIT_INSN(), |

2822 | }, |

2823 | INTERNAL, |

2824 | { }, |

2825 | { { 0, 2 } }, |

2826 | }, |

2827 | { |

2828 | "ALU64_SUB_X: 4294967295 - 4294967294 = 1", |

2829 | .u.insns_int = { |

2830 | BPF_LD_IMM64(R0, 4294967295U), |

2831 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967294U), |

2832 | BPF_ALU64_REG(BPF_SUB, R0, R1), |

2833 | BPF_EXIT_INSN(), |

2834 | }, |

2835 | INTERNAL, |

2836 | { }, |

2837 | { { 0, 1 } }, |

2838 | }, |

2839 | /* BPF_ALU | BPF_SUB | BPF_K */ |

2840 | { |

2841 | "ALU_SUB_K: 3 - 1 = 2", |

2842 | .u.insns_int = { |

2843 | BPF_LD_IMM64(R0, 3), |

2844 | BPF_ALU32_IMM(BPF_SUB, R0, 1), |

2845 | BPF_EXIT_INSN(), |

2846 | }, |

2847 | INTERNAL, |

2848 | { }, |

2849 | { { 0, 2 } }, |

2850 | }, |

2851 | { |

2852 | "ALU_SUB_K: 3 - 0 = 3", |

2853 | .u.insns_int = { |

2854 | BPF_LD_IMM64(R0, 3), |

2855 | BPF_ALU32_IMM(BPF_SUB, R0, 0), |

2856 | BPF_EXIT_INSN(), |

2857 | }, |

2858 | INTERNAL, |

2859 | { }, |

2860 | { { 0, 3 } }, |

2861 | }, |

2862 | { |

2863 | "ALU_SUB_K: 4294967295 - 4294967294 = 1", |

2864 | .u.insns_int = { |

2865 | BPF_LD_IMM64(R0, 4294967295U), |

2866 | BPF_ALU32_IMM(BPF_SUB, R0, 4294967294U), |

2867 | BPF_EXIT_INSN(), |

2868 | }, |

2869 | INTERNAL, |

2870 | { }, |

2871 | { { 0, 1 } }, |

2872 | }, |

2873 | { |

2874 | "ALU64_SUB_K: 3 - 1 = 2", |

2875 | .u.insns_int = { |

2876 | BPF_LD_IMM64(R0, 3), |

2877 | BPF_ALU64_IMM(BPF_SUB, R0, 1), |

2878 | BPF_EXIT_INSN(), |

2879 | }, |

2880 | INTERNAL, |

2881 | { }, |

2882 | { { 0, 2 } }, |

2883 | }, |

2884 | { |

2885 | "ALU64_SUB_K: 3 - 0 = 3", |

2886 | .u.insns_int = { |

2887 | BPF_LD_IMM64(R0, 3), |

2888 | BPF_ALU64_IMM(BPF_SUB, R0, 0), |

2889 | BPF_EXIT_INSN(), |

2890 | }, |

2891 | INTERNAL, |

2892 | { }, |

2893 | { { 0, 3 } }, |

2894 | }, |

2895 | { |

2896 | "ALU64_SUB_K: 4294967294 - 4294967295 = -1", |

2897 | .u.insns_int = { |

2898 | BPF_LD_IMM64(R0, 4294967294U), |

2899 | BPF_ALU64_IMM(BPF_SUB, R0, 4294967295U), |

2900 | BPF_EXIT_INSN(), |

2901 | }, |

2902 | INTERNAL, |

2903 | { }, |

2904 | { { 0, -1 } }, |

2905 | }, |

2906 | { |

2907 | "ALU64_ADD_K: 2147483646 - 2147483647 = -1", |

2908 | .u.insns_int = { |

2909 | BPF_LD_IMM64(R0, 2147483646), |

2910 | BPF_ALU64_IMM(BPF_SUB, R0, 2147483647), |

2911 | BPF_EXIT_INSN(), |

2912 | }, |

2913 | INTERNAL, |

2914 | { }, |

2915 | { { 0, -1 } }, |

2916 | }, |

2917 | /* BPF_ALU | BPF_MUL | BPF_X */ |

2918 | { |

2919 | "ALU_MUL_X: 2 * 3 = 6", |

2920 | .u.insns_int = { |

2921 | BPF_LD_IMM64(R0, 2), |

2922 | BPF_ALU32_IMM(BPF_MOV, R1, 3), |

2923 | BPF_ALU32_REG(BPF_MUL, R0, R1), |

2924 | BPF_EXIT_INSN(), |

2925 | }, |

2926 | INTERNAL, |

2927 | { }, |

2928 | { { 0, 6 } }, |

2929 | }, |

2930 | { |

2931 | "ALU_MUL_X: 2 * 0x7FFFFFF8 = 0xFFFFFFF0", |

2932 | .u.insns_int = { |

2933 | BPF_LD_IMM64(R0, 2), |

2934 | BPF_ALU32_IMM(BPF_MOV, R1, 0x7FFFFFF8), |

2935 | BPF_ALU32_REG(BPF_MUL, R0, R1), |

2936 | BPF_EXIT_INSN(), |

2937 | }, |

2938 | INTERNAL, |

2939 | { }, |

2940 | { { 0, 0xFFFFFFF0 } }, |

2941 | }, |

2942 | { |

2943 | "ALU_MUL_X: -1 * -1 = 1", |

2944 | .u.insns_int = { |

2945 | BPF_LD_IMM64(R0, -1), |

2946 | BPF_ALU32_IMM(BPF_MOV, R1, -1), |

2947 | BPF_ALU32_REG(BPF_MUL, R0, R1), |

2948 | BPF_EXIT_INSN(), |

2949 | }, |

2950 | INTERNAL, |

2951 | { }, |

2952 | { { 0, 1 } }, |

2953 | }, |

2954 | { |

2955 | "ALU64_MUL_X: 2 * 3 = 6", |

2956 | .u.insns_int = { |

2957 | BPF_LD_IMM64(R0, 2), |

2958 | BPF_ALU32_IMM(BPF_MOV, R1, 3), |

2959 | BPF_ALU64_REG(BPF_MUL, R0, R1), |

2960 | BPF_EXIT_INSN(), |

2961 | }, |

2962 | INTERNAL, |

2963 | { }, |

2964 | { { 0, 6 } }, |

2965 | }, |

2966 | { |

2967 | "ALU64_MUL_X: 1 * 2147483647 = 2147483647", |

2968 | .u.insns_int = { |

2969 | BPF_LD_IMM64(R0, 1), |

2970 | BPF_ALU32_IMM(BPF_MOV, R1, 2147483647), |

2971 | BPF_ALU64_REG(BPF_MUL, R0, R1), |

2972 | BPF_EXIT_INSN(), |

2973 | }, |

2974 | INTERNAL, |

2975 | { }, |

2976 | { { 0, 2147483647 } }, |

2977 | }, |

2978 | /* BPF_ALU | BPF_MUL | BPF_K */ |

2979 | { |

2980 | "ALU_MUL_K: 2 * 3 = 6", |

2981 | .u.insns_int = { |

2982 | BPF_LD_IMM64(R0, 2), |

2983 | BPF_ALU32_IMM(BPF_MUL, R0, 3), |

2984 | BPF_EXIT_INSN(), |

2985 | }, |

2986 | INTERNAL, |

2987 | { }, |

2988 | { { 0, 6 } }, |

2989 | }, |

2990 | { |

2991 | "ALU_MUL_K: 3 * 1 = 3", |

2992 | .u.insns_int = { |

2993 | BPF_LD_IMM64(R0, 3), |

2994 | BPF_ALU32_IMM(BPF_MUL, R0, 1), |

2995 | BPF_EXIT_INSN(), |

2996 | }, |

2997 | INTERNAL, |

2998 | { }, |

2999 | { { 0, 3 } }, |

3000 | }, |

3001 | { |

3002 | "ALU_MUL_K: 2 * 0x7FFFFFF8 = 0xFFFFFFF0", |

3003 | .u.insns_int = { |

3004 | BPF_LD_IMM64(R0, 2), |

3005 | BPF_ALU32_IMM(BPF_MUL, R0, 0x7FFFFFF8), |

3006 | BPF_EXIT_INSN(), |

3007 | }, |

3008 | INTERNAL, |

3009 | { }, |

3010 | { { 0, 0xFFFFFFF0 } }, |

3011 | }, |

3012 | { |

3013 | "ALU_MUL_K: 1 * (-1) = 0x00000000ffffffff", |

3014 | .u.insns_int = { |

3015 | BPF_LD_IMM64(R2, 0x1), |

3016 | BPF_LD_IMM64(R3, 0x00000000ffffffff), |

3017 | BPF_ALU32_IMM(BPF_MUL, R2, 0xffffffff), |

3018 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

3019 | BPF_MOV32_IMM(R0, 2), |

3020 | BPF_EXIT_INSN(), |

3021 | BPF_MOV32_IMM(R0, 1), |

3022 | BPF_EXIT_INSN(), |

3023 | }, |

3024 | INTERNAL, |

3025 | { }, |

3026 | { { 0, 0x1 } }, |

3027 | }, |

3028 | { |

3029 | "ALU64_MUL_K: 2 * 3 = 6", |

3030 | .u.insns_int = { |

3031 | BPF_LD_IMM64(R0, 2), |

3032 | BPF_ALU64_IMM(BPF_MUL, R0, 3), |

3033 | BPF_EXIT_INSN(), |

3034 | }, |

3035 | INTERNAL, |

3036 | { }, |

3037 | { { 0, 6 } }, |

3038 | }, |

3039 | { |

3040 | "ALU64_MUL_K: 3 * 1 = 3", |

3041 | .u.insns_int = { |

3042 | BPF_LD_IMM64(R0, 3), |

3043 | BPF_ALU64_IMM(BPF_MUL, R0, 1), |

3044 | BPF_EXIT_INSN(), |

3045 | }, |

3046 | INTERNAL, |

3047 | { }, |

3048 | { { 0, 3 } }, |

3049 | }, |

3050 | { |

3051 | "ALU64_MUL_K: 1 * 2147483647 = 2147483647", |

3052 | .u.insns_int = { |

3053 | BPF_LD_IMM64(R0, 1), |

3054 | BPF_ALU64_IMM(BPF_MUL, R0, 2147483647), |

3055 | BPF_EXIT_INSN(), |

3056 | }, |

3057 | INTERNAL, |

3058 | { }, |

3059 | { { 0, 2147483647 } }, |

3060 | }, |

3061 | { |

3062 | "ALU64_MUL_K: 1 * -2147483647 = -2147483647", |

3063 | .u.insns_int = { |

3064 | BPF_LD_IMM64(R0, 1), |

3065 | BPF_ALU64_IMM(BPF_MUL, R0, -2147483647), |

3066 | BPF_EXIT_INSN(), |

3067 | }, |

3068 | INTERNAL, |

3069 | { }, |

3070 | { { 0, -2147483647 } }, |

3071 | }, |

3072 | { |

3073 | "ALU64_MUL_K: 1 * (-1) = 0xffffffffffffffff", |

3074 | .u.insns_int = { |

3075 | BPF_LD_IMM64(R2, 0x1), |

3076 | BPF_LD_IMM64(R3, 0xffffffffffffffffLL), |

3077 | BPF_ALU64_IMM(BPF_MUL, R2, 0xffffffff), |

3078 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

3079 | BPF_MOV32_IMM(R0, 2), |

3080 | BPF_EXIT_INSN(), |

3081 | BPF_MOV32_IMM(R0, 1), |

3082 | BPF_EXIT_INSN(), |

3083 | }, |

3084 | INTERNAL, |

3085 | { }, |

3086 | { { 0, 0x1 } }, |

3087 | }, |

3088 | /* BPF_ALU | BPF_DIV | BPF_X */ |

3089 | { |

3090 | "ALU_DIV_X: 6 / 2 = 3", |

3091 | .u.insns_int = { |

3092 | BPF_LD_IMM64(R0, 6), |

3093 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

3094 | BPF_ALU32_REG(BPF_DIV, R0, R1), |

3095 | BPF_EXIT_INSN(), |

3096 | }, |

3097 | INTERNAL, |

3098 | { }, |

3099 | { { 0, 3 } }, |

3100 | }, |

3101 | { |

3102 | "ALU_DIV_X: 4294967295 / 4294967295 = 1", |

3103 | .u.insns_int = { |

3104 | BPF_LD_IMM64(R0, 4294967295U), |

3105 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967295U), |

3106 | BPF_ALU32_REG(BPF_DIV, R0, R1), |

3107 | BPF_EXIT_INSN(), |

3108 | }, |

3109 | INTERNAL, |

3110 | { }, |

3111 | { { 0, 1 } }, |

3112 | }, |

3113 | { |

3114 | "ALU64_DIV_X: 6 / 2 = 3", |

3115 | .u.insns_int = { |

3116 | BPF_LD_IMM64(R0, 6), |

3117 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

3118 | BPF_ALU64_REG(BPF_DIV, R0, R1), |

3119 | BPF_EXIT_INSN(), |

3120 | }, |

3121 | INTERNAL, |

3122 | { }, |

3123 | { { 0, 3 } }, |

3124 | }, |

3125 | { |

3126 | "ALU64_DIV_X: 2147483647 / 2147483647 = 1", |

3127 | .u.insns_int = { |

3128 | BPF_LD_IMM64(R0, 2147483647), |

3129 | BPF_ALU32_IMM(BPF_MOV, R1, 2147483647), |

3130 | BPF_ALU64_REG(BPF_DIV, R0, R1), |

3131 | BPF_EXIT_INSN(), |

3132 | }, |

3133 | INTERNAL, |

3134 | { }, |

3135 | { { 0, 1 } }, |

3136 | }, |

3137 | { |

3138 | "ALU64_DIV_X: 0xffffffffffffffff / (-1) = 0x0000000000000001", |

3139 | .u.insns_int = { |

3140 | BPF_LD_IMM64(R2, 0xffffffffffffffffLL), |

3141 | BPF_LD_IMM64(R4, 0xffffffffffffffffLL), |

3142 | BPF_LD_IMM64(R3, 0x0000000000000001LL), |

3143 | BPF_ALU64_REG(BPF_DIV, R2, R4), |

3144 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

3145 | BPF_MOV32_IMM(R0, 2), |

3146 | BPF_EXIT_INSN(), |

3147 | BPF_MOV32_IMM(R0, 1), |

3148 | BPF_EXIT_INSN(), |

3149 | }, |

3150 | INTERNAL, |

3151 | { }, |

3152 | { { 0, 0x1 } }, |

3153 | }, |

3154 | /* BPF_ALU | BPF_DIV | BPF_K */ |

3155 | { |

3156 | "ALU_DIV_K: 6 / 2 = 3", |

3157 | .u.insns_int = { |

3158 | BPF_LD_IMM64(R0, 6), |

3159 | BPF_ALU32_IMM(BPF_DIV, R0, 2), |

3160 | BPF_EXIT_INSN(), |

3161 | }, |

3162 | INTERNAL, |

3163 | { }, |

3164 | { { 0, 3 } }, |

3165 | }, |

3166 | { |

3167 | "ALU_DIV_K: 3 / 1 = 3", |

3168 | .u.insns_int = { |

3169 | BPF_LD_IMM64(R0, 3), |

3170 | BPF_ALU32_IMM(BPF_DIV, R0, 1), |

3171 | BPF_EXIT_INSN(), |

3172 | }, |

3173 | INTERNAL, |

3174 | { }, |

3175 | { { 0, 3 } }, |

3176 | }, |

3177 | { |

3178 | "ALU_DIV_K: 4294967295 / 4294967295 = 1", |

3179 | .u.insns_int = { |

3180 | BPF_LD_IMM64(R0, 4294967295U), |

3181 | BPF_ALU32_IMM(BPF_DIV, R0, 4294967295U), |

3182 | BPF_EXIT_INSN(), |

3183 | }, |

3184 | INTERNAL, |

3185 | { }, |

3186 | { { 0, 1 } }, |

3187 | }, |

3188 | { |

3189 | "ALU_DIV_K: 0xffffffffffffffff / (-1) = 0x1", |

3190 | .u.insns_int = { |

3191 | BPF_LD_IMM64(R2, 0xffffffffffffffffLL), |

3192 | BPF_LD_IMM64(R3, 0x1UL), |

3193 | BPF_ALU32_IMM(BPF_DIV, R2, 0xffffffff), |

3194 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

3195 | BPF_MOV32_IMM(R0, 2), |

3196 | BPF_EXIT_INSN(), |

3197 | BPF_MOV32_IMM(R0, 1), |

3198 | BPF_EXIT_INSN(), |

3199 | }, |

3200 | INTERNAL, |

3201 | { }, |

3202 | { { 0, 0x1 } }, |

3203 | }, |

3204 | { |

3205 | "ALU64_DIV_K: 6 / 2 = 3", |

3206 | .u.insns_int = { |

3207 | BPF_LD_IMM64(R0, 6), |

3208 | BPF_ALU64_IMM(BPF_DIV, R0, 2), |

3209 | BPF_EXIT_INSN(), |

3210 | }, |

3211 | INTERNAL, |

3212 | { }, |

3213 | { { 0, 3 } }, |

3214 | }, |

3215 | { |

3216 | "ALU64_DIV_K: 3 / 1 = 3", |

3217 | .u.insns_int = { |

3218 | BPF_LD_IMM64(R0, 3), |

3219 | BPF_ALU64_IMM(BPF_DIV, R0, 1), |

3220 | BPF_EXIT_INSN(), |

3221 | }, |

3222 | INTERNAL, |

3223 | { }, |

3224 | { { 0, 3 } }, |

3225 | }, |

3226 | { |

3227 | "ALU64_DIV_K: 2147483647 / 2147483647 = 1", |

3228 | .u.insns_int = { |

3229 | BPF_LD_IMM64(R0, 2147483647), |

3230 | BPF_ALU64_IMM(BPF_DIV, R0, 2147483647), |

3231 | BPF_EXIT_INSN(), |

3232 | }, |

3233 | INTERNAL, |

3234 | { }, |

3235 | { { 0, 1 } }, |

3236 | }, |

3237 | { |

3238 | "ALU64_DIV_K: 0xffffffffffffffff / (-1) = 0x0000000000000001", |

3239 | .u.insns_int = { |

3240 | BPF_LD_IMM64(R2, 0xffffffffffffffffLL), |

3241 | BPF_LD_IMM64(R3, 0x0000000000000001LL), |

3242 | BPF_ALU64_IMM(BPF_DIV, R2, 0xffffffff), |

3243 | BPF_JMP_REG(BPF_JEQ, R2, R3, 2), |

3244 | BPF_MOV32_IMM(R0, 2), |

3245 | BPF_EXIT_INSN(), |

3246 | BPF_MOV32_IMM(R0, 1), |

3247 | BPF_EXIT_INSN(), |

3248 | }, |

3249 | INTERNAL, |

3250 | { }, |

3251 | { { 0, 0x1 } }, |

3252 | }, |

3253 | /* BPF_ALU | BPF_MOD | BPF_X */ |

3254 | { |

3255 | "ALU_MOD_X: 3 % 2 = 1", |

3256 | .u.insns_int = { |

3257 | BPF_LD_IMM64(R0, 3), |

3258 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

3259 | BPF_ALU32_REG(BPF_MOD, R0, R1), |

3260 | BPF_EXIT_INSN(), |

3261 | }, |

3262 | INTERNAL, |

3263 | { }, |

3264 | { { 0, 1 } }, |

3265 | }, |

3266 | { |

3267 | "ALU_MOD_X: 4294967295 % 4294967293 = 2", |

3268 | .u.insns_int = { |

3269 | BPF_LD_IMM64(R0, 4294967295U), |

3270 | BPF_ALU32_IMM(BPF_MOV, R1, 4294967293U), |

3271 | BPF_ALU32_REG(BPF_MOD, R0, R1), |

3272 | BPF_EXIT_INSN(), |

3273 | }, |

3274 | INTERNAL, |

3275 | { }, |

3276 | { { 0, 2 } }, |

3277 | }, |

3278 | { |

3279 | "ALU64_MOD_X: 3 % 2 = 1", |

3280 | .u.insns_int = { |

3281 | BPF_LD_IMM64(R0, 3), |

3282 | BPF_ALU32_IMM(BPF_MOV, R1, 2), |

3283 | BPF_ALU64_REG(BPF_MOD, R0, R1), |

3284 | BPF_EXIT_INSN(), |

3285 | }, |

3286 | INTERNAL, |

3287 | { }, |

3288 | { { 0, 1 } }, |

3289 | }, |

3290 | { |

3291 | "ALU64_MOD_X: 2147483647 % 2147483645 = 2", |

3292 | .u.insns_int = { |

3293 | BPF_LD_IMM64(R0, 2147483647), |

3294 | BPF_ALU32_IMM(BPF_MOV, R1, 2147483645), |

3295 | BPF_ALU64_REG(BPF_MOD, R0, R1), |

3296 | BPF_EXIT_INSN(), |

3297 | }, |

3298 | INTERNAL, |

3299 | { }, |

3300 | { { 0, 2 } }, |

3301 | }, |

3302 | /* BPF_ALU | BPF_MOD | BPF_K */ |

3303 | { |

3304 | "ALU_MOD_K: 3 % 2 = 1", |

3305 | .u.insns_int = { |

3306 | BPF_LD_IMM64(R0, 3), |

3307 | BPF_ALU32_IMM(BPF_MOD, R0, 2), |

3308 | BPF_EXIT_INSN(), |

3309 | }, |

3310 | INTERNAL, |

3311 | { }, |

3312 | { { 0, 1 } }, |

3313 | }, |

3314 | { |

3315 | "ALU_MOD_K: 3 % 1 = 0", |

3316 | .u.insns_int = { |

3317 | BPF_LD_IMM64(R0, 3), |

3318 | BPF_ALU32_IMM(BPF_MOD, R0, 1), |

3319 | BPF_EXIT_INSN(), |

3320 | }, |

3321 | INTERNAL, |

3322 | { }, |

3323 | { { 0, 0 } }, |

3324 | }, |

3325 | { |

3326 | "ALU_MOD_K: 4294967295 % 4294967293 = 2", |

3327 | .u.insns_int = { |

3328 |