../
e_asin-fma.c
e_asin-fma4.c
e_asin.c
e_atan2-avx.c
e_atan2-fma.c
e_atan2-fma4.c
e_atan2.c
e_exp-avx.c
e_exp-fma.c
e_exp-fma4.c
e_exp.c
e_exp2f-fma.c
e_exp2f.c
e_expf-fma.c
e_expf.c
e_log-avx.c
e_log-fma.c
e_log-fma4.c
e_log.c
e_log2f-fma.c
e_log2f.c
e_logf-fma.c
e_logf.c
e_pow-fma.c
e_pow-fma4.c
e_pow.c
e_powf-fma.c
e_powf.c
ifunc-avx-fma4.h
ifunc-fma.h
ifunc-fma4.h
ifunc-mathvec-avx2.h
ifunc-mathvec-avx512-skx.h
ifunc-mathvec-avx512.h
ifunc-mathvec-sse4_1.h
ifunc-sse4_1.h
s_atan-avx.c
s_atan-fma.c
s_atan-fma4.c
s_atan.c
s_ceil-c.c
s_ceil-sse4_1.S
s_ceil.c
s_ceilf-c.c
s_ceilf-sse4_1.S
s_ceilf.c
s_cosf-fma.c
s_cosf-sse2.c
s_cosf.c
s_floor-c.c
s_floor-sse4_1.S
s_floor.c
s_floorf-c.c
s_floorf-sse4_1.S
s_floorf.c
s_fma.c
s_fmaf.c
s_nearbyint-c.c
s_nearbyint-sse4_1.S
s_nearbyint.c
s_nearbyintf-c.c
s_nearbyintf-sse4_1.S
s_nearbyintf.c
s_rint-c.c
s_rint-sse4_1.S
s_rint.c
s_rintf-c.c
s_rintf-sse4_1.S
s_rintf.c
s_roundeven-c.c
s_roundeven-sse4_1.S
s_roundeven.c
s_roundevenf-c.c
s_roundevenf-sse4_1.S
s_roundevenf.c
s_sin-avx.c
s_sin-fma.c
s_sin-fma4.c
s_sin.c
s_sincosf-fma.c
s_sincosf-sse2.c
s_sincosf.c
s_sinf-fma.c
s_sinf-sse2.c
s_sinf.c
s_tan-avx.c
s_tan-fma.c
s_tan-fma4.c
s_tan.c
s_trunc-c.c
s_trunc-sse4_1.S
s_trunc.c
s_truncf-c.c
s_truncf-sse4_1.S
s_truncf.c
svml_d_acos2_core-sse2.S
svml_d_acos2_core.c
svml_d_acos2_core_sse4.S
svml_d_acos4_core-sse.S
svml_d_acos4_core.c
svml_d_acos4_core_avx2.S
svml_d_acos8_core-avx2.S
svml_d_acos8_core.c
svml_d_acos8_core_avx512.S
svml_d_acosh2_core-sse2.S
svml_d_acosh2_core.c
svml_d_acosh2_core_sse4.S
svml_d_acosh4_core-sse.S
svml_d_acosh4_core.c
svml_d_acosh4_core_avx2.S
svml_d_acosh8_core-avx2.S
svml_d_acosh8_core.c
svml_d_acosh8_core_avx512.S
svml_d_asin2_core-sse2.S
svml_d_asin2_core.c
svml_d_asin2_core_sse4.S
svml_d_asin4_core-sse.S
svml_d_asin4_core.c
svml_d_asin4_core_avx2.S
svml_d_asin8_core-avx2.S
svml_d_asin8_core.c
svml_d_asin8_core_avx512.S
svml_d_asinh2_core-sse2.S
svml_d_asinh2_core.c
svml_d_asinh2_core_sse4.S
svml_d_asinh4_core-sse.S
svml_d_asinh4_core.c
svml_d_asinh4_core_avx2.S
svml_d_asinh8_core-avx2.S
svml_d_asinh8_core.c
svml_d_asinh8_core_avx512.S
svml_d_atan22_core-sse2.S
svml_d_atan22_core.c
svml_d_atan22_core_sse4.S
svml_d_atan24_core-sse.S
svml_d_atan24_core.c
svml_d_atan24_core_avx2.S
svml_d_atan28_core-avx2.S
svml_d_atan28_core.c
svml_d_atan28_core_avx512.S
svml_d_atan2_core-sse2.S
svml_d_atan2_core.c
svml_d_atan2_core_sse4.S
svml_d_atan4_core-sse.S
svml_d_atan4_core.c
svml_d_atan4_core_avx2.S
svml_d_atan8_core-avx2.S
svml_d_atan8_core.c
svml_d_atan8_core_avx512.S
svml_d_atanh2_core-sse2.S
svml_d_atanh2_core.c
svml_d_atanh2_core_sse4.S
svml_d_atanh4_core-sse.S
svml_d_atanh4_core.c
svml_d_atanh4_core_avx2.S
svml_d_atanh8_core-avx2.S
svml_d_atanh8_core.c
svml_d_atanh8_core_avx512.S
svml_d_cbrt2_core-sse2.S
svml_d_cbrt2_core.c
svml_d_cbrt2_core_sse4.S
svml_d_cbrt4_core-sse.S
svml_d_cbrt4_core.c
svml_d_cbrt4_core_avx2.S
svml_d_cbrt8_core-avx2.S
svml_d_cbrt8_core.c
svml_d_cbrt8_core_avx512.S
svml_d_cos2_core-sse2.S
svml_d_cos2_core.c
svml_d_cos2_core_sse4.S
svml_d_cos4_core-sse.S
svml_d_cos4_core.c
svml_d_cos4_core_avx2.S
svml_d_cos8_core-avx2.S
svml_d_cos8_core.c
svml_d_cos8_core_avx512.S
svml_d_cosh2_core-sse2.S
svml_d_cosh2_core.c
svml_d_cosh2_core_sse4.S
svml_d_cosh4_core-sse.S
svml_d_cosh4_core.c
svml_d_cosh4_core_avx2.S
svml_d_cosh8_core-avx2.S
svml_d_cosh8_core.c
svml_d_cosh8_core_avx512.S
svml_d_erf2_core-sse2.S
svml_d_erf2_core.c
svml_d_erf2_core_sse4.S
svml_d_erf4_core-sse.S
svml_d_erf4_core.c
svml_d_erf4_core_avx2.S
svml_d_erf8_core-avx2.S
svml_d_erf8_core.c
svml_d_erf8_core_avx512.S
svml_d_erfc2_core-sse2.S
svml_d_erfc2_core.c
svml_d_erfc2_core_sse4.S
svml_d_erfc4_core-sse.S
svml_d_erfc4_core.c
svml_d_erfc4_core_avx2.S
svml_d_erfc8_core-avx2.S
svml_d_erfc8_core.c
svml_d_erfc8_core_avx512.S
svml_d_exp102_core-sse2.S
svml_d_exp102_core.c
svml_d_exp102_core_sse4.S
svml_d_exp104_core-sse.S
svml_d_exp104_core.c
svml_d_exp104_core_avx2.S
svml_d_exp108_core-avx2.S
svml_d_exp108_core.c
svml_d_exp108_core_avx512.S
svml_d_exp22_core-sse2.S
svml_d_exp22_core.c
svml_d_exp22_core_sse4.S
svml_d_exp24_core-sse.S
svml_d_exp24_core.c
svml_d_exp24_core_avx2.S
svml_d_exp28_core-avx2.S
svml_d_exp28_core.c
svml_d_exp28_core_avx512.S
svml_d_exp2_core-sse2.S
svml_d_exp2_core.c
svml_d_exp2_core_sse4.S
svml_d_exp4_core-sse.S
svml_d_exp4_core.c
svml_d_exp4_core_avx2.S
svml_d_exp8_core-avx2.S
svml_d_exp8_core.c
svml_d_exp8_core_avx512.S
svml_d_expm12_core-sse2.S
svml_d_expm12_core.c
svml_d_expm12_core_sse4.S
svml_d_expm14_core-sse.S
svml_d_expm14_core.c
svml_d_expm14_core_avx2.S
svml_d_expm18_core-avx2.S
svml_d_expm18_core.c
svml_d_expm18_core_avx512.S
svml_d_hypot2_core-sse2.S
svml_d_hypot2_core.c
svml_d_hypot2_core_sse4.S
svml_d_hypot4_core-sse.S
svml_d_hypot4_core.c
svml_d_hypot4_core_avx2.S
svml_d_hypot8_core-avx2.S
svml_d_hypot8_core.c
svml_d_hypot8_core_avx512.S
svml_d_log102_core-sse2.S
svml_d_log102_core.c
svml_d_log102_core_sse4.S
svml_d_log104_core-sse.S
svml_d_log104_core.c
svml_d_log104_core_avx2.S
svml_d_log108_core-avx2.S
svml_d_log108_core.c
svml_d_log108_core_avx512.S
svml_d_log1p2_core-sse2.S
svml_d_log1p2_core.c
svml_d_log1p2_core_sse4.S
svml_d_log1p4_core-sse.S
svml_d_log1p4_core.c
svml_d_log1p4_core_avx2.S
svml_d_log1p8_core-avx2.S
svml_d_log1p8_core.c
svml_d_log1p8_core_avx512.S
svml_d_log22_core-sse2.S
svml_d_log22_core.c
svml_d_log22_core_sse4.S
svml_d_log24_core-sse.S
svml_d_log24_core.c
svml_d_log24_core_avx2.S
svml_d_log28_core-avx2.S
svml_d_log28_core.c
svml_d_log28_core_avx512.S
svml_d_log2_core-sse2.S
svml_d_log2_core.c
svml_d_log2_core_sse4.S
svml_d_log4_core-sse.S
svml_d_log4_core.c
svml_d_log4_core_avx2.S
svml_d_log8_core-avx2.S
svml_d_log8_core.c
svml_d_log8_core_avx512.S
svml_d_pow2_core-sse2.S
svml_d_pow2_core.c
svml_d_pow2_core_sse4.S
svml_d_pow4_core-sse.S
svml_d_pow4_core.c
svml_d_pow4_core_avx2.S
svml_d_pow8_core-avx2.S
svml_d_pow8_core.c
svml_d_pow8_core_avx512.S
svml_d_sin2_core-sse2.S
svml_d_sin2_core.c
svml_d_sin2_core_sse4.S
svml_d_sin4_core-sse.S
svml_d_sin4_core.c
svml_d_sin4_core_avx2.S
svml_d_sin8_core-avx2.S
svml_d_sin8_core.c
svml_d_sin8_core_avx512.S
svml_d_sincos2_core-sse2.S
svml_d_sincos2_core.c
svml_d_sincos2_core_sse4.S
svml_d_sincos4_core-sse.S
svml_d_sincos4_core.c
svml_d_sincos4_core_avx2.S
svml_d_sincos8_core-avx2.S
svml_d_sincos8_core.c
svml_d_sincos8_core_avx512.S
svml_d_sinh2_core-sse2.S
svml_d_sinh2_core.c
svml_d_sinh2_core_sse4.S
svml_d_sinh4_core-sse.S
svml_d_sinh4_core.c
svml_d_sinh4_core_avx2.S
svml_d_sinh8_core-avx2.S
svml_d_sinh8_core.c
svml_d_sinh8_core_avx512.S
svml_d_tan2_core-sse2.S
svml_d_tan2_core.c
svml_d_tan2_core_sse4.S
svml_d_tan4_core-sse.S
svml_d_tan4_core.c
svml_d_tan4_core_avx2.S
svml_d_tan8_core-avx2.S
svml_d_tan8_core.c
svml_d_tan8_core_avx512.S
svml_d_tanh2_core-sse2.S
svml_d_tanh2_core.c
svml_d_tanh2_core_sse4.S
svml_d_tanh4_core-sse.S
svml_d_tanh4_core.c
svml_d_tanh4_core_avx2.S
svml_d_tanh8_core-avx2.S
svml_d_tanh8_core.c
svml_d_tanh8_core_avx512.S
svml_s_acosf16_core-avx2.S
svml_s_acosf16_core.c
svml_s_acosf16_core_avx512.S
svml_s_acosf4_core-sse2.S
svml_s_acosf4_core.c
svml_s_acosf4_core_sse4.S
svml_s_acosf8_core-sse.S
svml_s_acosf8_core.c
svml_s_acosf8_core_avx2.S
svml_s_acoshf16_core-avx2.S
svml_s_acoshf16_core.c
svml_s_acoshf16_core_avx512.S
svml_s_acoshf4_core-sse2.S
svml_s_acoshf4_core.c
svml_s_acoshf4_core_sse4.S
svml_s_acoshf8_core-sse.S
svml_s_acoshf8_core.c
svml_s_acoshf8_core_avx2.S
svml_s_asinf16_core-avx2.S
svml_s_asinf16_core.c
svml_s_asinf16_core_avx512.S
svml_s_asinf4_core-sse2.S
svml_s_asinf4_core.c
svml_s_asinf4_core_sse4.S
svml_s_asinf8_core-sse.S
svml_s_asinf8_core.c
svml_s_asinf8_core_avx2.S
svml_s_asinhf16_core-avx2.S
svml_s_asinhf16_core.c
svml_s_asinhf16_core_avx512.S
svml_s_asinhf4_core-sse2.S
svml_s_asinhf4_core.c
svml_s_asinhf4_core_sse4.S
svml_s_asinhf8_core-sse.S
svml_s_asinhf8_core.c
svml_s_asinhf8_core_avx2.S
svml_s_atan2f16_core-avx2.S
svml_s_atan2f16_core.c
svml_s_atan2f16_core_avx512.S
svml_s_atan2f4_core-sse2.S
svml_s_atan2f4_core.c
svml_s_atan2f4_core_sse4.S
svml_s_atan2f8_core-sse.S
svml_s_atan2f8_core.c
svml_s_atan2f8_core_avx2.S
svml_s_atanf16_core-avx2.S
svml_s_atanf16_core.c
svml_s_atanf16_core_avx512.S
svml_s_atanf4_core-sse2.S
svml_s_atanf4_core.c
svml_s_atanf4_core_sse4.S
svml_s_atanf8_core-sse.S
svml_s_atanf8_core.c
svml_s_atanf8_core_avx2.S
svml_s_atanhf16_core-avx2.S
svml_s_atanhf16_core.c
svml_s_atanhf16_core_avx512.S
svml_s_atanhf4_core-sse2.S
svml_s_atanhf4_core.c
svml_s_atanhf4_core_sse4.S
svml_s_atanhf8_core-sse.S
svml_s_atanhf8_core.c
svml_s_atanhf8_core_avx2.S
svml_s_cbrtf16_core-avx2.S
svml_s_cbrtf16_core.c
svml_s_cbrtf16_core_avx512.S
svml_s_cbrtf4_core-sse2.S
svml_s_cbrtf4_core.c
svml_s_cbrtf4_core_sse4.S
svml_s_cbrtf8_core-sse.S
svml_s_cbrtf8_core.c
svml_s_cbrtf8_core_avx2.S
svml_s_cosf16_core-avx2.S
svml_s_cosf16_core.c
svml_s_cosf16_core_avx512.S
svml_s_cosf4_core-sse2.S
svml_s_cosf4_core.c
svml_s_cosf4_core_sse4.S
svml_s_cosf8_core-sse.S
svml_s_cosf8_core.c
svml_s_cosf8_core_avx2.S
svml_s_coshf16_core-avx2.S
svml_s_coshf16_core.c
svml_s_coshf16_core_avx512.S
svml_s_coshf4_core-sse2.S
svml_s_coshf4_core.c
svml_s_coshf4_core_sse4.S
svml_s_coshf8_core-sse.S
svml_s_coshf8_core.c
svml_s_coshf8_core_avx2.S
svml_s_erfcf16_core-avx2.S
svml_s_erfcf16_core.c
svml_s_erfcf16_core_avx512.S
svml_s_erfcf4_core-sse2.S
svml_s_erfcf4_core.c
svml_s_erfcf4_core_sse4.S
svml_s_erfcf8_core-sse.S
svml_s_erfcf8_core.c
svml_s_erfcf8_core_avx2.S
svml_s_erff16_core-avx2.S
svml_s_erff16_core.c
svml_s_erff16_core_avx512.S
svml_s_erff4_core-sse2.S
svml_s_erff4_core.c
svml_s_erff4_core_sse4.S
svml_s_erff8_core-sse.S
svml_s_erff8_core.c
svml_s_erff8_core_avx2.S
svml_s_exp10f16_core-avx2.S
svml_s_exp10f16_core.c
svml_s_exp10f16_core_avx512.S
svml_s_exp10f4_core-sse2.S
svml_s_exp10f4_core.c
svml_s_exp10f4_core_sse4.S
svml_s_exp10f8_core-sse.S
svml_s_exp10f8_core.c
svml_s_exp10f8_core_avx2.S
svml_s_exp2f16_core-avx2.S
svml_s_exp2f16_core.c
svml_s_exp2f16_core_avx512.S
svml_s_exp2f4_core-sse2.S
svml_s_exp2f4_core.c
svml_s_exp2f4_core_sse4.S
svml_s_exp2f8_core-sse.S
svml_s_exp2f8_core.c
svml_s_exp2f8_core_avx2.S
svml_s_expf16_core-avx2.S
svml_s_expf16_core.c
svml_s_expf16_core_avx512.S
svml_s_expf4_core-sse2.S
svml_s_expf4_core.c
svml_s_expf4_core_sse4.S
svml_s_expf8_core-sse.S
svml_s_expf8_core.c
svml_s_expf8_core_avx2.S
svml_s_expm1f16_core-avx2.S
svml_s_expm1f16_core.c
svml_s_expm1f16_core_avx512.S
svml_s_expm1f4_core-sse2.S
svml_s_expm1f4_core.c
svml_s_expm1f4_core_sse4.S
svml_s_expm1f8_core-sse.S
svml_s_expm1f8_core.c
svml_s_expm1f8_core_avx2.S
svml_s_hypotf16_core-avx2.S
svml_s_hypotf16_core.c
svml_s_hypotf16_core_avx512.S
svml_s_hypotf4_core-sse2.S
svml_s_hypotf4_core.c
svml_s_hypotf4_core_sse4.S
svml_s_hypotf8_core-sse.S
svml_s_hypotf8_core.c
svml_s_hypotf8_core_avx2.S
svml_s_log10f16_core-avx2.S
svml_s_log10f16_core.c
svml_s_log10f16_core_avx512.S
svml_s_log10f4_core-sse2.S
svml_s_log10f4_core.c
svml_s_log10f4_core_sse4.S
svml_s_log10f8_core-sse.S
svml_s_log10f8_core.c
svml_s_log10f8_core_avx2.S
svml_s_log1pf16_core-avx2.S
svml_s_log1pf16_core.c
svml_s_log1pf16_core_avx512.S
svml_s_log1pf4_core-sse2.S
svml_s_log1pf4_core.c
svml_s_log1pf4_core_sse4.S
svml_s_log1pf8_core-sse.S
svml_s_log1pf8_core.c
svml_s_log1pf8_core_avx2.S
svml_s_log2f16_core-avx2.S
svml_s_log2f16_core.c
svml_s_log2f16_core_avx512.S
svml_s_log2f4_core-sse2.S
svml_s_log2f4_core.c
svml_s_log2f4_core_sse4.S
svml_s_log2f8_core-sse.S
svml_s_log2f8_core.c
svml_s_log2f8_core_avx2.S
svml_s_logf16_core-avx2.S
svml_s_logf16_core.c
svml_s_logf16_core_avx512.S
svml_s_logf4_core-sse2.S
svml_s_logf4_core.c
svml_s_logf4_core_sse4.S
svml_s_logf8_core-sse.S
svml_s_logf8_core.c
svml_s_logf8_core_avx2.S
svml_s_powf16_core-avx2.S
svml_s_powf16_core.c
svml_s_powf16_core_avx512.S
svml_s_powf4_core-sse2.S
svml_s_powf4_core.c
svml_s_powf4_core_sse4.S
svml_s_powf8_core-sse.S
svml_s_powf8_core.c
svml_s_powf8_core_avx2.S
svml_s_sincosf16_core-avx2.S
svml_s_sincosf16_core.c
svml_s_sincosf16_core_avx512.S
svml_s_sincosf4_core-sse2.S
svml_s_sincosf4_core.c
svml_s_sincosf4_core_sse4.S
svml_s_sincosf8_core-sse.S
svml_s_sincosf8_core.c
svml_s_sincosf8_core_avx2.S
svml_s_sinf16_core-avx2.S
svml_s_sinf16_core.c
svml_s_sinf16_core_avx512.S
svml_s_sinf4_core-sse2.S
svml_s_sinf4_core.c
svml_s_sinf4_core_sse4.S
svml_s_sinf8_core-sse.S
svml_s_sinf8_core.c
svml_s_sinf8_core_avx2.S
svml_s_sinhf16_core-avx2.S
svml_s_sinhf16_core.c
svml_s_sinhf16_core_avx512.S
svml_s_sinhf4_core-sse2.S
svml_s_sinhf4_core.c
svml_s_sinhf4_core_sse4.S
svml_s_sinhf8_core-sse.S
svml_s_sinhf8_core.c
svml_s_sinhf8_core_avx2.S
svml_s_tanf16_core-avx2.S
svml_s_tanf16_core.c
svml_s_tanf16_core_avx512.S
svml_s_tanf4_core-sse2.S
svml_s_tanf4_core.c
svml_s_tanf4_core_sse4.S
svml_s_tanf8_core-sse.S
svml_s_tanf8_core.c
svml_s_tanf8_core_avx2.S
svml_s_tanhf16_core-avx2.S
svml_s_tanhf16_core.c
svml_s_tanhf16_core_avx512.S
svml_s_tanhf4_core-sse2.S
svml_s_tanhf4_core.c
svml_s_tanhf4_core_sse4.S
svml_s_tanhf8_core-sse.S
svml_s_tanhf8_core.c
svml_s_tanhf8_core_avx2.S
w_exp.c
w_log.c
w_pow.c
Browse the source code of glibc/glibc/sysdeps/x86_64/fpu/multiarch/ online