1 | /* Convert tree expression to rtl instructions, for GNU compiler. |
2 | Copyright (C) 1988-2024 Free Software Foundation, Inc. |
3 | |
4 | This file is part of GCC. |
5 | |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free |
8 | Software Foundation; either version 3, or (at your option) any later |
9 | version. |
10 | |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. |
15 | |
16 | You should have received a copy of the GNU General Public License |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ |
19 | |
20 | #include "config.h" |
21 | #include "system.h" |
22 | #include "coretypes.h" |
23 | #include "backend.h" |
24 | #include "target.h" |
25 | #include "rtl.h" |
26 | #include "tree.h" |
27 | #include "gimple.h" |
28 | #include "predict.h" |
29 | #include "memmodel.h" |
30 | #include "tm_p.h" |
31 | #include "ssa.h" |
32 | #include "optabs.h" |
33 | #include "expmed.h" |
34 | #include "regs.h" |
35 | #include "emit-rtl.h" |
36 | #include "recog.h" |
37 | #include "cgraph.h" |
38 | #include "diagnostic.h" |
39 | #include "alias.h" |
40 | #include "fold-const.h" |
41 | #include "stor-layout.h" |
42 | #include "attribs.h" |
43 | #include "varasm.h" |
44 | #include "except.h" |
45 | #include "insn-attr.h" |
46 | #include "dojump.h" |
47 | #include "explow.h" |
48 | #include "calls.h" |
49 | #include "stmt.h" |
50 | /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */ |
51 | #include "expr.h" |
52 | #include "optabs-tree.h" |
53 | #include "libfuncs.h" |
54 | #include "reload.h" |
55 | #include "langhooks.h" |
56 | #include "common/common-target.h" |
57 | #include "tree-dfa.h" |
58 | #include "tree-ssa-live.h" |
59 | #include "tree-outof-ssa.h" |
60 | #include "tree-ssa-address.h" |
61 | #include "builtins.h" |
62 | #include "ccmp.h" |
63 | #include "gimple-iterator.h" |
64 | #include "gimple-fold.h" |
65 | #include "rtx-vector-builder.h" |
66 | #include "tree-pretty-print.h" |
67 | #include "flags.h" |
68 | |
69 | |
70 | /* If this is nonzero, we do not bother generating VOLATILE |
71 | around volatile memory references, and we are willing to |
72 | output indirect addresses. If cse is to follow, we reject |
73 | indirect addresses so a useful potential cse is generated; |
74 | if it is used only once, instruction combination will produce |
75 | the same indirect address eventually. */ |
76 | int cse_not_expected; |
77 | |
78 | static bool block_move_libcall_safe_for_call_parm (void); |
79 | static bool emit_block_move_via_pattern (rtx, rtx, rtx, unsigned, unsigned, |
80 | HOST_WIDE_INT, unsigned HOST_WIDE_INT, |
81 | unsigned HOST_WIDE_INT, |
82 | unsigned HOST_WIDE_INT, bool); |
83 | static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned, int); |
84 | static void emit_block_move_via_sized_loop (rtx, rtx, rtx, unsigned, unsigned); |
85 | static void emit_block_move_via_oriented_loop (rtx, rtx, rtx, unsigned, unsigned); |
86 | static rtx emit_block_cmp_via_loop (rtx, rtx, rtx, tree, rtx, bool, |
87 | unsigned, unsigned); |
88 | static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int); |
89 | static rtx_insn *compress_float_constant (rtx, rtx); |
90 | static rtx get_subtarget (rtx); |
91 | static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64, |
92 | machine_mode, tree, alias_set_type, bool, bool); |
93 | |
94 | static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree); |
95 | |
96 | static bool is_aligning_offset (const_tree, const_tree); |
97 | static rtx reduce_to_bit_field_precision (rtx, rtx, tree); |
98 | static rtx do_store_flag (sepops, rtx, machine_mode); |
99 | #ifdef PUSH_ROUNDING |
100 | static void emit_single_push_insn (machine_mode, rtx, tree); |
101 | #endif |
102 | static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, |
103 | profile_probability); |
104 | static rtx const_vector_from_tree (tree); |
105 | static tree tree_expr_size (const_tree); |
106 | static void convert_mode_scalar (rtx, rtx, int); |
107 | |
108 | |
109 | /* This is run to set up which modes can be used |
110 | directly in memory and to initialize the block move optab. It is run |
111 | at the beginning of compilation and when the target is reinitialized. */ |
112 | |
113 | void |
114 | init_expr_target (void) |
115 | { |
116 | rtx pat; |
117 | int num_clobbers; |
118 | rtx mem, mem1; |
119 | rtx reg; |
120 | |
121 | /* Try indexing by frame ptr and try by stack ptr. |
122 | It is known that on the Convex the stack ptr isn't a valid index. |
123 | With luck, one or the other is valid on any machine. */ |
124 | mem = gen_rtx_MEM (word_mode, stack_pointer_rtx); |
125 | mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx); |
126 | |
127 | /* A scratch register we can modify in-place below to avoid |
128 | useless RTL allocations. */ |
129 | reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1); |
130 | |
131 | rtx_insn *insn = as_a<rtx_insn *> (p: rtx_alloc (INSN)); |
132 | pat = gen_rtx_SET (NULL_RTX, NULL_RTX); |
133 | PATTERN (insn) = pat; |
134 | |
135 | for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES; |
136 | mode = (machine_mode) ((int) mode + 1)) |
137 | { |
138 | int regno; |
139 | |
140 | direct_load[(int) mode] = direct_store[(int) mode] = 0; |
141 | PUT_MODE (x: mem, mode); |
142 | PUT_MODE (x: mem1, mode); |
143 | |
144 | /* See if there is some register that can be used in this mode and |
145 | directly loaded or stored from memory. */ |
146 | |
147 | if (mode != VOIDmode && mode != BLKmode) |
148 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER |
149 | && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0); |
150 | regno++) |
151 | { |
152 | if (!targetm.hard_regno_mode_ok (regno, mode)) |
153 | continue; |
154 | |
155 | set_mode_and_regno (reg, mode, regno); |
156 | |
157 | SET_SRC (pat) = mem; |
158 | SET_DEST (pat) = reg; |
159 | if (recog (pat, insn, &num_clobbers) >= 0) |
160 | direct_load[(int) mode] = 1; |
161 | |
162 | SET_SRC (pat) = mem1; |
163 | SET_DEST (pat) = reg; |
164 | if (recog (pat, insn, &num_clobbers) >= 0) |
165 | direct_load[(int) mode] = 1; |
166 | |
167 | SET_SRC (pat) = reg; |
168 | SET_DEST (pat) = mem; |
169 | if (recog (pat, insn, &num_clobbers) >= 0) |
170 | direct_store[(int) mode] = 1; |
171 | |
172 | SET_SRC (pat) = reg; |
173 | SET_DEST (pat) = mem1; |
174 | if (recog (pat, insn, &num_clobbers) >= 0) |
175 | direct_store[(int) mode] = 1; |
176 | } |
177 | } |
178 | |
179 | mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1)); |
180 | |
181 | opt_scalar_float_mode mode_iter; |
182 | FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT) |
183 | { |
184 | scalar_float_mode mode = mode_iter.require (); |
185 | scalar_float_mode srcmode; |
186 | FOR_EACH_MODE_UNTIL (srcmode, mode) |
187 | { |
188 | enum insn_code ic; |
189 | |
190 | ic = can_extend_p (mode, srcmode, 0); |
191 | if (ic == CODE_FOR_nothing) |
192 | continue; |
193 | |
194 | PUT_MODE (x: mem, mode: srcmode); |
195 | |
196 | if (insn_operand_matches (icode: ic, opno: 1, operand: mem)) |
197 | float_extend_from_mem[mode][srcmode] = true; |
198 | } |
199 | } |
200 | } |
201 | |
202 | /* This is run at the start of compiling a function. */ |
203 | |
204 | void |
205 | init_expr (void) |
206 | { |
207 | memset (s: &crtl->expr, c: 0, n: sizeof (crtl->expr)); |
208 | } |
209 | |
210 | /* Copy data from FROM to TO, where the machine modes are not the same. |
211 | Both modes may be integer, or both may be floating, or both may be |
212 | fixed-point. |
213 | UNSIGNEDP should be nonzero if FROM is an unsigned type. |
214 | This causes zero-extension instead of sign-extension. */ |
215 | |
216 | void |
217 | convert_move (rtx to, rtx from, int unsignedp) |
218 | { |
219 | machine_mode to_mode = GET_MODE (to); |
220 | machine_mode from_mode = GET_MODE (from); |
221 | |
222 | gcc_assert (to_mode != BLKmode); |
223 | gcc_assert (from_mode != BLKmode); |
224 | |
225 | /* If the source and destination are already the same, then there's |
226 | nothing to do. */ |
227 | if (to == from) |
228 | return; |
229 | |
230 | /* If FROM is a SUBREG that indicates that we have already done at least |
231 | the required extension, strip it. We don't handle such SUBREGs as |
232 | TO here. */ |
233 | |
234 | scalar_int_mode to_int_mode; |
235 | if (GET_CODE (from) == SUBREG |
236 | && SUBREG_PROMOTED_VAR_P (from) |
237 | && is_a <scalar_int_mode> (m: to_mode, result: &to_int_mode) |
238 | && (GET_MODE_PRECISION (mode: subreg_promoted_mode (x: from)) |
239 | >= GET_MODE_PRECISION (mode: to_int_mode)) |
240 | && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp)) |
241 | { |
242 | scalar_int_mode int_orig_mode; |
243 | scalar_int_mode int_inner_mode; |
244 | machine_mode orig_mode = GET_MODE (from); |
245 | |
246 | from = gen_lowpart (to_int_mode, SUBREG_REG (from)); |
247 | from_mode = to_int_mode; |
248 | |
249 | /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than |
250 | the original mode, but narrower than the inner mode. */ |
251 | if (GET_CODE (from) == SUBREG |
252 | && is_a <scalar_int_mode> (m: orig_mode, result: &int_orig_mode) |
253 | && GET_MODE_PRECISION (mode: to_int_mode) |
254 | > GET_MODE_PRECISION (mode: int_orig_mode) |
255 | && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (from)), |
256 | result: &int_inner_mode) |
257 | && GET_MODE_PRECISION (mode: int_inner_mode) |
258 | > GET_MODE_PRECISION (mode: to_int_mode)) |
259 | { |
260 | SUBREG_PROMOTED_VAR_P (from) = 1; |
261 | SUBREG_PROMOTED_SET (from, unsignedp); |
262 | } |
263 | } |
264 | |
265 | gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to)); |
266 | |
267 | if (to_mode == from_mode |
268 | || (from_mode == VOIDmode && CONSTANT_P (from))) |
269 | { |
270 | emit_move_insn (to, from); |
271 | return; |
272 | } |
273 | |
274 | if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode)) |
275 | { |
276 | if (GET_MODE_UNIT_PRECISION (to_mode) |
277 | > GET_MODE_UNIT_PRECISION (from_mode)) |
278 | { |
279 | optab op = unsignedp ? zext_optab : sext_optab; |
280 | insn_code icode = convert_optab_handler (op, to_mode, from_mode); |
281 | if (icode != CODE_FOR_nothing) |
282 | { |
283 | emit_unop_insn (icode, to, from, |
284 | unsignedp ? ZERO_EXTEND : SIGN_EXTEND); |
285 | return; |
286 | } |
287 | } |
288 | |
289 | if (GET_MODE_UNIT_PRECISION (to_mode) |
290 | < GET_MODE_UNIT_PRECISION (from_mode)) |
291 | { |
292 | insn_code icode = convert_optab_handler (op: trunc_optab, |
293 | to_mode, from_mode); |
294 | if (icode != CODE_FOR_nothing) |
295 | { |
296 | emit_unop_insn (icode, to, from, TRUNCATE); |
297 | return; |
298 | } |
299 | } |
300 | |
301 | gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode), |
302 | GET_MODE_BITSIZE (to_mode))); |
303 | |
304 | if (VECTOR_MODE_P (to_mode)) |
305 | from = simplify_gen_subreg (outermode: to_mode, op: from, GET_MODE (from), byte: 0); |
306 | else |
307 | to = simplify_gen_subreg (outermode: from_mode, op: to, GET_MODE (to), byte: 0); |
308 | |
309 | emit_move_insn (to, from); |
310 | return; |
311 | } |
312 | |
313 | if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT) |
314 | { |
315 | convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp); |
316 | convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp); |
317 | return; |
318 | } |
319 | |
320 | convert_mode_scalar (to, from, unsignedp); |
321 | } |
322 | |
323 | /* Like convert_move, but deals only with scalar modes. */ |
324 | |
325 | static void |
326 | convert_mode_scalar (rtx to, rtx from, int unsignedp) |
327 | { |
328 | /* Both modes should be scalar types. */ |
329 | scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from)); |
330 | scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to)); |
331 | bool to_real = SCALAR_FLOAT_MODE_P (to_mode); |
332 | bool from_real = SCALAR_FLOAT_MODE_P (from_mode); |
333 | enum insn_code code; |
334 | rtx libcall; |
335 | |
336 | gcc_assert (to_real == from_real); |
337 | |
338 | /* rtx code for making an equivalent value. */ |
339 | enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN |
340 | : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND)); |
341 | |
342 | if (to_real) |
343 | { |
344 | rtx value; |
345 | rtx_insn *insns; |
346 | convert_optab tab; |
347 | |
348 | gcc_assert ((GET_MODE_PRECISION (from_mode) |
349 | != GET_MODE_PRECISION (to_mode)) |
350 | || (DECIMAL_FLOAT_MODE_P (from_mode) |
351 | != DECIMAL_FLOAT_MODE_P (to_mode)) |
352 | || (REAL_MODE_FORMAT (from_mode) == &arm_bfloat_half_format |
353 | && REAL_MODE_FORMAT (to_mode) == &ieee_half_format) |
354 | || (REAL_MODE_FORMAT (to_mode) == &arm_bfloat_half_format |
355 | && REAL_MODE_FORMAT (from_mode) == &ieee_half_format)); |
356 | |
357 | if (GET_MODE_PRECISION (mode: from_mode) == GET_MODE_PRECISION (mode: to_mode)) |
358 | /* Conversion between decimal float and binary float, same size. */ |
359 | tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab; |
360 | else if (GET_MODE_PRECISION (mode: from_mode) < GET_MODE_PRECISION (mode: to_mode)) |
361 | tab = sext_optab; |
362 | else |
363 | tab = trunc_optab; |
364 | |
365 | /* Try converting directly if the insn is supported. */ |
366 | |
367 | code = convert_optab_handler (op: tab, to_mode, from_mode); |
368 | if (code != CODE_FOR_nothing) |
369 | { |
370 | emit_unop_insn (code, to, from, |
371 | tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE); |
372 | return; |
373 | } |
374 | |
375 | #ifdef HAVE_SFmode |
376 | if (REAL_MODE_FORMAT (from_mode) == &arm_bfloat_half_format |
377 | && REAL_MODE_FORMAT (SFmode) == &ieee_single_format) |
378 | { |
379 | if (GET_MODE_PRECISION (mode: to_mode) > GET_MODE_PRECISION (SFmode)) |
380 | { |
381 | /* To cut down on libgcc size, implement |
382 | BFmode -> {DF,XF,TF}mode conversions by |
383 | BFmode -> SFmode -> {DF,XF,TF}mode conversions. */ |
384 | rtx temp = gen_reg_rtx (SFmode); |
385 | convert_mode_scalar (to: temp, from, unsignedp); |
386 | convert_mode_scalar (to, from: temp, unsignedp); |
387 | return; |
388 | } |
389 | if (REAL_MODE_FORMAT (to_mode) == &ieee_half_format) |
390 | { |
391 | /* Similarly, implement BFmode -> HFmode as |
392 | BFmode -> SFmode -> HFmode conversion where SFmode |
393 | has superset of BFmode values. We don't need |
394 | to handle sNaNs by raising exception and turning |
395 | it into qNaN though, as that can be done in the |
396 | SFmode -> HFmode conversion too. */ |
397 | rtx temp = gen_reg_rtx (SFmode); |
398 | int save_flag_finite_math_only = flag_finite_math_only; |
399 | flag_finite_math_only = true; |
400 | convert_mode_scalar (to: temp, from, unsignedp); |
401 | flag_finite_math_only = save_flag_finite_math_only; |
402 | convert_mode_scalar (to, from: temp, unsignedp); |
403 | return; |
404 | } |
405 | if (to_mode == SFmode |
406 | && !HONOR_NANS (from_mode) |
407 | && !HONOR_NANS (to_mode) |
408 | && optimize_insn_for_speed_p ()) |
409 | { |
410 | /* If we don't expect sNaNs, for BFmode -> SFmode we can just |
411 | shift the bits up. */ |
412 | machine_mode fromi_mode, toi_mode; |
413 | if (int_mode_for_size (size: GET_MODE_BITSIZE (mode: from_mode), |
414 | limit: 0).exists (mode: &fromi_mode) |
415 | && int_mode_for_size (size: GET_MODE_BITSIZE (mode: to_mode), |
416 | limit: 0).exists (mode: &toi_mode)) |
417 | { |
418 | start_sequence (); |
419 | rtx fromi = lowpart_subreg (outermode: fromi_mode, op: from, innermode: from_mode); |
420 | rtx tof = NULL_RTX; |
421 | if (fromi) |
422 | { |
423 | rtx toi; |
424 | if (GET_MODE (fromi) == VOIDmode) |
425 | toi = simplify_unary_operation (code: ZERO_EXTEND, mode: toi_mode, |
426 | op: fromi, op_mode: fromi_mode); |
427 | else |
428 | { |
429 | toi = gen_reg_rtx (toi_mode); |
430 | convert_mode_scalar (to: toi, from: fromi, unsignedp: 1); |
431 | } |
432 | toi |
433 | = maybe_expand_shift (LSHIFT_EXPR, toi_mode, toi, |
434 | GET_MODE_PRECISION (mode: to_mode) |
435 | - GET_MODE_PRECISION (mode: from_mode), |
436 | NULL_RTX, 1); |
437 | if (toi) |
438 | { |
439 | tof = lowpart_subreg (outermode: to_mode, op: toi, innermode: toi_mode); |
440 | if (tof) |
441 | emit_move_insn (to, tof); |
442 | } |
443 | } |
444 | insns = get_insns (); |
445 | end_sequence (); |
446 | if (tof) |
447 | { |
448 | emit_insn (insns); |
449 | return; |
450 | } |
451 | } |
452 | } |
453 | } |
454 | if (REAL_MODE_FORMAT (from_mode) == &ieee_single_format |
455 | && REAL_MODE_FORMAT (to_mode) == &arm_bfloat_half_format |
456 | && !HONOR_NANS (from_mode) |
457 | && !HONOR_NANS (to_mode) |
458 | && !flag_rounding_math |
459 | && optimize_insn_for_speed_p ()) |
460 | { |
461 | /* If we don't expect qNaNs nor sNaNs and can assume rounding |
462 | to nearest, we can expand the conversion inline as |
463 | (fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16. */ |
464 | machine_mode fromi_mode, toi_mode; |
465 | if (int_mode_for_size (size: GET_MODE_BITSIZE (mode: from_mode), |
466 | limit: 0).exists (mode: &fromi_mode) |
467 | && int_mode_for_size (size: GET_MODE_BITSIZE (mode: to_mode), |
468 | limit: 0).exists (mode: &toi_mode)) |
469 | { |
470 | start_sequence (); |
471 | rtx fromi = lowpart_subreg (outermode: fromi_mode, op: from, innermode: from_mode); |
472 | rtx tof = NULL_RTX; |
473 | do |
474 | { |
475 | if (!fromi) |
476 | break; |
477 | int shift = (GET_MODE_PRECISION (mode: from_mode) |
478 | - GET_MODE_PRECISION (mode: to_mode)); |
479 | rtx temp1 |
480 | = maybe_expand_shift (RSHIFT_EXPR, fromi_mode, fromi, |
481 | shift, NULL_RTX, 1); |
482 | if (!temp1) |
483 | break; |
484 | rtx temp2 |
485 | = expand_binop (fromi_mode, and_optab, temp1, const1_rtx, |
486 | NULL_RTX, 1, OPTAB_DIRECT); |
487 | if (!temp2) |
488 | break; |
489 | rtx temp3 |
490 | = expand_binop (fromi_mode, add_optab, fromi, |
491 | gen_int_mode ((HOST_WIDE_INT_1U |
492 | << (shift - 1)) - 1, |
493 | fromi_mode), NULL_RTX, |
494 | 1, OPTAB_DIRECT); |
495 | if (!temp3) |
496 | break; |
497 | rtx temp4 |
498 | = expand_binop (fromi_mode, add_optab, temp3, temp2, |
499 | NULL_RTX, 1, OPTAB_DIRECT); |
500 | if (!temp4) |
501 | break; |
502 | rtx temp5 = maybe_expand_shift (RSHIFT_EXPR, fromi_mode, |
503 | temp4, shift, NULL_RTX, 1); |
504 | if (!temp5) |
505 | break; |
506 | rtx temp6 = lowpart_subreg (outermode: toi_mode, op: temp5, innermode: fromi_mode); |
507 | if (!temp6) |
508 | break; |
509 | tof = lowpart_subreg (outermode: to_mode, op: force_reg (toi_mode, temp6), |
510 | innermode: toi_mode); |
511 | if (tof) |
512 | emit_move_insn (to, tof); |
513 | } |
514 | while (0); |
515 | insns = get_insns (); |
516 | end_sequence (); |
517 | if (tof) |
518 | { |
519 | emit_insn (insns); |
520 | return; |
521 | } |
522 | } |
523 | } |
524 | #endif |
525 | |
526 | /* Otherwise use a libcall. */ |
527 | libcall = convert_optab_libfunc (tab, to_mode, from_mode); |
528 | |
529 | /* Is this conversion implemented yet? */ |
530 | gcc_assert (libcall); |
531 | |
532 | start_sequence (); |
533 | value = emit_library_call_value (fun: libcall, NULL_RTX, fn_type: LCT_CONST, outmode: to_mode, |
534 | arg1: from, arg1_mode: from_mode); |
535 | insns = get_insns (); |
536 | end_sequence (); |
537 | emit_libcall_block (insns, to, value, |
538 | tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode, |
539 | from) |
540 | : gen_rtx_FLOAT_EXTEND (to_mode, from)); |
541 | return; |
542 | } |
543 | |
544 | /* Handle pointer conversion. */ /* SPEE 900220. */ |
545 | /* If the target has a converter from FROM_MODE to TO_MODE, use it. */ |
546 | { |
547 | convert_optab ctab; |
548 | |
549 | if (GET_MODE_PRECISION (mode: from_mode) > GET_MODE_PRECISION (mode: to_mode)) |
550 | ctab = trunc_optab; |
551 | else if (unsignedp) |
552 | ctab = zext_optab; |
553 | else |
554 | ctab = sext_optab; |
555 | |
556 | if (convert_optab_handler (op: ctab, to_mode, from_mode) |
557 | != CODE_FOR_nothing) |
558 | { |
559 | emit_unop_insn (convert_optab_handler (op: ctab, to_mode, from_mode), |
560 | to, from, UNKNOWN); |
561 | return; |
562 | } |
563 | } |
564 | |
565 | /* Targets are expected to provide conversion insns between PxImode and |
566 | xImode for all MODE_PARTIAL_INT modes they use, but no others. */ |
567 | if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT) |
568 | { |
569 | scalar_int_mode full_mode |
570 | = smallest_int_mode_for_size (size: GET_MODE_BITSIZE (mode: to_mode)); |
571 | |
572 | gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode) |
573 | != CODE_FOR_nothing); |
574 | |
575 | if (full_mode != from_mode) |
576 | from = convert_to_mode (full_mode, from, unsignedp); |
577 | emit_unop_insn (convert_optab_handler (op: trunc_optab, to_mode, from_mode: full_mode), |
578 | to, from, UNKNOWN); |
579 | return; |
580 | } |
581 | if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT) |
582 | { |
583 | rtx new_from; |
584 | scalar_int_mode full_mode |
585 | = smallest_int_mode_for_size (size: GET_MODE_BITSIZE (mode: from_mode)); |
586 | convert_optab ctab = unsignedp ? zext_optab : sext_optab; |
587 | enum insn_code icode; |
588 | |
589 | icode = convert_optab_handler (op: ctab, to_mode: full_mode, from_mode); |
590 | gcc_assert (icode != CODE_FOR_nothing); |
591 | |
592 | if (to_mode == full_mode) |
593 | { |
594 | emit_unop_insn (icode, to, from, UNKNOWN); |
595 | return; |
596 | } |
597 | |
598 | new_from = gen_reg_rtx (full_mode); |
599 | emit_unop_insn (icode, new_from, from, UNKNOWN); |
600 | |
601 | /* else proceed to integer conversions below. */ |
602 | from_mode = full_mode; |
603 | from = new_from; |
604 | } |
605 | |
606 | /* Make sure both are fixed-point modes or both are not. */ |
607 | gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) == |
608 | ALL_SCALAR_FIXED_POINT_MODE_P (to_mode)); |
609 | if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode)) |
610 | { |
611 | /* If we widen from_mode to to_mode and they are in the same class, |
612 | we won't saturate the result. |
613 | Otherwise, always saturate the result to play safe. */ |
614 | if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode) |
615 | && GET_MODE_SIZE (mode: from_mode) < GET_MODE_SIZE (mode: to_mode)) |
616 | expand_fixed_convert (to, from, 0, 0); |
617 | else |
618 | expand_fixed_convert (to, from, 0, 1); |
619 | return; |
620 | } |
621 | |
622 | /* Now both modes are integers. */ |
623 | |
624 | /* Handle expanding beyond a word. */ |
625 | if (GET_MODE_PRECISION (mode: from_mode) < GET_MODE_PRECISION (mode: to_mode) |
626 | && GET_MODE_PRECISION (mode: to_mode) > BITS_PER_WORD) |
627 | { |
628 | rtx_insn *insns; |
629 | rtx lowpart; |
630 | rtx fill_value; |
631 | rtx lowfrom; |
632 | int i; |
633 | scalar_mode lowpart_mode; |
634 | int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD); |
635 | |
636 | /* Try converting directly if the insn is supported. */ |
637 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) |
638 | != CODE_FOR_nothing) |
639 | { |
640 | /* If FROM is a SUBREG, put it into a register. Do this |
641 | so that we always generate the same set of insns for |
642 | better cse'ing; if an intermediate assignment occurred, |
643 | we won't be doing the operation directly on the SUBREG. */ |
644 | if (optimize > 0 && GET_CODE (from) == SUBREG) |
645 | from = force_reg (from_mode, from); |
646 | emit_unop_insn (code, to, from, equiv_code); |
647 | return; |
648 | } |
649 | /* Next, try converting via full word. */ |
650 | else if (GET_MODE_PRECISION (mode: from_mode) < BITS_PER_WORD |
651 | && ((code = can_extend_p (to_mode, word_mode, unsignedp)) |
652 | != CODE_FOR_nothing)) |
653 | { |
654 | rtx word_to = gen_reg_rtx (word_mode); |
655 | if (REG_P (to)) |
656 | { |
657 | if (reg_overlap_mentioned_p (to, from)) |
658 | from = force_reg (from_mode, from); |
659 | emit_clobber (to); |
660 | } |
661 | convert_move (to: word_to, from, unsignedp); |
662 | emit_unop_insn (code, to, word_to, equiv_code); |
663 | return; |
664 | } |
665 | |
666 | /* No special multiword conversion insn; do it by hand. */ |
667 | start_sequence (); |
668 | |
669 | /* Since we will turn this into a no conflict block, we must ensure |
670 | the source does not overlap the target so force it into an isolated |
671 | register when maybe so. Likewise for any MEM input, since the |
672 | conversion sequence might require several references to it and we |
673 | must ensure we're getting the same value every time. */ |
674 | |
675 | if (MEM_P (from) || reg_overlap_mentioned_p (to, from)) |
676 | from = force_reg (from_mode, from); |
677 | |
678 | /* Get a copy of FROM widened to a word, if necessary. */ |
679 | if (GET_MODE_PRECISION (mode: from_mode) < BITS_PER_WORD) |
680 | lowpart_mode = word_mode; |
681 | else |
682 | lowpart_mode = from_mode; |
683 | |
684 | lowfrom = convert_to_mode (lowpart_mode, from, unsignedp); |
685 | |
686 | lowpart = gen_lowpart (lowpart_mode, to); |
687 | emit_move_insn (lowpart, lowfrom); |
688 | |
689 | /* Compute the value to put in each remaining word. */ |
690 | if (unsignedp) |
691 | fill_value = const0_rtx; |
692 | else |
693 | fill_value = emit_store_flag_force (gen_reg_rtx (word_mode), |
694 | LT, lowfrom, const0_rtx, |
695 | lowpart_mode, 0, -1); |
696 | |
697 | /* Fill the remaining words. */ |
698 | for (i = GET_MODE_SIZE (mode: lowpart_mode) / UNITS_PER_WORD; i < nwords; i++) |
699 | { |
700 | int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i); |
701 | rtx subword = operand_subword (to, index, 1, to_mode); |
702 | |
703 | gcc_assert (subword); |
704 | |
705 | if (fill_value != subword) |
706 | emit_move_insn (subword, fill_value); |
707 | } |
708 | |
709 | insns = get_insns (); |
710 | end_sequence (); |
711 | |
712 | emit_insn (insns); |
713 | return; |
714 | } |
715 | |
716 | /* Truncating multi-word to a word or less. */ |
717 | if (GET_MODE_PRECISION (mode: from_mode) > BITS_PER_WORD |
718 | && GET_MODE_PRECISION (mode: to_mode) <= BITS_PER_WORD) |
719 | { |
720 | if (!((MEM_P (from) |
721 | && ! MEM_VOLATILE_P (from) |
722 | && direct_load[(int) to_mode] |
723 | && ! mode_dependent_address_p (XEXP (from, 0), |
724 | MEM_ADDR_SPACE (from))) |
725 | || REG_P (from) |
726 | || GET_CODE (from) == SUBREG)) |
727 | from = force_reg (from_mode, from); |
728 | convert_move (to, gen_lowpart (word_mode, from), unsignedp: 0); |
729 | return; |
730 | } |
731 | |
732 | /* Now follow all the conversions between integers |
733 | no more than a word long. */ |
734 | |
735 | /* For truncation, usually we can just refer to FROM in a narrower mode. */ |
736 | if (GET_MODE_BITSIZE (mode: to_mode) < GET_MODE_BITSIZE (mode: from_mode) |
737 | && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode)) |
738 | { |
739 | if (!((MEM_P (from) |
740 | && ! MEM_VOLATILE_P (from) |
741 | && direct_load[(int) to_mode] |
742 | && ! mode_dependent_address_p (XEXP (from, 0), |
743 | MEM_ADDR_SPACE (from))) |
744 | || REG_P (from) |
745 | || GET_CODE (from) == SUBREG)) |
746 | from = force_reg (from_mode, from); |
747 | if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER |
748 | && !targetm.hard_regno_mode_ok (REGNO (from), to_mode)) |
749 | from = copy_to_reg (from); |
750 | emit_move_insn (to, gen_lowpart (to_mode, from)); |
751 | return; |
752 | } |
753 | |
754 | /* Handle extension. */ |
755 | if (GET_MODE_PRECISION (mode: to_mode) > GET_MODE_PRECISION (mode: from_mode)) |
756 | { |
757 | /* Convert directly if that works. */ |
758 | if ((code = can_extend_p (to_mode, from_mode, unsignedp)) |
759 | != CODE_FOR_nothing) |
760 | { |
761 | emit_unop_insn (code, to, from, equiv_code); |
762 | return; |
763 | } |
764 | else |
765 | { |
766 | rtx tmp; |
767 | int shift_amount; |
768 | |
769 | /* Search for a mode to convert via. */ |
770 | opt_scalar_mode intermediate_iter; |
771 | FOR_EACH_MODE_FROM (intermediate_iter, from_mode) |
772 | { |
773 | scalar_mode intermediate = intermediate_iter.require (); |
774 | if (((can_extend_p (to_mode, intermediate, unsignedp) |
775 | != CODE_FOR_nothing) |
776 | || (GET_MODE_SIZE (mode: to_mode) < GET_MODE_SIZE (mode: intermediate) |
777 | && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, |
778 | intermediate))) |
779 | && (can_extend_p (intermediate, from_mode, unsignedp) |
780 | != CODE_FOR_nothing)) |
781 | { |
782 | convert_move (to, from: convert_to_mode (intermediate, from, |
783 | unsignedp), unsignedp); |
784 | return; |
785 | } |
786 | } |
787 | |
788 | /* No suitable intermediate mode. |
789 | Generate what we need with shifts. */ |
790 | shift_amount = (GET_MODE_PRECISION (mode: to_mode) |
791 | - GET_MODE_PRECISION (mode: from_mode)); |
792 | from = gen_lowpart (to_mode, force_reg (from_mode, from)); |
793 | tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount, |
794 | to, unsignedp); |
795 | tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount, |
796 | to, unsignedp); |
797 | if (tmp != to) |
798 | emit_move_insn (to, tmp); |
799 | return; |
800 | } |
801 | } |
802 | |
803 | /* Support special truncate insns for certain modes. */ |
804 | if (convert_optab_handler (op: trunc_optab, to_mode, |
805 | from_mode) != CODE_FOR_nothing) |
806 | { |
807 | emit_unop_insn (convert_optab_handler (op: trunc_optab, to_mode, from_mode), |
808 | to, from, UNKNOWN); |
809 | return; |
810 | } |
811 | |
812 | /* Handle truncation of volatile memrefs, and so on; |
813 | the things that couldn't be truncated directly, |
814 | and for which there was no special instruction. |
815 | |
816 | ??? Code above formerly short-circuited this, for most integer |
817 | mode pairs, with a force_reg in from_mode followed by a recursive |
818 | call to this routine. Appears always to have been wrong. */ |
819 | if (GET_MODE_PRECISION (mode: to_mode) < GET_MODE_PRECISION (mode: from_mode)) |
820 | { |
821 | rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from)); |
822 | emit_move_insn (to, temp); |
823 | return; |
824 | } |
825 | |
826 | /* Mode combination is not recognized. */ |
827 | gcc_unreachable (); |
828 | } |
829 | |
830 | /* Return an rtx for a value that would result |
831 | from converting X to mode MODE. |
832 | Both X and MODE may be floating, or both integer. |
833 | UNSIGNEDP is nonzero if X is an unsigned value. |
834 | This can be done by referring to a part of X in place |
835 | or by copying to a new temporary with conversion. */ |
836 | |
837 | rtx |
838 | convert_to_mode (machine_mode mode, rtx x, int unsignedp) |
839 | { |
840 | return convert_modes (mode, VOIDmode, x, unsignedp); |
841 | } |
842 | |
843 | /* Return an rtx for a value that would result |
844 | from converting X from mode OLDMODE to mode MODE. |
845 | Both modes may be floating, or both integer. |
846 | UNSIGNEDP is nonzero if X is an unsigned value. |
847 | |
848 | This can be done by referring to a part of X in place |
849 | or by copying to a new temporary with conversion. |
850 | |
851 | You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */ |
852 | |
853 | rtx |
854 | convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp) |
855 | { |
856 | rtx temp; |
857 | scalar_int_mode int_mode; |
858 | |
859 | /* If FROM is a SUBREG that indicates that we have already done at least |
860 | the required extension, strip it. */ |
861 | |
862 | if (GET_CODE (x) == SUBREG |
863 | && SUBREG_PROMOTED_VAR_P (x) |
864 | && is_a <scalar_int_mode> (m: mode, result: &int_mode) |
865 | && (GET_MODE_PRECISION (mode: subreg_promoted_mode (x)) |
866 | >= GET_MODE_PRECISION (mode: int_mode)) |
867 | && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp)) |
868 | { |
869 | scalar_int_mode int_orig_mode; |
870 | scalar_int_mode int_inner_mode; |
871 | machine_mode orig_mode = GET_MODE (x); |
872 | x = gen_lowpart (int_mode, SUBREG_REG (x)); |
873 | |
874 | /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than |
875 | the original mode, but narrower than the inner mode. */ |
876 | if (GET_CODE (x) == SUBREG |
877 | && is_a <scalar_int_mode> (m: orig_mode, result: &int_orig_mode) |
878 | && GET_MODE_PRECISION (mode: int_mode) |
879 | > GET_MODE_PRECISION (mode: int_orig_mode) |
880 | && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (x)), |
881 | result: &int_inner_mode) |
882 | && GET_MODE_PRECISION (mode: int_inner_mode) |
883 | > GET_MODE_PRECISION (mode: int_mode)) |
884 | { |
885 | SUBREG_PROMOTED_VAR_P (x) = 1; |
886 | SUBREG_PROMOTED_SET (x, unsignedp); |
887 | } |
888 | } |
889 | |
890 | if (GET_MODE (x) != VOIDmode) |
891 | oldmode = GET_MODE (x); |
892 | |
893 | if (mode == oldmode) |
894 | return x; |
895 | |
896 | if (CONST_SCALAR_INT_P (x) |
897 | && is_a <scalar_int_mode> (m: mode, result: &int_mode)) |
898 | { |
899 | /* If the caller did not tell us the old mode, then there is not |
900 | much to do with respect to canonicalization. We have to |
901 | assume that all the bits are significant. */ |
902 | if (!is_a <scalar_int_mode> (m: oldmode)) |
903 | oldmode = MAX_MODE_INT; |
904 | wide_int w = wide_int::from (x: rtx_mode_t (x, oldmode), |
905 | precision: GET_MODE_PRECISION (mode: int_mode), |
906 | sgn: unsignedp ? UNSIGNED : SIGNED); |
907 | return immed_wide_int_const (w, int_mode); |
908 | } |
909 | |
910 | /* We can do this with a gen_lowpart if both desired and current modes |
911 | are integer, and this is either a constant integer, a register, or a |
912 | non-volatile MEM. */ |
913 | scalar_int_mode int_oldmode; |
914 | if (is_int_mode (mode, int_mode: &int_mode) |
915 | && is_int_mode (mode: oldmode, int_mode: &int_oldmode) |
916 | && GET_MODE_PRECISION (mode: int_mode) <= GET_MODE_PRECISION (mode: int_oldmode) |
917 | && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode]) |
918 | || CONST_POLY_INT_P (x) |
919 | || (REG_P (x) |
920 | && (!HARD_REGISTER_P (x) |
921 | || targetm.hard_regno_mode_ok (REGNO (x), int_mode)) |
922 | && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x))))) |
923 | return gen_lowpart (int_mode, x); |
924 | |
925 | /* Converting from integer constant into mode is always equivalent to an |
926 | subreg operation. */ |
927 | if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode) |
928 | { |
929 | gcc_assert (known_eq (GET_MODE_BITSIZE (mode), |
930 | GET_MODE_BITSIZE (oldmode))); |
931 | return simplify_gen_subreg (outermode: mode, op: x, innermode: oldmode, byte: 0); |
932 | } |
933 | |
934 | temp = gen_reg_rtx (mode); |
935 | convert_move (to: temp, from: x, unsignedp); |
936 | return temp; |
937 | } |
938 | |
939 | /* Variant of convert_modes for ABI parameter passing/return. |
940 | Return an rtx for a value that would result from converting X from |
941 | a floating point mode FMODE to wider integer mode MODE. */ |
942 | |
943 | rtx |
944 | convert_float_to_wider_int (machine_mode mode, machine_mode fmode, rtx x) |
945 | { |
946 | gcc_assert (SCALAR_INT_MODE_P (mode) && SCALAR_FLOAT_MODE_P (fmode)); |
947 | scalar_int_mode tmp_mode = int_mode_for_mode (fmode).require (); |
948 | rtx tmp = force_reg (tmp_mode, gen_lowpart (tmp_mode, x)); |
949 | return convert_modes (mode, oldmode: tmp_mode, x: tmp, unsignedp: 1); |
950 | } |
951 | |
952 | /* Variant of convert_modes for ABI parameter passing/return. |
953 | Return an rtx for a value that would result from converting X from |
954 | an integer mode IMODE to a narrower floating point mode MODE. */ |
955 | |
956 | rtx |
957 | convert_wider_int_to_float (machine_mode mode, machine_mode imode, rtx x) |
958 | { |
959 | gcc_assert (SCALAR_FLOAT_MODE_P (mode) && SCALAR_INT_MODE_P (imode)); |
960 | scalar_int_mode tmp_mode = int_mode_for_mode (mode).require (); |
961 | rtx tmp = force_reg (tmp_mode, gen_lowpart (tmp_mode, x)); |
962 | return gen_lowpart_SUBREG (mode, tmp); |
963 | } |
964 | |
965 | /* Return the largest alignment we can use for doing a move (or store) |
966 | of MAX_PIECES. ALIGN is the largest alignment we could use. */ |
967 | |
968 | static unsigned int |
969 | alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align) |
970 | { |
971 | scalar_int_mode tmode |
972 | = int_mode_for_size (size: max_pieces * BITS_PER_UNIT, limit: 0).require (); |
973 | |
974 | if (align >= GET_MODE_ALIGNMENT (tmode)) |
975 | align = GET_MODE_ALIGNMENT (tmode); |
976 | else |
977 | { |
978 | scalar_int_mode xmode = NARROWEST_INT_MODE; |
979 | opt_scalar_int_mode mode_iter; |
980 | FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) |
981 | { |
982 | tmode = mode_iter.require (); |
983 | if (GET_MODE_SIZE (mode: tmode) > max_pieces |
984 | || targetm.slow_unaligned_access (tmode, align)) |
985 | break; |
986 | xmode = tmode; |
987 | } |
988 | |
989 | align = MAX (align, GET_MODE_ALIGNMENT (xmode)); |
990 | } |
991 | |
992 | return align; |
993 | } |
994 | |
995 | /* Return true if we know how to implement OP using vectors of bytes. */ |
996 | static bool |
997 | can_use_qi_vectors (by_pieces_operation op) |
998 | { |
999 | return (op == COMPARE_BY_PIECES |
1000 | || op == SET_BY_PIECES |
1001 | || op == CLEAR_BY_PIECES); |
1002 | } |
1003 | |
1004 | /* Return true if optabs exists for the mode and certain by pieces |
1005 | operations. */ |
1006 | static bool |
1007 | by_pieces_mode_supported_p (fixed_size_mode mode, by_pieces_operation op) |
1008 | { |
1009 | if (optab_handler (op: mov_optab, mode) == CODE_FOR_nothing) |
1010 | return false; |
1011 | |
1012 | if ((op == SET_BY_PIECES || op == CLEAR_BY_PIECES) |
1013 | && VECTOR_MODE_P (mode) |
1014 | && optab_handler (op: vec_duplicate_optab, mode) == CODE_FOR_nothing) |
1015 | return false; |
1016 | |
1017 | if (op == COMPARE_BY_PIECES |
1018 | && !can_compare_p (EQ, mode, ccp_jump)) |
1019 | return false; |
1020 | |
1021 | return true; |
1022 | } |
1023 | |
1024 | /* Return the widest mode that can be used to perform part of an |
1025 | operation OP on SIZE bytes. Try to use QI vector modes where |
1026 | possible. */ |
1027 | static fixed_size_mode |
1028 | widest_fixed_size_mode_for_size (unsigned int size, by_pieces_operation op) |
1029 | { |
1030 | fixed_size_mode result = NARROWEST_INT_MODE; |
1031 | |
1032 | gcc_checking_assert (size > 1); |
1033 | |
1034 | /* Use QI vector only if size is wider than a WORD. */ |
1035 | if (can_use_qi_vectors (op) && size > UNITS_PER_WORD) |
1036 | { |
1037 | machine_mode mode; |
1038 | fixed_size_mode candidate; |
1039 | FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT) |
1040 | if (is_a<fixed_size_mode> (m: mode, result: &candidate) |
1041 | && GET_MODE_INNER (candidate) == QImode) |
1042 | { |
1043 | if (GET_MODE_SIZE (mode: candidate) >= size) |
1044 | break; |
1045 | if (by_pieces_mode_supported_p (mode: candidate, op)) |
1046 | result = candidate; |
1047 | } |
1048 | |
1049 | if (result != NARROWEST_INT_MODE) |
1050 | return result; |
1051 | } |
1052 | |
1053 | opt_scalar_int_mode tmode; |
1054 | scalar_int_mode mode; |
1055 | FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT) |
1056 | { |
1057 | mode = tmode.require (); |
1058 | if (GET_MODE_SIZE (mode) < size |
1059 | && by_pieces_mode_supported_p (mode, op)) |
1060 | result = mode; |
1061 | } |
1062 | |
1063 | return result; |
1064 | } |
1065 | |
1066 | /* Determine whether an operation OP on LEN bytes with alignment ALIGN can |
1067 | and should be performed piecewise. */ |
1068 | |
1069 | static bool |
1070 | can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align, |
1071 | enum by_pieces_operation op) |
1072 | { |
1073 | return targetm.use_by_pieces_infrastructure_p (len, align, op, |
1074 | optimize_insn_for_speed_p ()); |
1075 | } |
1076 | |
1077 | /* Determine whether the LEN bytes can be moved by using several move |
1078 | instructions. Return nonzero if a call to move_by_pieces should |
1079 | succeed. */ |
1080 | |
1081 | bool |
1082 | can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align) |
1083 | { |
1084 | return can_do_by_pieces (len, align, op: MOVE_BY_PIECES); |
1085 | } |
1086 | |
1087 | /* Return number of insns required to perform operation OP by pieces |
1088 | for L bytes. ALIGN (in bits) is maximum alignment we can assume. */ |
1089 | |
1090 | unsigned HOST_WIDE_INT |
1091 | by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align, |
1092 | unsigned int max_size, by_pieces_operation op) |
1093 | { |
1094 | unsigned HOST_WIDE_INT n_insns = 0; |
1095 | fixed_size_mode mode; |
1096 | |
1097 | if (targetm.overlap_op_by_pieces_p ()) |
1098 | { |
1099 | /* NB: Round up L and ALIGN to the widest integer mode for |
1100 | MAX_SIZE. */ |
1101 | mode = widest_fixed_size_mode_for_size (size: max_size, op); |
1102 | gcc_assert (optab_handler (mov_optab, mode) != CODE_FOR_nothing); |
1103 | unsigned HOST_WIDE_INT up = ROUND_UP (l, GET_MODE_SIZE (mode)); |
1104 | if (up > l) |
1105 | l = up; |
1106 | align = GET_MODE_ALIGNMENT (mode); |
1107 | } |
1108 | |
1109 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
1110 | |
1111 | while (max_size > 1 && l > 0) |
1112 | { |
1113 | mode = widest_fixed_size_mode_for_size (size: max_size, op); |
1114 | gcc_assert (optab_handler (mov_optab, mode) != CODE_FOR_nothing); |
1115 | |
1116 | unsigned int modesize = GET_MODE_SIZE (mode); |
1117 | |
1118 | if (align >= GET_MODE_ALIGNMENT (mode)) |
1119 | { |
1120 | unsigned HOST_WIDE_INT n_pieces = l / modesize; |
1121 | l %= modesize; |
1122 | switch (op) |
1123 | { |
1124 | default: |
1125 | n_insns += n_pieces; |
1126 | break; |
1127 | |
1128 | case COMPARE_BY_PIECES: |
1129 | int batch = targetm.compare_by_pieces_branch_ratio (mode); |
1130 | int batch_ops = 4 * batch - 1; |
1131 | unsigned HOST_WIDE_INT full = n_pieces / batch; |
1132 | n_insns += full * batch_ops; |
1133 | if (n_pieces % batch != 0) |
1134 | n_insns++; |
1135 | break; |
1136 | |
1137 | } |
1138 | } |
1139 | max_size = modesize; |
1140 | } |
1141 | |
1142 | gcc_assert (!l); |
1143 | return n_insns; |
1144 | } |
1145 | |
1146 | /* Used when performing piecewise block operations, holds information |
1147 | about one of the memory objects involved. The member functions |
1148 | can be used to generate code for loading from the object and |
1149 | updating the address when iterating. */ |
1150 | |
1151 | class pieces_addr |
1152 | { |
1153 | /* The object being referenced, a MEM. Can be NULL_RTX to indicate |
1154 | stack pushes. */ |
1155 | rtx m_obj; |
1156 | /* The address of the object. Can differ from that seen in the |
1157 | MEM rtx if we copied the address to a register. */ |
1158 | rtx m_addr; |
1159 | /* Nonzero if the address on the object has an autoincrement already, |
1160 | signifies whether that was an increment or decrement. */ |
1161 | signed char m_addr_inc; |
1162 | /* Nonzero if we intend to use autoinc without the address already |
1163 | having autoinc form. We will insert add insns around each memory |
1164 | reference, expecting later passes to form autoinc addressing modes. |
1165 | The only supported options are predecrement and postincrement. */ |
1166 | signed char m_explicit_inc; |
1167 | /* True if we have either of the two possible cases of using |
1168 | autoincrement. */ |
1169 | bool m_auto; |
1170 | /* True if this is an address to be used for load operations rather |
1171 | than stores. */ |
1172 | bool m_is_load; |
1173 | |
1174 | /* Optionally, a function to obtain constants for any given offset into |
1175 | the objects, and data associated with it. */ |
1176 | by_pieces_constfn m_constfn; |
1177 | void *m_cfndata; |
1178 | public: |
1179 | pieces_addr (rtx, bool, by_pieces_constfn, void *); |
1180 | rtx adjust (fixed_size_mode, HOST_WIDE_INT, by_pieces_prev * = nullptr); |
1181 | void increment_address (HOST_WIDE_INT); |
1182 | void maybe_predec (HOST_WIDE_INT); |
1183 | void maybe_postinc (HOST_WIDE_INT); |
1184 | void decide_autoinc (machine_mode, bool, HOST_WIDE_INT); |
1185 | int get_addr_inc () |
1186 | { |
1187 | return m_addr_inc; |
1188 | } |
1189 | }; |
1190 | |
1191 | /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is |
1192 | true if the operation to be performed on this object is a load |
1193 | rather than a store. For stores, OBJ can be NULL, in which case we |
1194 | assume the operation is a stack push. For loads, the optional |
1195 | CONSTFN and its associated CFNDATA can be used in place of the |
1196 | memory load. */ |
1197 | |
1198 | pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn, |
1199 | void *cfndata) |
1200 | : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata) |
1201 | { |
1202 | m_addr_inc = 0; |
1203 | m_auto = false; |
1204 | if (obj) |
1205 | { |
1206 | rtx addr = XEXP (obj, 0); |
1207 | rtx_code code = GET_CODE (addr); |
1208 | m_addr = addr; |
1209 | bool dec = code == PRE_DEC || code == POST_DEC; |
1210 | bool inc = code == PRE_INC || code == POST_INC; |
1211 | m_auto = inc || dec; |
1212 | if (m_auto) |
1213 | m_addr_inc = dec ? -1 : 1; |
1214 | |
1215 | /* While we have always looked for these codes here, the code |
1216 | implementing the memory operation has never handled them. |
1217 | Support could be added later if necessary or beneficial. */ |
1218 | gcc_assert (code != PRE_INC && code != POST_DEC); |
1219 | } |
1220 | else |
1221 | { |
1222 | m_addr = NULL_RTX; |
1223 | if (!is_load) |
1224 | { |
1225 | m_auto = true; |
1226 | if (STACK_GROWS_DOWNWARD) |
1227 | m_addr_inc = -1; |
1228 | else |
1229 | m_addr_inc = 1; |
1230 | } |
1231 | else |
1232 | gcc_assert (constfn != NULL); |
1233 | } |
1234 | m_explicit_inc = 0; |
1235 | if (constfn) |
1236 | gcc_assert (is_load); |
1237 | } |
1238 | |
1239 | /* Decide whether to use autoinc for an address involved in a memory op. |
1240 | MODE is the mode of the accesses, REVERSE is true if we've decided to |
1241 | perform the operation starting from the end, and LEN is the length of |
1242 | the operation. Don't override an earlier decision to set m_auto. */ |
1243 | |
1244 | void |
1245 | pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse, |
1246 | HOST_WIDE_INT len) |
1247 | { |
1248 | if (m_auto || m_obj == NULL_RTX) |
1249 | return; |
1250 | |
1251 | bool use_predec = (m_is_load |
1252 | ? USE_LOAD_PRE_DECREMENT (mode) |
1253 | : USE_STORE_PRE_DECREMENT (mode)); |
1254 | bool use_postinc = (m_is_load |
1255 | ? USE_LOAD_POST_INCREMENT (mode) |
1256 | : USE_STORE_POST_INCREMENT (mode)); |
1257 | machine_mode addr_mode = get_address_mode (mem: m_obj); |
1258 | |
1259 | if (use_predec && reverse) |
1260 | { |
1261 | m_addr = copy_to_mode_reg (addr_mode, |
1262 | plus_constant (addr_mode, |
1263 | m_addr, len)); |
1264 | m_auto = true; |
1265 | m_explicit_inc = -1; |
1266 | } |
1267 | else if (use_postinc && !reverse) |
1268 | { |
1269 | m_addr = copy_to_mode_reg (addr_mode, m_addr); |
1270 | m_auto = true; |
1271 | m_explicit_inc = 1; |
1272 | } |
1273 | else if (CONSTANT_P (m_addr)) |
1274 | m_addr = copy_to_mode_reg (addr_mode, m_addr); |
1275 | } |
1276 | |
1277 | /* Adjust the address to refer to the data at OFFSET in MODE. If we |
1278 | are using autoincrement for this address, we don't add the offset, |
1279 | but we still modify the MEM's properties. */ |
1280 | |
1281 | rtx |
1282 | pieces_addr::adjust (fixed_size_mode mode, HOST_WIDE_INT offset, |
1283 | by_pieces_prev *prev) |
1284 | { |
1285 | if (m_constfn) |
1286 | /* Pass the previous data to m_constfn. */ |
1287 | return m_constfn (m_cfndata, prev, offset, mode); |
1288 | if (m_obj == NULL_RTX) |
1289 | return NULL_RTX; |
1290 | if (m_auto) |
1291 | return adjust_automodify_address (m_obj, mode, m_addr, offset); |
1292 | else |
1293 | return adjust_address (m_obj, mode, offset); |
1294 | } |
1295 | |
1296 | /* Emit an add instruction to increment the address by SIZE. */ |
1297 | |
1298 | void |
1299 | pieces_addr::increment_address (HOST_WIDE_INT size) |
1300 | { |
1301 | rtx amount = gen_int_mode (size, GET_MODE (m_addr)); |
1302 | emit_insn (gen_add2_insn (m_addr, amount)); |
1303 | } |
1304 | |
1305 | /* If we are supposed to decrement the address after each access, emit code |
1306 | to do so now. Increment by SIZE (which has should have the correct sign |
1307 | already). */ |
1308 | |
1309 | void |
1310 | pieces_addr::maybe_predec (HOST_WIDE_INT size) |
1311 | { |
1312 | if (m_explicit_inc >= 0) |
1313 | return; |
1314 | gcc_assert (HAVE_PRE_DECREMENT); |
1315 | increment_address (size); |
1316 | } |
1317 | |
1318 | /* If we are supposed to decrement the address after each access, emit code |
1319 | to do so now. Increment by SIZE. */ |
1320 | |
1321 | void |
1322 | pieces_addr::maybe_postinc (HOST_WIDE_INT size) |
1323 | { |
1324 | if (m_explicit_inc <= 0) |
1325 | return; |
1326 | gcc_assert (HAVE_POST_INCREMENT); |
1327 | increment_address (size); |
1328 | } |
1329 | |
1330 | /* This structure is used by do_op_by_pieces to describe the operation |
1331 | to be performed. */ |
1332 | |
1333 | class op_by_pieces_d |
1334 | { |
1335 | private: |
1336 | fixed_size_mode get_usable_mode (fixed_size_mode, unsigned int); |
1337 | fixed_size_mode smallest_fixed_size_mode_for_size (unsigned int); |
1338 | |
1339 | protected: |
1340 | pieces_addr m_to, m_from; |
1341 | /* Make m_len read-only so that smallest_fixed_size_mode_for_size can |
1342 | use it to check the valid mode size. */ |
1343 | const unsigned HOST_WIDE_INT m_len; |
1344 | HOST_WIDE_INT m_offset; |
1345 | unsigned int m_align; |
1346 | unsigned int m_max_size; |
1347 | bool m_reverse; |
1348 | /* True if this is a stack push. */ |
1349 | bool m_push; |
1350 | /* True if targetm.overlap_op_by_pieces_p () returns true. */ |
1351 | bool m_overlap_op_by_pieces; |
1352 | /* The type of operation that we're performing. */ |
1353 | by_pieces_operation m_op; |
1354 | |
1355 | /* Virtual functions, overriden by derived classes for the specific |
1356 | operation. */ |
1357 | virtual void generate (rtx, rtx, machine_mode) = 0; |
1358 | virtual bool prepare_mode (machine_mode, unsigned int) = 0; |
1359 | virtual void finish_mode (machine_mode) |
1360 | { |
1361 | } |
1362 | |
1363 | public: |
1364 | op_by_pieces_d (unsigned int, rtx, bool, rtx, bool, by_pieces_constfn, |
1365 | void *, unsigned HOST_WIDE_INT, unsigned int, bool, |
1366 | by_pieces_operation); |
1367 | void run (); |
1368 | }; |
1369 | |
1370 | /* The constructor for an op_by_pieces_d structure. We require two |
1371 | objects named TO and FROM, which are identified as loads or stores |
1372 | by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN |
1373 | and its associated FROM_CFN_DATA can be used to replace loads with |
1374 | constant values. MAX_PIECES describes the maximum number of bytes |
1375 | at a time which can be moved efficiently. LEN describes the length |
1376 | of the operation. */ |
1377 | |
1378 | op_by_pieces_d::op_by_pieces_d (unsigned int max_pieces, rtx to, |
1379 | bool to_load, rtx from, bool from_load, |
1380 | by_pieces_constfn from_cfn, |
1381 | void *from_cfn_data, |
1382 | unsigned HOST_WIDE_INT len, |
1383 | unsigned int align, bool push, |
1384 | by_pieces_operation op) |
1385 | : m_to (to, to_load, NULL, NULL), |
1386 | m_from (from, from_load, from_cfn, from_cfn_data), |
1387 | m_len (len), m_max_size (max_pieces + 1), |
1388 | m_push (push), m_op (op) |
1389 | { |
1390 | int toi = m_to.get_addr_inc (); |
1391 | int fromi = m_from.get_addr_inc (); |
1392 | if (toi >= 0 && fromi >= 0) |
1393 | m_reverse = false; |
1394 | else if (toi <= 0 && fromi <= 0) |
1395 | m_reverse = true; |
1396 | else |
1397 | gcc_unreachable (); |
1398 | |
1399 | m_offset = m_reverse ? len : 0; |
1400 | align = MIN (to ? MEM_ALIGN (to) : align, |
1401 | from ? MEM_ALIGN (from) : align); |
1402 | |
1403 | /* If copying requires more than two move insns, |
1404 | copy addresses to registers (to make displacements shorter) |
1405 | and use post-increment if available. */ |
1406 | if (by_pieces_ninsns (l: len, align, max_size: m_max_size, op: MOVE_BY_PIECES) > 2) |
1407 | { |
1408 | /* Find the mode of the largest comparison. */ |
1409 | fixed_size_mode mode |
1410 | = widest_fixed_size_mode_for_size (size: m_max_size, op: m_op); |
1411 | |
1412 | m_from.decide_autoinc (mode, reverse: m_reverse, len); |
1413 | m_to.decide_autoinc (mode, reverse: m_reverse, len); |
1414 | } |
1415 | |
1416 | align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); |
1417 | m_align = align; |
1418 | |
1419 | m_overlap_op_by_pieces = targetm.overlap_op_by_pieces_p (); |
1420 | } |
1421 | |
1422 | /* This function returns the largest usable integer mode for LEN bytes |
1423 | whose size is no bigger than size of MODE. */ |
1424 | |
1425 | fixed_size_mode |
1426 | op_by_pieces_d::get_usable_mode (fixed_size_mode mode, unsigned int len) |
1427 | { |
1428 | unsigned int size; |
1429 | do |
1430 | { |
1431 | size = GET_MODE_SIZE (mode); |
1432 | if (len >= size && prepare_mode (mode, m_align)) |
1433 | break; |
1434 | /* widest_fixed_size_mode_for_size checks SIZE > 1. */ |
1435 | mode = widest_fixed_size_mode_for_size (size, op: m_op); |
1436 | } |
1437 | while (1); |
1438 | return mode; |
1439 | } |
1440 | |
1441 | /* Return the smallest integer or QI vector mode that is not narrower |
1442 | than SIZE bytes. */ |
1443 | |
1444 | fixed_size_mode |
1445 | op_by_pieces_d::smallest_fixed_size_mode_for_size (unsigned int size) |
1446 | { |
1447 | /* Use QI vector only for > size of WORD. */ |
1448 | if (can_use_qi_vectors (op: m_op) && size > UNITS_PER_WORD) |
1449 | { |
1450 | machine_mode mode; |
1451 | fixed_size_mode candidate; |
1452 | FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT) |
1453 | if (is_a<fixed_size_mode> (m: mode, result: &candidate) |
1454 | && GET_MODE_INNER (candidate) == QImode) |
1455 | { |
1456 | /* Don't return a mode wider than M_LEN. */ |
1457 | if (GET_MODE_SIZE (mode: candidate) > m_len) |
1458 | break; |
1459 | |
1460 | if (GET_MODE_SIZE (mode: candidate) >= size |
1461 | && by_pieces_mode_supported_p (mode: candidate, op: m_op)) |
1462 | return candidate; |
1463 | } |
1464 | } |
1465 | |
1466 | return smallest_int_mode_for_size (size: size * BITS_PER_UNIT); |
1467 | } |
1468 | |
1469 | /* This function contains the main loop used for expanding a block |
1470 | operation. First move what we can in the largest integer mode, |
1471 | then go to successively smaller modes. For every access, call |
1472 | GENFUN with the two operands and the EXTRA_DATA. */ |
1473 | |
1474 | void |
1475 | op_by_pieces_d::run () |
1476 | { |
1477 | if (m_len == 0) |
1478 | return; |
1479 | |
1480 | unsigned HOST_WIDE_INT length = m_len; |
1481 | |
1482 | /* widest_fixed_size_mode_for_size checks M_MAX_SIZE > 1. */ |
1483 | fixed_size_mode mode |
1484 | = widest_fixed_size_mode_for_size (size: m_max_size, op: m_op); |
1485 | mode = get_usable_mode (mode, len: length); |
1486 | |
1487 | by_pieces_prev to_prev = { .data: nullptr, .mode: mode }; |
1488 | by_pieces_prev from_prev = { .data: nullptr, .mode: mode }; |
1489 | |
1490 | do |
1491 | { |
1492 | unsigned int size = GET_MODE_SIZE (mode); |
1493 | rtx to1 = NULL_RTX, from1; |
1494 | |
1495 | while (length >= size) |
1496 | { |
1497 | if (m_reverse) |
1498 | m_offset -= size; |
1499 | |
1500 | to1 = m_to.adjust (mode, offset: m_offset, prev: &to_prev); |
1501 | to_prev.data = to1; |
1502 | to_prev.mode = mode; |
1503 | from1 = m_from.adjust (mode, offset: m_offset, prev: &from_prev); |
1504 | from_prev.data = from1; |
1505 | from_prev.mode = mode; |
1506 | |
1507 | m_to.maybe_predec (size: -(HOST_WIDE_INT)size); |
1508 | m_from.maybe_predec (size: -(HOST_WIDE_INT)size); |
1509 | |
1510 | generate (to1, from1, mode); |
1511 | |
1512 | m_to.maybe_postinc (size); |
1513 | m_from.maybe_postinc (size); |
1514 | |
1515 | if (!m_reverse) |
1516 | m_offset += size; |
1517 | |
1518 | length -= size; |
1519 | } |
1520 | |
1521 | finish_mode (mode); |
1522 | |
1523 | if (length == 0) |
1524 | return; |
1525 | |
1526 | if (!m_push && m_overlap_op_by_pieces) |
1527 | { |
1528 | /* NB: Generate overlapping operations if it is not a stack |
1529 | push since stack push must not overlap. Get the smallest |
1530 | fixed size mode for M_LEN bytes. */ |
1531 | mode = smallest_fixed_size_mode_for_size (size: length); |
1532 | mode = get_usable_mode (mode, len: GET_MODE_SIZE (mode)); |
1533 | int gap = GET_MODE_SIZE (mode) - length; |
1534 | if (gap > 0) |
1535 | { |
1536 | /* If size of MODE > M_LEN, generate the last operation |
1537 | in MODE for the remaining bytes with ovelapping memory |
1538 | from the previois operation. */ |
1539 | if (m_reverse) |
1540 | m_offset += gap; |
1541 | else |
1542 | m_offset -= gap; |
1543 | length += gap; |
1544 | } |
1545 | } |
1546 | else |
1547 | { |
1548 | /* widest_fixed_size_mode_for_size checks SIZE > 1. */ |
1549 | mode = widest_fixed_size_mode_for_size (size, op: m_op); |
1550 | mode = get_usable_mode (mode, len: length); |
1551 | } |
1552 | } |
1553 | while (1); |
1554 | } |
1555 | |
1556 | /* Derived class from op_by_pieces_d, providing support for block move |
1557 | operations. */ |
1558 | |
1559 | #ifdef PUSH_ROUNDING |
1560 | #define PUSHG_P(to) ((to) == nullptr) |
1561 | #else |
1562 | #define PUSHG_P(to) false |
1563 | #endif |
1564 | |
1565 | class move_by_pieces_d : public op_by_pieces_d |
1566 | { |
1567 | insn_gen_fn m_gen_fun; |
1568 | void generate (rtx, rtx, machine_mode) final override; |
1569 | bool prepare_mode (machine_mode, unsigned int) final override; |
1570 | |
1571 | public: |
1572 | move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len, |
1573 | unsigned int align) |
1574 | : op_by_pieces_d (MOVE_MAX_PIECES, to, false, from, true, NULL, |
1575 | NULL, len, align, PUSHG_P (to), MOVE_BY_PIECES) |
1576 | { |
1577 | } |
1578 | rtx finish_retmode (memop_ret); |
1579 | }; |
1580 | |
1581 | /* Return true if MODE can be used for a set of copies, given an |
1582 | alignment ALIGN. Prepare whatever data is necessary for later |
1583 | calls to generate. */ |
1584 | |
1585 | bool |
1586 | move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) |
1587 | { |
1588 | insn_code icode = optab_handler (op: mov_optab, mode); |
1589 | m_gen_fun = GEN_FCN (icode); |
1590 | return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode); |
1591 | } |
1592 | |
1593 | /* A callback used when iterating for a compare_by_pieces_operation. |
1594 | OP0 and OP1 are the values that have been loaded and should be |
1595 | compared in MODE. If OP0 is NULL, this means we should generate a |
1596 | push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn |
1597 | gen function that should be used to generate the mode. */ |
1598 | |
1599 | void |
1600 | move_by_pieces_d::generate (rtx op0, rtx op1, |
1601 | machine_mode mode ATTRIBUTE_UNUSED) |
1602 | { |
1603 | #ifdef PUSH_ROUNDING |
1604 | if (op0 == NULL_RTX) |
1605 | { |
1606 | emit_single_push_insn (mode, op1, NULL); |
1607 | return; |
1608 | } |
1609 | #endif |
1610 | emit_insn (m_gen_fun (op0, op1)); |
1611 | } |
1612 | |
1613 | /* Perform the final adjustment at the end of a string to obtain the |
1614 | correct return value for the block operation. |
1615 | Return value is based on RETMODE argument. */ |
1616 | |
1617 | rtx |
1618 | move_by_pieces_d::finish_retmode (memop_ret retmode) |
1619 | { |
1620 | gcc_assert (!m_reverse); |
1621 | if (retmode == RETURN_END_MINUS_ONE) |
1622 | { |
1623 | m_to.maybe_postinc (size: -1); |
1624 | --m_offset; |
1625 | } |
1626 | return m_to.adjust (QImode, offset: m_offset); |
1627 | } |
1628 | |
1629 | /* Generate several move instructions to copy LEN bytes from block FROM to |
1630 | block TO. (These are MEM rtx's with BLKmode). |
1631 | |
1632 | If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is |
1633 | used to push FROM to the stack. |
1634 | |
1635 | ALIGN is maximum stack alignment we can assume. |
1636 | |
1637 | Return value is based on RETMODE argument. */ |
1638 | |
1639 | rtx |
1640 | move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len, |
1641 | unsigned int align, memop_ret retmode) |
1642 | { |
1643 | #ifndef PUSH_ROUNDING |
1644 | if (to == NULL) |
1645 | gcc_unreachable (); |
1646 | #endif |
1647 | |
1648 | move_by_pieces_d data (to, from, len, align); |
1649 | |
1650 | data.run (); |
1651 | |
1652 | if (retmode != RETURN_BEGIN) |
1653 | return data.finish_retmode (retmode); |
1654 | else |
1655 | return to; |
1656 | } |
1657 | |
1658 | /* Derived class from op_by_pieces_d, providing support for block move |
1659 | operations. */ |
1660 | |
1661 | class store_by_pieces_d : public op_by_pieces_d |
1662 | { |
1663 | insn_gen_fn m_gen_fun; |
1664 | |
1665 | void generate (rtx, rtx, machine_mode) final override; |
1666 | bool prepare_mode (machine_mode, unsigned int) final override; |
1667 | |
1668 | public: |
1669 | store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data, |
1670 | unsigned HOST_WIDE_INT len, unsigned int align, |
1671 | by_pieces_operation op) |
1672 | : op_by_pieces_d (STORE_MAX_PIECES, to, false, NULL_RTX, true, cfn, |
1673 | cfn_data, len, align, false, op) |
1674 | { |
1675 | } |
1676 | rtx finish_retmode (memop_ret); |
1677 | }; |
1678 | |
1679 | /* Return true if MODE can be used for a set of stores, given an |
1680 | alignment ALIGN. Prepare whatever data is necessary for later |
1681 | calls to generate. */ |
1682 | |
1683 | bool |
1684 | store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) |
1685 | { |
1686 | insn_code icode = optab_handler (op: mov_optab, mode); |
1687 | m_gen_fun = GEN_FCN (icode); |
1688 | return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode); |
1689 | } |
1690 | |
1691 | /* A callback used when iterating for a store_by_pieces_operation. |
1692 | OP0 and OP1 are the values that have been loaded and should be |
1693 | compared in MODE. If OP0 is NULL, this means we should generate a |
1694 | push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn |
1695 | gen function that should be used to generate the mode. */ |
1696 | |
1697 | void |
1698 | store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode) |
1699 | { |
1700 | emit_insn (m_gen_fun (op0, op1)); |
1701 | } |
1702 | |
1703 | /* Perform the final adjustment at the end of a string to obtain the |
1704 | correct return value for the block operation. |
1705 | Return value is based on RETMODE argument. */ |
1706 | |
1707 | rtx |
1708 | store_by_pieces_d::finish_retmode (memop_ret retmode) |
1709 | { |
1710 | gcc_assert (!m_reverse); |
1711 | if (retmode == RETURN_END_MINUS_ONE) |
1712 | { |
1713 | m_to.maybe_postinc (size: -1); |
1714 | --m_offset; |
1715 | } |
1716 | return m_to.adjust (QImode, offset: m_offset); |
1717 | } |
1718 | |
1719 | /* Determine whether the LEN bytes generated by CONSTFUN can be |
1720 | stored to memory using several move instructions. CONSTFUNDATA is |
1721 | a pointer which will be passed as argument in every CONSTFUN call. |
1722 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
1723 | a memset operation and false if it's a copy of a constant string. |
1724 | Return true if a call to store_by_pieces should succeed. */ |
1725 | |
1726 | bool |
1727 | can_store_by_pieces (unsigned HOST_WIDE_INT len, |
1728 | by_pieces_constfn constfun, |
1729 | void *constfundata, unsigned int align, bool memsetp) |
1730 | { |
1731 | unsigned HOST_WIDE_INT l; |
1732 | unsigned int max_size; |
1733 | HOST_WIDE_INT offset = 0; |
1734 | enum insn_code icode; |
1735 | int reverse; |
1736 | /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */ |
1737 | rtx cst ATTRIBUTE_UNUSED; |
1738 | |
1739 | if (len == 0) |
1740 | return true; |
1741 | |
1742 | if (!targetm.use_by_pieces_infrastructure_p (len, align, |
1743 | memsetp |
1744 | ? SET_BY_PIECES |
1745 | : STORE_BY_PIECES, |
1746 | optimize_insn_for_speed_p ())) |
1747 | return false; |
1748 | |
1749 | align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); |
1750 | |
1751 | /* We would first store what we can in the largest integer mode, then go to |
1752 | successively smaller modes. */ |
1753 | |
1754 | for (reverse = 0; |
1755 | reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT); |
1756 | reverse++) |
1757 | { |
1758 | l = len; |
1759 | max_size = STORE_MAX_PIECES + 1; |
1760 | while (max_size > 1 && l > 0) |
1761 | { |
1762 | auto op = memsetp ? SET_BY_PIECES : STORE_BY_PIECES; |
1763 | auto mode = widest_fixed_size_mode_for_size (size: max_size, op); |
1764 | |
1765 | icode = optab_handler (op: mov_optab, mode); |
1766 | if (icode != CODE_FOR_nothing |
1767 | && align >= GET_MODE_ALIGNMENT (mode)) |
1768 | { |
1769 | unsigned int size = GET_MODE_SIZE (mode); |
1770 | |
1771 | while (l >= size) |
1772 | { |
1773 | if (reverse) |
1774 | offset -= size; |
1775 | |
1776 | cst = (*constfun) (constfundata, nullptr, offset, mode); |
1777 | /* All CONST_VECTORs can be loaded for memset since |
1778 | vec_duplicate_optab is a precondition to pick a |
1779 | vector mode for the memset expander. */ |
1780 | if (!((memsetp && VECTOR_MODE_P (mode)) |
1781 | || targetm.legitimate_constant_p (mode, cst))) |
1782 | return false; |
1783 | |
1784 | if (!reverse) |
1785 | offset += size; |
1786 | |
1787 | l -= size; |
1788 | } |
1789 | } |
1790 | |
1791 | max_size = GET_MODE_SIZE (mode); |
1792 | } |
1793 | |
1794 | /* The code above should have handled everything. */ |
1795 | gcc_assert (!l); |
1796 | } |
1797 | |
1798 | return true; |
1799 | } |
1800 | |
1801 | /* Generate several move instructions to store LEN bytes generated by |
1802 | CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a |
1803 | pointer which will be passed as argument in every CONSTFUN call. |
1804 | ALIGN is maximum alignment we can assume. MEMSETP is true if this is |
1805 | a memset operation and false if it's a copy of a constant string. |
1806 | Return value is based on RETMODE argument. */ |
1807 | |
1808 | rtx |
1809 | store_by_pieces (rtx to, unsigned HOST_WIDE_INT len, |
1810 | by_pieces_constfn constfun, |
1811 | void *constfundata, unsigned int align, bool memsetp, |
1812 | memop_ret retmode) |
1813 | { |
1814 | if (len == 0) |
1815 | { |
1816 | gcc_assert (retmode != RETURN_END_MINUS_ONE); |
1817 | return to; |
1818 | } |
1819 | |
1820 | gcc_assert (targetm.use_by_pieces_infrastructure_p |
1821 | (len, align, |
1822 | memsetp ? SET_BY_PIECES : STORE_BY_PIECES, |
1823 | optimize_insn_for_speed_p ())); |
1824 | |
1825 | store_by_pieces_d data (to, constfun, constfundata, len, align, |
1826 | memsetp ? SET_BY_PIECES : STORE_BY_PIECES); |
1827 | data.run (); |
1828 | |
1829 | if (retmode != RETURN_BEGIN) |
1830 | return data.finish_retmode (retmode); |
1831 | else |
1832 | return to; |
1833 | } |
1834 | |
1835 | /* Generate several move instructions to clear LEN bytes of block TO. (A MEM |
1836 | rtx with BLKmode). ALIGN is maximum alignment we can assume. */ |
1837 | |
1838 | static void |
1839 | clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align) |
1840 | { |
1841 | if (len == 0) |
1842 | return; |
1843 | |
1844 | /* Use builtin_memset_read_str to support vector mode broadcast. */ |
1845 | char c = 0; |
1846 | store_by_pieces_d data (to, builtin_memset_read_str, &c, len, align, |
1847 | CLEAR_BY_PIECES); |
1848 | data.run (); |
1849 | } |
1850 | |
1851 | /* Context used by compare_by_pieces_genfn. It stores the fail label |
1852 | to jump to in case of miscomparison, and for branch ratios greater than 1, |
1853 | it stores an accumulator and the current and maximum counts before |
1854 | emitting another branch. */ |
1855 | |
1856 | class compare_by_pieces_d : public op_by_pieces_d |
1857 | { |
1858 | rtx_code_label *m_fail_label; |
1859 | rtx m_accumulator; |
1860 | int m_count, m_batch; |
1861 | |
1862 | void generate (rtx, rtx, machine_mode) final override; |
1863 | bool prepare_mode (machine_mode, unsigned int) final override; |
1864 | void finish_mode (machine_mode) final override; |
1865 | |
1866 | public: |
1867 | compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn, |
1868 | void *op1_cfn_data, HOST_WIDE_INT len, int align, |
1869 | rtx_code_label *fail_label) |
1870 | : op_by_pieces_d (COMPARE_MAX_PIECES, op0, true, op1, true, op1_cfn, |
1871 | op1_cfn_data, len, align, false, COMPARE_BY_PIECES) |
1872 | { |
1873 | m_fail_label = fail_label; |
1874 | } |
1875 | }; |
1876 | |
1877 | /* A callback used when iterating for a compare_by_pieces_operation. |
1878 | OP0 and OP1 are the values that have been loaded and should be |
1879 | compared in MODE. DATA holds a pointer to the compare_by_pieces_data |
1880 | context structure. */ |
1881 | |
1882 | void |
1883 | compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode) |
1884 | { |
1885 | if (m_batch > 1) |
1886 | { |
1887 | rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX, |
1888 | true, OPTAB_LIB_WIDEN); |
1889 | if (m_count != 0) |
1890 | temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp, |
1891 | true, OPTAB_LIB_WIDEN); |
1892 | m_accumulator = temp; |
1893 | |
1894 | if (++m_count < m_batch) |
1895 | return; |
1896 | |
1897 | m_count = 0; |
1898 | op0 = m_accumulator; |
1899 | op1 = const0_rtx; |
1900 | m_accumulator = NULL_RTX; |
1901 | } |
1902 | do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL, |
1903 | m_fail_label, profile_probability::uninitialized ()); |
1904 | } |
1905 | |
1906 | /* Return true if MODE can be used for a set of moves and comparisons, |
1907 | given an alignment ALIGN. Prepare whatever data is necessary for |
1908 | later calls to generate. */ |
1909 | |
1910 | bool |
1911 | compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) |
1912 | { |
1913 | insn_code icode = optab_handler (op: mov_optab, mode); |
1914 | if (icode == CODE_FOR_nothing |
1915 | || align < GET_MODE_ALIGNMENT (mode) |
1916 | || !can_compare_p (EQ, mode, ccp_jump)) |
1917 | return false; |
1918 | m_batch = targetm.compare_by_pieces_branch_ratio (mode); |
1919 | if (m_batch < 0) |
1920 | return false; |
1921 | m_accumulator = NULL_RTX; |
1922 | m_count = 0; |
1923 | return true; |
1924 | } |
1925 | |
1926 | /* Called after expanding a series of comparisons in MODE. If we have |
1927 | accumulated results for which we haven't emitted a branch yet, do |
1928 | so now. */ |
1929 | |
1930 | void |
1931 | compare_by_pieces_d::finish_mode (machine_mode mode) |
1932 | { |
1933 | if (m_accumulator != NULL_RTX) |
1934 | do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode, |
1935 | NULL_RTX, NULL, m_fail_label, |
1936 | profile_probability::uninitialized ()); |
1937 | } |
1938 | |
1939 | /* Generate several move instructions to compare LEN bytes from blocks |
1940 | ARG0 and ARG1. (These are MEM rtx's with BLKmode). |
1941 | |
1942 | If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is |
1943 | used to push FROM to the stack. |
1944 | |
1945 | ALIGN is maximum stack alignment we can assume. |
1946 | |
1947 | Optionally, the caller can pass a constfn and associated data in A1_CFN |
1948 | and A1_CFN_DATA. describing that the second operand being compared is a |
1949 | known constant and how to obtain its data. */ |
1950 | |
1951 | static rtx |
1952 | compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len, |
1953 | rtx target, unsigned int align, |
1954 | by_pieces_constfn a1_cfn, void *a1_cfn_data) |
1955 | { |
1956 | rtx_code_label *fail_label = gen_label_rtx (); |
1957 | rtx_code_label *end_label = gen_label_rtx (); |
1958 | |
1959 | if (target == NULL_RTX |
1960 | || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) |
1961 | target = gen_reg_rtx (TYPE_MODE (integer_type_node)); |
1962 | |
1963 | compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align, |
1964 | fail_label); |
1965 | |
1966 | data.run (); |
1967 | |
1968 | emit_move_insn (target, const0_rtx); |
1969 | emit_jump (end_label); |
1970 | emit_barrier (); |
1971 | emit_label (fail_label); |
1972 | emit_move_insn (target, const1_rtx); |
1973 | emit_label (end_label); |
1974 | |
1975 | return target; |
1976 | } |
1977 | |
1978 | /* Emit code to move a block Y to a block X. This may be done with |
1979 | string-move instructions, with multiple scalar move instructions, |
1980 | or with a library call. |
1981 | |
1982 | Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode. |
1983 | SIZE is an rtx that says how long they are. |
1984 | ALIGN is the maximum alignment we can assume they have. |
1985 | METHOD describes what kind of copy this is, and what mechanisms may be used. |
1986 | MIN_SIZE is the minimal size of block to move |
1987 | MAX_SIZE is the maximal size of block to move, if it cannot be represented |
1988 | in unsigned HOST_WIDE_INT, than it is mask of all ones. |
1989 | CTZ_SIZE is the trailing-zeros count of SIZE; even a nonconstant SIZE is |
1990 | known to be a multiple of 1<<CTZ_SIZE. |
1991 | |
1992 | Return the address of the new block, if memcpy is called and returns it, |
1993 | 0 otherwise. */ |
1994 | |
1995 | rtx |
1996 | emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method, |
1997 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
1998 | unsigned HOST_WIDE_INT min_size, |
1999 | unsigned HOST_WIDE_INT max_size, |
2000 | unsigned HOST_WIDE_INT probable_max_size, |
2001 | bool bail_out_libcall, bool *is_move_done, |
2002 | bool might_overlap, unsigned ctz_size) |
2003 | { |
2004 | int may_use_call; |
2005 | rtx retval = 0; |
2006 | unsigned int align; |
2007 | |
2008 | if (is_move_done) |
2009 | *is_move_done = true; |
2010 | |
2011 | gcc_assert (size); |
2012 | if (CONST_INT_P (size) && INTVAL (size) == 0) |
2013 | return 0; |
2014 | |
2015 | switch (method) |
2016 | { |
2017 | case BLOCK_OP_NORMAL: |
2018 | case BLOCK_OP_TAILCALL: |
2019 | may_use_call = 1; |
2020 | break; |
2021 | |
2022 | case BLOCK_OP_CALL_PARM: |
2023 | may_use_call = block_move_libcall_safe_for_call_parm (); |
2024 | |
2025 | /* Make inhibit_defer_pop nonzero around the library call |
2026 | to force it to pop the arguments right away. */ |
2027 | NO_DEFER_POP; |
2028 | break; |
2029 | |
2030 | case BLOCK_OP_NO_LIBCALL: |
2031 | may_use_call = 0; |
2032 | break; |
2033 | |
2034 | case BLOCK_OP_NO_LIBCALL_RET: |
2035 | may_use_call = -1; |
2036 | break; |
2037 | |
2038 | default: |
2039 | gcc_unreachable (); |
2040 | } |
2041 | |
2042 | gcc_assert (MEM_P (x) && MEM_P (y)); |
2043 | align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); |
2044 | gcc_assert (align >= BITS_PER_UNIT); |
2045 | |
2046 | /* Make sure we've got BLKmode addresses; store_one_arg can decide that |
2047 | block copy is more efficient for other large modes, e.g. DCmode. */ |
2048 | x = adjust_address (x, BLKmode, 0); |
2049 | y = adjust_address (y, BLKmode, 0); |
2050 | |
2051 | /* If source and destination are the same, no need to copy anything. */ |
2052 | if (rtx_equal_p (x, y) |
2053 | && !MEM_VOLATILE_P (x) |
2054 | && !MEM_VOLATILE_P (y)) |
2055 | return 0; |
2056 | |
2057 | /* Set MEM_SIZE as appropriate for this block copy. The main place this |
2058 | can be incorrect is coming from __builtin_memcpy. */ |
2059 | poly_int64 const_size; |
2060 | if (poly_int_rtx_p (x: size, res: &const_size)) |
2061 | { |
2062 | x = shallow_copy_rtx (x); |
2063 | y = shallow_copy_rtx (y); |
2064 | set_mem_size (x, const_size); |
2065 | set_mem_size (y, const_size); |
2066 | } |
2067 | |
2068 | bool pieces_ok = CONST_INT_P (size) |
2069 | && can_move_by_pieces (INTVAL (size), align); |
2070 | bool pattern_ok = false; |
2071 | |
2072 | if (!pieces_ok || might_overlap) |
2073 | { |
2074 | pattern_ok |
2075 | = emit_block_move_via_pattern (x, y, size, align, |
2076 | expected_align, expected_size, |
2077 | min_size, max_size, probable_max_size, |
2078 | might_overlap); |
2079 | if (!pattern_ok && might_overlap) |
2080 | { |
2081 | /* Do not try any of the other methods below as they are not safe |
2082 | for overlapping moves. */ |
2083 | *is_move_done = false; |
2084 | return retval; |
2085 | } |
2086 | } |
2087 | |
2088 | bool dynamic_direction = false; |
2089 | if (!pattern_ok && !pieces_ok && may_use_call |
2090 | && (flag_inline_stringops & (might_overlap ? ILSOP_MEMMOVE : ILSOP_MEMCPY))) |
2091 | { |
2092 | may_use_call = 0; |
2093 | dynamic_direction = might_overlap; |
2094 | } |
2095 | |
2096 | if (pattern_ok) |
2097 | ; |
2098 | else if (pieces_ok) |
2099 | move_by_pieces (to: x, from: y, INTVAL (size), align, retmode: RETURN_BEGIN); |
2100 | else if (may_use_call && !might_overlap |
2101 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)) |
2102 | && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y))) |
2103 | { |
2104 | if (bail_out_libcall) |
2105 | { |
2106 | if (is_move_done) |
2107 | *is_move_done = false; |
2108 | return retval; |
2109 | } |
2110 | |
2111 | if (may_use_call < 0) |
2112 | return pc_rtx; |
2113 | |
2114 | retval = emit_block_copy_via_libcall (dst: x, src: y, size, |
2115 | tailcall: method == BLOCK_OP_TAILCALL); |
2116 | } |
2117 | else if (dynamic_direction) |
2118 | emit_block_move_via_oriented_loop (x, y, size, align, ctz_size); |
2119 | else if (might_overlap) |
2120 | *is_move_done = false; |
2121 | else |
2122 | emit_block_move_via_sized_loop (x, y, size, align, ctz_size); |
2123 | |
2124 | if (method == BLOCK_OP_CALL_PARM) |
2125 | OK_DEFER_POP; |
2126 | |
2127 | return retval; |
2128 | } |
2129 | |
2130 | rtx |
2131 | emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method, |
2132 | unsigned int ctz_size) |
2133 | { |
2134 | unsigned HOST_WIDE_INT max, min = 0; |
2135 | if (GET_CODE (size) == CONST_INT) |
2136 | min = max = UINTVAL (size); |
2137 | else |
2138 | max = GET_MODE_MASK (GET_MODE (size)); |
2139 | return emit_block_move_hints (x, y, size, method, expected_align: 0, expected_size: -1, |
2140 | min_size: min, max_size: max, probable_max_size: max, |
2141 | bail_out_libcall: false, NULL, might_overlap: false, ctz_size); |
2142 | } |
2143 | |
2144 | /* A subroutine of emit_block_move. Returns true if calling the |
2145 | block move libcall will not clobber any parameters which may have |
2146 | already been placed on the stack. */ |
2147 | |
2148 | static bool |
2149 | block_move_libcall_safe_for_call_parm (void) |
2150 | { |
2151 | tree fn; |
2152 | |
2153 | /* If arguments are pushed on the stack, then they're safe. */ |
2154 | if (targetm.calls.push_argument (0)) |
2155 | return true; |
2156 | |
2157 | /* If registers go on the stack anyway, any argument is sure to clobber |
2158 | an outgoing argument. */ |
2159 | #if defined (REG_PARM_STACK_SPACE) |
2160 | fn = builtin_decl_implicit (fncode: BUILT_IN_MEMCPY); |
2161 | /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't |
2162 | depend on its argument. */ |
2163 | (void) fn; |
2164 | if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn))) |
2165 | && REG_PARM_STACK_SPACE (fn) != 0) |
2166 | return false; |
2167 | #endif |
2168 | |
2169 | /* If any argument goes in memory, then it might clobber an outgoing |
2170 | argument. */ |
2171 | { |
2172 | CUMULATIVE_ARGS args_so_far_v; |
2173 | cumulative_args_t args_so_far; |
2174 | tree arg; |
2175 | |
2176 | fn = builtin_decl_implicit (fncode: BUILT_IN_MEMCPY); |
2177 | INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3); |
2178 | args_so_far = pack_cumulative_args (arg: &args_so_far_v); |
2179 | |
2180 | arg = TYPE_ARG_TYPES (TREE_TYPE (fn)); |
2181 | for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg)) |
2182 | { |
2183 | machine_mode mode = TYPE_MODE (TREE_VALUE (arg)); |
2184 | function_arg_info arg_info (mode, /*named=*/true); |
2185 | rtx tmp = targetm.calls.function_arg (args_so_far, arg_info); |
2186 | if (!tmp || !REG_P (tmp)) |
2187 | return false; |
2188 | if (targetm.calls.arg_partial_bytes (args_so_far, arg_info)) |
2189 | return false; |
2190 | targetm.calls.function_arg_advance (args_so_far, arg_info); |
2191 | } |
2192 | } |
2193 | return true; |
2194 | } |
2195 | |
2196 | /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern; |
2197 | return true if successful. |
2198 | |
2199 | X is the destination of the copy or move. |
2200 | Y is the source of the copy or move. |
2201 | SIZE is the size of the block to be moved. |
2202 | |
2203 | MIGHT_OVERLAP indicates this originated with expansion of a |
2204 | builtin_memmove() and the source and destination blocks may |
2205 | overlap. |
2206 | */ |
2207 | |
2208 | static bool |
2209 | emit_block_move_via_pattern (rtx x, rtx y, rtx size, unsigned int align, |
2210 | unsigned int expected_align, |
2211 | HOST_WIDE_INT expected_size, |
2212 | unsigned HOST_WIDE_INT min_size, |
2213 | unsigned HOST_WIDE_INT max_size, |
2214 | unsigned HOST_WIDE_INT probable_max_size, |
2215 | bool might_overlap) |
2216 | { |
2217 | if (expected_align < align) |
2218 | expected_align = align; |
2219 | if (expected_size != -1) |
2220 | { |
2221 | if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size) |
2222 | expected_size = probable_max_size; |
2223 | if ((unsigned HOST_WIDE_INT)expected_size < min_size) |
2224 | expected_size = min_size; |
2225 | } |
2226 | |
2227 | /* Since this is a move insn, we don't care about volatility. */ |
2228 | temporary_volatile_ok v (true); |
2229 | |
2230 | /* Try the most limited insn first, because there's no point |
2231 | including more than one in the machine description unless |
2232 | the more limited one has some advantage. */ |
2233 | |
2234 | opt_scalar_int_mode mode_iter; |
2235 | FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) |
2236 | { |
2237 | scalar_int_mode mode = mode_iter.require (); |
2238 | enum insn_code code; |
2239 | if (might_overlap) |
2240 | code = direct_optab_handler (op: movmem_optab, mode); |
2241 | else |
2242 | code = direct_optab_handler (op: cpymem_optab, mode); |
2243 | |
2244 | if (code != CODE_FOR_nothing |
2245 | /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT |
2246 | here because if SIZE is less than the mode mask, as it is |
2247 | returned by the macro, it will definitely be less than the |
2248 | actual mode mask. Since SIZE is within the Pmode address |
2249 | space, we limit MODE to Pmode. */ |
2250 | && ((CONST_INT_P (size) |
2251 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
2252 | <= (GET_MODE_MASK (mode) >> 1))) |
2253 | || max_size <= (GET_MODE_MASK (mode) >> 1) |
2254 | || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) |
2255 | { |
2256 | class expand_operand ops[9]; |
2257 | unsigned int nops; |
2258 | |
2259 | /* ??? When called via emit_block_move_for_call, it'd be |
2260 | nice if there were some way to inform the backend, so |
2261 | that it doesn't fail the expansion because it thinks |
2262 | emitting the libcall would be more efficient. */ |
2263 | nops = insn_data[(int) code].n_generator_args; |
2264 | gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); |
2265 | |
2266 | create_fixed_operand (op: &ops[0], x); |
2267 | create_fixed_operand (op: &ops[1], x: y); |
2268 | /* The check above guarantees that this size conversion is valid. */ |
2269 | create_convert_operand_to (op: &ops[2], value: size, mode, unsigned_p: true); |
2270 | create_integer_operand (&ops[3], align / BITS_PER_UNIT); |
2271 | if (nops >= 6) |
2272 | { |
2273 | create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); |
2274 | create_integer_operand (&ops[5], expected_size); |
2275 | } |
2276 | if (nops >= 8) |
2277 | { |
2278 | create_integer_operand (&ops[6], min_size); |
2279 | /* If we cannot represent the maximal size, |
2280 | make parameter NULL. */ |
2281 | if ((HOST_WIDE_INT) max_size != -1) |
2282 | create_integer_operand (&ops[7], max_size); |
2283 | else |
2284 | create_fixed_operand (op: &ops[7], NULL); |
2285 | } |
2286 | if (nops == 9) |
2287 | { |
2288 | /* If we cannot represent the maximal size, |
2289 | make parameter NULL. */ |
2290 | if ((HOST_WIDE_INT) probable_max_size != -1) |
2291 | create_integer_operand (&ops[8], probable_max_size); |
2292 | else |
2293 | create_fixed_operand (op: &ops[8], NULL); |
2294 | } |
2295 | if (maybe_expand_insn (icode: code, nops, ops)) |
2296 | return true; |
2297 | } |
2298 | } |
2299 | |
2300 | return false; |
2301 | } |
2302 | |
2303 | /* Like emit_block_move_via_loop, but choose a suitable INCR based on |
2304 | ALIGN and CTZ_SIZE. */ |
2305 | |
2306 | static void |
2307 | emit_block_move_via_sized_loop (rtx x, rtx y, rtx size, |
2308 | unsigned int align, |
2309 | unsigned int ctz_size) |
2310 | { |
2311 | int incr = align / BITS_PER_UNIT; |
2312 | |
2313 | if (CONST_INT_P (size)) |
2314 | ctz_size = MAX (ctz_size, (unsigned) wi::ctz (UINTVAL (size))); |
2315 | |
2316 | if (HOST_WIDE_INT_1U << ctz_size < (unsigned HOST_WIDE_INT) incr) |
2317 | incr = HOST_WIDE_INT_1U << ctz_size; |
2318 | |
2319 | while (incr > 1 && !can_move_by_pieces (len: incr, align)) |
2320 | incr >>= 1; |
2321 | |
2322 | gcc_checking_assert (incr); |
2323 | |
2324 | return emit_block_move_via_loop (x, y, size, align, incr); |
2325 | } |
2326 | |
2327 | /* Like emit_block_move_via_sized_loop, but besides choosing INCR so |
2328 | as to ensure safe moves even in case of overlap, output dynamic |
2329 | tests to choose between two loops, one moving downwards, another |
2330 | moving upwards. */ |
2331 | |
2332 | static void |
2333 | emit_block_move_via_oriented_loop (rtx x, rtx y, rtx size, |
2334 | unsigned int align, |
2335 | unsigned int ctz_size) |
2336 | { |
2337 | int incr = align / BITS_PER_UNIT; |
2338 | |
2339 | if (CONST_INT_P (size)) |
2340 | ctz_size = MAX (ctz_size, (unsigned) wi::ctz (UINTVAL (size))); |
2341 | |
2342 | if (HOST_WIDE_INT_1U << ctz_size < (unsigned HOST_WIDE_INT) incr) |
2343 | incr = HOST_WIDE_INT_1U << ctz_size; |
2344 | |
2345 | while (incr > 1 && !int_mode_for_size (size: incr, limit: 0).exists ()) |
2346 | incr >>= 1; |
2347 | |
2348 | gcc_checking_assert (incr); |
2349 | |
2350 | rtx_code_label *upw_label, *end_label; |
2351 | upw_label = gen_label_rtx (); |
2352 | end_label = gen_label_rtx (); |
2353 | |
2354 | rtx x_addr = force_operand (XEXP (x, 0), NULL_RTX); |
2355 | rtx y_addr = force_operand (XEXP (y, 0), NULL_RTX); |
2356 | do_pending_stack_adjust (); |
2357 | |
2358 | machine_mode mode = GET_MODE (x_addr); |
2359 | if (mode != GET_MODE (y_addr)) |
2360 | { |
2361 | scalar_int_mode xmode |
2362 | = smallest_int_mode_for_size (size: GET_MODE_BITSIZE (mode)); |
2363 | scalar_int_mode ymode |
2364 | = smallest_int_mode_for_size (size: GET_MODE_BITSIZE |
2365 | (GET_MODE (y_addr))); |
2366 | if (GET_MODE_BITSIZE (mode: xmode) < GET_MODE_BITSIZE (mode: ymode)) |
2367 | mode = ymode; |
2368 | else |
2369 | mode = xmode; |
2370 | |
2371 | #ifndef POINTERS_EXTEND_UNSIGNED |
2372 | const int POINTERS_EXTEND_UNSIGNED = 1; |
2373 | #endif |
2374 | x_addr = convert_modes (mode, GET_MODE (x_addr), x: x_addr, |
2375 | POINTERS_EXTEND_UNSIGNED); |
2376 | y_addr = convert_modes (mode, GET_MODE (y_addr), x: y_addr, |
2377 | POINTERS_EXTEND_UNSIGNED); |
2378 | } |
2379 | |
2380 | /* Test for overlap: if (x >= y || x + size <= y) goto upw_label. */ |
2381 | emit_cmp_and_jump_insns (x_addr, y_addr, GEU, NULL_RTX, mode, |
2382 | true, upw_label, |
2383 | prob: profile_probability::guessed_always () |
2384 | .apply_scale (num: 5, den: 10)); |
2385 | rtx tmp = convert_modes (GET_MODE (x_addr), GET_MODE (size), x: size, unsignedp: true); |
2386 | tmp = simplify_gen_binary (code: PLUS, GET_MODE (x_addr), op0: x_addr, op1: tmp); |
2387 | |
2388 | emit_cmp_and_jump_insns (tmp, y_addr, LEU, NULL_RTX, mode, |
2389 | true, upw_label, |
2390 | prob: profile_probability::guessed_always () |
2391 | .apply_scale (num: 8, den: 10)); |
2392 | |
2393 | emit_block_move_via_loop (x, y, size, align, -incr); |
2394 | |
2395 | emit_jump (end_label); |
2396 | emit_label (upw_label); |
2397 | |
2398 | emit_block_move_via_loop (x, y, size, align, incr); |
2399 | |
2400 | emit_label (end_label); |
2401 | } |
2402 | |
2403 | /* A subroutine of emit_block_move. Copy the data via an explicit |
2404 | loop. This is used only when libcalls are forbidden, or when |
2405 | inlining is required. INCR is the block size to be copied in each |
2406 | loop iteration. If it is negative, the absolute value is used, and |
2407 | the block is copied backwards. INCR must be a power of two, an |
2408 | exact divisor for SIZE and ALIGN, and imply a mode that can be |
2409 | safely copied per iteration assuming no overlap. */ |
2410 | |
2411 | static void |
2412 | emit_block_move_via_loop (rtx x, rtx y, rtx size, |
2413 | unsigned int align, int incr) |
2414 | { |
2415 | rtx_code_label *cmp_label, *top_label; |
2416 | rtx iter, x_addr, y_addr, tmp; |
2417 | machine_mode x_addr_mode = get_address_mode (mem: x); |
2418 | machine_mode y_addr_mode = get_address_mode (mem: y); |
2419 | machine_mode iter_mode; |
2420 | |
2421 | iter_mode = GET_MODE (size); |
2422 | if (iter_mode == VOIDmode) |
2423 | iter_mode = word_mode; |
2424 | |
2425 | top_label = gen_label_rtx (); |
2426 | cmp_label = gen_label_rtx (); |
2427 | iter = gen_reg_rtx (iter_mode); |
2428 | |
2429 | bool downwards = incr < 0; |
2430 | rtx iter_init; |
2431 | rtx_code iter_cond; |
2432 | rtx iter_limit; |
2433 | rtx iter_incr; |
2434 | machine_mode move_mode; |
2435 | if (downwards) |
2436 | { |
2437 | incr = -incr; |
2438 | iter_init = size; |
2439 | iter_cond = GEU; |
2440 | iter_limit = const0_rtx; |
2441 | iter_incr = GEN_INT (incr); |
2442 | } |
2443 | else |
2444 | { |
2445 | iter_init = const0_rtx; |
2446 | iter_cond = LTU; |
2447 | iter_limit = size; |
2448 | iter_incr = GEN_INT (incr); |
2449 | } |
2450 | emit_move_insn (iter, iter_init); |
2451 | |
2452 | opt_scalar_int_mode int_move_mode |
2453 | = int_mode_for_size (size: incr * BITS_PER_UNIT, limit: 1); |
2454 | if (!int_move_mode.exists (mode: &move_mode) |
2455 | || GET_MODE_BITSIZE (mode: int_move_mode.require ()) != incr * BITS_PER_UNIT) |
2456 | { |
2457 | move_mode = BLKmode; |
2458 | gcc_checking_assert (can_move_by_pieces (incr, align)); |
2459 | } |
2460 | |
2461 | x_addr = force_operand (XEXP (x, 0), NULL_RTX); |
2462 | y_addr = force_operand (XEXP (y, 0), NULL_RTX); |
2463 | do_pending_stack_adjust (); |
2464 | |
2465 | emit_jump (cmp_label); |
2466 | emit_label (top_label); |
2467 | |
2468 | tmp = convert_modes (mode: x_addr_mode, oldmode: iter_mode, x: iter, unsignedp: true); |
2469 | x_addr = simplify_gen_binary (code: PLUS, mode: x_addr_mode, op0: x_addr, op1: tmp); |
2470 | |
2471 | if (x_addr_mode != y_addr_mode) |
2472 | tmp = convert_modes (mode: y_addr_mode, oldmode: iter_mode, x: iter, unsignedp: true); |
2473 | y_addr = simplify_gen_binary (code: PLUS, mode: y_addr_mode, op0: y_addr, op1: tmp); |
2474 | |
2475 | x = change_address (x, move_mode, x_addr); |
2476 | y = change_address (y, move_mode, y_addr); |
2477 | |
2478 | if (move_mode == BLKmode) |
2479 | { |
2480 | bool done; |
2481 | emit_block_move_hints (x, y, size: iter_incr, method: BLOCK_OP_NO_LIBCALL, |
2482 | expected_align: align, expected_size: incr, min_size: incr, max_size: incr, probable_max_size: incr, |
2483 | bail_out_libcall: false, is_move_done: &done, might_overlap: false); |
2484 | gcc_checking_assert (done); |
2485 | } |
2486 | else |
2487 | emit_move_insn (x, y); |
2488 | |
2489 | if (downwards) |
2490 | emit_label (cmp_label); |
2491 | |
2492 | tmp = expand_simple_binop (iter_mode, PLUS, iter, iter_incr, iter, |
2493 | true, OPTAB_LIB_WIDEN); |
2494 | if (tmp != iter) |
2495 | emit_move_insn (iter, tmp); |
2496 | |
2497 | if (!downwards) |
2498 | emit_label (cmp_label); |
2499 | |
2500 | emit_cmp_and_jump_insns (iter, iter_limit, iter_cond, NULL_RTX, iter_mode, |
2501 | true, top_label, |
2502 | prob: profile_probability::guessed_always () |
2503 | .apply_scale (num: 9, den: 10)); |
2504 | } |
2505 | |
2506 | /* Expand a call to memcpy or memmove or memcmp, and return the result. |
2507 | TAILCALL is true if this is a tail call. */ |
2508 | |
2509 | rtx |
2510 | emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src, |
2511 | rtx size, bool tailcall) |
2512 | { |
2513 | rtx dst_addr, src_addr; |
2514 | tree call_expr, dst_tree, src_tree, size_tree; |
2515 | machine_mode size_mode; |
2516 | |
2517 | /* Since dst and src are passed to a libcall, mark the corresponding |
2518 | tree EXPR as addressable. */ |
2519 | tree dst_expr = MEM_EXPR (dst); |
2520 | tree src_expr = MEM_EXPR (src); |
2521 | if (dst_expr) |
2522 | mark_addressable (dst_expr); |
2523 | if (src_expr) |
2524 | mark_addressable (src_expr); |
2525 | |
2526 | dst_addr = copy_addr_to_reg (XEXP (dst, 0)); |
2527 | dst_addr = convert_memory_address (ptr_mode, dst_addr); |
2528 | dst_tree = make_tree (ptr_type_node, dst_addr); |
2529 | |
2530 | src_addr = copy_addr_to_reg (XEXP (src, 0)); |
2531 | src_addr = convert_memory_address (ptr_mode, src_addr); |
2532 | src_tree = make_tree (ptr_type_node, src_addr); |
2533 | |
2534 | size_mode = TYPE_MODE (sizetype); |
2535 | size = convert_to_mode (mode: size_mode, x: size, unsignedp: 1); |
2536 | size = copy_to_mode_reg (size_mode, size); |
2537 | size_tree = make_tree (sizetype, size); |
2538 | |
2539 | /* It is incorrect to use the libcall calling conventions for calls to |
2540 | memcpy/memmove/memcmp because they can be provided by the user. */ |
2541 | tree fn = builtin_decl_implicit (fncode); |
2542 | call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree); |
2543 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
2544 | |
2545 | return expand_call (call_expr, NULL_RTX, false); |
2546 | } |
2547 | |
2548 | /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands. |
2549 | ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success, |
2550 | otherwise return null. */ |
2551 | |
2552 | rtx |
2553 | expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx, |
2554 | rtx arg2_rtx, tree arg3_type, rtx arg3_rtx, |
2555 | HOST_WIDE_INT align) |
2556 | { |
2557 | machine_mode insn_mode = insn_data[icode].operand[0].mode; |
2558 | |
2559 | if (target && (!REG_P (target) || HARD_REGISTER_P (target))) |
2560 | target = NULL_RTX; |
2561 | |
2562 | class expand_operand ops[5]; |
2563 | create_output_operand (op: &ops[0], x: target, mode: insn_mode); |
2564 | create_fixed_operand (op: &ops[1], x: arg1_rtx); |
2565 | create_fixed_operand (op: &ops[2], x: arg2_rtx); |
2566 | create_convert_operand_from (op: &ops[3], value: arg3_rtx, TYPE_MODE (arg3_type), |
2567 | TYPE_UNSIGNED (arg3_type)); |
2568 | create_integer_operand (&ops[4], align); |
2569 | if (maybe_expand_insn (icode, nops: 5, ops)) |
2570 | return ops[0].value; |
2571 | return NULL_RTX; |
2572 | } |
2573 | |
2574 | /* Expand a block compare between X and Y with length LEN using the |
2575 | cmpmem optab, placing the result in TARGET. LEN_TYPE is the type |
2576 | of the expression that was used to calculate the length. ALIGN |
2577 | gives the known minimum common alignment. */ |
2578 | |
2579 | static rtx |
2580 | emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target, |
2581 | unsigned align) |
2582 | { |
2583 | /* Note: The cmpstrnsi pattern, if it exists, is not suitable for |
2584 | implementing memcmp because it will stop if it encounters two |
2585 | zero bytes. */ |
2586 | insn_code icode = direct_optab_handler (op: cmpmem_optab, SImode); |
2587 | |
2588 | if (icode == CODE_FOR_nothing) |
2589 | return NULL_RTX; |
2590 | |
2591 | return expand_cmpstrn_or_cmpmem (icode, target, arg1_rtx: x, arg2_rtx: y, arg3_type: len_type, arg3_rtx: len, align); |
2592 | } |
2593 | |
2594 | /* Emit code to compare a block Y to a block X. This may be done with |
2595 | string-compare instructions, with multiple scalar instructions, |
2596 | or with a library call. |
2597 | |
2598 | Both X and Y must be MEM rtx's. LEN is an rtx that says how long |
2599 | they are. LEN_TYPE is the type of the expression that was used to |
2600 | calculate it, and CTZ_LEN is the known trailing-zeros count of LEN, |
2601 | so LEN must be a multiple of 1<<CTZ_LEN even if it's not constant. |
2602 | |
2603 | If EQUALITY_ONLY is true, it means we don't have to return the tri-state |
2604 | value of a normal memcmp call, instead we can just compare for equality. |
2605 | If FORCE_LIBCALL is true, we should emit a call to memcmp rather than |
2606 | returning NULL_RTX. |
2607 | |
2608 | Optionally, the caller can pass a constfn and associated data in Y_CFN |
2609 | and Y_CFN_DATA. describing that the second operand being compared is a |
2610 | known constant and how to obtain its data. |
2611 | Return the result of the comparison, or NULL_RTX if we failed to |
2612 | perform the operation. */ |
2613 | |
2614 | rtx |
2615 | emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target, |
2616 | bool equality_only, by_pieces_constfn y_cfn, |
2617 | void *y_cfndata, unsigned ctz_len) |
2618 | { |
2619 | rtx result = 0; |
2620 | |
2621 | if (CONST_INT_P (len) && INTVAL (len) == 0) |
2622 | return const0_rtx; |
2623 | |
2624 | gcc_assert (MEM_P (x) && MEM_P (y)); |
2625 | unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); |
2626 | gcc_assert (align >= BITS_PER_UNIT); |
2627 | |
2628 | x = adjust_address (x, BLKmode, 0); |
2629 | y = adjust_address (y, BLKmode, 0); |
2630 | |
2631 | if (equality_only |
2632 | && CONST_INT_P (len) |
2633 | && can_do_by_pieces (INTVAL (len), align, op: COMPARE_BY_PIECES)) |
2634 | result = compare_by_pieces (arg0: x, arg1: y, INTVAL (len), target, align, |
2635 | a1_cfn: y_cfn, a1_cfn_data: y_cfndata); |
2636 | else |
2637 | result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align); |
2638 | |
2639 | if (!result && (flag_inline_stringops & ILSOP_MEMCMP)) |
2640 | result = emit_block_cmp_via_loop (x, y, len, len_type, |
2641 | target, equality_only, |
2642 | align, ctz_len); |
2643 | |
2644 | return result; |
2645 | } |
2646 | |
2647 | /* Like emit_block_cmp_hints, but with known alignment and no support |
2648 | for constats. Always expand to a loop with iterations that compare |
2649 | blocks of the largest compare-by-pieces size that divides both len |
2650 | and align, and then, if !EQUALITY_ONLY, identify the word and then |
2651 | the unit that first differs to return the result. */ |
2652 | |
2653 | rtx |
2654 | emit_block_cmp_via_loop (rtx x, rtx y, rtx len, tree len_type, rtx target, |
2655 | bool equality_only, unsigned align, unsigned ctz_len) |
2656 | { |
2657 | unsigned incr = align / BITS_PER_UNIT; |
2658 | |
2659 | if (CONST_INT_P (len)) |
2660 | ctz_len = MAX (ctz_len, (unsigned) wi::ctz (UINTVAL (len))); |
2661 | |
2662 | if (HOST_WIDE_INT_1U << ctz_len < (unsigned HOST_WIDE_INT) incr) |
2663 | incr = HOST_WIDE_INT_1U << ctz_len; |
2664 | |
2665 | while (incr > 1 |
2666 | && !can_do_by_pieces (len: incr, align, op: COMPARE_BY_PIECES)) |
2667 | incr >>= 1; |
2668 | |
2669 | rtx_code_label *cmp_label, *top_label, *ne_label, *res_label; |
2670 | rtx iter, x_addr, y_addr, tmp; |
2671 | machine_mode x_addr_mode = get_address_mode (mem: x); |
2672 | machine_mode y_addr_mode = get_address_mode (mem: y); |
2673 | machine_mode iter_mode; |
2674 | |
2675 | iter_mode = GET_MODE (len); |
2676 | if (iter_mode == VOIDmode) |
2677 | iter_mode = word_mode; |
2678 | |
2679 | rtx iter_init = const0_rtx; |
2680 | rtx_code iter_cond = LTU; |
2681 | rtx_code entry_cond = GEU; |
2682 | rtx iter_limit = len; |
2683 | rtx iter_incr = GEN_INT (incr); |
2684 | machine_mode cmp_mode; |
2685 | |
2686 | /* We can drop the loop back edge if we know there's exactly one |
2687 | iteration. */ |
2688 | top_label = (!rtx_equal_p (len, iter_incr) |
2689 | ? gen_label_rtx () |
2690 | : NULL); |
2691 | /* We need not test before entering the loop if len is known |
2692 | nonzero. ??? This could be even stricter, testing whether a |
2693 | nonconstant LEN could possibly be zero. */ |
2694 | cmp_label = (!CONSTANT_P (len) || rtx_equal_p (len, iter_init) |
2695 | ? gen_label_rtx () |
2696 | : NULL); |
2697 | ne_label = gen_label_rtx (); |
2698 | res_label = gen_label_rtx (); |
2699 | |
2700 | iter = gen_reg_rtx (iter_mode); |
2701 | emit_move_insn (iter, iter_init); |
2702 | |
2703 | opt_scalar_int_mode int_cmp_mode |
2704 | = int_mode_for_size (size: incr * BITS_PER_UNIT, limit: 1); |
2705 | if (!int_cmp_mode.exists (mode: &cmp_mode) |
2706 | || GET_MODE_BITSIZE (mode: int_cmp_mode.require ()) != incr * BITS_PER_UNIT |
2707 | || !can_compare_p (NE, cmp_mode, ccp_jump)) |
2708 | { |
2709 | cmp_mode = BLKmode; |
2710 | gcc_checking_assert (incr != 1); |
2711 | } |
2712 | |
2713 | /* Save the base addresses. */ |
2714 | x_addr = force_operand (XEXP (x, 0), NULL_RTX); |
2715 | y_addr = force_operand (XEXP (y, 0), NULL_RTX); |
2716 | do_pending_stack_adjust (); |
2717 | |
2718 | if (cmp_label) |
2719 | { |
2720 | if (top_label) |
2721 | emit_jump (cmp_label); |
2722 | else |
2723 | emit_cmp_and_jump_insns (iter, iter_limit, entry_cond, |
2724 | NULL_RTX, iter_mode, |
2725 | true, cmp_label, |
2726 | prob: profile_probability::guessed_always () |
2727 | .apply_scale (num: 1, den: 10)); |
2728 | } |
2729 | if (top_label) |
2730 | emit_label (top_label); |
2731 | |
2732 | /* Offset the base addresses by ITER. */ |
2733 | tmp = convert_modes (mode: x_addr_mode, oldmode: iter_mode, x: iter, unsignedp: true); |
2734 | x_addr = simplify_gen_binary (code: PLUS, mode: x_addr_mode, op0: x_addr, op1: tmp); |
2735 | |
2736 | if (x_addr_mode != y_addr_mode) |
2737 | tmp = convert_modes (mode: y_addr_mode, oldmode: iter_mode, x: iter, unsignedp: true); |
2738 | y_addr = simplify_gen_binary (code: PLUS, mode: y_addr_mode, op0: y_addr, op1: tmp); |
2739 | |
2740 | x = change_address (x, cmp_mode, x_addr); |
2741 | y = change_address (y, cmp_mode, y_addr); |
2742 | |
2743 | /* Compare one block. */ |
2744 | rtx part_res; |
2745 | if (cmp_mode == BLKmode) |
2746 | part_res = compare_by_pieces (arg0: x, arg1: y, len: incr, target, align, a1_cfn: 0, a1_cfn_data: 0); |
2747 | else |
2748 | part_res = expand_binop (cmp_mode, sub_optab, x, y, NULL_RTX, |
2749 | true, OPTAB_LIB_WIDEN); |
2750 | |
2751 | /* Stop if we found a difference. */ |
2752 | emit_cmp_and_jump_insns (part_res, GEN_INT (0), NE, NULL_RTX, |
2753 | GET_MODE (part_res), true, ne_label, |
2754 | prob: profile_probability::guessed_always () |
2755 | .apply_scale (num: 1, den: 10)); |
2756 | |
2757 | /* Increment ITER. */ |
2758 | tmp = expand_simple_binop (iter_mode, PLUS, iter, iter_incr, iter, |
2759 | true, OPTAB_LIB_WIDEN); |
2760 | if (tmp != iter) |
2761 | emit_move_insn (iter, tmp); |
2762 | |
2763 | if (cmp_label) |
2764 | emit_label (cmp_label); |
2765 | /* Loop until we reach the limit. */ |
2766 | |
2767 | if (top_label) |
2768 | emit_cmp_and_jump_insns (iter, iter_limit, iter_cond, NULL_RTX, iter_mode, |
2769 | true, top_label, |
2770 | prob: profile_probability::guessed_always () |
2771 | .apply_scale (num: 9, den: 10)); |
2772 | |
2773 | /* We got to the end without differences, so the result is zero. */ |
2774 | if (target == NULL_RTX |
2775 | || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) |
2776 | target = gen_reg_rtx (TYPE_MODE (integer_type_node)); |
2777 | |
2778 | emit_move_insn (target, const0_rtx); |
2779 | emit_jump (res_label); |
2780 | |
2781 | emit_label (ne_label); |
2782 | |
2783 | /* Return nonzero, or pinpoint the difference to return the expected |
2784 | result for non-equality tests. */ |
2785 | if (equality_only) |
2786 | emit_move_insn (target, const1_rtx); |
2787 | else |
2788 | { |
2789 | if (incr > UNITS_PER_WORD) |
2790 | /* ??? Re-compare the block found to be different one word at a |
2791 | time. */ |
2792 | part_res = emit_block_cmp_via_loop (x, y, GEN_INT (incr), len_type, |
2793 | target, equality_only, |
2794 | BITS_PER_WORD, ctz_len: 0); |
2795 | else if (incr > 1) |
2796 | /* ??? Re-compare the block found to be different one byte at a |
2797 | time. We could do better using part_res, and being careful |
2798 | about endianness. */ |
2799 | part_res = emit_block_cmp_via_loop (x, y, GEN_INT (incr), len_type, |
2800 | target, equality_only, |
2801 | BITS_PER_UNIT, ctz_len: 0); |
2802 | else if (known_gt (GET_MODE_BITSIZE (GET_MODE (target)), |
2803 | GET_MODE_BITSIZE (cmp_mode))) |
2804 | part_res = expand_binop (GET_MODE (target), sub_optab, x, y, target, |
2805 | true, OPTAB_LIB_WIDEN); |
2806 | else |
2807 | { |
2808 | /* In the odd chance target is QImode, we can't count on |
2809 | widening subtract to capture the result of the unsigned |
2810 | compares. */ |
2811 | rtx_code_label *ltu_label; |
2812 | ltu_label = gen_label_rtx (); |
2813 | emit_cmp_and_jump_insns (x, y, LTU, NULL_RTX, |
2814 | cmp_mode, true, ltu_label, |
2815 | prob: profile_probability::guessed_always () |
2816 | .apply_scale (num: 5, den: 10)); |
2817 | |
2818 | emit_move_insn (target, const1_rtx); |
2819 | emit_jump (res_label); |
2820 | |
2821 | emit_label (ltu_label); |
2822 | emit_move_insn (target, constm1_rtx); |
2823 | part_res = target; |
2824 | } |
2825 | |
2826 | if (target != part_res) |
2827 | convert_move (to: target, from: part_res, unsignedp: false); |
2828 | } |
2829 | |
2830 | emit_label (res_label); |
2831 | |
2832 | return target; |
2833 | } |
2834 | |
2835 | |
2836 | /* Copy all or part of a value X into registers starting at REGNO. |
2837 | The number of registers to be filled is NREGS. */ |
2838 | |
2839 | void |
2840 | move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode) |
2841 | { |
2842 | if (nregs == 0) |
2843 | return; |
2844 | |
2845 | if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) |
2846 | x = validize_mem (force_const_mem (mode, x)); |
2847 | |
2848 | /* See if the machine can do this with a load multiple insn. */ |
2849 | if (targetm.have_load_multiple ()) |
2850 | { |
2851 | rtx_insn *last = get_last_insn (); |
2852 | rtx first = gen_rtx_REG (word_mode, regno); |
2853 | if (rtx_insn *pat = targetm.gen_load_multiple (first, x, |
2854 | GEN_INT (nregs))) |
2855 | { |
2856 | emit_insn (pat); |
2857 | return; |
2858 | } |
2859 | else |
2860 | delete_insns_since (last); |
2861 | } |
2862 | |
2863 | for (int i = 0; i < nregs; i++) |
2864 | emit_move_insn (gen_rtx_REG (word_mode, regno + i), |
2865 | operand_subword_force (x, i, mode)); |
2866 | } |
2867 | |
2868 | /* Copy all or part of a BLKmode value X out of registers starting at REGNO. |
2869 | The number of registers to be filled is NREGS. */ |
2870 | |
2871 | void |
2872 | move_block_from_reg (int regno, rtx x, int nregs) |
2873 | { |
2874 | if (nregs == 0) |
2875 | return; |
2876 | |
2877 | /* See if the machine can do this with a store multiple insn. */ |
2878 | if (targetm.have_store_multiple ()) |
2879 | { |
2880 | rtx_insn *last = get_last_insn (); |
2881 | rtx first = gen_rtx_REG (word_mode, regno); |
2882 | if (rtx_insn *pat = targetm.gen_store_multiple (x, first, |
2883 | GEN_INT (nregs))) |
2884 | { |
2885 | emit_insn (pat); |
2886 | return; |
2887 | } |
2888 | else |
2889 | delete_insns_since (last); |
2890 | } |
2891 | |
2892 | for (int i = 0; i < nregs; i++) |
2893 | { |
2894 | rtx tem = operand_subword (x, i, 1, BLKmode); |
2895 | |
2896 | gcc_assert (tem); |
2897 | |
2898 | emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i)); |
2899 | } |
2900 | } |
2901 | |
2902 | /* Generate a PARALLEL rtx for a new non-consecutive group of registers from |
2903 | ORIG, where ORIG is a non-consecutive group of registers represented by |
2904 | a PARALLEL. The clone is identical to the original except in that the |
2905 | original set of registers is replaced by a new set of pseudo registers. |
2906 | The new set has the same modes as the original set. */ |
2907 | |
2908 | rtx |
2909 | gen_group_rtx (rtx orig) |
2910 | { |
2911 | int i, length; |
2912 | rtx *tmps; |
2913 | |
2914 | gcc_assert (GET_CODE (orig) == PARALLEL); |
2915 | |
2916 | length = XVECLEN (orig, 0); |
2917 | tmps = XALLOCAVEC (rtx, length); |
2918 | |
2919 | /* Skip a NULL entry in first slot. */ |
2920 | i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1; |
2921 | |
2922 | if (i) |
2923 | tmps[0] = 0; |
2924 | |
2925 | for (; i < length; i++) |
2926 | { |
2927 | machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0)); |
2928 | rtx offset = XEXP (XVECEXP (orig, 0, i), 1); |
2929 | |
2930 | tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset); |
2931 | } |
2932 | |
2933 | return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps)); |
2934 | } |
2935 | |
2936 | /* A subroutine of emit_group_load. Arguments as for emit_group_load, |
2937 | except that values are placed in TMPS[i], and must later be moved |
2938 | into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */ |
2939 | |
2940 | static void |
2941 | emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, |
2942 | poly_int64 ssize) |
2943 | { |
2944 | rtx src; |
2945 | int start, i; |
2946 | machine_mode m = GET_MODE (orig_src); |
2947 | |
2948 | gcc_assert (GET_CODE (dst) == PARALLEL); |
2949 | |
2950 | if (m != VOIDmode |
2951 | && !SCALAR_INT_MODE_P (m) |
2952 | && !MEM_P (orig_src) |
2953 | && GET_CODE (orig_src) != CONCAT) |
2954 | { |
2955 | scalar_int_mode imode; |
2956 | if (int_mode_for_mode (GET_MODE (orig_src)).exists (mode: &imode)) |
2957 | { |
2958 | src = gen_reg_rtx (imode); |
2959 | emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src); |
2960 | } |
2961 | else |
2962 | { |
2963 | src = assign_stack_temp (GET_MODE (orig_src), ssize); |
2964 | emit_move_insn (src, orig_src); |
2965 | } |
2966 | emit_group_load_1 (tmps, dst, orig_src: src, type, ssize); |
2967 | return; |
2968 | } |
2969 | |
2970 | /* Check for a NULL entry, used to indicate that the parameter goes |
2971 | both on the stack and in registers. */ |
2972 | if (XEXP (XVECEXP (dst, 0, 0), 0)) |
2973 | start = 0; |
2974 | else |
2975 | start = 1; |
2976 | |
2977 | /* Process the pieces. */ |
2978 | for (i = start; i < XVECLEN (dst, 0); i++) |
2979 | { |
2980 | machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0)); |
2981 | poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (dst, 0, i), 1)); |
2982 | poly_int64 bytelen = GET_MODE_SIZE (mode); |
2983 | poly_int64 shift = 0; |
2984 | |
2985 | /* Handle trailing fragments that run over the size of the struct. |
2986 | It's the target's responsibility to make sure that the fragment |
2987 | cannot be strictly smaller in some cases and strictly larger |
2988 | in others. */ |
2989 | gcc_checking_assert (ordered_p (bytepos + bytelen, ssize)); |
2990 | if (known_size_p (a: ssize) && maybe_gt (bytepos + bytelen, ssize)) |
2991 | { |
2992 | /* Arrange to shift the fragment to where it belongs. |
2993 | extract_bit_field loads to the lsb of the reg. */ |
2994 | if ( |
2995 | #ifdef BLOCK_REG_PADDING |
2996 | BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start) |
2997 | == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD) |
2998 | #else |
2999 | BYTES_BIG_ENDIAN |
3000 | #endif |
3001 | ) |
3002 | shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; |
3003 | bytelen = ssize - bytepos; |
3004 | gcc_assert (maybe_gt (bytelen, 0)); |
3005 | } |
3006 | |
3007 | /* If we won't be loading directly from memory, protect the real source |
3008 | from strange tricks we might play; but make sure that the source can |
3009 | be loaded directly into the destination. */ |
3010 | src = orig_src; |
3011 | if (!MEM_P (orig_src) |
3012 | && (!REG_P (orig_src) || HARD_REGISTER_P (orig_src)) |
3013 | && !CONSTANT_P (orig_src)) |
3014 | { |
3015 | gcc_assert (GET_MODE (orig_src) != VOIDmode); |
3016 | src = force_reg (GET_MODE (orig_src), orig_src); |
3017 | } |
3018 | |
3019 | /* Optimize the access just a bit. */ |
3020 | if (MEM_P (src) |
3021 | && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src)) |
3022 | || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode)) |
3023 | && multiple_p (a: bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode)) |
3024 | && known_eq (bytelen, GET_MODE_SIZE (mode))) |
3025 | { |
3026 | tmps[i] = gen_reg_rtx (mode); |
3027 | emit_move_insn (tmps[i], adjust_address (src, mode, bytepos)); |
3028 | } |
3029 | else if (COMPLEX_MODE_P (mode) |
3030 | && GET_MODE (src) == mode |
3031 | && known_eq (bytelen, GET_MODE_SIZE (mode))) |
3032 | /* Let emit_move_complex do the bulk of the work. */ |
3033 | tmps[i] = src; |
3034 | else if (GET_CODE (src) == CONCAT) |
3035 | { |
3036 | poly_int64 slen = GET_MODE_SIZE (GET_MODE (src)); |
3037 | poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0))); |
3038 | unsigned int elt; |
3039 | poly_int64 subpos; |
3040 | |
3041 | if (can_div_trunc_p (a: bytepos, b: slen0, quotient: &elt, remainder: &subpos) |
3042 | && known_le (subpos + bytelen, slen0)) |
3043 | { |
3044 | /* The following assumes that the concatenated objects all |
3045 | have the same size. In this case, a simple calculation |
3046 | can be used to determine the object and the bit field |
3047 | to be extracted. */ |
3048 | tmps[i] = XEXP (src, elt); |
3049 | if (maybe_ne (a: subpos, b: 0) |
3050 | || maybe_ne (a: subpos + bytelen, b: slen0) |
3051 | || (!CONSTANT_P (tmps[i]) |
3052 | && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))) |
3053 | tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, |
3054 | subpos * BITS_PER_UNIT, |
3055 | 1, NULL_RTX, mode, mode, false, |
3056 | NULL); |
3057 | } |
3058 | else |
3059 | { |
3060 | rtx mem; |
3061 | |
3062 | gcc_assert (known_eq (bytepos, 0)); |
3063 | mem = assign_stack_temp (GET_MODE (src), slen); |
3064 | emit_move_insn (mem, src); |
3065 | tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT, |
3066 | 0, 1, NULL_RTX, mode, mode, false, |
3067 | NULL); |
3068 | } |
3069 | } |
3070 | else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode |
3071 | && XVECLEN (dst, 0) > 1) |
3072 | tmps[i] = simplify_gen_subreg (outermode: mode, op: src, GET_MODE (dst), byte: bytepos); |
3073 | else if (CONSTANT_P (src)) |
3074 | { |
3075 | if (known_eq (bytelen, ssize)) |
3076 | tmps[i] = src; |
3077 | else |
3078 | { |
3079 | rtx first, second; |
3080 | |
3081 | /* TODO: const_wide_int can have sizes other than this... */ |
3082 | gcc_assert (known_eq (2 * bytelen, ssize)); |
3083 | split_double (src, &first, &second); |
3084 | if (i) |
3085 | tmps[i] = second; |
3086 | else |
3087 | tmps[i] = first; |
3088 | } |
3089 | } |
3090 | else if (REG_P (src) && GET_MODE (src) == mode) |
3091 | tmps[i] = src; |
3092 | else |
3093 | tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, |
3094 | bytepos * BITS_PER_UNIT, 1, NULL_RTX, |
3095 | mode, mode, false, NULL); |
3096 | |
3097 | if (maybe_ne (a: shift, b: 0)) |
3098 | tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i], |
3099 | shift, tmps[i], 0); |
3100 | } |
3101 | } |
3102 | |
3103 | /* Emit code to move a block SRC of type TYPE to a block DST, |
3104 | where DST is non-consecutive registers represented by a PARALLEL. |
3105 | SSIZE represents the total size of block ORIG_SRC in bytes, or -1 |
3106 | if not known. */ |
3107 | |
3108 | void |
3109 | emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize) |
3110 | { |
3111 | rtx *tmps; |
3112 | int i; |
3113 | |
3114 | tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0)); |
3115 | emit_group_load_1 (tmps, dst, orig_src: src, type, ssize); |
3116 | |
3117 | /* Copy the extracted pieces into the proper (probable) hard regs. */ |
3118 | for (i = 0; i < XVECLEN (dst, 0); i++) |
3119 | { |
3120 | rtx d = XEXP (XVECEXP (dst, 0, i), 0); |
3121 | if (d == NULL) |
3122 | continue; |
3123 | emit_move_insn (d, tmps[i]); |
3124 | } |
3125 | } |
3126 | |
3127 | /* Similar, but load SRC into new pseudos in a format that looks like |
3128 | PARALLEL. This can later be fed to emit_group_move to get things |
3129 | in the right place. */ |
3130 | |
3131 | rtx |
3132 | emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize) |
3133 | { |
3134 | rtvec vec; |
3135 | int i; |
3136 | |
3137 | vec = rtvec_alloc (XVECLEN (parallel, 0)); |
3138 | emit_group_load_1 (tmps: &RTVEC_ELT (vec, 0), dst: parallel, orig_src: src, type, ssize); |
3139 | |
3140 | /* Convert the vector to look just like the original PARALLEL, except |
3141 | with the computed values. */ |
3142 | for (i = 0; i < XVECLEN (parallel, 0); i++) |
3143 | { |
3144 | rtx e = XVECEXP (parallel, 0, i); |
3145 | rtx d = XEXP (e, 0); |
3146 | |
3147 | if (d) |
3148 | { |
3149 | d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i)); |
3150 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1)); |
3151 | } |
3152 | RTVEC_ELT (vec, i) = e; |
3153 | } |
3154 | |
3155 | return gen_rtx_PARALLEL (GET_MODE (parallel), vec); |
3156 | } |
3157 | |
3158 | /* Emit code to move a block SRC to block DST, where SRC and DST are |
3159 | non-consecutive groups of registers, each represented by a PARALLEL. */ |
3160 | |
3161 | void |
3162 | emit_group_move (rtx dst, rtx src) |
3163 | { |
3164 | int i; |
3165 | |
3166 | gcc_assert (GET_CODE (src) == PARALLEL |
3167 | && GET_CODE (dst) == PARALLEL |
3168 | && XVECLEN (src, 0) == XVECLEN (dst, 0)); |
3169 | |
3170 | /* Skip first entry if NULL. */ |
3171 | for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++) |
3172 | emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0), |
3173 | XEXP (XVECEXP (src, 0, i), 0)); |
3174 | } |
3175 | |
3176 | /* Move a group of registers represented by a PARALLEL into pseudos. */ |
3177 | |
3178 | rtx |
3179 | emit_group_move_into_temps (rtx src) |
3180 | { |
3181 | rtvec vec = rtvec_alloc (XVECLEN (src, 0)); |
3182 | int i; |
3183 | |
3184 | for (i = 0; i < XVECLEN (src, 0); i++) |
3185 | { |
3186 | rtx e = XVECEXP (src, 0, i); |
3187 | rtx d = XEXP (e, 0); |
3188 | |
3189 | if (d) |
3190 | e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1)); |
3191 | RTVEC_ELT (vec, i) = e; |
3192 | } |
3193 | |
3194 | return gen_rtx_PARALLEL (GET_MODE (src), vec); |
3195 | } |
3196 | |
3197 | /* Emit code to move a block SRC to a block ORIG_DST of type TYPE, |
3198 | where SRC is non-consecutive registers represented by a PARALLEL. |
3199 | SSIZE represents the total size of block ORIG_DST, or -1 if not |
3200 | known. */ |
3201 | |
3202 | void |
3203 | emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, |
3204 | poly_int64 ssize) |
3205 | { |
3206 | rtx *tmps, dst; |
3207 | int start, finish, i; |
3208 | machine_mode m = GET_MODE (orig_dst); |
3209 | |
3210 | gcc_assert (GET_CODE (src) == PARALLEL); |
3211 | |
3212 | if (!SCALAR_INT_MODE_P (m) |
3213 | && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT) |
3214 | { |
3215 | scalar_int_mode imode; |
3216 | if (int_mode_for_mode (GET_MODE (orig_dst)).exists (mode: &imode)) |
3217 | { |
3218 | dst = gen_reg_rtx (imode); |
3219 | emit_group_store (orig_dst: dst, src, type, ssize); |
3220 | dst = gen_lowpart (GET_MODE (orig_dst), dst); |
3221 | } |
3222 | else |
3223 | { |
3224 | dst = assign_stack_temp (GET_MODE (orig_dst), ssize); |
3225 | emit_group_store (orig_dst: dst, src, type, ssize); |
3226 | } |
3227 | emit_move_insn (orig_dst, dst); |
3228 | return; |
3229 | } |
3230 | |
3231 | /* Check for a NULL entry, used to indicate that the parameter goes |
3232 | both on the stack and in registers. */ |
3233 | if (XEXP (XVECEXP (src, 0, 0), 0)) |
3234 | start = 0; |
3235 | else |
3236 | start = 1; |
3237 | finish = XVECLEN (src, 0); |
3238 | |
3239 | tmps = XALLOCAVEC (rtx, finish); |
3240 | |
3241 | /* Copy the (probable) hard regs into pseudos. */ |
3242 | for (i = start; i < finish; i++) |
3243 | { |
3244 | rtx reg = XEXP (XVECEXP (src, 0, i), 0); |
3245 | if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) |
3246 | { |
3247 | tmps[i] = gen_reg_rtx (GET_MODE (reg)); |
3248 | emit_move_insn (tmps[i], reg); |
3249 | } |
3250 | else |
3251 | tmps[i] = reg; |
3252 | } |
3253 | |
3254 | /* If we won't be storing directly into memory, protect the real destination |
3255 | from strange tricks we might play. */ |
3256 | dst = orig_dst; |
3257 | if (GET_CODE (dst) == PARALLEL) |
3258 | { |
3259 | rtx temp; |
3260 | |
3261 | /* We can get a PARALLEL dst if there is a conditional expression in |
3262 | a return statement. In that case, the dst and src are the same, |
3263 | so no action is necessary. */ |
3264 | if (rtx_equal_p (dst, src)) |
3265 | return; |
3266 | |
3267 | /* It is unclear if we can ever reach here, but we may as well handle |
3268 | it. Allocate a temporary, and split this into a store/load to/from |
3269 | the temporary. */ |
3270 | temp = assign_stack_temp (GET_MODE (dst), ssize); |
3271 | emit_group_store (orig_dst: temp, src, type, ssize); |
3272 | emit_group_load (dst, src: temp, type, ssize); |
3273 | return; |
3274 | } |
3275 | else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT) |
3276 | { |
3277 | machine_mode outer = GET_MODE (dst); |
3278 | machine_mode inner; |
3279 | poly_int64 bytepos; |
3280 | bool done = false; |
3281 | rtx temp; |
3282 | |
3283 | if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) |
3284 | dst = gen_reg_rtx (outer); |
3285 | |
3286 | /* Make life a bit easier for combine: if the first element of the |
3287 | vector is the low part of the destination mode, use a paradoxical |
3288 | subreg to initialize the destination. */ |
3289 | if (start < finish) |
3290 | { |
3291 | inner = GET_MODE (tmps[start]); |
3292 | bytepos = subreg_lowpart_offset (outermode: inner, innermode: outer); |
3293 | if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)), |
3294 | bytepos)) |
3295 | { |
3296 | temp = simplify_gen_subreg (outermode: outer, op: tmps[start], innermode: inner, byte: 0); |
3297 | if (temp) |
3298 | { |
3299 | emit_move_insn (dst, temp); |
3300 | done = true; |
3301 | start++; |
3302 | } |
3303 | } |
3304 | } |
3305 | |
3306 | /* If the first element wasn't the low part, try the last. */ |
3307 | if (!done |
3308 | && start < finish - 1) |
3309 | { |
3310 | inner = GET_MODE (tmps[finish - 1]); |
3311 | bytepos = subreg_lowpart_offset (outermode: inner, innermode: outer); |
3312 | if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, |
3313 | finish - 1), 1)), |
3314 | bytepos)) |
3315 | { |
3316 | temp = simplify_gen_subreg (outermode: outer, op: tmps[finish - 1], innermode: inner, byte: 0); |
3317 | if (temp) |
3318 | { |
3319 | emit_move_insn (dst, temp); |
3320 | done = true; |
3321 | finish--; |
3322 | } |
3323 | } |
3324 | } |
3325 | |
3326 | /* Otherwise, simply initialize the result to zero. */ |
3327 | if (!done) |
3328 | emit_move_insn (dst, CONST0_RTX (outer)); |
3329 | } |
3330 | |
3331 | /* Process the pieces. */ |
3332 | for (i = start; i < finish; i++) |
3333 | { |
3334 | poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, i), 1)); |
3335 | machine_mode mode = GET_MODE (tmps[i]); |
3336 | poly_int64 bytelen = GET_MODE_SIZE (mode); |
3337 | poly_uint64 adj_bytelen; |
3338 | rtx dest = dst; |
3339 | |
3340 | /* Handle trailing fragments that run over the size of the struct. |
3341 | It's the target's responsibility to make sure that the fragment |
3342 | cannot be strictly smaller in some cases and strictly larger |
3343 | in others. */ |
3344 | gcc_checking_assert (ordered_p (bytepos + bytelen, ssize)); |
3345 | if (known_size_p (a: ssize) && maybe_gt (bytepos + bytelen, ssize)) |
3346 | adj_bytelen = ssize - bytepos; |
3347 | else |
3348 | adj_bytelen = bytelen; |
3349 | |
3350 | /* Deal with destination CONCATs by either storing into one of the parts |
3351 | or doing a copy after storing into a register or stack temporary. */ |
3352 | if (GET_CODE (dst) == CONCAT) |
3353 | { |
3354 | if (known_le (bytepos + adj_bytelen, |
3355 | GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))) |
3356 | dest = XEXP (dst, 0); |
3357 | |
3358 | else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))) |
3359 | { |
3360 | bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))); |
3361 | dest = XEXP (dst, 1); |
3362 | } |
3363 | |
3364 | else |
3365 | { |
3366 | machine_mode dest_mode = GET_MODE (dest); |
3367 | machine_mode tmp_mode = GET_MODE (tmps[i]); |
3368 | scalar_int_mode dest_imode; |
3369 | |
3370 | gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0)); |
3371 | |
3372 | /* If the source is a single scalar integer register, and the |
3373 | destination has a complex mode for which a same-sized integer |
3374 | mode exists, then we can take the left-justified part of the |
3375 | source in the complex mode. */ |
3376 | if (finish == start + 1 |
3377 | && REG_P (tmps[i]) |
3378 | && SCALAR_INT_MODE_P (tmp_mode) |
3379 | && COMPLEX_MODE_P (dest_mode) |
3380 | && int_mode_for_mode (dest_mode).exists (mode: &dest_imode)) |
3381 | { |
3382 | const scalar_int_mode tmp_imode |
3383 | = as_a <scalar_int_mode> (m: tmp_mode); |
3384 | |
3385 | if (GET_MODE_BITSIZE (mode: dest_imode) |
3386 | < GET_MODE_BITSIZE (mode: tmp_imode)) |
3387 | { |
3388 | dest = gen_reg_rtx (dest_imode); |
3389 | if (BYTES_BIG_ENDIAN) |
3390 | tmps[i] = expand_shift (RSHIFT_EXPR, tmp_mode, tmps[i], |
3391 | GET_MODE_BITSIZE (mode: tmp_imode) |
3392 | - GET_MODE_BITSIZE (mode: dest_imode), |
3393 | NULL_RTX, 1); |
3394 | emit_move_insn (dest, gen_lowpart (dest_imode, tmps[i])); |
3395 | dst = gen_lowpart (dest_mode, dest); |
3396 | } |
3397 | else |
3398 | dst = gen_lowpart (dest_mode, tmps[i]); |
3399 | } |
3400 | |
3401 | /* Otherwise spill the source onto the stack using the more |
3402 | aligned of the two modes. */ |
3403 | else if (GET_MODE_ALIGNMENT (dest_mode) |
3404 | >= GET_MODE_ALIGNMENT (tmp_mode)) |
3405 | { |
3406 | dest = assign_stack_temp (dest_mode, |
3407 | GET_MODE_SIZE (mode: dest_mode)); |
3408 | emit_move_insn (adjust_address (dest, tmp_mode, bytepos), |
3409 | tmps[i]); |
3410 | dst = dest; |
3411 | } |
3412 | |
3413 | else |
3414 | { |
3415 | dest = assign_stack_temp (tmp_mode, |
3416 | GET_MODE_SIZE (mode: tmp_mode)); |
3417 | emit_move_insn (dest, tmps[i]); |
3418 | dst = adjust_address (dest, dest_mode, bytepos); |
3419 | } |
3420 | |
3421 | break; |
3422 | } |
3423 | } |
3424 | |
3425 | /* Handle trailing fragments that run over the size of the struct. */ |
3426 | if (known_size_p (a: ssize) && maybe_gt (bytepos + bytelen, ssize)) |
3427 | { |
3428 | /* store_bit_field always takes its value from the lsb. |
3429 | Move the fragment to the lsb if it's not already there. */ |
3430 | if ( |
3431 | #ifdef BLOCK_REG_PADDING |
3432 | BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start) |
3433 | == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD) |
3434 | #else |
3435 | BYTES_BIG_ENDIAN |
3436 | #endif |
3437 | ) |
3438 | { |
3439 | poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; |
3440 | tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i], |
3441 | shift, tmps[i], 0); |
3442 | } |
3443 | |
3444 | /* Make sure not to write past the end of the struct. */ |
3445 | store_bit_field (dest, |
3446 | adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, |
3447 | bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1, |
3448 | VOIDmode, tmps[i], false, false); |
3449 | } |
3450 | |
3451 | /* Optimize the access just a bit. */ |
3452 | else if (MEM_P (dest) |
3453 | && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest)) |
3454 | || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) |
3455 | && multiple_p (a: bytepos * BITS_PER_UNIT, |
3456 | GET_MODE_ALIGNMENT (mode)) |
3457 | && known_eq (bytelen, GET_MODE_SIZE (mode))) |
3458 | emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]); |
3459 | |
3460 | else |
3461 | store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, |
3462 | 0, 0, mode, tmps[i], false, false); |
3463 | } |
3464 | |
3465 | /* Copy from the pseudo into the (probable) hard reg. */ |
3466 | if (orig_dst != dst) |
3467 | emit_move_insn (orig_dst, dst); |
3468 | } |
3469 | |
3470 | /* Return a form of X that does not use a PARALLEL. TYPE is the type |
3471 | of the value stored in X. */ |
3472 | |
3473 | rtx |
3474 | maybe_emit_group_store (rtx x, tree type) |
3475 | { |
3476 | machine_mode mode = TYPE_MODE (type); |
3477 | gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode); |
3478 | if (GET_CODE (x) == PARALLEL) |
3479 | { |
3480 | rtx result = gen_reg_rtx (mode); |
3481 | emit_group_store (orig_dst: result, src: x, type, ssize: int_size_in_bytes (type)); |
3482 | return result; |
3483 | } |
3484 | return x; |
3485 | } |
3486 | |
3487 | /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET. |
3488 | |
3489 | This is used on targets that return BLKmode values in registers. */ |
3490 | |
3491 | static void |
3492 | copy_blkmode_from_reg (rtx target, rtx srcreg, tree type) |
3493 | { |
3494 | unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type); |
3495 | rtx src = NULL, dst = NULL; |
3496 | unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD); |
3497 | unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0; |
3498 | /* No current ABI uses variable-sized modes to pass a BLKmnode type. */ |
3499 | fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg)); |
3500 | fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target)); |
3501 | fixed_size_mode copy_mode; |
3502 | |
3503 | /* BLKmode registers created in the back-end shouldn't have survived. */ |
3504 | gcc_assert (mode != BLKmode); |
3505 | |
3506 | /* If the structure doesn't take up a whole number of words, see whether |
3507 | SRCREG is padded on the left or on the right. If it's on the left, |
3508 | set PADDING_CORRECTION to the number of bits to skip. |
3509 | |
3510 | In most ABIs, the structure will be returned at the least end of |
3511 | the register, which translates to right padding on little-endian |
3512 | targets and left padding on big-endian targets. The opposite |
3513 | holds if the structure is returned at the most significant |
3514 | end of the register. */ |
3515 | if (bytes % UNITS_PER_WORD != 0 |
3516 | && (targetm.calls.return_in_msb (type) |
3517 | ? !BYTES_BIG_ENDIAN |
3518 | : BYTES_BIG_ENDIAN)) |
3519 | padding_correction |
3520 | = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT)); |
3521 | |
3522 | /* We can use a single move if we have an exact mode for the size. */ |
3523 | else if (MEM_P (target) |
3524 | && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target)) |
3525 | || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode)) |
3526 | && bytes == GET_MODE_SIZE (mode)) |
3527 | { |
3528 | emit_move_insn (adjust_address (target, mode, 0), srcreg); |
3529 | return; |
3530 | } |
3531 | |
3532 | /* And if we additionally have the same mode for a register. */ |
3533 | else if (REG_P (target) |
3534 | && GET_MODE (target) == mode |
3535 | && bytes == GET_MODE_SIZE (mode)) |
3536 | { |
3537 | emit_move_insn (target, srcreg); |
3538 | return; |
3539 | } |
3540 | |
3541 | /* This code assumes srcreg is at least a full word. If it isn't, copy it |
3542 | into a new pseudo which is a full word. */ |
3543 | if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) |
3544 | { |
3545 | srcreg = convert_to_mode (mode: word_mode, x: srcreg, TYPE_UNSIGNED (type)); |
3546 | mode = word_mode; |
3547 | } |
3548 | |
3549 | /* Copy the structure BITSIZE bits at a time. If the target lives in |
3550 | memory, take care of not reading/writing past its end by selecting |
3551 | a copy mode suited to BITSIZE. This should always be possible given |
3552 | how it is computed. |
3553 | |
3554 | If the target lives in register, make sure not to select a copy mode |
3555 | larger than the mode of the register. |
3556 | |
3557 | We could probably emit more efficient code for machines which do not use |
3558 | strict alignment, but it doesn't seem worth the effort at the current |
3559 | time. */ |
3560 | |
3561 | copy_mode = word_mode; |
3562 | if (MEM_P (target)) |
3563 | { |
3564 | opt_scalar_int_mode mem_mode = int_mode_for_size (size: bitsize, limit: 1); |
3565 | if (mem_mode.exists ()) |
3566 | copy_mode = mem_mode.require (); |
3567 | } |
3568 | else if (REG_P (target) && GET_MODE_BITSIZE (mode: tmode) < BITS_PER_WORD) |
3569 | copy_mode = tmode; |
3570 | |
3571 | for (bitpos = 0, xbitpos = padding_correction; |
3572 | bitpos < bytes * BITS_PER_UNIT; |
3573 | bitpos += bitsize, xbitpos += bitsize) |
3574 | { |
3575 | /* We need a new source operand each time xbitpos is on a |
3576 | word boundary and when xbitpos == padding_correction |
3577 | (the first time through). */ |
3578 | if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction) |
3579 | src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode); |
3580 | |
3581 | /* We need a new destination operand each time bitpos is on |
3582 | a word boundary. */ |
3583 | if (REG_P (target) && GET_MODE_BITSIZE (mode: tmode) < BITS_PER_WORD) |
3584 | dst = target; |
3585 | else if (bitpos % BITS_PER_WORD == 0) |
3586 | dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode); |
3587 | |
3588 | /* Use xbitpos for the source extraction (right justified) and |
3589 | bitpos for the destination store (left justified). */ |
3590 | store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode, |
3591 | extract_bit_field (src, bitsize, |
3592 | xbitpos % BITS_PER_WORD, 1, |
3593 | NULL_RTX, copy_mode, copy_mode, |
3594 | false, NULL), |
3595 | false, false); |
3596 | } |
3597 | } |
3598 | |
3599 | /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the |
3600 | register if it contains any data, otherwise return null. |
3601 | |
3602 | This is used on targets that return BLKmode values in registers. */ |
3603 | |
3604 | rtx |
3605 | copy_blkmode_to_reg (machine_mode mode_in, tree src) |
3606 | { |
3607 | int i, n_regs; |
3608 | unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes; |
3609 | unsigned int bitsize; |
3610 | rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX; |
3611 | /* No current ABI uses variable-sized modes to pass a BLKmnode type. */ |
3612 | fixed_size_mode mode = as_a <fixed_size_mode> (m: mode_in); |
3613 | fixed_size_mode dst_mode; |
3614 | scalar_int_mode min_mode; |
3615 | |
3616 | gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode); |
3617 | |
3618 | x = expand_normal (exp: src); |
3619 | |
3620 | bytes = arg_int_size_in_bytes (TREE_TYPE (src)); |
3621 | if (bytes == 0) |
3622 | return NULL_RTX; |
3623 | |
3624 | /* If the structure doesn't take up a whole number of words, see |
3625 | whether the register value should be padded on the left or on |
3626 | the right. Set PADDING_CORRECTION to the number of padding |
3627 | bits needed on the left side. |
3628 | |
3629 | In most ABIs, the structure will be returned at the least end of |
3630 | the register, which translates to right padding on little-endian |
3631 | targets and left padding on big-endian targets. The opposite |
3632 | holds if the structure is returned at the most significant |
3633 | end of the register. */ |
3634 | if (bytes % UNITS_PER_WORD != 0 |
3635 | && (targetm.calls.return_in_msb (TREE_TYPE (src)) |
3636 | ? !BYTES_BIG_ENDIAN |
3637 | : BYTES_BIG_ENDIAN)) |
3638 | padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) |
3639 | * BITS_PER_UNIT)); |
3640 | |
3641 | n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; |
3642 | dst_words = XALLOCAVEC (rtx, n_regs); |
3643 | bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); |
3644 | min_mode = smallest_int_mode_for_size (size: bitsize); |
3645 | |
3646 | /* Copy the structure BITSIZE bits at a time. */ |
3647 | for (bitpos = 0, xbitpos = padding_correction; |
3648 | bitpos < bytes * BITS_PER_UNIT; |
3649 | bitpos += bitsize, xbitpos += bitsize) |
3650 | { |
3651 | /* We need a new destination pseudo each time xbitpos is |
3652 | on a word boundary and when xbitpos == padding_correction |
3653 | (the first time through). */ |
3654 | if (xbitpos % BITS_PER_WORD == 0 |
3655 | || xbitpos == padding_correction) |
3656 | { |
3657 | /* Generate an appropriate register. */ |
3658 | dst_word = gen_reg_rtx (word_mode); |
3659 | dst_words[xbitpos / BITS_PER_WORD] = dst_word; |
3660 | |
3661 | /* Clear the destination before we move anything into it. */ |
3662 | emit_move_insn (dst_word, CONST0_RTX (word_mode)); |
3663 | } |
3664 | |
3665 | /* Find the largest integer mode that can be used to copy all or as |
3666 | many bits as possible of the structure if the target supports larger |
3667 | copies. There are too many corner cases here w.r.t to alignments on |
3668 | the read/writes. So if there is any padding just use single byte |
3669 | operations. */ |
3670 | opt_scalar_int_mode mode_iter; |
3671 | if (padding_correction == 0 && !STRICT_ALIGNMENT) |
3672 | { |
3673 | FOR_EACH_MODE_FROM (mode_iter, min_mode) |
3674 | { |
3675 | unsigned int msize = GET_MODE_BITSIZE (mode: mode_iter.require ()); |
3676 | if (msize <= ((bytes * BITS_PER_UNIT) - bitpos) |
3677 | && msize <= BITS_PER_WORD) |
3678 | bitsize = msize; |
3679 | else |
3680 | break; |
3681 | } |
3682 | } |
3683 | |
3684 | /* We need a new source operand each time bitpos is on a word |
3685 | boundary. */ |
3686 | if (bitpos % BITS_PER_WORD == 0) |
3687 | src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode); |
3688 | |
3689 | /* Use bitpos for the source extraction (left justified) and |
3690 | xbitpos for the destination store (right justified). */ |
3691 | store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, |
3692 | 0, 0, word_mode, |
3693 | extract_bit_field (src_word, bitsize, |
3694 | bitpos % BITS_PER_WORD, 1, |
3695 | NULL_RTX, word_mode, word_mode, |
3696 | false, NULL), |
3697 | false, false); |
3698 | } |
3699 | |
3700 | if (mode == BLKmode) |
3701 | { |
3702 | /* Find the smallest integer mode large enough to hold the |
3703 | entire structure. */ |
3704 | opt_scalar_int_mode mode_iter; |
3705 | FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) |
3706 | if (GET_MODE_SIZE (mode: mode_iter.require ()) >= bytes) |
3707 | break; |
3708 | |
3709 | /* A suitable mode should have been found. */ |
3710 | mode = mode_iter.require (); |
3711 | } |
3712 | |
3713 | if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (mode: word_mode)) |
3714 | dst_mode = word_mode; |
3715 | else |
3716 | dst_mode = mode; |
3717 | dst = gen_reg_rtx (dst_mode); |
3718 | |
3719 | for (i = 0; i < n_regs; i++) |
3720 | emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]); |
3721 | |
3722 | if (mode != dst_mode) |
3723 | dst = gen_lowpart (mode, dst); |
3724 | |
3725 | return dst; |
3726 | } |
3727 | |
3728 | /* Add a USE expression for REG to the (possibly empty) list pointed |
3729 | to by CALL_FUSAGE. REG must denote a hard register. */ |
3730 | |
3731 | void |
3732 | use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode) |
3733 | { |
3734 | gcc_assert (REG_P (reg)); |
3735 | |
3736 | if (!HARD_REGISTER_P (reg)) |
3737 | return; |
3738 | |
3739 | *call_fusage |
3740 | = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage); |
3741 | } |
3742 | |
3743 | /* Add a CLOBBER expression for REG to the (possibly empty) list pointed |
3744 | to by CALL_FUSAGE. REG must denote a hard register. */ |
3745 | |
3746 | void |
3747 | clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode) |
3748 | { |
3749 | gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER); |
3750 | |
3751 | *call_fusage |
3752 | = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage); |
3753 | } |
3754 | |
3755 | /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs, |
3756 | starting at REGNO. All of these registers must be hard registers. */ |
3757 | |
3758 | void |
3759 | use_regs (rtx *call_fusage, int regno, int nregs) |
3760 | { |
3761 | int i; |
3762 | |
3763 | gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); |
3764 | |
3765 | for (i = 0; i < nregs; i++) |
3766 | use_reg (fusage: call_fusage, reg: regno_reg_rtx[regno + i]); |
3767 | } |
3768 | |
3769 | /* Add USE expressions to *CALL_FUSAGE for each REG contained in the |
3770 | PARALLEL REGS. This is for calls that pass values in multiple |
3771 | non-contiguous locations. The Irix 6 ABI has examples of this. */ |
3772 | |
3773 | void |
3774 | use_group_regs (rtx *call_fusage, rtx regs) |
3775 | { |
3776 | int i; |
3777 | |
3778 | for (i = 0; i < XVECLEN (regs, 0); i++) |
3779 | { |
3780 | rtx reg = XEXP (XVECEXP (regs, 0, i), 0); |
3781 | |
3782 | /* A NULL entry means the parameter goes both on the stack and in |
3783 | registers. This can also be a MEM for targets that pass values |
3784 | partially on the stack and partially in registers. */ |
3785 | if (reg != 0 && REG_P (reg)) |
3786 | use_reg (fusage: call_fusage, reg); |
3787 | } |
3788 | } |
3789 | |
3790 | /* Return the defining gimple statement for SSA_NAME NAME if it is an |
3791 | assigment and the code of the expresion on the RHS is CODE. Return |
3792 | NULL otherwise. */ |
3793 | |
3794 | static gimple * |
3795 | get_def_for_expr (tree name, enum tree_code code) |
3796 | { |
3797 | gimple *def_stmt; |
3798 | |
3799 | if (TREE_CODE (name) != SSA_NAME) |
3800 | return NULL; |
3801 | |
3802 | def_stmt = get_gimple_for_ssa_name (exp: name); |
3803 | if (!def_stmt |
3804 | || gimple_assign_rhs_code (gs: def_stmt) != code) |
3805 | return NULL; |
3806 | |
3807 | return def_stmt; |
3808 | } |
3809 | |
3810 | /* Return the defining gimple statement for SSA_NAME NAME if it is an |
3811 | assigment and the class of the expresion on the RHS is CLASS. Return |
3812 | NULL otherwise. */ |
3813 | |
3814 | static gimple * |
3815 | get_def_for_expr_class (tree name, enum tree_code_class tclass) |
3816 | { |
3817 | gimple *def_stmt; |
3818 | |
3819 | if (TREE_CODE (name) != SSA_NAME) |
3820 | return NULL; |
3821 | |
3822 | def_stmt = get_gimple_for_ssa_name (exp: name); |
3823 | if (!def_stmt |
3824 | || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass) |
3825 | return NULL; |
3826 | |
3827 | return def_stmt; |
3828 | } |
3829 | |
3830 | /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is |
3831 | its length in bytes. */ |
3832 | |
3833 | rtx |
3834 | clear_storage_hints (rtx object, rtx size, enum block_op_methods method, |
3835 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
3836 | unsigned HOST_WIDE_INT min_size, |
3837 | unsigned HOST_WIDE_INT max_size, |
3838 | unsigned HOST_WIDE_INT probable_max_size, |
3839 | unsigned ctz_size) |
3840 | { |
3841 | machine_mode mode = GET_MODE (object); |
3842 | unsigned int align; |
3843 | |
3844 | gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL); |
3845 | |
3846 | /* If OBJECT is not BLKmode and SIZE is the same size as its mode, |
3847 | just move a zero. Otherwise, do this a piece at a time. */ |
3848 | poly_int64 size_val; |
3849 | if (mode != BLKmode |
3850 | && poly_int_rtx_p (x: size, res: &size_val) |
3851 | && known_eq (size_val, GET_MODE_SIZE (mode))) |
3852 | { |
3853 | rtx zero = CONST0_RTX (mode); |
3854 | if (zero != NULL) |
3855 | { |
3856 | emit_move_insn (object, zero); |
3857 | return NULL; |
3858 | } |
3859 | |
3860 | if (COMPLEX_MODE_P (mode)) |
3861 | { |
3862 | zero = CONST0_RTX (GET_MODE_INNER (mode)); |
3863 | if (zero != NULL) |
3864 | { |
3865 | write_complex_part (object, zero, 0, true); |
3866 | write_complex_part (object, zero, 1, false); |
3867 | return NULL; |
3868 | } |
3869 | } |
3870 | } |
3871 | |
3872 | if (size == const0_rtx) |
3873 | return NULL; |
3874 | |
3875 | align = MEM_ALIGN (object); |
3876 | |
3877 | if (CONST_INT_P (size) |
3878 | && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align, |
3879 | CLEAR_BY_PIECES, |
3880 | optimize_insn_for_speed_p ())) |
3881 | clear_by_pieces (to: object, INTVAL (size), align); |
3882 | else if (set_storage_via_setmem (object, size, const0_rtx, align, |
3883 | expected_align, expected_size, |
3884 | min_size, max_size, probable_max_size)) |
3885 | ; |
3886 | else if (try_store_by_multiple_pieces (to: object, len: size, ctz_len: ctz_size, |
3887 | min_len: min_size, max_len: max_size, |
3888 | NULL_RTX, valc: 0, align)) |
3889 | ; |
3890 | else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object))) |
3891 | return set_storage_via_libcall (object, size, const0_rtx, |
3892 | method == BLOCK_OP_TAILCALL); |
3893 | else |
3894 | gcc_unreachable (); |
3895 | |
3896 | return NULL; |
3897 | } |
3898 | |
3899 | rtx |
3900 | clear_storage (rtx object, rtx size, enum block_op_methods method) |
3901 | { |
3902 | unsigned HOST_WIDE_INT max, min = 0; |
3903 | if (GET_CODE (size) == CONST_INT) |
3904 | min = max = UINTVAL (size); |
3905 | else |
3906 | max = GET_MODE_MASK (GET_MODE (size)); |
3907 | return clear_storage_hints (object, size, method, expected_align: 0, expected_size: -1, min_size: min, max_size: max, probable_max_size: max, ctz_size: 0); |
3908 | } |
3909 | |
3910 | |
3911 | /* A subroutine of clear_storage. Expand a call to memset. |
3912 | Return the return value of memset, 0 otherwise. */ |
3913 | |
3914 | rtx |
3915 | set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall) |
3916 | { |
3917 | tree call_expr, fn, object_tree, size_tree, val_tree; |
3918 | machine_mode size_mode; |
3919 | |
3920 | object = copy_addr_to_reg (XEXP (object, 0)); |
3921 | object_tree = make_tree (ptr_type_node, object); |
3922 | |
3923 | if (!CONST_INT_P (val)) |
3924 | val = convert_to_mode (TYPE_MODE (integer_type_node), x: val, unsignedp: 1); |
3925 | val_tree = make_tree (integer_type_node, val); |
3926 | |
3927 | size_mode = TYPE_MODE (sizetype); |
3928 | size = convert_to_mode (mode: size_mode, x: size, unsignedp: 1); |
3929 | size = copy_to_mode_reg (size_mode, size); |
3930 | size_tree = make_tree (sizetype, size); |
3931 | |
3932 | /* It is incorrect to use the libcall calling conventions for calls to |
3933 | memset because it can be provided by the user. */ |
3934 | fn = builtin_decl_implicit (fncode: BUILT_IN_MEMSET); |
3935 | call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree); |
3936 | CALL_EXPR_TAILCALL (call_expr) = tailcall; |
3937 | |
3938 | return expand_call (call_expr, NULL_RTX, false); |
3939 | } |
3940 | |
3941 | /* Expand a setmem pattern; return true if successful. */ |
3942 | |
3943 | bool |
3944 | set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align, |
3945 | unsigned int expected_align, HOST_WIDE_INT expected_size, |
3946 | unsigned HOST_WIDE_INT min_size, |
3947 | unsigned HOST_WIDE_INT max_size, |
3948 | unsigned HOST_WIDE_INT probable_max_size) |
3949 | { |
3950 | /* Try the most limited insn first, because there's no point |
3951 | including more than one in the machine description unless |
3952 | the more limited one has some advantage. */ |
3953 | |
3954 | if (expected_align < align) |
3955 | expected_align = align; |
3956 | if (expected_size != -1) |
3957 | { |
3958 | if ((unsigned HOST_WIDE_INT)expected_size > max_size) |
3959 | expected_size = max_size; |
3960 | if ((unsigned HOST_WIDE_INT)expected_size < min_size) |
3961 | expected_size = min_size; |
3962 | } |
3963 | |
3964 | opt_scalar_int_mode mode_iter; |
3965 | FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) |
3966 | { |
3967 | scalar_int_mode mode = mode_iter.require (); |
3968 | enum insn_code code = direct_optab_handler (op: setmem_optab, mode); |
3969 | |
3970 | if (code != CODE_FOR_nothing |
3971 | /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT |
3972 | here because if SIZE is less than the mode mask, as it is |
3973 | returned by the macro, it will definitely be less than the |
3974 | actual mode mask. Since SIZE is within the Pmode address |
3975 | space, we limit MODE to Pmode. */ |
3976 | && ((CONST_INT_P (size) |
3977 | && ((unsigned HOST_WIDE_INT) INTVAL (size) |
3978 | <= (GET_MODE_MASK (mode) >> 1))) |
3979 | || max_size <= (GET_MODE_MASK (mode) >> 1) |
3980 | || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) |
3981 | { |
3982 | class expand_operand ops[9]; |
3983 | unsigned int nops; |
3984 | |
3985 | nops = insn_data[(int) code].n_generator_args; |
3986 | gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); |
3987 | |
3988 | create_fixed_operand (op: &ops[0], x: object); |
3989 | /* The check above guarantees that this size conversion is valid. */ |
3990 | create_convert_operand_to (op: &ops[1], value: size, mode, unsigned_p: true); |
3991 | create_convert_operand_from (op: &ops[2], value: val, mode: byte_mode, unsigned_p: true); |
3992 | create_integer_operand (&ops[3], align / BITS_PER_UNIT); |
3993 | if (nops >= 6) |
3994 | { |
3995 | create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); |
3996 | create_integer_operand (&ops[5], expected_size); |
3997 | } |
3998 | if (nops >= 8) |
3999 | { |
4000 | create_integer_operand (&ops[6], min_size); |
4001 | /* If we cannot represent the maximal size, |
4002 | make parameter NULL. */ |
4003 | if ((HOST_WIDE_INT) max_size != -1) |
4004 | create_integer_operand (&ops[7], max_size); |
4005 | else |
4006 | create_fixed_operand (op: &ops[7], NULL); |
4007 | } |
4008 | if (nops == 9) |
4009 | { |
4010 | /* If we cannot represent the maximal size, |
4011 | make parameter NULL. */ |
4012 | if ((HOST_WIDE_INT) probable_max_size != -1) |
4013 | create_integer_operand (&ops[8], probable_max_size); |
4014 | else |
4015 | create_fixed_operand (op: &ops[8], NULL); |
4016 | } |
4017 | if (maybe_expand_insn (icode: code, nops, ops)) |
4018 | return true; |
4019 | } |
4020 | } |
4021 | |
4022 | return false; |
4023 | } |
4024 | |
4025 | |
4026 | /* Write to one of the components of the complex value CPLX. Write VAL to |
4027 | the real part if IMAG_P is false, and the imaginary part if its true. |
4028 | If UNDEFINED_P then the value in CPLX is currently undefined. */ |
4029 | |
4030 | void |
4031 | write_complex_part (rtx cplx, rtx val, bool imag_p, bool undefined_p) |
4032 | { |
4033 | machine_mode cmode; |
4034 | scalar_mode imode; |
4035 | unsigned ibitsize; |
4036 | |
4037 | if (GET_CODE (cplx) == CONCAT) |
4038 | { |
4039 | emit_move_insn (XEXP (cplx, imag_p), val); |
4040 | return; |
4041 | } |
4042 | |
4043 | cmode = GET_MODE (cplx); |
4044 | imode = GET_MODE_INNER (cmode); |
4045 | ibitsize = GET_MODE_BITSIZE (mode: imode); |
4046 | |
4047 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
4048 | because, e.g., the original address is considered mode-dependent |
4049 | by the target, which restricts simplify_subreg from invoking |
4050 | adjust_address_nv. Instead of preparing fallback support for an |
4051 | invalid address, we call adjust_address_nv directly. */ |
4052 | if (MEM_P (cplx)) |
4053 | { |
4054 | emit_move_insn (adjust_address_nv (cplx, imode, |
4055 | imag_p ? GET_MODE_SIZE (imode) : 0), |
4056 | val); |
4057 | return; |
4058 | } |
4059 | |
4060 | /* If the sub-object is at least word sized, then we know that subregging |
4061 | will work. This special case is important, since store_bit_field |
4062 | wants to operate on integer modes, and there's rarely an OImode to |
4063 | correspond to TCmode. */ |
4064 | if (ibitsize >= BITS_PER_WORD |
4065 | /* For hard regs we have exact predicates. Assume we can split |
4066 | the original object if it spans an even number of hard regs. |
4067 | This special case is important for SCmode on 64-bit platforms |
4068 | where the natural size of floating-point regs is 32-bit. */ |
4069 | || (REG_P (cplx) |
4070 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
4071 | && REG_NREGS (cplx) % 2 == 0)) |
4072 | { |
4073 | rtx part = simplify_gen_subreg (outermode: imode, op: cplx, innermode: cmode, |
4074 | byte: imag_p ? GET_MODE_SIZE (mode: imode) : 0); |
4075 | if (part) |
4076 | { |
4077 | emit_move_insn (part, val); |
4078 | return; |
4079 | } |
4080 | else |
4081 | /* simplify_gen_subreg may fail for sub-word MEMs. */ |
4082 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); |
4083 | } |
4084 | |
4085 | store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val, |
4086 | false, undefined_p); |
4087 | } |
4088 | |
4089 | /* Extract one of the components of the complex value CPLX. Extract the |
4090 | real part if IMAG_P is false, and the imaginary part if it's true. */ |
4091 | |
4092 | rtx |
4093 | read_complex_part (rtx cplx, bool imag_p) |
4094 | { |
4095 | machine_mode cmode; |
4096 | scalar_mode imode; |
4097 | unsigned ibitsize; |
4098 | |
4099 | if (GET_CODE (cplx) == CONCAT) |
4100 | return XEXP (cplx, imag_p); |
4101 | |
4102 | cmode = GET_MODE (cplx); |
4103 | imode = GET_MODE_INNER (cmode); |
4104 | ibitsize = GET_MODE_BITSIZE (mode: imode); |
4105 | |
4106 | /* Special case reads from complex constants that got spilled to memory. */ |
4107 | if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF) |
4108 | { |
4109 | tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0)); |
4110 | if (decl && TREE_CODE (decl) == COMPLEX_CST) |
4111 | { |
4112 | tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl); |
4113 | if (CONSTANT_CLASS_P (part)) |
4114 | return expand_expr (exp: part, NULL_RTX, mode: imode, modifier: EXPAND_NORMAL); |
4115 | } |
4116 | } |
4117 | |
4118 | /* For MEMs simplify_gen_subreg may generate an invalid new address |
4119 | because, e.g., the original address is considered mode-dependent |
4120 | by the target, which restricts simplify_subreg from invoking |
4121 | adjust_address_nv. Instead of preparing fallback support for an |
4122 | invalid address, we call adjust_address_nv directly. */ |
4123 | if (MEM_P (cplx)) |
4124 | return adjust_address_nv (cplx, imode, |
4125 | imag_p ? GET_MODE_SIZE (imode) : 0); |
4126 | |
4127 | /* If the sub-object is at least word sized, then we know that subregging |
4128 | will work. This special case is important, since extract_bit_field |
4129 | wants to operate on integer modes, and there's rarely an OImode to |
4130 | correspond to TCmode. */ |
4131 | if (ibitsize >= BITS_PER_WORD |
4132 | /* For hard regs we have exact predicates. Assume we can split |
4133 | the original object if it spans an even number of hard regs. |
4134 | This special case is important for SCmode on 64-bit platforms |
4135 | where the natural size of floating-point regs is 32-bit. */ |
4136 | || (REG_P (cplx) |
4137 | && REGNO (cplx) < FIRST_PSEUDO_REGISTER |
4138 | && REG_NREGS (cplx) % 2 == 0)) |
4139 | { |
4140 | rtx ret = simplify_gen_subreg (outermode: imode, op: cplx, innermode: cmode, |
4141 | byte: imag_p ? GET_MODE_SIZE (mode: imode) : 0); |
4142 | if (ret) |
4143 | return ret; |
4144 | else |
4145 | /* simplify_gen_subreg may fail for sub-word MEMs. */ |
4146 | gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); |
4147 | } |
4148 | |
4149 | return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, |
4150 | true, NULL_RTX, imode, imode, false, NULL); |
4151 | } |
4152 | |
4153 | /* A subroutine of emit_move_insn_1. Yet another lowpart generator. |
4154 | NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be |
4155 | represented in NEW_MODE. If FORCE is true, this will never happen, as |
4156 | we'll force-create a SUBREG if needed. */ |
4157 | |
4158 | static rtx |
4159 | emit_move_change_mode (machine_mode new_mode, |
4160 | machine_mode old_mode, rtx x, bool force) |
4161 | { |
4162 | rtx ret; |
4163 | |
4164 | if (push_operand (x, GET_MODE (x))) |
4165 | { |
4166 | ret = gen_rtx_MEM (new_mode, XEXP (x, 0)); |
4167 | MEM_COPY_ATTRIBUTES (ret, x); |
4168 | } |
4169 | else if (MEM_P (x)) |
4170 | { |
4171 | /* We don't have to worry about changing the address since the |
4172 | size in bytes is supposed to be the same. */ |
4173 | if (reload_in_progress) |
4174 | { |
4175 | /* Copy the MEM to change the mode and move any |
4176 | substitutions from the old MEM to the new one. */ |
4177 | ret = adjust_address_nv (x, new_mode, 0); |
4178 | copy_replacements (x, ret); |
4179 | } |
4180 | else |
4181 | ret = adjust_address (x, new_mode, 0); |
4182 | } |
4183 | else |
4184 | { |
4185 | /* Note that we do want simplify_subreg's behavior of validating |
4186 | that the new mode is ok for a hard register. If we were to use |
4187 | simplify_gen_subreg, we would create the subreg, but would |
4188 | probably run into the target not being able to implement it. */ |
4189 | /* Except, of course, when FORCE is true, when this is exactly what |
4190 | we want. Which is needed for CCmodes on some targets. */ |
4191 | if (force) |
4192 | ret = simplify_gen_subreg (outermode: new_mode, op: x, innermode: old_mode, byte: 0); |
4193 | else |
4194 | ret = simplify_subreg (outermode: new_mode, op: x, innermode: old_mode, byte: 0); |
4195 | } |
4196 | |
4197 | return ret; |
4198 | } |
4199 | |
4200 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X using |
4201 | an integer mode of the same size as MODE. Returns the instruction |
4202 | emitted, or NULL if such a move could not be generated. */ |
4203 | |
4204 | static rtx_insn * |
4205 | emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force) |
4206 | { |
4207 | scalar_int_mode imode; |
4208 | enum insn_code code; |
4209 | |
4210 | /* There must exist a mode of the exact size we require. */ |
4211 | if (!int_mode_for_mode (mode).exists (mode: &imode)) |
4212 | return NULL; |
4213 | |
4214 | /* The target must support moves in this mode. */ |
4215 | code = optab_handler (op: mov_optab, mode: imode); |
4216 | if (code == CODE_FOR_nothing) |
4217 | return NULL; |
4218 | |
4219 | x = emit_move_change_mode (new_mode: imode, old_mode: mode, x, force); |
4220 | if (x == NULL_RTX) |
4221 | return NULL; |
4222 | y = emit_move_change_mode (new_mode: imode, old_mode: mode, x: y, force); |
4223 | if (y == NULL_RTX) |
4224 | return NULL; |
4225 | return emit_insn (GEN_FCN (code) (x, y)); |
4226 | } |
4227 | |
4228 | /* A subroutine of emit_move_insn_1. X is a push_operand in MODE. |
4229 | Return an equivalent MEM that does not use an auto-increment. */ |
4230 | |
4231 | rtx |
4232 | emit_move_resolve_push (machine_mode mode, rtx x) |
4233 | { |
4234 | enum rtx_code code = GET_CODE (XEXP (x, 0)); |
4235 | rtx temp; |
4236 | |
4237 | poly_int64 adjust = GET_MODE_SIZE (mode); |
4238 | #ifdef PUSH_ROUNDING |
4239 | adjust = PUSH_ROUNDING (adjust); |
4240 | #endif |
4241 | if (code == PRE_DEC || code == POST_DEC) |
4242 | adjust = -adjust; |
4243 | else if (code == PRE_MODIFY || code == POST_MODIFY) |
4244 | { |
4245 | rtx expr = XEXP (XEXP (x, 0), 1); |
4246 | |
4247 | gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS); |
4248 | poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1)); |
4249 | if (GET_CODE (expr) == MINUS) |
4250 | val = -val; |
4251 | gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val)); |
4252 | adjust = val; |
4253 | } |
4254 | |
4255 | /* Do not use anti_adjust_stack, since we don't want to update |
4256 | stack_pointer_delta. */ |
4257 | temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx, |
4258 | gen_int_mode (adjust, Pmode), stack_pointer_rtx, |
4259 | 0, OPTAB_LIB_WIDEN); |
4260 | if (temp != stack_pointer_rtx) |
4261 | emit_move_insn (stack_pointer_rtx, temp); |
4262 | |
4263 | switch (code) |
4264 | { |
4265 | case PRE_INC: |
4266 | case PRE_DEC: |
4267 | case PRE_MODIFY: |
4268 | temp = stack_pointer_rtx; |
4269 | break; |
4270 | case POST_INC: |
4271 | case POST_DEC: |
4272 | case POST_MODIFY: |
4273 | temp = plus_constant (Pmode, stack_pointer_rtx, -adjust); |
4274 | break; |
4275 | default: |
4276 | gcc_unreachable (); |
4277 | } |
4278 | |
4279 | return replace_equiv_address (x, temp); |
4280 | } |
4281 | |
4282 | /* A subroutine of emit_move_complex. Generate a move from Y into X. |
4283 | X is known to satisfy push_operand, and MODE is known to be complex. |
4284 | Returns the last instruction emitted. */ |
4285 | |
4286 | rtx_insn * |
4287 | emit_move_complex_push (machine_mode mode, rtx x, rtx y) |
4288 | { |
4289 | scalar_mode submode = GET_MODE_INNER (mode); |
4290 | bool imag_first; |
4291 | |
4292 | #ifdef PUSH_ROUNDING |
4293 | poly_int64 submodesize = GET_MODE_SIZE (mode: submode); |
4294 | |
4295 | /* In case we output to the stack, but the size is smaller than the |
4296 | machine can push exactly, we need to use move instructions. */ |
4297 | if (maybe_ne (PUSH_ROUNDING (submodesize), b: submodesize)) |
4298 | { |
4299 | x = emit_move_resolve_push (mode, x); |
4300 | return emit_move_insn (x, y); |
4301 | } |
4302 | #endif |
4303 | |
4304 | /* Note that the real part always precedes the imag part in memory |
4305 | regardless of machine's endianness. */ |
4306 | switch (GET_CODE (XEXP (x, 0))) |
4307 | { |
4308 | case PRE_DEC: |
4309 | case POST_DEC: |
4310 | imag_first = true; |
4311 | break; |
4312 | case PRE_INC: |
4313 | case POST_INC: |
4314 | imag_first = false; |
4315 | break; |
4316 | default: |
4317 | gcc_unreachable (); |
4318 | } |
4319 | |
4320 | emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), |
4321 | read_complex_part (cplx: y, imag_p: imag_first)); |
4322 | return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), |
4323 | read_complex_part (cplx: y, imag_p: !imag_first)); |
4324 | } |
4325 | |
4326 | /* A subroutine of emit_move_complex. Perform the move from Y to X |
4327 | via two moves of the parts. Returns the last instruction emitted. */ |
4328 | |
4329 | rtx_insn * |
4330 | emit_move_complex_parts (rtx x, rtx y) |
4331 | { |
4332 | /* Show the output dies here. This is necessary for SUBREGs |
4333 | of pseudos since we cannot track their lifetimes correctly; |
4334 | hard regs shouldn't appear here except as return values. */ |
4335 | if (!reload_completed && !reload_in_progress |
4336 | && REG_P (x) && !reg_overlap_mentioned_p (x, y)) |
4337 | emit_clobber (x); |
4338 | |
4339 | write_complex_part (cplx: x, val: read_complex_part (cplx: y, imag_p: false), imag_p: false, undefined_p: true); |
4340 | write_complex_part (cplx: x, val: read_complex_part (cplx: y, imag_p: true), imag_p: true, undefined_p: false); |
4341 | |
4342 | return get_last_insn (); |
4343 | } |
4344 | |
4345 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
4346 | MODE is known to be complex. Returns the last instruction emitted. */ |
4347 | |
4348 | static rtx_insn * |
4349 | emit_move_complex (machine_mode mode, rtx x, rtx y) |
4350 | { |
4351 | bool try_int; |
4352 | |
4353 | /* Need to take special care for pushes, to maintain proper ordering |
4354 | of the data, and possibly extra padding. */ |
4355 | if (push_operand (x, mode)) |
4356 | return emit_move_complex_push (mode, x, y); |
4357 | |
4358 | /* See if we can coerce the target into moving both values at once, except |
4359 | for floating point where we favor moving as parts if this is easy. */ |
4360 | if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT |
4361 | && optab_handler (op: mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing |
4362 | && !(REG_P (x) |
4363 | && HARD_REGISTER_P (x) |
4364 | && REG_NREGS (x) == 1) |
4365 | && !(REG_P (y) |
4366 | && HARD_REGISTER_P (y) |
4367 | && REG_NREGS (y) == 1)) |
4368 | try_int = false; |
4369 | /* Not possible if the values are inherently not adjacent. */ |
4370 | else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT) |
4371 | try_int = false; |
4372 | /* Is possible if both are registers (or subregs of registers). */ |
4373 | else if (register_operand (x, mode) && register_operand (y, mode)) |
4374 | try_int = true; |
4375 | /* If one of the operands is a memory, and alignment constraints |
4376 | are friendly enough, we may be able to do combined memory operations. |
4377 | We do not attempt this if Y is a constant because that combination is |
4378 | usually better with the by-parts thing below. */ |
4379 | else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y)) |
4380 | && (!STRICT_ALIGNMENT |
4381 | || get_mode_alignment (mode) == BIGGEST_ALIGNMENT)) |
4382 | try_int = true; |
4383 | else |
4384 | try_int = false; |
4385 | |
4386 | if (try_int) |
4387 | { |
4388 | rtx_insn *ret; |
4389 | |
4390 | /* For memory to memory moves, optimal behavior can be had with the |
4391 | existing block move logic. But use normal expansion if optimizing |
4392 | for size. */ |
4393 | if (MEM_P (x) && MEM_P (y)) |
4394 | { |
4395 | emit_block_move (x, y, size: gen_int_mode (GET_MODE_SIZE (mode), Pmode), |
4396 | method: (optimize_insn_for_speed_p() |
4397 | ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL)); |
4398 | return get_last_insn (); |
4399 | } |
4400 | |
4401 | ret = emit_move_via_integer (mode, x, y, force: true); |
4402 | if (ret) |
4403 | return ret; |
4404 | } |
4405 | |
4406 | return emit_move_complex_parts (x, y); |
4407 | } |
4408 | |
4409 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
4410 | MODE is known to be MODE_CC. Returns the last instruction emitted. */ |
4411 | |
4412 | static rtx_insn * |
4413 | emit_move_ccmode (machine_mode mode, rtx x, rtx y) |
4414 | { |
4415 | rtx_insn *ret; |
4416 | |
4417 | /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */ |
4418 | if (mode != CCmode) |
4419 | { |
4420 | enum insn_code code = optab_handler (op: mov_optab, CCmode); |
4421 | if (code != CODE_FOR_nothing) |
4422 | { |
4423 | x = emit_move_change_mode (CCmode, old_mode: mode, x, force: true); |
4424 | y = emit_move_change_mode (CCmode, old_mode: mode, x: y, force: true); |
4425 | return emit_insn (GEN_FCN (code) (x, y)); |
4426 | } |
4427 | } |
4428 | |
4429 | /* Otherwise, find the MODE_INT mode of the same width. */ |
4430 | ret = emit_move_via_integer (mode, x, y, force: false); |
4431 | gcc_assert (ret != NULL); |
4432 | return ret; |
4433 | } |
4434 | |
4435 | /* Return true if word I of OP lies entirely in the |
4436 | undefined bits of a paradoxical subreg. */ |
4437 | |
4438 | static bool |
4439 | undefined_operand_subword_p (const_rtx op, int i) |
4440 | { |
4441 | if (GET_CODE (op) != SUBREG) |
4442 | return false; |
4443 | machine_mode innermostmode = GET_MODE (SUBREG_REG (op)); |
4444 | poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op); |
4445 | return (known_ge (offset, GET_MODE_SIZE (innermostmode)) |
4446 | || known_le (offset, -UNITS_PER_WORD)); |
4447 | } |
4448 | |
4449 | /* A subroutine of emit_move_insn_1. Generate a move from Y into X. |
4450 | MODE is any multi-word or full-word mode that lacks a move_insn |
4451 | pattern. Note that you will get better code if you define such |
4452 | patterns, even if they must turn into multiple assembler instructions. */ |
4453 | |
4454 | static rtx_insn * |
4455 | emit_move_multi_word (machine_mode mode, rtx x, rtx y) |
4456 | { |
4457 | rtx_insn *last_insn = 0; |
4458 | rtx_insn *seq; |
4459 | rtx inner; |
4460 | bool need_clobber; |
4461 | int i, mode_size; |
4462 | |
4463 | /* This function can only handle cases where the number of words is |
4464 | known at compile time. */ |
4465 | mode_size = GET_MODE_SIZE (mode).to_constant (); |
4466 | gcc_assert (mode_size >= UNITS_PER_WORD); |
4467 | |
4468 | /* If X is a push on the stack, do the push now and replace |
4469 | X with a reference to the stack pointer. */ |
4470 | if (push_operand (x, mode)) |
4471 | x = emit_move_resolve_push (mode, x); |
4472 | |
4473 | /* If we are in reload, see if either operand is a MEM whose address |
4474 | is scheduled for replacement. */ |
4475 | if (reload_in_progress && MEM_P (x) |
4476 | && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0)) |
4477 | x = replace_equiv_address_nv (x, inner); |
4478 | if (reload_in_progress && MEM_P (y) |
4479 | && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0)) |
4480 | y = replace_equiv_address_nv (y, inner); |
4481 | |
4482 | start_sequence (); |
4483 | |
4484 | need_clobber = false; |
4485 | for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++) |
4486 | { |
4487 | /* Do not generate code for a move if it would go entirely |
4488 | to the non-existing bits of a paradoxical subreg. */ |
4489 | if (undefined_operand_subword_p (op: x, i)) |
4490 | continue; |
4491 | |
4492 | rtx xpart = operand_subword (x, i, 1, mode); |
4493 | rtx ypart; |
4494 | |
4495 | /* Do not generate code for a move if it would come entirely |
4496 | from the undefined bits of a paradoxical subreg. */ |
4497 | if (undefined_operand_subword_p (op: y, i)) |
4498 | continue; |
4499 | |
4500 | ypart = operand_subword (y, i, 1, mode); |
4501 | |
4502 | /* If we can't get a part of Y, put Y into memory if it is a |
4503 | constant. Otherwise, force it into a register. Then we must |
4504 | be able to get a part of Y. */ |
4505 | if (ypart == 0 && CONSTANT_P (y)) |
4506 | { |
4507 | y = use_anchored_address (force_const_mem (mode, y)); |
4508 | ypart = operand_subword (y, i, 1, mode); |
4509 | } |
4510 | else if (ypart == 0) |
4511 | ypart = operand_subword_force (y, i, mode); |
4512 | |
4513 | gcc_assert (xpart && ypart); |
4514 | |
4515 | need_clobber |= (GET_CODE (xpart) == SUBREG); |
4516 | |
4517 | last_insn = emit_move_insn (xpart, ypart); |
4518 | } |
4519 | |
4520 | seq = get_insns (); |
4521 | end_sequence (); |
4522 | |
4523 | /* Show the output dies here. This is necessary for SUBREGs |
4524 | of pseudos since we cannot track their lifetimes correctly; |
4525 | hard regs shouldn't appear here except as return values. |
4526 | We never want to emit such a clobber after reload. */ |
4527 | if (x != y |
4528 | && ! (reload_in_progress || reload_completed) |
4529 | && need_clobber != 0) |
4530 | emit_clobber (x); |
4531 | |
4532 | emit_insn (seq); |
4533 | |
4534 | return last_insn; |
4535 | } |
4536 | |
4537 | /* Low level part of emit_move_insn. |
4538 | Called just like emit_move_insn, but assumes X and Y |
4539 | are basically valid. */ |
4540 | |
4541 | rtx_insn * |
4542 | emit_move_insn_1 (rtx x, rtx y) |
4543 | { |
4544 | machine_mode mode = GET_MODE (x); |
4545 | enum insn_code code; |
4546 | |
4547 | gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE); |
4548 | |
4549 | code = optab_handler (op: mov_optab, mode); |
4550 | if (code != CODE_FOR_nothing) |
4551 | return emit_insn (GEN_FCN (code) (x, y)); |
4552 | |
4553 | /* Expand complex moves by moving real part and imag part. */ |
4554 | if (COMPLEX_MODE_P (mode)) |
4555 | return emit_move_complex (mode, x, y); |
4556 | |
4557 | if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT |
4558 | || ALL_FIXED_POINT_MODE_P (mode)) |
4559 | { |
4560 | rtx_insn *result = emit_move_via_integer (mode, x, y, force: true); |
4561 | |
4562 | /* If we can't find an integer mode, use multi words. */ |
4563 | if (result) |
4564 | return result; |
4565 | else |
4566 | return emit_move_multi_word (mode, x, y); |
4567 | } |
4568 | |
4569 | if (GET_MODE_CLASS (mode) == MODE_CC) |
4570 | return emit_move_ccmode (mode, x, y); |
4571 | |
4572 | /* Try using a move pattern for the corresponding integer mode. This is |
4573 | only safe when simplify_subreg can convert MODE constants into integer |
4574 | constants. At present, it can only do this reliably if the value |
4575 | fits within a HOST_WIDE_INT. */ |
4576 | if (!CONSTANT_P (y) |
4577 | || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT)) |
4578 | { |
4579 | rtx_insn *ret = emit_move_via_integer (mode, x, y, force: lra_in_progress); |
4580 | |
4581 | if (ret) |
4582 | { |
4583 | if (! lra_in_progress || recog (PATTERN (insn: ret), ret, 0) >= 0) |
4584 | return ret; |
4585 | } |
4586 | } |
4587 | |
4588 | return emit_move_multi_word (mode, x, y); |
4589 | } |
4590 | |
4591 | /* Generate code to copy Y into X. |
4592 | Both Y and X must have the same mode, except that |
4593 | Y can be a constant with VOIDmode. |
4594 | This mode cannot be BLKmode; use emit_block_move for that. |
4595 | |
4596 | Return the last instruction emitted. */ |
4597 | |
4598 | rtx_insn * |
4599 | emit_move_insn (rtx x, rtx y) |
4600 | { |
4601 | machine_mode mode = GET_MODE (x); |
4602 | rtx y_cst = NULL_RTX; |
4603 | rtx_insn *last_insn; |
4604 | rtx set; |
4605 | |
4606 | gcc_assert (mode != BLKmode |
4607 | && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode)); |
4608 | |
4609 | /* If we have a copy that looks like one of the following patterns: |
4610 | (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...))) |
4611 | (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR)) |
4612 | (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...))) |
4613 | (set (subreg:M1 (reg:M2 ...)) (constant C)) |
4614 | where mode M1 is equal in size to M2, try to detect whether the |
4615 | mode change involves an implicit round trip through memory. |
4616 | If so, see if we can avoid that by removing the subregs and |
4617 | doing the move in mode M2 instead. */ |
4618 | |
4619 | rtx x_inner = NULL_RTX; |
4620 | rtx y_inner = NULL_RTX; |
4621 | |
4622 | auto candidate_subreg_p = [&](rtx subreg) { |
4623 | return (REG_P (SUBREG_REG (subreg)) |
4624 | && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg))), |
4625 | GET_MODE_SIZE (GET_MODE (subreg))) |
4626 | && optab_handler (op: mov_optab, GET_MODE (SUBREG_REG (subreg))) |
4627 | != CODE_FOR_nothing); |
4628 | }; |
4629 | |
4630 | auto candidate_mem_p = [&](machine_mode innermode, rtx mem) { |
4631 | return (!targetm.can_change_mode_class (innermode, GET_MODE (mem), ALL_REGS) |
4632 | && !push_operand (mem, GET_MODE (mem)) |
4633 | /* Not a candiate if innermode requires too much alignment. */ |
4634 | && (MEM_ALIGN (mem) >= GET_MODE_ALIGNMENT (innermode) |
4635 | || targetm.slow_unaligned_access (GET_MODE (mem), |
4636 | MEM_ALIGN (mem)) |
4637 | || !targetm.slow_unaligned_access (innermode, |
4638 | MEM_ALIGN (mem)))); |
4639 | }; |
4640 | |
4641 | if (SUBREG_P (x) && candidate_subreg_p (x)) |
4642 | x_inner = SUBREG_REG (x); |
4643 | |
4644 | if (SUBREG_P (y) && candidate_subreg_p (y)) |
4645 | y_inner = SUBREG_REG (y); |
4646 | |
4647 | if (x_inner != NULL_RTX |
4648 | && y_inner != NULL_RTX |
4649 | && GET_MODE (x_inner) == GET_MODE (y_inner) |
4650 | && !targetm.can_change_mode_class (GET_MODE (x_inner), mode, ALL_REGS)) |
4651 | { |
4652 | x = x_inner; |
4653 | y = y_inner; |
4654 | mode = GET_MODE (x_inner); |
4655 | } |
4656 | else if (x_inner != NULL_RTX |
4657 | && MEM_P (y) |
4658 | && candidate_mem_p (GET_MODE (x_inner), y)) |
4659 | { |
4660 | x = x_inner; |
4661 | y = adjust_address (y, GET_MODE (x_inner), 0); |
4662 | mode = GET_MODE (x_inner); |
4663 | } |
4664 | else if (y_inner != NULL_RTX |
4665 | && MEM_P (x) |
4666 | && candidate_mem_p (GET_MODE (y_inner), x)) |
4667 | { |
4668 | x = adjust_address (x, GET_MODE (y_inner), 0); |
4669 | y = y_inner; |
4670 | mode = GET_MODE (y_inner); |
4671 | } |
4672 | else if (x_inner != NULL_RTX |
4673 | && CONSTANT_P (y) |
4674 | && !targetm.can_change_mode_class (GET_MODE (x_inner), |
4675 | mode, ALL_REGS) |
4676 | && (y_inner = simplify_subreg (GET_MODE (x_inner), op: y, innermode: mode, byte: 0))) |
4677 | { |
4678 | x = x_inner; |
4679 | y = y_inner; |
4680 | mode = GET_MODE (x_inner); |
4681 | } |
4682 | |
4683 | if (CONSTANT_P (y)) |
4684 | { |
4685 | if (optimize |
4686 | && SCALAR_FLOAT_MODE_P (GET_MODE (x)) |
4687 | && (last_insn = compress_float_constant (x, y))) |
4688 | return last_insn; |
4689 | |
4690 | y_cst = y; |
4691 | |
4692 | if (!targetm.legitimate_constant_p (mode, y)) |
4693 | { |
4694 | y = force_const_mem (mode, y); |
4695 | |
4696 | /* If the target's cannot_force_const_mem prevented the spill, |
4697 | assume that the target's move expanders will also take care |
4698 | of the non-legitimate constant. */ |
4699 | if (!y) |
4700 | y = y_cst; |
4701 | else |
4702 | y = use_anchored_address (y); |
4703 | } |
4704 | } |
4705 | |
4706 | /* If X or Y are memory references, verify that their addresses are valid |
4707 | for the machine. */ |
4708 | if (MEM_P (x) |
4709 | && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0), |
4710 | MEM_ADDR_SPACE (x)) |
4711 | && ! push_operand (x, GET_MODE (x)))) |
4712 | x = validize_mem (x); |
4713 | |
4714 | if (MEM_P (y) |
4715 | && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0), |
4716 | MEM_ADDR_SPACE (y))) |
4717 | y = validize_mem (y); |
4718 | |
4719 | gcc_assert (mode != BLKmode); |
4720 | |
4721 | last_insn = emit_move_insn_1 (x, y); |
4722 | |
4723 | if (y_cst && REG_P (x) |
4724 | && (set = single_set (insn: last_insn)) != NULL_RTX |
4725 | && SET_DEST (set) == x |
4726 | && ! rtx_equal_p (y_cst, SET_SRC (set))) |
4727 | set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst)); |
4728 | |
4729 | return last_insn; |
4730 | } |
4731 | |
4732 | /* Generate the body of an instruction to copy Y into X. |
4733 | It may be a list of insns, if one insn isn't enough. */ |
4734 | |
4735 | rtx_insn * |
4736 | gen_move_insn (rtx x, rtx y) |
4737 | { |
4738 | rtx_insn *seq; |
4739 | |
4740 | start_sequence (); |
4741 | emit_move_insn_1 (x, y); |
4742 | seq = get_insns (); |
4743 | end_sequence (); |
4744 | return seq; |
4745 | } |
4746 | |
4747 | /* If Y is representable exactly in a narrower mode, and the target can |
4748 | perform the extension directly from constant or memory, then emit the |
4749 | move as an extension. */ |
4750 | |
4751 | static rtx_insn * |
4752 | compress_float_constant (rtx x, rtx y) |
4753 | { |
4754 | machine_mode dstmode = GET_MODE (x); |
4755 | machine_mode orig_srcmode = GET_MODE (y); |
4756 | machine_mode srcmode; |
4757 | const REAL_VALUE_TYPE *r; |
4758 | int oldcost, newcost; |
4759 | bool speed = optimize_insn_for_speed_p (); |
4760 | |
4761 | r = CONST_DOUBLE_REAL_VALUE (y); |
4762 | |
4763 | if (targetm.legitimate_constant_p (dstmode, y)) |
4764 | oldcost = set_src_cost (x: y, mode: orig_srcmode, speed_p: speed); |
4765 | else |
4766 | oldcost = set_src_cost (x: force_const_mem (dstmode, y), mode: dstmode, speed_p: speed); |
4767 | |
4768 | FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode) |
4769 | { |
4770 | enum insn_code ic; |
4771 | rtx trunc_y; |
4772 | rtx_insn *last_insn; |
4773 | |
4774 | /* Skip if the target can't extend this way. */ |
4775 | ic = can_extend_p (dstmode, srcmode, 0); |
4776 | if (ic == CODE_FOR_nothing) |
4777 | continue; |
4778 | |
4779 | /* Skip if the narrowed value isn't exact. */ |
4780 | if (! exact_real_truncate (srcmode, r)) |
4781 | continue; |
4782 | |
4783 | trunc_y = const_double_from_real_value (*r, srcmode); |
4784 | |
4785 | if (targetm.legitimate_constant_p (srcmode, trunc_y)) |
4786 | { |
4787 | /* Skip if the target needs extra instructions to perform |
4788 | the extension. */ |
4789 | if (!insn_operand_matches (icode: ic, opno: 1, operand: trunc_y)) |
4790 | continue; |
4791 | /* This is valid, but may not be cheaper than the original. */ |
4792 | newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), |
4793 | mode: dstmode, speed_p: speed); |
4794 | if (oldcost < newcost) |
4795 | continue; |
4796 | } |
4797 | else if (float_extend_from_mem[dstmode][srcmode]) |
4798 | { |
4799 | trunc_y = force_const_mem (srcmode, trunc_y); |
4800 | /* This is valid, but may not be cheaper than the original. */ |
4801 | newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), |
4802 | mode: dstmode, speed_p: speed); |
4803 | if (oldcost < newcost) |
4804 | continue; |
4805 | trunc_y = validize_mem (trunc_y); |
4806 | } |
4807 | else |
4808 | continue; |
4809 | |
4810 | /* For CSE's benefit, force the compressed constant pool entry |
4811 | into a new pseudo. This constant may be used in different modes, |
4812 | and if not, combine will put things back together for us. */ |
4813 | trunc_y = force_reg (srcmode, trunc_y); |
4814 | |
4815 | /* If x is a hard register, perform the extension into a pseudo, |
4816 | so that e.g. stack realignment code is aware of it. */ |
4817 | rtx target = x; |
4818 | if (REG_P (x) && HARD_REGISTER_P (x)) |
4819 | target = gen_reg_rtx (dstmode); |
4820 | |
4821 | emit_unop_insn (ic, target, trunc_y, UNKNOWN); |
4822 | last_insn = get_last_insn (); |
4823 | |
4824 | if (REG_P (target)) |
4825 | set_unique_reg_note (last_insn, REG_EQUAL, y); |
4826 | |
4827 | if (target != x) |
4828 | return emit_move_insn (x, y: target); |
4829 | return last_insn; |
4830 | } |
4831 | |
4832 | return NULL; |
4833 | } |
4834 | |
4835 | /* Pushing data onto the stack. */ |
4836 | |
4837 | /* Push a block of length SIZE (perhaps variable) |
4838 | and return an rtx to address the beginning of the block. |
4839 | The value may be virtual_outgoing_args_rtx. |
4840 | |
4841 | EXTRA is the number of bytes of padding to push in addition to SIZE. |
4842 | BELOW nonzero means this padding comes at low addresses; |
4843 | otherwise, the padding comes at high addresses. */ |
4844 | |
4845 | rtx |
4846 | push_block (rtx size, poly_int64 , int below) |
4847 | { |
4848 | rtx temp; |
4849 | |
4850 | size = convert_modes (Pmode, oldmode: ptr_mode, x: size, unsignedp: 1); |
4851 | if (CONSTANT_P (size)) |
4852 | anti_adjust_stack (plus_constant (Pmode, size, extra)); |
4853 | else if (REG_P (size) && known_eq (extra, 0)) |
4854 | anti_adjust_stack (size); |
4855 | else |
4856 | { |
4857 | temp = copy_to_mode_reg (Pmode, size); |
4858 | if (maybe_ne (a: extra, b: 0)) |
4859 | temp = expand_binop (Pmode, add_optab, temp, |
4860 | gen_int_mode (extra, Pmode), |
4861 | temp, 0, OPTAB_LIB_WIDEN); |
4862 | anti_adjust_stack (temp); |
4863 | } |
4864 | |
4865 | if (STACK_GROWS_DOWNWARD) |
4866 | { |
4867 | temp = virtual_outgoing_args_rtx; |
4868 | if (maybe_ne (a: extra, b: 0) && below) |
4869 | temp = plus_constant (Pmode, temp, extra); |
4870 | } |
4871 | else |
4872 | { |
4873 | poly_int64 csize; |
4874 | if (poly_int_rtx_p (x: size, res: &csize)) |
4875 | temp = plus_constant (Pmode, virtual_outgoing_args_rtx, |
4876 | -csize - (below ? 0 : extra)); |
4877 | else if (maybe_ne (a: extra, b: 0) && !below) |
4878 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, |
4879 | negate_rtx (Pmode, plus_constant (Pmode, size, |
4880 | extra))); |
4881 | else |
4882 | temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, |
4883 | negate_rtx (Pmode, size)); |
4884 | } |
4885 | |
4886 | return memory_address (NARROWEST_INT_MODE, temp); |
4887 | } |
4888 | |
4889 | /* A utility routine that returns the base of an auto-inc memory, or NULL. */ |
4890 | |
4891 | static rtx |
4892 | mem_autoinc_base (rtx mem) |
4893 | { |
4894 | if (MEM_P (mem)) |
4895 | { |
4896 | rtx addr = XEXP (mem, 0); |
4897 | if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC) |
4898 | return XEXP (addr, 0); |
4899 | } |
4900 | return NULL; |
4901 | } |
4902 | |
4903 | /* A utility routine used here, in reload, and in try_split. The insns |
4904 | after PREV up to and including LAST are known to adjust the stack, |
4905 | with a final value of END_ARGS_SIZE. Iterate backward from LAST |
4906 | placing notes as appropriate. PREV may be NULL, indicating the |
4907 | entire insn sequence prior to LAST should be scanned. |
4908 | |
4909 | The set of allowed stack pointer modifications is small: |
4910 | (1) One or more auto-inc style memory references (aka pushes), |
4911 | (2) One or more addition/subtraction with the SP as destination, |
4912 | (3) A single move insn with the SP as destination, |
4913 | (4) A call_pop insn, |
4914 | (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS. |
4915 | |
4916 | Insns in the sequence that do not modify the SP are ignored, |
4917 | except for noreturn calls. |
4918 | |
4919 | The return value is the amount of adjustment that can be trivially |
4920 | verified, via immediate operand or auto-inc. If the adjustment |
4921 | cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */ |
4922 | |
4923 | poly_int64 |
4924 | find_args_size_adjust (rtx_insn *insn) |
4925 | { |
4926 | rtx dest, set, pat; |
4927 | int i; |
4928 | |
4929 | pat = PATTERN (insn); |
4930 | set = NULL; |
4931 | |
4932 | /* Look for a call_pop pattern. */ |
4933 | if (CALL_P (insn)) |
4934 | { |
4935 | /* We have to allow non-call_pop patterns for the case |
4936 | of emit_single_push_insn of a TLS address. */ |
4937 | if (GET_CODE (pat) != PARALLEL) |
4938 | return 0; |
4939 | |
4940 | /* All call_pop have a stack pointer adjust in the parallel. |
4941 | The call itself is always first, and the stack adjust is |
4942 | usually last, so search from the end. */ |
4943 | for (i = XVECLEN (pat, 0) - 1; i > 0; --i) |
4944 | { |
4945 | set = XVECEXP (pat, 0, i); |
4946 | if (GET_CODE (set) != SET) |
4947 | continue; |
4948 | dest = SET_DEST (set); |
4949 | if (dest == stack_pointer_rtx) |
4950 | break; |
4951 | } |
4952 | /* We'd better have found the stack pointer adjust. */ |
4953 | if (i == 0) |
4954 | return 0; |
4955 | /* Fall through to process the extracted SET and DEST |
4956 | as if it was a standalone insn. */ |
4957 | } |
4958 | else if (GET_CODE (pat) == SET) |
4959 | set = pat; |
4960 | else if ((set = single_set (insn)) != NULL) |
4961 | ; |
4962 | else if (GET_CODE (pat) == PARALLEL) |
4963 | { |
4964 | /* ??? Some older ports use a parallel with a stack adjust |
4965 | and a store for a PUSH_ROUNDING pattern, rather than a |
4966 | PRE/POST_MODIFY rtx. Don't force them to update yet... */ |
4967 | /* ??? See h8300 and m68k, pushqi1. */ |
4968 | for (i = XVECLEN (pat, 0) - 1; i >= 0; --i) |
4969 | { |
4970 | set = XVECEXP (pat, 0, i); |
4971 | if (GET_CODE (set) != SET) |
4972 | continue; |
4973 | dest = SET_DEST (set); |
4974 | if (dest == stack_pointer_rtx) |
4975 | break; |
4976 | |
4977 | /* We do not expect an auto-inc of the sp in the parallel. */ |
4978 | gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx); |
4979 | gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) |
4980 | != stack_pointer_rtx); |
4981 | } |
4982 | if (i < 0) |
4983 | return 0; |
4984 | } |
4985 | else |
4986 | return 0; |
4987 | |
4988 | dest = SET_DEST (set); |
4989 | |
4990 | /* Look for direct modifications of the stack pointer. */ |
4991 | if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM) |
4992 | { |
4993 | /* Look for a trivial adjustment, otherwise assume nothing. */ |
4994 | /* Note that the SPU restore_stack_block pattern refers to |
4995 | the stack pointer in V4SImode. Consider that non-trivial. */ |
4996 | poly_int64 offset; |
4997 | if (SCALAR_INT_MODE_P (GET_MODE (dest)) |
4998 | && strip_offset (SET_SRC (set), &offset) == stack_pointer_rtx) |
4999 | return offset; |
5000 | /* ??? Reload can generate no-op moves, which will be cleaned |
5001 | up later. Recognize it and continue searching. */ |
5002 | else if (rtx_equal_p (dest, SET_SRC (set))) |
5003 | return 0; |
5004 | else |
5005 | return HOST_WIDE_INT_MIN; |
5006 | } |
5007 | else |
5008 | { |
5009 | rtx mem, addr; |
5010 | |
5011 | /* Otherwise only think about autoinc patterns. */ |
5012 | if (mem_autoinc_base (mem: dest) == stack_pointer_rtx) |
5013 | { |
5014 | mem = dest; |
5015 | gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) |
5016 | != stack_pointer_rtx); |
5017 | } |
5018 | else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx) |
5019 | mem = SET_SRC (set); |
5020 | else |
5021 | return 0; |
5022 | |
5023 | addr = XEXP (mem, 0); |
5024 | switch (GET_CODE (addr)) |
5025 | { |
5026 | case PRE_INC: |
5027 | case POST_INC: |
5028 | return GET_MODE_SIZE (GET_MODE (mem)); |
5029 | case PRE_DEC: |
5030 | case POST_DEC: |
5031 | return -GET_MODE_SIZE (GET_MODE (mem)); |
5032 | case PRE_MODIFY: |
5033 | case POST_MODIFY: |
5034 | addr = XEXP (addr, 1); |
5035 | gcc_assert (GET_CODE (addr) == PLUS); |
5036 | gcc_assert (XEXP (addr, 0) == stack_pointer_rtx); |
5037 | return rtx_to_poly_int64 (XEXP (addr, 1)); |
5038 | default: |
5039 | gcc_unreachable (); |
5040 | } |
5041 | } |
5042 | } |
5043 | |
5044 | poly_int64 |
5045 | fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, |
5046 | poly_int64 end_args_size) |
5047 | { |
5048 | poly_int64 args_size = end_args_size; |
5049 | bool saw_unknown = false; |
5050 | rtx_insn *insn; |
5051 | |
5052 | for (insn = last; insn != prev; insn = PREV_INSN (insn)) |
5053 | { |
5054 | if (!NONDEBUG_INSN_P (insn)) |
5055 | continue; |
5056 | |
5057 | /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing |
5058 | a call argument containing a TLS address that itself requires |
5059 | a call to __tls_get_addr. The handling of stack_pointer_delta |
5060 | in emit_single_push_insn is supposed to ensure that any such |
5061 | notes are already correct. */ |
5062 | rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX); |
5063 | gcc_assert (!note || known_eq (args_size, get_args_size (note))); |
5064 | |
5065 | poly_int64 this_delta = find_args_size_adjust (insn); |
5066 | if (known_eq (this_delta, 0)) |
5067 | { |
5068 | if (!CALL_P (insn) |
5069 | || ACCUMULATE_OUTGOING_ARGS |
5070 | || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX) |
5071 | continue; |
5072 | } |
5073 | |
5074 | gcc_assert (!saw_unknown); |
5075 | if (known_eq (this_delta, HOST_WIDE_INT_MIN)) |
5076 | saw_unknown = true; |
5077 | |
5078 | if (!note) |
5079 | add_args_size_note (insn, args_size); |
5080 | if (STACK_GROWS_DOWNWARD) |
5081 | this_delta = -poly_uint64 (this_delta); |
5082 | |
5083 | if (saw_unknown) |
5084 | args_size = HOST_WIDE_INT_MIN; |
5085 | else |
5086 | args_size -= this_delta; |
5087 | } |
5088 | |
5089 | return args_size; |
5090 | } |
5091 | |
5092 | #ifdef PUSH_ROUNDING |
5093 | /* Emit single push insn. */ |
5094 | |
5095 | static void |
5096 | emit_single_push_insn_1 (machine_mode mode, rtx x, tree type) |
5097 | { |
5098 | rtx dest_addr; |
5099 | poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
5100 | rtx dest; |
5101 | enum insn_code icode; |
5102 | |
5103 | /* If there is push pattern, use it. Otherwise try old way of throwing |
5104 | MEM representing push operation to move expander. */ |
5105 | icode = optab_handler (op: push_optab, mode); |
5106 | if (icode != CODE_FOR_nothing) |
5107 | { |
5108 | class expand_operand ops[1]; |
5109 | |
5110 | create_input_operand (op: &ops[0], value: x, mode); |
5111 | if (maybe_expand_insn (icode, nops: 1, ops)) |
5112 | return; |
5113 | } |
5114 | if (known_eq (GET_MODE_SIZE (mode), rounded_size)) |
5115 | dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx); |
5116 | /* If we are to pad downward, adjust the stack pointer first and |
5117 | then store X into the stack location using an offset. This is |
5118 | because emit_move_insn does not know how to pad; it does not have |
5119 | access to type. */ |
5120 | else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD) |
5121 | { |
5122 | emit_move_insn (stack_pointer_rtx, |
5123 | y: expand_binop (Pmode, |
5124 | STACK_GROWS_DOWNWARD ? sub_optab |
5125 | : add_optab, |
5126 | stack_pointer_rtx, |
5127 | gen_int_mode (rounded_size, Pmode), |
5128 | NULL_RTX, 0, OPTAB_LIB_WIDEN)); |
5129 | |
5130 | poly_int64 offset = rounded_size - GET_MODE_SIZE (mode); |
5131 | if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC) |
5132 | /* We have already decremented the stack pointer, so get the |
5133 | previous value. */ |
5134 | offset += rounded_size; |
5135 | |
5136 | if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC) |
5137 | /* We have already incremented the stack pointer, so get the |
5138 | previous value. */ |
5139 | offset -= rounded_size; |
5140 | |
5141 | dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset); |
5142 | } |
5143 | else |
5144 | { |
5145 | if (STACK_GROWS_DOWNWARD) |
5146 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */ |
5147 | dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size); |
5148 | else |
5149 | /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */ |
5150 | dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size); |
5151 | |
5152 | dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr); |
5153 | } |
5154 | |
5155 | dest = gen_rtx_MEM (mode, dest_addr); |
5156 | |
5157 | if (type != 0) |
5158 | { |
5159 | set_mem_attributes (dest, type, 1); |
5160 | |
5161 | if (cfun->tail_call_marked) |
5162 | /* Function incoming arguments may overlap with sibling call |
5163 | outgoing arguments and we cannot allow reordering of reads |
5164 | from function arguments with stores to outgoing arguments |
5165 | of sibling calls. */ |
5166 | set_mem_alias_set (dest, 0); |
5167 | } |
5168 | emit_move_insn (x: dest, y: x); |
5169 | } |
5170 | |
5171 | /* Emit and annotate a single push insn. */ |
5172 | |
5173 | static void |
5174 | emit_single_push_insn (machine_mode mode, rtx x, tree type) |
5175 | { |
5176 | poly_int64 delta, old_delta = stack_pointer_delta; |
5177 | rtx_insn *prev = get_last_insn (); |
5178 | rtx_insn *last; |
5179 | |
5180 | emit_single_push_insn_1 (mode, x, type); |
5181 | |
5182 | /* Adjust stack_pointer_delta to describe the situation after the push |
5183 | we just performed. Note that we must do this after the push rather |
5184 | than before the push in case calculating X needs pushes and pops of |
5185 | its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes |
5186 | for such pushes and pops must not include the effect of the future |
5187 | push of X. */ |
5188 | stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode)); |
5189 | |
5190 | last = get_last_insn (); |
5191 | |
5192 | /* Notice the common case where we emitted exactly one insn. */ |
5193 | if (PREV_INSN (insn: last) == prev) |
5194 | { |
5195 | add_args_size_note (last, stack_pointer_delta); |
5196 | return; |
5197 | } |
5198 | |
5199 | delta = fixup_args_size_notes (prev, last, stack_pointer_delta); |
5200 | gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN) |
5201 | || known_eq (delta, old_delta)); |
5202 | } |
5203 | #endif |
5204 | |
5205 | /* If reading SIZE bytes from X will end up reading from |
5206 | Y return the number of bytes that overlap. Return -1 |
5207 | if there is no overlap or -2 if we can't determine |
5208 | (for example when X and Y have different base registers). */ |
5209 | |
5210 | static int |
5211 | memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size) |
5212 | { |
5213 | rtx tmp = plus_constant (Pmode, x, size); |
5214 | rtx sub = simplify_gen_binary (code: MINUS, Pmode, op0: tmp, op1: y); |
5215 | |
5216 | if (!CONST_INT_P (sub)) |
5217 | return -2; |
5218 | |
5219 | HOST_WIDE_INT val = INTVAL (sub); |
5220 | |
5221 | return IN_RANGE (val, 1, size) ? val : -1; |
5222 | } |
5223 | |
5224 | /* Generate code to push X onto the stack, assuming it has mode MODE and |
5225 | type TYPE. |
5226 | MODE is redundant except when X is a CONST_INT (since they don't |
5227 | carry mode info). |
5228 | SIZE is an rtx for the size of data to be copied (in bytes), |
5229 | needed only if X is BLKmode. |
5230 | Return true if successful. May return false if asked to push a |
5231 | partial argument during a sibcall optimization (as specified by |
5232 | SIBCALL_P) and the incoming and outgoing pointers cannot be shown |
5233 | to not overlap. |
5234 | |
5235 | ALIGN (in bits) is maximum alignment we can assume. |
5236 | |
5237 | If PARTIAL and REG are both nonzero, then copy that many of the first |
5238 | bytes of X into registers starting with REG, and push the rest of X. |
5239 | The amount of space pushed is decreased by PARTIAL bytes. |
5240 | REG must be a hard register in this case. |
5241 | If REG is zero but PARTIAL is not, take any all others actions for an |
5242 | argument partially in registers, but do not actually load any |
5243 | registers. |
5244 | |
5245 | EXTRA is the amount in bytes of extra space to leave next to this arg. |
5246 | This is ignored if an argument block has already been allocated. |
5247 | |
5248 | On a machine that lacks real push insns, ARGS_ADDR is the address of |
5249 | the bottom of the argument block for this call. We use indexing off there |
5250 | to store the arg. On machines with push insns, ARGS_ADDR is 0 when a |
5251 | argument block has not been preallocated. |
5252 | |
5253 | ARGS_SO_FAR is the size of args previously pushed for this call. |
5254 | |
5255 | REG_PARM_STACK_SPACE is nonzero if functions require stack space |
5256 | for arguments passed in registers. If nonzero, it will be the number |
5257 | of bytes required. */ |
5258 | |
5259 | bool |
5260 | emit_push_insn (rtx x, machine_mode mode, tree type, rtx size, |
5261 | unsigned int align, int partial, rtx reg, poly_int64 , |
5262 | rtx args_addr, rtx args_so_far, int reg_parm_stack_space, |
5263 | rtx alignment_pad, bool sibcall_p) |
5264 | { |
5265 | rtx xinner; |
5266 | pad_direction stack_direction |
5267 | = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD; |
5268 | |
5269 | /* Decide where to pad the argument: PAD_DOWNWARD for below, |
5270 | PAD_UPWARD for above, or PAD_NONE for don't pad it. |
5271 | Default is below for small data on big-endian machines; else above. */ |
5272 | pad_direction where_pad = targetm.calls.function_arg_padding (mode, type); |
5273 | |
5274 | /* Invert direction if stack is post-decrement. |
5275 | FIXME: why? */ |
5276 | if (STACK_PUSH_CODE == POST_DEC) |
5277 | if (where_pad != PAD_NONE) |
5278 | where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD); |
5279 | |
5280 | xinner = x; |
5281 | |
5282 | int nregs = partial / UNITS_PER_WORD; |
5283 | rtx *tmp_regs = NULL; |
5284 | int overlapping = 0; |
5285 | |
5286 | if (mode == BLKmode |
5287 | || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode))) |
5288 | { |
5289 | /* Copy a block into the stack, entirely or partially. */ |
5290 | |
5291 | rtx temp; |
5292 | int used; |
5293 | int offset; |
5294 | int skip; |
5295 | |
5296 | offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
5297 | used = partial - offset; |
5298 | |
5299 | if (mode != BLKmode) |
5300 | { |
5301 | /* A value is to be stored in an insufficiently aligned |
5302 | stack slot; copy via a suitably aligned slot if |
5303 | necessary. */ |
5304 | size = gen_int_mode (GET_MODE_SIZE (mode), Pmode); |
5305 | if (!MEM_P (xinner)) |
5306 | { |
5307 | temp = assign_temp (type, 1, 1); |
5308 | emit_move_insn (x: temp, y: xinner); |
5309 | xinner = temp; |
5310 | } |
5311 | } |
5312 | |
5313 | gcc_assert (size); |
5314 | |
5315 | /* USED is now the # of bytes we need not copy to the stack |
5316 | because registers will take care of them. */ |
5317 | |
5318 | if (partial != 0) |
5319 | xinner = adjust_address (xinner, BLKmode, used); |
5320 | |
5321 | /* If the partial register-part of the arg counts in its stack size, |
5322 | skip the part of stack space corresponding to the registers. |
5323 | Otherwise, start copying to the beginning of the stack space, |
5324 | by setting SKIP to 0. */ |
5325 | skip = (reg_parm_stack_space == 0) ? 0 : used; |
5326 | |
5327 | #ifdef PUSH_ROUNDING |
5328 | /* NB: Let the backend known the number of bytes to push and |
5329 | decide if push insns should be generated. */ |
5330 | unsigned int push_size; |
5331 | if (CONST_INT_P (size)) |
5332 | push_size = INTVAL (size); |
5333 | else |
5334 | push_size = 0; |
5335 | |
5336 | /* Do it with several push insns if that doesn't take lots of insns |
5337 | and if there is no difficulty with push insns that skip bytes |
5338 | on the stack for alignment purposes. */ |
5339 | if (args_addr == 0 |
5340 | && targetm.calls.push_argument (push_size) |
5341 | && CONST_INT_P (size) |
5342 | && skip == 0 |
5343 | && MEM_ALIGN (xinner) >= align |
5344 | && can_move_by_pieces (len: (unsigned) INTVAL (size) - used, align) |
5345 | /* Here we avoid the case of a structure whose weak alignment |
5346 | forces many pushes of a small amount of data, |
5347 | and such small pushes do rounding that causes trouble. */ |
5348 | && ((!targetm.slow_unaligned_access (word_mode, align)) |
5349 | || align >= BIGGEST_ALIGNMENT |
5350 | || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT), |
5351 | align / BITS_PER_UNIT)) |
5352 | && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size))) |
5353 | { |
5354 | /* Push padding now if padding above and stack grows down, |
5355 | or if padding below and stack grows up. |
5356 | But if space already allocated, this has already been done. */ |
5357 | if (maybe_ne (a: extra, b: 0) |
5358 | && args_addr == 0 |
5359 | && where_pad != PAD_NONE |
5360 | && where_pad != stack_direction) |
5361 | anti_adjust_stack (gen_int_mode (extra, Pmode)); |
5362 | |
5363 | move_by_pieces (NULL, from: xinner, INTVAL (size) - used, align, |
5364 | retmode: RETURN_BEGIN); |
5365 | } |
5366 | else |
5367 | #endif /* PUSH_ROUNDING */ |
5368 | { |
5369 | rtx target; |
5370 | |
5371 | /* Otherwise make space on the stack and copy the data |
5372 | to the address of that space. */ |
5373 | |
5374 | /* Deduct words put into registers from the size we must copy. */ |
5375 | if (partial != 0) |
5376 | { |
5377 | if (CONST_INT_P (size)) |
5378 | size = GEN_INT (INTVAL (size) - used); |
5379 | else |
5380 | size = expand_binop (GET_MODE (size), sub_optab, size, |
5381 | gen_int_mode (used, GET_MODE (size)), |
5382 | NULL_RTX, 0, OPTAB_LIB_WIDEN); |
5383 | } |
5384 | |
5385 | /* Get the address of the stack space. |
5386 | In this case, we do not deal with EXTRA separately. |
5387 | A single stack adjust will do. */ |
5388 | poly_int64 const_args_so_far; |
5389 | if (! args_addr) |
5390 | { |
5391 | temp = push_block (size, extra, below: where_pad == PAD_DOWNWARD); |
5392 | extra = 0; |
5393 | } |
5394 | else if (poly_int_rtx_p (x: args_so_far, res: &const_args_so_far)) |
5395 | temp = memory_address (BLKmode, |
5396 | plus_constant (Pmode, args_addr, |
5397 | skip + const_args_so_far)); |
5398 | else |
5399 | temp = memory_address (BLKmode, |
5400 | plus_constant (Pmode, |
5401 | gen_rtx_PLUS (Pmode, |
5402 | args_addr, |
5403 | args_so_far), |
5404 | skip)); |
5405 | |
5406 | if (!ACCUMULATE_OUTGOING_ARGS) |
5407 | { |
5408 | /* If the source is referenced relative to the stack pointer, |
5409 | copy it to another register to stabilize it. We do not need |
5410 | to do this if we know that we won't be changing sp. */ |
5411 | |
5412 | if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp) |
5413 | || reg_mentioned_p (virtual_outgoing_args_rtx, temp)) |
5414 | temp = copy_to_reg (temp); |
5415 | } |
5416 | |
5417 | target = gen_rtx_MEM (BLKmode, temp); |
5418 | |
5419 | /* We do *not* set_mem_attributes here, because incoming arguments |
5420 | may overlap with sibling call outgoing arguments and we cannot |
5421 | allow reordering of reads from function arguments with stores |
5422 | to outgoing arguments of sibling calls. We do, however, want |
5423 | to record the alignment of the stack slot. */ |
5424 | /* ALIGN may well be better aligned than TYPE, e.g. due to |
5425 | PARM_BOUNDARY. Assume the caller isn't lying. */ |
5426 | set_mem_align (target, align); |
5427 | |
5428 | /* If part should go in registers and pushing to that part would |
5429 | overwrite some of the values that need to go into regs, load the |
5430 | overlapping values into temporary pseudos to be moved into the hard |
5431 | regs at the end after the stack pushing has completed. |
5432 | We cannot load them directly into the hard regs here because |
5433 | they can be clobbered by the block move expansions. |
5434 | See PR 65358. */ |
5435 | |
5436 | if (partial > 0 && reg != 0 && mode == BLKmode |
5437 | && GET_CODE (reg) != PARALLEL) |
5438 | { |
5439 | overlapping = memory_load_overlap (XEXP (x, 0), y: temp, size: partial); |
5440 | if (overlapping > 0) |
5441 | { |
5442 | gcc_assert (overlapping % UNITS_PER_WORD == 0); |
5443 | overlapping /= UNITS_PER_WORD; |
5444 | |
5445 | tmp_regs = XALLOCAVEC (rtx, overlapping); |
5446 | |
5447 | for (int i = 0; i < overlapping; i++) |
5448 | tmp_regs[i] = gen_reg_rtx (word_mode); |
5449 | |
5450 | for (int i = 0; i < overlapping; i++) |
5451 | emit_move_insn (x: tmp_regs[i], |
5452 | y: operand_subword_force (target, i, mode)); |
5453 | } |
5454 | else if (overlapping == -1) |
5455 | overlapping = 0; |
5456 | /* Could not determine whether there is overlap. |
5457 | Fail the sibcall. */ |
5458 | else |
5459 | { |
5460 | overlapping = 0; |
5461 | if (sibcall_p) |
5462 | return false; |
5463 | } |
5464 | } |
5465 | |
5466 | /* If source is a constant VAR_DECL with a simple constructor, |
5467 | store the constructor to the stack instead of moving it. */ |
5468 | const_tree decl; |
5469 | HOST_WIDE_INT sz; |
5470 | if (partial == 0 |
5471 | && MEM_P (xinner) |
5472 | && SYMBOL_REF_P (XEXP (xinner, 0)) |
5473 | && (decl = SYMBOL_REF_DECL (XEXP (xinner, 0))) != NULL_TREE |
5474 | && VAR_P (decl) |
5475 | && TREE_READONLY (decl) |
5476 | && !TREE_SIDE_EFFECTS (decl) |
5477 | && immediate_const_ctor_p (DECL_INITIAL (decl), words: 2) |
5478 | && (sz = int_expr_size (DECL_INITIAL (decl))) > 0 |
5479 | && CONST_INT_P (size) |
5480 | && INTVAL (size) == sz) |
5481 | store_constructor (DECL_INITIAL (decl), target, 0, sz, false); |
5482 | else |
5483 | emit_block_move (x: target, y: xinner, size, method: BLOCK_OP_CALL_PARM); |
5484 | } |
5485 | } |
5486 | else if (partial > 0) |
5487 | { |
5488 | /* Scalar partly in registers. This case is only supported |
5489 | for fixed-wdth modes. */ |
5490 | int num_words = GET_MODE_SIZE (mode).to_constant (); |
5491 | num_words /= UNITS_PER_WORD; |
5492 | int i; |
5493 | int not_stack; |
5494 | /* # bytes of start of argument |
5495 | that we must make space for but need not store. */ |
5496 | int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); |
5497 | int args_offset = INTVAL (args_so_far); |
5498 | int skip; |
5499 | |
5500 | /* Push padding now if padding above and stack grows down, |
5501 | or if padding below and stack grows up. |
5502 | But if space already allocated, this has already been done. */ |
5503 | if (maybe_ne (a: extra, b: 0) |
5504 | && args_addr == 0 |
5505 | && where_pad != PAD_NONE |
5506 | && where_pad != stack_direction) |
5507 | anti_adjust_stack (gen_int_mode (extra, Pmode)); |
5508 | |
5509 | /* If we make space by pushing it, we might as well push |
5510 | the real data. Otherwise, we can leave OFFSET nonzero |
5511 | and leave the space uninitialized. */ |
5512 | if (args_addr == 0) |
5513 | offset = 0; |
5514 | |
5515 | /* Now NOT_STACK gets the number of words that we don't need to |
5516 | allocate on the stack. Convert OFFSET to words too. */ |
5517 | not_stack = (partial - offset) / UNITS_PER_WORD; |
5518 | offset /= UNITS_PER_WORD; |
5519 | |
5520 | /* If the partial register-part of the arg counts in its stack size, |
5521 | skip the part of stack space corresponding to the registers. |
5522 | Otherwise, start copying to the beginning of the stack space, |
5523 | by setting SKIP to 0. */ |
5524 | skip = (reg_parm_stack_space == 0) ? 0 : not_stack; |
5525 | |
5526 | if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) |
5527 | x = validize_mem (force_const_mem (mode, x)); |
5528 | |
5529 | /* If X is a hard register in a non-integer mode, copy it into a pseudo; |
5530 | SUBREGs of such registers are not allowed. */ |
5531 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER |
5532 | && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT)) |
5533 | x = copy_to_reg (x); |
5534 | |
5535 | /* Loop over all the words allocated on the stack for this arg. */ |
5536 | /* We can do it by words, because any scalar bigger than a word |
5537 | has a size a multiple of a word. */ |
5538 | tree word_mode_type = lang_hooks.types.type_for_mode (word_mode, 1); |
5539 | for (i = num_words - 1; i >= not_stack; i--) |
5540 | if (i >= not_stack + offset) |
5541 | if (!emit_push_insn (x: operand_subword_force (x, i, mode), |
5542 | mode: word_mode, type: word_mode_type, NULL_RTX, align, partial: 0, |
5543 | NULL_RTX, extra: 0, args_addr, |
5544 | GEN_INT (args_offset + ((i - not_stack + skip) |
5545 | * UNITS_PER_WORD)), |
5546 | reg_parm_stack_space, alignment_pad, sibcall_p)) |
5547 | return false; |
5548 | } |
5549 | else |
5550 | { |
5551 | rtx addr; |
5552 | rtx dest; |
5553 | |
5554 | /* Push padding now if padding above and stack grows down, |
5555 | or if padding below and stack grows up. |
5556 | But if space already allocated, this has already been done. */ |
5557 | if (maybe_ne (a: extra, b: 0) |
5558 | && args_addr == 0 |
5559 | && where_pad != PAD_NONE |
5560 | && where_pad != stack_direction) |
5561 | anti_adjust_stack (gen_int_mode (extra, Pmode)); |
5562 | |
5563 | #ifdef PUSH_ROUNDING |
5564 | if (args_addr == 0 && targetm.calls.push_argument (0)) |
5565 | emit_single_push_insn (mode, x, type); |
5566 | else |
5567 | #endif |
5568 | { |
5569 | addr = simplify_gen_binary (code: PLUS, Pmode, op0: args_addr, op1: args_so_far); |
5570 | dest = gen_rtx_MEM (mode, memory_address (mode, addr)); |
5571 | |
5572 | /* We do *not* set_mem_attributes here, because incoming arguments |
5573 | may overlap with sibling call outgoing arguments and we cannot |
5574 | allow reordering of reads from function arguments with stores |
5575 | to outgoing arguments of sibling calls. We do, however, want |
5576 | to record the alignment of the stack slot. */ |
5577 | /* ALIGN may well be better aligned than TYPE, e.g. due to |
5578 | PARM_BOUNDARY. Assume the caller isn't lying. */ |
5579 | set_mem_align (dest, align); |
5580 | |
5581 | emit_move_insn (x: dest, y: x); |
5582 | } |
5583 | } |
5584 | |
5585 | /* Move the partial arguments into the registers and any overlapping |
5586 | values that we moved into the pseudos in tmp_regs. */ |
5587 | if (partial > 0 && reg != 0) |
5588 | { |
5589 | /* Handle calls that pass values in multiple non-contiguous locations. |
5590 | The Irix 6 ABI has examples of this. */ |
5591 | if (GET_CODE (reg) == PARALLEL) |
5592 | emit_group_load (dst: reg, src: x, type, ssize: -1); |
5593 | else |
5594 | { |
5595 | gcc_assert (partial % UNITS_PER_WORD == 0); |
5596 | move_block_to_reg (REGNO (reg), x, nregs: nregs - overlapping, mode); |
5597 | |
5598 | for (int i = 0; i < overlapping; i++) |
5599 | emit_move_insn (x: gen_rtx_REG (word_mode, REGNO (reg) |
5600 | + nregs - overlapping + i), |
5601 | y: tmp_regs[i]); |
5602 | |
5603 | } |
5604 | } |
5605 | |
5606 | if (maybe_ne (a: extra, b: 0) && args_addr == 0 && where_pad == stack_direction) |
5607 | anti_adjust_stack (gen_int_mode (extra, Pmode)); |
5608 | |
5609 | if (alignment_pad && args_addr == 0) |
5610 | anti_adjust_stack (alignment_pad); |
5611 | |
5612 | return true; |
5613 | } |
5614 | |
5615 | /* Return X if X can be used as a subtarget in a sequence of arithmetic |
5616 | operations. */ |
5617 | |
5618 | static rtx |
5619 | get_subtarget (rtx x) |
5620 | { |
5621 | return (optimize |
5622 | || x == 0 |
5623 | /* Only registers can be subtargets. */ |
5624 | || !REG_P (x) |
5625 | /* Don't use hard regs to avoid extending their life. */ |
5626 | || REGNO (x) < FIRST_PSEUDO_REGISTER |
5627 | ? 0 : x); |
5628 | } |
5629 | |
5630 | /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where |
5631 | FIELD is a bitfield. Returns true if the optimization was successful, |
5632 | and there's nothing else to do. */ |
5633 | |
5634 | static bool |
5635 | optimize_bitfield_assignment_op (poly_uint64 pbitsize, |
5636 | poly_uint64 pbitpos, |
5637 | poly_uint64 pbitregion_start, |
5638 | poly_uint64 pbitregion_end, |
5639 | machine_mode mode1, rtx str_rtx, |
5640 | tree to, tree src, bool reverse) |
5641 | { |
5642 | /* str_mode is not guaranteed to be a scalar type. */ |
5643 | machine_mode str_mode = GET_MODE (str_rtx); |
5644 | unsigned int str_bitsize; |
5645 | tree op0, op1; |
5646 | rtx value, result; |
5647 | optab binop; |
5648 | gimple *srcstmt; |
5649 | enum tree_code code; |
5650 | |
5651 | unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end; |
5652 | if (mode1 != VOIDmode |
5653 | || !pbitsize.is_constant (const_value: &bitsize) |
5654 | || !pbitpos.is_constant (const_value: &bitpos) |
5655 | || !pbitregion_start.is_constant (const_value: &bitregion_start) |
5656 | || !pbitregion_end.is_constant (const_value: &bitregion_end) |
5657 | || bitsize >= BITS_PER_WORD |
5658 | || !GET_MODE_BITSIZE (mode: str_mode).is_constant (const_value: &str_bitsize) |
5659 | || str_bitsize > BITS_PER_WORD |
5660 | || TREE_SIDE_EFFECTS (to) |
5661 | || TREE_THIS_VOLATILE (to)) |
5662 | return false; |
5663 | |
5664 | STRIP_NOPS (src); |
5665 | if (TREE_CODE (src) != SSA_NAME) |
5666 | return false; |
5667 | if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE) |
5668 | return false; |
5669 | |
5670 | srcstmt = get_gimple_for_ssa_name (exp: src); |
5671 | if (!srcstmt |
5672 | || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary) |
5673 | return false; |
5674 | |
5675 | code = gimple_assign_rhs_code (gs: srcstmt); |
5676 | |
5677 | op0 = gimple_assign_rhs1 (gs: srcstmt); |
5678 | |
5679 | /* If OP0 is an SSA_NAME, then we want to walk the use-def chain |
5680 | to find its initialization. Hopefully the initialization will |
5681 | be from a bitfield load. */ |
5682 | if (TREE_CODE (op0) == SSA_NAME) |
5683 | { |
5684 | gimple *op0stmt = get_gimple_for_ssa_name (exp: op0); |
5685 | |
5686 | /* We want to eventually have OP0 be the same as TO, which |
5687 | should be a bitfield. */ |
5688 | if (!op0stmt |
5689 | || !is_gimple_assign (gs: op0stmt) |
5690 | || gimple_assign_rhs_code (gs: op0stmt) != TREE_CODE (to)) |
5691 | return false; |
5692 | op0 = gimple_assign_rhs1 (gs: op0stmt); |
5693 | } |
5694 | |
5695 | op1 = gimple_assign_rhs2 (gs: srcstmt); |
5696 | |
5697 | if (!operand_equal_p (to, op0, flags: 0)) |
5698 | return false; |
5699 | |
5700 | if (MEM_P (str_rtx)) |
5701 | { |
5702 | unsigned HOST_WIDE_INT offset1; |
5703 | |
5704 | if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD) |
5705 | str_bitsize = BITS_PER_WORD; |
5706 | |
5707 | scalar_int_mode best_mode; |
5708 | if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end, |
5709 | MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode)) |
5710 | return false; |
5711 | str_mode = best_mode; |
5712 | str_bitsize = GET_MODE_BITSIZE (mode: best_mode); |
5713 | |
5714 | offset1 = bitpos; |
5715 | bitpos %= str_bitsize; |
5716 | offset1 = (offset1 - bitpos) / BITS_PER_UNIT; |
5717 | str_rtx = adjust_address (str_rtx, str_mode, offset1); |
5718 | } |
5719 | else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG) |
5720 | return false; |
5721 | |
5722 | /* If the bit field covers the whole REG/MEM, store_field |
5723 | will likely generate better code. */ |
5724 | if (bitsize >= str_bitsize) |
5725 | return false; |
5726 | |
5727 | /* We can't handle fields split across multiple entities. */ |
5728 | if (bitpos + bitsize > str_bitsize) |
5729 | return false; |
5730 | |
5731 | if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) |
5732 | bitpos = str_bitsize - bitpos - bitsize; |
5733 | |
5734 | switch (code) |
5735 | { |
5736 | case PLUS_EXPR: |
5737 | case MINUS_EXPR: |
5738 | /* For now, just optimize the case of the topmost bitfield |
5739 | where we don't need to do any masking and also |
5740 | 1 bit bitfields where xor can be used. |
5741 | We might win by one instruction for the other bitfields |
5742 | too if insv/extv instructions aren't used, so that |
5743 | can be added later. */ |
5744 | if ((reverse || bitpos + bitsize != str_bitsize) |
5745 | && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST)) |
5746 | break; |
5747 | |
5748 | value = expand_expr (exp: op1, NULL_RTX, mode: str_mode, modifier: EXPAND_NORMAL); |
5749 | value = convert_modes (mode: str_mode, |
5750 | TYPE_MODE (TREE_TYPE (op1)), x: value, |
5751 | TYPE_UNSIGNED (TREE_TYPE (op1))); |
5752 | |
5753 | /* We may be accessing data outside the field, which means |
5754 | we can alias adjacent data. */ |
5755 | if (MEM_P (str_rtx)) |
5756 | { |
5757 | str_rtx = shallow_copy_rtx (str_rtx); |
5758 | set_mem_alias_set (str_rtx, 0); |
5759 | set_mem_expr (str_rtx, 0); |
5760 | } |
5761 | |
5762 | if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize)) |
5763 | { |
5764 | value = expand_and (str_mode, value, const1_rtx, NULL); |
5765 | binop = xor_optab; |
5766 | } |
5767 | else |
5768 | binop = code == PLUS_EXPR ? add_optab : sub_optab; |
5769 | |
5770 | value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); |
5771 | if (reverse) |
5772 | value = flip_storage_order (str_mode, value); |
5773 | result = expand_binop (str_mode, binop, str_rtx, |
5774 | value, str_rtx, 1, OPTAB_WIDEN); |
5775 | if (result != str_rtx) |
5776 | emit_move_insn (x: str_rtx, y: result); |
5777 | return true; |
5778 | |
5779 | case BIT_IOR_EXPR: |
5780 | case BIT_XOR_EXPR: |
5781 | if (TREE_CODE (op1) != INTEGER_CST) |
5782 | break; |
5783 | value = expand_expr (exp: op1, NULL_RTX, mode: str_mode, modifier: EXPAND_NORMAL); |
5784 | value = convert_modes (mode: str_mode, |
5785 | TYPE_MODE (TREE_TYPE (op1)), x: value, |
5786 | TYPE_UNSIGNED (TREE_TYPE (op1))); |
5787 | |
5788 | /* We may be accessing data outside the field, which means |
5789 | we can alias adjacent data. */ |
5790 | if (MEM_P (str_rtx)) |
5791 | { |
5792 | str_rtx = shallow_copy_rtx (str_rtx); |
5793 | set_mem_alias_set (str_rtx, 0); |
5794 | set_mem_expr (str_rtx, 0); |
5795 | } |
5796 | |
5797 | binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab; |
5798 | if (bitpos + bitsize != str_bitsize) |
5799 | { |
5800 | rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1, |
5801 | str_mode); |
5802 | value = expand_and (str_mode, value, mask, NULL_RTX); |
5803 | } |
5804 | value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); |
5805 | if (reverse) |
5806 | value = flip_storage_order (str_mode, value); |
5807 | result = expand_binop (str_mode, binop, str_rtx, |
5808 | value, str_rtx, 1, OPTAB_WIDEN); |
5809 | if (result != str_rtx) |
5810 | emit_move_insn (x: str_rtx, y: result); |
5811 | return true; |
5812 | |
5813 | default: |
5814 | break; |
5815 | } |
5816 | |
5817 | return false; |
5818 | } |
5819 | |
5820 | /* In the C++ memory model, consecutive bit fields in a structure are |
5821 | considered one memory location. |
5822 | |
5823 | Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function |
5824 | returns the bit range of consecutive bits in which this COMPONENT_REF |
5825 | belongs. The values are returned in *BITSTART and *BITEND. *BITPOS |
5826 | and *OFFSET may be adjusted in the process. |
5827 | |
5828 | If the access does not need to be restricted, 0 is returned in both |
5829 | *BITSTART and *BITEND. */ |
5830 | |
5831 | void |
5832 | get_bit_range (poly_uint64 *bitstart, poly_uint64 *bitend, tree exp, |
5833 | poly_int64 *bitpos, tree *offset) |
5834 | { |
5835 | poly_int64 bitoffset; |
5836 | tree field, repr; |
5837 | |
5838 | gcc_assert (TREE_CODE (exp) == COMPONENT_REF); |
5839 | |
5840 | field = TREE_OPERAND (exp, 1); |
5841 | repr = DECL_BIT_FIELD_REPRESENTATIVE (field); |
5842 | /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no |
5843 | need to limit the range we can access. */ |
5844 | if (!repr) |
5845 | { |
5846 | *bitstart = *bitend = 0; |
5847 | return; |
5848 | } |
5849 | |
5850 | /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is |
5851 | part of a larger bit field, then the representative does not serve any |
5852 | useful purpose. This can occur in Ada. */ |
5853 | if (handled_component_p (TREE_OPERAND (exp, 0))) |
5854 | { |
5855 | machine_mode rmode; |
5856 | poly_int64 rbitsize, rbitpos; |
5857 | tree roffset; |
5858 | int unsignedp, reversep, volatilep = 0; |
5859 | get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos, |
5860 | &roffset, &rmode, &unsignedp, &reversep, |
5861 | &volatilep); |
5862 | if (!multiple_p (a: rbitpos, BITS_PER_UNIT)) |
5863 | { |
5864 | *bitstart = *bitend = 0; |
5865 | return; |
5866 | } |
5867 | } |
5868 | |
5869 | /* Compute the adjustment to bitpos from the offset of the field |
5870 | relative to the representative. DECL_FIELD_OFFSET of field and |
5871 | repr are the same by construction if they are not constants, |
5872 | see finish_bitfield_layout. */ |
5873 | poly_uint64 field_offset, repr_offset; |
5874 | if (poly_int_tree_p (DECL_FIELD_OFFSET (field), value: &field_offset) |
5875 | && poly_int_tree_p (DECL_FIELD_OFFSET (repr), value: &repr_offset)) |
5876 | bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT; |
5877 | else |
5878 | bitoffset = 0; |
5879 | bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field)) |
5880 | - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr))); |
5881 | |
5882 | /* If the adjustment is larger than bitpos, we would have a negative bit |
5883 | position for the lower bound and this may wreak havoc later. Adjust |
5884 | offset and bitpos to make the lower bound non-negative in that case. */ |
5885 | if (maybe_gt (bitoffset, *bitpos)) |
5886 | { |
5887 | poly_int64 adjust_bits = upper_bound (a: bitoffset, b: *bitpos) - *bitpos; |
5888 | poly_int64 adjust_bytes = exact_div (a: adjust_bits, BITS_PER_UNIT); |
5889 | |
5890 | *bitpos += adjust_bits; |
5891 | if (*offset == NULL_TREE) |
5892 | *offset = size_int (-adjust_bytes); |
5893 | else |
5894 | *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes)); |
5895 | *bitstart = 0; |
5896 | } |
5897 | else |
5898 | *bitstart = *bitpos - bitoffset; |
5899 | |
5900 | *bitend = *bitstart + tree_to_poly_uint64 (DECL_SIZE (repr)) - 1; |
5901 | } |
5902 | |
5903 | /* Returns true if BASE is a DECL that does not reside in memory and |
5904 | has non-BLKmode. DECL_RTL must not be a MEM; if |
5905 | DECL_RTL was not set yet, return false. */ |
5906 | |
5907 | bool |
5908 | non_mem_decl_p (tree base) |
5909 | { |
5910 | if (!DECL_P (base) |
5911 | || TREE_ADDRESSABLE (base) |
5912 | || DECL_MODE (base) == BLKmode) |
5913 | return false; |
5914 | |
5915 | if (!DECL_RTL_SET_P (base)) |
5916 | return false; |
5917 | |
5918 | return (!MEM_P (DECL_RTL (base))); |
5919 | } |
5920 | |
5921 | /* Returns true if REF refers to an object that does not |
5922 | reside in memory and has non-BLKmode. */ |
5923 | |
5924 | bool |
5925 | mem_ref_refers_to_non_mem_p (tree ref) |
5926 | { |
5927 | tree base; |
5928 | |
5929 | if (TREE_CODE (ref) == MEM_REF |
5930 | || TREE_CODE (ref) == TARGET_MEM_REF) |
5931 | { |
5932 | tree addr = TREE_OPERAND (ref, 0); |
5933 | |
5934 | if (TREE_CODE (addr) != ADDR_EXPR) |
5935 | return false; |
5936 | |
5937 | base = TREE_OPERAND (addr, 0); |
5938 | } |
5939 | else |
5940 | base = ref; |
5941 | |
5942 | return non_mem_decl_p (base); |
5943 | } |
5944 | |
5945 | /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL |
5946 | is true, try generating a nontemporal store. */ |
5947 | |
5948 | void |
5949 | expand_assignment (tree to, tree from, bool nontemporal) |
5950 | { |
5951 | rtx to_rtx = 0; |
5952 | rtx result; |
5953 | machine_mode mode; |
5954 | unsigned int align; |
5955 | enum insn_code icode; |
5956 | |
5957 | /* Don't crash if the lhs of the assignment was erroneous. */ |
5958 | if (TREE_CODE (to) == ERROR_MARK) |
5959 | { |
5960 | expand_normal (exp: from); |
5961 | return; |
5962 | } |
5963 | |
5964 | /* Optimize away no-op moves without side-effects. */ |
5965 | if (operand_equal_p (to, from, flags: 0)) |
5966 | return; |
5967 | |
5968 | /* Handle misaligned stores. */ |
5969 | mode = TYPE_MODE (TREE_TYPE (to)); |
5970 | if ((TREE_CODE (to) == MEM_REF |
5971 | || TREE_CODE (to) == TARGET_MEM_REF |
5972 | || DECL_P (to)) |
5973 | && mode != BLKmode |
5974 | && !mem_ref_refers_to_non_mem_p (ref: to) |
5975 | && ((align = get_object_alignment (to)) |
5976 | < GET_MODE_ALIGNMENT (mode)) |
5977 | && (((icode = optab_handler (op: movmisalign_optab, mode)) |
5978 | != CODE_FOR_nothing) |
5979 | || targetm.slow_unaligned_access (mode, align))) |
5980 | { |
5981 | rtx reg, mem; |
5982 | |
5983 | reg = expand_expr (exp: from, NULL_RTX, VOIDmode, modifier: EXPAND_NORMAL); |
5984 | /* Handle PARALLEL. */ |
5985 | reg = maybe_emit_group_store (x: reg, TREE_TYPE (from)); |
5986 | reg = force_not_mem (reg); |
5987 | mem = expand_expr (exp: to, NULL_RTX, VOIDmode, modifier: EXPAND_WRITE); |
5988 | if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to)) |
5989 | reg = flip_storage_order (mode, reg); |
5990 | |
5991 | if (icode != CODE_FOR_nothing) |
5992 | { |
5993 | class expand_operand ops[2]; |
5994 | |
5995 | create_fixed_operand (op: &ops[0], x: mem); |
5996 | create_input_operand (op: &ops[1], value: reg, mode); |
5997 | /* The movmisalign<mode> pattern cannot fail, else the assignment |
5998 | would silently be omitted. */ |
5999 | expand_insn (icode, nops: 2, ops); |
6000 | } |
6001 | else |
6002 | store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg, |
6003 | false, false); |
6004 | return; |
6005 | } |
6006 | |
6007 | /* Assignment of a structure component needs special treatment |
6008 | if the structure component's rtx is not simply a MEM. |
6009 | Assignment of an array element at a constant index, and assignment of |
6010 | an array element in an unaligned packed structure field, has the same |
6011 | problem. Same for (partially) storing into a non-memory object. */ |
6012 | if (handled_component_p (t: to) |
6013 | || (TREE_CODE (to) == MEM_REF |
6014 | && (REF_REVERSE_STORAGE_ORDER (to) |
6015 | || mem_ref_refers_to_non_mem_p (ref: to))) |
6016 | || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE) |
6017 | { |
6018 | machine_mode mode1; |
6019 | poly_int64 bitsize, bitpos; |
6020 | poly_uint64 bitregion_start = 0; |
6021 | poly_uint64 bitregion_end = 0; |
6022 | tree offset; |
6023 | int unsignedp, reversep, volatilep = 0; |
6024 | tree tem; |
6025 | |
6026 | push_temp_slots (); |
6027 | tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1, |
6028 | &unsignedp, &reversep, &volatilep); |
6029 | |
6030 | /* Make sure bitpos is not negative, it can wreak havoc later. */ |
6031 | if (maybe_lt (a: bitpos, b: 0)) |
6032 | { |
6033 | gcc_assert (offset == NULL_TREE); |
6034 | offset = size_int (bits_to_bytes_round_down (bitpos)); |
6035 | bitpos = num_trailing_bits (bitpos); |
6036 | } |
6037 | |
6038 | if (TREE_CODE (to) == COMPONENT_REF |
6039 | && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1))) |
6040 | get_bit_range (bitstart: &bitregion_start, bitend: &bitregion_end, exp: to, bitpos: &bitpos, offset: &offset); |
6041 | /* The C++ memory model naturally applies to byte-aligned fields. |
6042 | However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or |
6043 | BITSIZE are not byte-aligned, there is no need to limit the range |
6044 | we can access. This can occur with packed structures in Ada. */ |
6045 | else if (maybe_gt (bitsize, 0) |
6046 | && multiple_p (a: bitsize, BITS_PER_UNIT) |
6047 | && multiple_p (a: bitpos, BITS_PER_UNIT)) |
6048 | { |
6049 | bitregion_start = bitpos; |
6050 | bitregion_end = bitpos + bitsize - 1; |
6051 | } |
6052 | |
6053 | to_rtx = expand_expr (exp: tem, NULL_RTX, VOIDmode, modifier: EXPAND_WRITE); |
6054 | |
6055 | /* If the field has a mode, we want to access it in the |
6056 | field's mode, not the computed mode. |
6057 | If a MEM has VOIDmode (external with incomplete type), |
6058 | use BLKmode for it instead. */ |
6059 | if (MEM_P (to_rtx)) |
6060 | { |
6061 | if (mode1 != VOIDmode) |
6062 | to_rtx = adjust_address (to_rtx, mode1, 0); |
6063 | else if (GET_MODE (to_rtx) == VOIDmode) |
6064 | to_rtx = adjust_address (to_rtx, BLKmode, 0); |
6065 | } |
6066 | |
6067 | rtx stemp = NULL_RTX, old_to_rtx = NULL_RTX; |
6068 | if (offset != 0) |
6069 | { |
6070 | machine_mode address_mode; |
6071 | rtx offset_rtx; |
6072 | |
6073 | if (!MEM_P (to_rtx)) |
6074 | { |
6075 | /* We can get constant negative offsets into arrays with broken |
6076 | user code. Translate this to a trap instead of ICEing. */ |
6077 | if (TREE_CODE (offset) == INTEGER_CST) |
6078 | { |
6079 | expand_builtin_trap (); |
6080 | to_rtx = gen_rtx_MEM (BLKmode, const0_rtx); |
6081 | } |
6082 | /* Else spill for variable offset to the destination. We expect |
6083 | to run into this only for hard registers. */ |
6084 | else |
6085 | { |
6086 | gcc_assert (VAR_P (tem) && DECL_HARD_REGISTER (tem)); |
6087 | stemp = assign_stack_temp (GET_MODE (to_rtx), |
6088 | GET_MODE_SIZE (GET_MODE (to_rtx))); |
6089 | emit_move_insn (x: stemp, y: to_rtx); |
6090 | old_to_rtx = to_rtx; |
6091 | to_rtx = stemp; |
6092 | } |
6093 | } |
6094 | |
6095 | offset_rtx = expand_expr (exp: offset, NULL_RTX, VOIDmode, modifier: EXPAND_SUM); |
6096 | address_mode = get_address_mode (mem: to_rtx); |
6097 | if (GET_MODE (offset_rtx) != address_mode) |
6098 | { |
6099 | /* We cannot be sure that the RTL in offset_rtx is valid outside |
6100 | of a memory address context, so force it into a register |
6101 | before attempting to convert it to the desired mode. */ |
6102 | offset_rtx = force_operand (offset_rtx, NULL_RTX); |
6103 | offset_rtx = convert_to_mode (mode: address_mode, x: offset_rtx, unsignedp: 0); |
6104 | } |
6105 | |
6106 | /* If we have an expression in OFFSET_RTX and a non-zero |
6107 | byte offset in BITPOS, adding the byte offset before the |
6108 | OFFSET_RTX results in better intermediate code, which makes |
6109 | later rtl optimization passes perform better. |
6110 | |
6111 | We prefer intermediate code like this: |
6112 | |
6113 | r124:DI=r123:DI+0x18 |
6114 | [r124:DI]=r121:DI |
6115 | |
6116 | ... instead of ... |
6117 | |
6118 | r124:DI=r123:DI+0x10 |
6119 | [r124:DI+0x8]=r121:DI |
6120 | |
6121 | This is only done for aligned data values, as these can |
6122 | be expected to result in single move instructions. */ |
6123 | poly_int64 bytepos; |
6124 | if (mode1 != VOIDmode |
6125 | && maybe_ne (a: bitpos, b: 0) |
6126 | && maybe_gt (bitsize, 0) |
6127 | && multiple_p (a: bitpos, BITS_PER_UNIT, multiple: &bytepos) |
6128 | && multiple_p (a: bitpos, b: bitsize) |
6129 | && multiple_p (a: bitsize, GET_MODE_ALIGNMENT (mode1)) |
6130 | && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1)) |
6131 | { |
6132 | to_rtx = adjust_address (to_rtx, mode1, bytepos); |
6133 | bitregion_start = 0; |
6134 | if (known_ge (bitregion_end, poly_uint64 (bitpos))) |
6135 | bitregion_end -= bitpos; |
6136 | bitpos = 0; |
6137 | } |
6138 | |
6139 | to_rtx = offset_address (to_rtx, offset_rtx, |
6140 | highest_pow2_factor_for_target (to, |
6141 | offset)); |
6142 | } |
6143 | |
6144 | /* No action is needed if the target is not a memory and the field |
6145 | lies completely outside that target. This can occur if the source |
6146 | code contains an out-of-bounds access to a small array. */ |
6147 | if (!MEM_P (to_rtx) |
6148 | && GET_MODE (to_rtx) != BLKmode |
6149 | && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx)))) |
6150 | { |
6151 | expand_normal (exp: from); |
6152 | result = NULL; |
6153 | } |
6154 | /* Handle expand_expr of a complex value returning a CONCAT. */ |
6155 | else if (GET_CODE (to_rtx) == CONCAT) |
6156 | { |
6157 | machine_mode to_mode = GET_MODE (to_rtx); |
6158 | gcc_checking_assert (COMPLEX_MODE_P (to_mode)); |
6159 | poly_int64 mode_bitsize = GET_MODE_BITSIZE (mode: to_mode); |
6160 | unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode); |
6161 | if (TYPE_MODE (TREE_TYPE (from)) == to_mode |
6162 | && known_eq (bitpos, 0) |
6163 | && known_eq (bitsize, mode_bitsize)) |
6164 | result = store_expr (from, to_rtx, false, nontemporal, reversep); |
6165 | else if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE_INNER (to_mode) |
6166 | && known_eq (bitsize, inner_bitsize) |
6167 | && (known_eq (bitpos, 0) |
6168 | || known_eq (bitpos, inner_bitsize))) |
6169 | result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)), |
6170 | false, nontemporal, reversep); |
6171 | else if (known_le (bitpos + bitsize, inner_bitsize)) |
6172 | result = store_field (XEXP (to_rtx, 0), bitsize, bitpos, |
6173 | bitregion_start, bitregion_end, |
6174 | mode1, from, get_alias_set (to), |
6175 | nontemporal, reversep); |
6176 | else if (known_ge (bitpos, inner_bitsize)) |
6177 | result = store_field (XEXP (to_rtx, 1), bitsize, |
6178 | bitpos - inner_bitsize, |
6179 | bitregion_start, bitregion_end, |
6180 | mode1, from, get_alias_set (to), |
6181 | nontemporal, reversep); |
6182 | else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize)) |
6183 | { |
6184 | result = expand_normal (exp: from); |
6185 | if (GET_CODE (result) == CONCAT) |
6186 | { |
6187 | to_mode = GET_MODE_INNER (to_mode); |
6188 | machine_mode from_mode = GET_MODE_INNER (GET_MODE (result)); |
6189 | rtx from_real |
6190 | = simplify_gen_subreg (outermode: to_mode, XEXP (result, 0), |
6191 | innermode: from_mode, byte: 0); |
6192 | rtx from_imag |
6193 | = simplify_gen_subreg (outermode: to_mode, XEXP (result, 1), |
6194 | innermode: from_mode, byte: 0); |
6195 | if (!from_real || !from_imag) |
6196 | goto concat_store_slow; |
6197 | emit_move_insn (XEXP (to_rtx, 0), y: from_real); |
6198 | emit_move_insn (XEXP (to_rtx, 1), y: from_imag); |
6199 | } |
6200 | else |
6201 | { |
6202 | machine_mode from_mode |
6203 | = GET_MODE (result) == VOIDmode |
6204 | ? TYPE_MODE (TREE_TYPE (from)) |
6205 | : GET_MODE (result); |
6206 | rtx from_rtx; |
6207 | if (MEM_P (result)) |
6208 | from_rtx = change_address (result, to_mode, NULL_RTX); |
6209 | else |
6210 | from_rtx |
6211 | = simplify_gen_subreg (outermode: to_mode, op: result, innermode: from_mode, byte: 0); |
6212 | if (from_rtx) |
6213 | { |
6214 | emit_move_insn (XEXP (to_rtx, 0), |
6215 | y: read_complex_part (cplx: from_rtx, imag_p: false)); |
6216 | emit_move_insn (XEXP (to_rtx, 1), |
6217 | y: read_complex_part (cplx: from_rtx, imag_p: true)); |
6218 | } |
6219 | else |
6220 | { |
6221 | to_mode = GET_MODE_INNER (to_mode); |
6222 | rtx from_real |
6223 | = simplify_gen_subreg (outermode: to_mode, op: result, innermode: from_mode, byte: 0); |
6224 | rtx from_imag |
6225 | = simplify_gen_subreg (outermode: to_mode, op: result, innermode: from_mode, |
6226 | byte: GET_MODE_SIZE (mode: to_mode)); |
6227 | if (!from_real || !from_imag) |
6228 | goto concat_store_slow; |
6229 | emit_move_insn (XEXP (to_rtx, 0), y: from_real); |
6230 | emit_move_insn (XEXP (to_rtx, 1), y: from_imag); |
6231 | } |
6232 | } |
6233 | } |
6234 | else |
6235 | { |
6236 | concat_store_slow:; |
6237 | rtx temp = assign_stack_temp (GET_MODE (to_rtx), |
6238 | GET_MODE_SIZE (GET_MODE (to_rtx))); |
6239 | write_complex_part (cplx: temp, XEXP (to_rtx, 0), imag_p: false, undefined_p: true); |
6240 | write_complex_part (cplx: temp, XEXP (to_rtx, 1), imag_p: true, undefined_p: false); |
6241 | result = store_field (temp, bitsize, bitpos, |
6242 | bitregion_start, bitregion_end, |
6243 | mode1, from, get_alias_set (to), |
6244 | nontemporal, reversep); |
6245 | emit_move_insn (XEXP (to_rtx, 0), y: read_complex_part (cplx: temp, imag_p: false)); |
6246 | emit_move_insn (XEXP (to_rtx, 1), y: read_complex_part (cplx: temp, imag_p: true)); |
6247 | } |
6248 | } |
6249 | /* For calls to functions returning variable length structures, if TO_RTX |
6250 | is not a MEM, go through a MEM because we must not create temporaries |
6251 | of the VLA type. */ |
6252 | else if (!MEM_P (to_rtx) |
6253 | && TREE_CODE (from) == CALL_EXPR |
6254 | && COMPLETE_TYPE_P (TREE_TYPE (from)) |
6255 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) != INTEGER_CST) |
6256 | { |
6257 | rtx temp = assign_stack_temp (GET_MODE (to_rtx), |
6258 | GET_MODE_SIZE (GET_MODE (to_rtx))); |
6259 | result = store_field (temp, bitsize, bitpos, bitregion_start, |
6260 | bitregion_end, mode1, from, get_alias_set (to), |
6261 | nontemporal, reversep); |
6262 | emit_move_insn (x: to_rtx, y: temp); |
6263 | } |
6264 | else |
6265 | { |
6266 | if (MEM_P (to_rtx)) |
6267 | { |
6268 | /* If the field is at offset zero, we could have been given the |
6269 | DECL_RTX of the parent struct. Don't munge it. */ |
6270 | to_rtx = shallow_copy_rtx (to_rtx); |
6271 | set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos); |
6272 | if (volatilep) |
6273 | MEM_VOLATILE_P (to_rtx) = 1; |
6274 | } |
6275 | |
6276 | gcc_checking_assert (known_ge (bitpos, 0)); |
6277 | if (optimize_bitfield_assignment_op (pbitsize: bitsize, pbitpos: bitpos, |
6278 | pbitregion_start: bitregion_start, pbitregion_end: bitregion_end, |
6279 | mode1, str_rtx: to_rtx, to, src: from, |
6280 | reverse: reversep)) |
6281 | result = NULL; |
6282 | else if (SUBREG_P (to_rtx) |
6283 | && SUBREG_PROMOTED_VAR_P (to_rtx)) |
6284 | { |
6285 | /* If to_rtx is a promoted subreg, we need to zero or sign |
6286 | extend the value afterwards. */ |
6287 | if (TREE_CODE (to) == MEM_REF |
6288 | && TYPE_MODE (TREE_TYPE (from)) != BLKmode |
6289 | && !REF_REVERSE_STORAGE_ORDER (to) |
6290 | && known_eq (bitpos, 0) |
6291 | && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (to_rtx)))) |
6292 | result = store_expr (from, to_rtx, 0, nontemporal, false); |
6293 | /* Check if the field overlaps the MSB, requiring extension. */ |
6294 | else if (maybe_eq (a: bitpos + bitsize, |
6295 | b: GET_MODE_BITSIZE (GET_MODE (to_rtx)))) |
6296 | { |
6297 | scalar_int_mode imode = subreg_unpromoted_mode (x: to_rtx); |
6298 | scalar_int_mode omode = subreg_promoted_mode (x: to_rtx); |
6299 | rtx to_rtx1 = lowpart_subreg (outermode: imode, SUBREG_REG (to_rtx), |
6300 | innermode: omode); |
6301 | result = store_field (to_rtx1, bitsize, bitpos, |
6302 | bitregion_start, bitregion_end, |
6303 | mode1, from, get_alias_set (to), |
6304 | nontemporal, reversep); |
6305 | /* If the target usually keeps IMODE appropriately |
6306 | extended in OMODE it's unsafe to refer to it using |
6307 | a SUBREG whilst this invariant doesn't hold. */ |
6308 | if (targetm.mode_rep_extended (imode, omode) != UNKNOWN) |
6309 | to_rtx1 = simplify_gen_unary (code: TRUNCATE, mode: imode, |
6310 | SUBREG_REG (to_rtx), op_mode: omode); |
6311 | convert_move (SUBREG_REG (to_rtx), from: to_rtx1, |
6312 | SUBREG_PROMOTED_SIGN (to_rtx)); |
6313 | } |
6314 | else |
6315 | result = store_field (to_rtx, bitsize, bitpos, |
6316 | bitregion_start, bitregion_end, |
6317 | mode1, from, get_alias_set (to), |
6318 | nontemporal, reversep); |
6319 | } |
6320 | else |
6321 | result = store_field (to_rtx, bitsize, bitpos, |
6322 | bitregion_start, bitregion_end, |
6323 | mode1, from, get_alias_set (to), |
6324 | nontemporal, reversep); |
6325 | /* Move the temporary storage back to the non-MEM_P. */ |
6326 | if (stemp) |
6327 | emit_move_insn (x: old_to_rtx, y: stemp); |
6328 | } |
6329 | |
6330 | if (result) |
6331 | preserve_temp_slots (result); |
6332 | pop_temp_slots (); |
6333 | return; |
6334 | } |
6335 | |
6336 | /* If the rhs is a function call and its value is not an aggregate, |
6337 | call the function before we start to compute the lhs. |
6338 | This is needed for correct code for cases such as |
6339 | val = setjmp (buf) on machines where reference to val |
6340 | requires loading up part of an address in a separate insn. |
6341 | |
6342 | Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG |
6343 | since it might be a promoted variable where the zero- or sign- extension |
6344 | needs to be done. Handling this in the normal way is safe because no |
6345 | computation is done before the call. The same is true for SSA names. */ |
6346 | if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) |
6347 | && COMPLETE_TYPE_P (TREE_TYPE (from)) |
6348 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST |
6349 | && ! (((VAR_P (to) |
6350 | || TREE_CODE (to) == PARM_DECL |
6351 | || TREE_CODE (to) == RESULT_DECL) |
6352 | && REG_P (DECL_RTL (to))) |
6353 | || TREE_CODE (to) == SSA_NAME)) |
6354 | { |
6355 | rtx value; |
6356 | |
6357 | push_temp_slots (); |
6358 | value = expand_normal (exp: from); |
6359 | |
6360 | if (to_rtx == 0) |
6361 | to_rtx = expand_expr (exp: to, NULL_RTX, VOIDmode, modifier: EXPAND_WRITE); |
6362 | |
6363 | /* Handle calls that return values in multiple non-contiguous locations. |
6364 | The Irix 6 ABI has examples of this. */ |
6365 | if (GET_CODE (to_rtx) == PARALLEL) |
6366 | { |
6367 | if (GET_CODE (value) == PARALLEL) |
6368 | emit_group_move (dst: to_rtx, src: value); |
6369 | else |
6370 | emit_group_load (dst: to_rtx, src: value, TREE_TYPE (from), |
6371 | ssize: int_size_in_bytes (TREE_TYPE (from))); |
6372 | } |
6373 | else if (GET_CODE (value) == PARALLEL) |
6374 | emit_group_store (orig_dst: to_rtx, src: value, TREE_TYPE (from), |
6375 | ssize: int_size_in_bytes (TREE_TYPE (from))); |
6376 | else if (GET_MODE (to_rtx) == BLKmode) |
6377 | { |
6378 | /* Handle calls that return BLKmode values in registers. */ |
6379 | if (REG_P (value)) |
6380 | copy_blkmode_from_reg (target: to_rtx, srcreg: value, TREE_TYPE (from)); |
6381 | else |
6382 | emit_block_move (x: to_rtx, y: value, size: expr_size (from), method: BLOCK_OP_NORMAL); |
6383 | } |
6384 | else |
6385 | { |
6386 | if (POINTER_TYPE_P (TREE_TYPE (to))) |
6387 | value = convert_memory_address_addr_space |
6388 | (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value, |
6389 | TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to)))); |
6390 | |
6391 | emit_move_insn (x: to_rtx, y: value); |
6392 | } |
6393 | |
6394 | preserve_temp_slots (to_rtx); |
6395 | pop_temp_slots (); |
6396 | return; |
6397 | } |
6398 | |
6399 | /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */ |
6400 | to_rtx = expand_expr (exp: to, NULL_RTX, VOIDmode, modifier: EXPAND_WRITE); |
6401 | |
6402 | /* Don't move directly into a return register. */ |
6403 | if (TREE_CODE (to) == RESULT_DECL |
6404 | && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL)) |
6405 | { |
6406 | rtx temp; |
6407 | |
6408 | push_temp_slots (); |
6409 | |
6410 | /* If the source is itself a return value, it still is in a pseudo at |
6411 | this point so we can move it back to the return register directly. */ |
6412 | if (REG_P (to_rtx) |
6413 | && TYPE_MODE (TREE_TYPE (from)) == BLKmode |
6414 | && TREE_CODE (from) != CALL_EXPR) |
6415 | temp = copy_blkmode_to_reg (GET_MODE (to_rtx), src: from); |
6416 | else |
6417 | temp = expand_expr (exp: from, NULL_RTX, GET_MODE (to_rtx), modifier: EXPAND_NORMAL); |
6418 | |
6419 | /* Handle calls that return values in multiple non-contiguous locations. |
6420 | The Irix 6 ABI has examples of this. */ |
6421 | if (GET_CODE (to_rtx) == PARALLEL) |
6422 | { |
6423 | if (GET_CODE (temp) == PARALLEL) |
6424 | emit_group_move (dst: to_rtx, src: temp); |
6425 | else |
6426 | emit_group_load (dst: to_rtx, src: temp, TREE_TYPE (from), |
6427 | ssize: int_size_in_bytes (TREE_TYPE (from))); |
6428 | } |
6429 | else if (temp) |
6430 | emit_move_insn (x: to_rtx, y: temp); |
6431 | |
6432 | preserve_temp_slots (to_rtx); |
6433 | pop_temp_slots (); |
6434 | return; |
6435 | } |
6436 | |
6437 | /* In case we are returning the contents of an object which overlaps |
6438 | the place the value is being stored, use a safe function when copying |
6439 | a value through a pointer into a structure value return block. */ |
6440 | if (TREE_CODE (to) == RESULT_DECL |
6441 | && TREE_CODE (from) == INDIRECT_REF |
6442 | && ADDR_SPACE_GENERIC_P |
6443 | (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0))))) |
6444 | && refs_may_alias_p (to, from) |
6445 | && cfun->returns_struct |
6446 | && !cfun->returns_pcc_struct) |
6447 | { |
6448 | rtx from_rtx, size; |
6449 | |
6450 | push_temp_slots (); |
6451 | size = expr_size (from); |
6452 | from_rtx = expand_normal (exp: from); |
6453 | |
6454 | emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size); |
6455 | |
6456 | preserve_temp_slots (to_rtx); |
6457 | pop_temp_slots (); |
6458 | return; |
6459 | } |
6460 | |
6461 | /* Compute FROM and store the value in the rtx we got. */ |
6462 | |
6463 | push_temp_slots (); |
6464 | result = store_expr (from, to_rtx, 0, nontemporal, false); |
6465 | preserve_temp_slots (result); |
6466 | pop_temp_slots (); |
6467 | return; |
6468 | } |
6469 | |
6470 | /* Emits nontemporal store insn that moves FROM to TO. Returns true if this |
6471 | succeeded, false otherwise. */ |
6472 | |
6473 | bool |
6474 | emit_storent_insn (rtx to, rtx from) |
6475 | { |
6476 | class expand_operand ops[2]; |
6477 | machine_mode mode = GET_MODE (to); |
6478 | enum insn_code code = optab_handler (op: storent_optab, mode); |
6479 | |
6480 | if (code == CODE_FOR_nothing) |
6481 | return false; |
6482 | |
6483 | create_fixed_operand (op: &ops[0], x: to); |
6484 | create_input_operand (op: &ops[1], value: from, mode); |
6485 | return maybe_expand_insn (icode: code, nops: 2, ops); |
6486 | } |
6487 | |
6488 | /* Helper function for store_expr storing of STRING_CST. */ |
6489 | |
6490 | static rtx |
6491 | string_cst_read_str (void *data, void *, HOST_WIDE_INT offset, |
6492 | fixed_size_mode mode) |
6493 | { |
6494 | tree str = (tree) data; |
6495 | |
6496 | gcc_assert (offset >= 0); |
6497 | if (offset >= TREE_STRING_LENGTH (str)) |
6498 | return const0_rtx; |
6499 | |
6500 | if ((unsigned HOST_WIDE_INT) offset + GET_MODE_SIZE (mode) |
6501 | > (unsigned HOST_WIDE_INT) TREE_STRING_LENGTH (str)) |
6502 | { |
6503 | char *p = XALLOCAVEC (char, GET_MODE_SIZE (mode)); |
6504 | size_t l = TREE_STRING_LENGTH (str) - offset; |
6505 | memcpy (dest: p, TREE_STRING_POINTER (str) + offset, n: l); |
6506 | memset (s: p + l, c: '\0', n: GET_MODE_SIZE (mode) - l); |
6507 | return c_readstr (p, mode, false); |
6508 | } |
6509 | |
6510 | return c_readstr (TREE_STRING_POINTER (str) + offset, mode, false); |
6511 | } |
6512 | |
6513 | /* Generate code for computing expression EXP, |
6514 | and storing the value into TARGET. |
6515 | |
6516 | If the mode is BLKmode then we may return TARGET itself. |
6517 | It turns out that in BLKmode it doesn't cause a problem. |
6518 | because C has no operators that could combine two different |
6519 | assignments into the same BLKmode object with different values |
6520 | with no sequence point. Will other languages need this to |
6521 | be more thorough? |
6522 | |
6523 | If CALL_PARAM_P is nonzero, this is a store into a call param on the |
6524 | stack, and block moves may need to be treated specially. |
6525 | |
6526 | If NONTEMPORAL is true, try using a nontemporal store instruction. |
6527 | |
6528 | If REVERSE is true, the store is to be done in reverse order. */ |
6529 | |
6530 | rtx |
6531 | store_expr (tree exp, rtx target, int call_param_p, |
6532 | bool nontemporal, bool reverse) |
6533 | { |
6534 | rtx temp; |
6535 | rtx alt_rtl = NULL_RTX; |
6536 | location_t loc = curr_insn_location (); |
6537 | bool shortened_string_cst = false; |
6538 | |
6539 | if (VOID_TYPE_P (TREE_TYPE (exp))) |
6540 | { |
6541 | /* C++ can generate ?: expressions with a throw expression in one |
6542 | branch and an rvalue in the other. Here, we resolve attempts to |
6543 | store the throw expression's nonexistent result. */ |
6544 | gcc_assert (!call_param_p); |
6545 | expand_expr (exp, const0_rtx, VOIDmode, modifier: EXPAND_NORMAL); |
6546 | return NULL_RTX; |
6547 | } |
6548 | if (TREE_CODE (exp) == COMPOUND_EXPR) |
6549 | { |
6550 | /* Perform first part of compound expression, then assign from second |
6551 | part. */ |
6552 | expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, |
6553 | modifier: call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
6554 | return store_expr (TREE_OPERAND (exp, 1), target, |
6555 | call_param_p, nontemporal, reverse); |
6556 | } |
6557 | else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode) |
6558 | { |
6559 | /* For conditional expression, get safe form of the target. Then |
6560 | test the condition, doing the appropriate assignment on either |
6561 | side. This avoids the creation of unnecessary temporaries. |
6562 | For non-BLKmode, it is more efficient not to do this. */ |
6563 | |
6564 | rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx (); |
6565 | |
6566 | do_pending_stack_adjust (); |
6567 | NO_DEFER_POP; |
6568 | jumpifnot (TREE_OPERAND (exp, 0), label: lab1, |
6569 | prob: profile_probability::uninitialized ()); |
6570 | store_expr (TREE_OPERAND (exp, 1), target, call_param_p, |
6571 | nontemporal, reverse); |
6572 | emit_jump_insn (targetm.gen_jump (lab2)); |
6573 | emit_barrier (); |
6574 | emit_label (lab1); |
6575 | store_expr (TREE_OPERAND (exp, 2), target, call_param_p, |
6576 | nontemporal, reverse); |
6577 | emit_label (lab2); |
6578 | OK_DEFER_POP; |
6579 | |
6580 | return NULL_RTX; |
6581 | } |
6582 | else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target)) |
6583 | /* If this is a scalar in a register that is stored in a wider mode |
6584 | than the declared mode, compute the result into its declared mode |
6585 | and then convert to the wider mode. Our value is the computed |
6586 | expression. */ |
6587 | { |
6588 | rtx inner_target = 0; |
6589 | scalar_int_mode outer_mode = subreg_unpromoted_mode (x: target); |
6590 | scalar_int_mode inner_mode = subreg_promoted_mode (x: target); |
6591 | |
6592 | /* We can do the conversion inside EXP, which will often result |
6593 | in some optimizations. Do the conversion in two steps: first |
6594 | change the signedness, if needed, then the extend. But don't |
6595 | do this if the type of EXP is a subtype of something else |
6596 | since then the conversion might involve more than just |
6597 | converting modes. */ |
6598 | if (INTEGRAL_TYPE_P (TREE_TYPE (exp)) |
6599 | && TREE_TYPE (TREE_TYPE (exp)) == 0 |
6600 | && GET_MODE_PRECISION (mode: outer_mode) |
6601 | == TYPE_PRECISION (TREE_TYPE (exp))) |
6602 | { |
6603 | if (!SUBREG_CHECK_PROMOTED_SIGN (target, |
6604 | TYPE_UNSIGNED (TREE_TYPE (exp)))) |
6605 | { |
6606 | /* Some types, e.g. Fortran's logical*4, won't have a signed |
6607 | version, so use the mode instead. */ |
6608 | tree ntype |
6609 | = (signed_or_unsigned_type_for |
6610 | (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp))); |
6611 | if (ntype == NULL) |
6612 | ntype = lang_hooks.types.type_for_mode |
6613 | (TYPE_MODE (TREE_TYPE (exp)), |
6614 | SUBREG_PROMOTED_SIGN (target)); |
6615 | |
6616 | exp = fold_convert_loc (loc, ntype, exp); |
6617 | } |
6618 | |
6619 | exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode |
6620 | (inner_mode, SUBREG_PROMOTED_SIGN (target)), |
6621 | exp); |
6622 | |
6623 | inner_target = SUBREG_REG (target); |
6624 | } |
6625 | |
6626 | temp = expand_expr (exp, target: inner_target, VOIDmode, |
6627 | modifier: call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); |
6628 | |
6629 | |
6630 | /* If TEMP is a VOIDmode constant, use convert_modes to make |
6631 | sure that we properly convert it. */ |
6632 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode) |
6633 | { |
6634 | temp = convert_modes (mode: outer_mode, TYPE_MODE (TREE_TYPE (exp)), |
6635 | x: temp, SUBREG_PROMOTED_SIGN (target)); |
6636 | temp = convert_modes (mode: inner_mode, oldmode: outer_mode, x: temp, |
6637 | SUBREG_PROMOTED_SIGN (target)); |
6638 | } |
6639 | else if (!SCALAR_INT_MODE_P (GET_MODE (temp))) |
6640 | temp = convert_modes (mode: outer_mode, TYPE_MODE (TREE_TYPE (exp)), |
6641 | x: temp, SUBREG_PROMOTED_SIGN (target)); |
6642 | |
6643 | convert_move (SUBREG_REG (target), from: temp, |
6644 | SUBREG_PROMOTED_SIGN (target)); |
6645 | |
6646 | return NULL_RTX; |
6647 | } |
6648 | else if ((TREE_CODE (exp) == STRING_CST |
6649 | || (TREE_CODE (exp) == MEM_REF |
6650 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR |
6651 | && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) |
6652 | == STRING_CST |
6653 | && integer_zerop (TREE_OPERAND (exp, 1)))) |
6654 | && !nontemporal && !call_param_p |
6655 | && MEM_P (target)) |
6656 | { |
6657 | /* Optimize initialization of an array with a STRING_CST. */ |
6658 | HOST_WIDE_INT exp_len, str_copy_len; |
6659 | rtx dest_mem; |
6660 | tree str = TREE_CODE (exp) == STRING_CST |
6661 | ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0); |
6662 | |
6663 | exp_len = int_expr_size (exp); |
6664 | if (exp_len <= 0) |
6665 | goto normal_expr; |
6666 | |
6667 | if (TREE_STRING_LENGTH (str) <= 0) |
6668 | goto normal_expr; |
6669 | |
6670 | if (can_store_by_pieces (len: exp_len, constfun: string_cst_read_str, constfundata: (void *) str, |
6671 | MEM_ALIGN (target), memsetp: false)) |
6672 | { |
6673 | store_by_pieces (to: target, len: exp_len, constfun: string_cst_read_str, constfundata: (void *) str, |
6674 | MEM_ALIGN (target), memsetp: false, retmode: RETURN_BEGIN); |
6675 | return NULL_RTX; |
6676 | } |
6677 | |
6678 | str_copy_len = TREE_STRING_LENGTH (str); |
6679 | |
6680 | /* Trailing NUL bytes in EXP will be handled by the call to |
6681 | clear_storage, which is more efficient than copying them from |
6682 | the STRING_CST, so trim those from STR_COPY_LEN. */ |
6683 | while (str_copy_len) |
6684 | { |
6685 | if (TREE_STRING_POINTER (str)[str_copy_len - 1]) |
6686 | break; |
6687 | str_copy_len--; |
6688 | } |
6689 | |
6690 | if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0) |
6691 | { |
6692 | str_copy_len += STORE_MAX_PIECES - 1; |
6693 | str_copy_len &= ~(STORE_MAX_PIECES - 1); |
6694 | } |
6695 | if (str_copy_len >= exp_len) |
6696 | goto normal_expr; |
6697 | |
6698 | if (!can_store_by_pieces (len: str_copy_len, constfun: string_cst_read_str, |
6699 | constfundata: (void *) str, MEM_ALIGN (target), memsetp: false)) |
6700 | goto normal_expr; |
6701 | |
6702 | dest_mem = store_by_pieces (to: target, len: str_copy_len, constfun: string_cst_read_str, |
6703 | constfundata: (void *) str, MEM_ALIGN (target), memsetp: false, |
6704 | retmode: RETURN_END); |
6705 | clear_storage (object: adjust_address_1 (dest_mem, BLKmode, 0, 1, 1, 0, |
6706 | exp_len - str_copy_len), |
6707 | GEN_INT (exp_len - str_copy_len), method: BLOCK_OP_NORMAL); |
6708 | return NULL_RTX; |
6709 | } |
6710 | else |
6711 | { |
6712 | rtx tmp_target; |
6713 | |
6714 | normal_expr: |
6715 | /* If we want to use a nontemporal or a reverse order store, force the |
6716 | value into a register first. */ |
6717 | tmp_target = nontemporal || reverse ? NULL_RTX : target; |
6718 | tree rexp = exp; |
6719 | if (TREE_CODE (exp) == STRING_CST |
6720 | && tmp_target == target |
6721 | && GET_MODE (target) == BLKmode |
6722 | && TYPE_MODE (TREE_TYPE (exp)) == BLKmode) |
6723 | { |
6724 | rtx size = expr_size (exp); |
6725 | if (CONST_INT_P (size) |
6726 | && size != const0_rtx |
6727 | && (UINTVAL (size) |
6728 | > ((unsigned HOST_WIDE_INT) TREE_STRING_LENGTH (exp) + 32))) |
6729 | { |
6730 | /* If the STRING_CST has much larger array type than |
6731 | TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of |
6732 | it into the rodata section as the code later on will use |
6733 | memset zero for the remainder anyway. See PR95052. */ |
6734 | tmp_target = NULL_RTX; |
6735 | rexp = copy_node (exp); |
6736 | tree index |
6737 | = build_index_type (size_int (TREE_STRING_LENGTH (exp) - 1)); |
6738 | TREE_TYPE (rexp) = build_array_type (TREE_TYPE (TREE_TYPE (exp)), |
6739 | index); |
6740 | shortened_string_cst = true; |
6741 | } |
6742 | } |
6743 | temp = expand_expr_real (rexp, tmp_target, GET_MODE (target), |
6744 | (call_param_p |
6745 | ? EXPAND_STACK_PARM : EXPAND_NORMAL), |
6746 | &alt_rtl, false); |
6747 | if (shortened_string_cst) |
6748 | { |
6749 | gcc_assert (MEM_P (temp)); |
6750 | temp = change_address (temp, BLKmode, NULL_RTX); |
6751 | } |
6752 | } |
6753 | |
6754 | /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not |
6755 | the same as that of TARGET, adjust the constant. This is needed, for |
6756 | example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want |
6757 | only a word-sized value. */ |
6758 | if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode |
6759 | && TREE_CODE (exp) != ERROR_MARK |
6760 | && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp))) |
6761 | { |
6762 | gcc_assert (!shortened_string_cst); |
6763 | if (GET_MODE_CLASS (GET_MODE (target)) |
6764 | != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) |
6765 | && known_eq (GET_MODE_BITSIZE (GET_MODE (target)), |
6766 | GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp))))) |
6767 | { |
6768 | rtx t = simplify_gen_subreg (GET_MODE (target), op: temp, |
6769 | TYPE_MODE (TREE_TYPE (exp)), byte: 0); |
6770 | if (t) |
6771 | temp = t; |
6772 | } |
6773 | if (GET_MODE (temp) == VOIDmode) |
6774 | temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), |
6775 | x: temp, TYPE_UNSIGNED (TREE_TYPE (exp))); |
6776 | } |
6777 | |
6778 | /* If value was not generated in the target, store it there. |
6779 | Convert the value to TARGET's type first if necessary and emit the |
6780 | pending incrementations that have been queued when expanding EXP. |
6781 | Note that we cannot emit the whole queue blindly because this will |
6782 | effectively disable the POST_INC optimization later. |
6783 | |
6784 | If TEMP and TARGET compare equal according to rtx_equal_p, but |
6785 | one or both of them are volatile memory refs, we have to distinguish |
6786 | two cases: |
6787 | - expand_expr has used TARGET. In this case, we must not generate |
6788 | another copy. This can be detected by TARGET being equal according |
6789 | to == . |
6790 | - expand_expr has not used TARGET - that means that the source just |
6791 | happens to have the same RTX form. Since temp will have been created |
6792 | by expand_expr, it will compare unequal according to == . |
6793 | We must generate a copy in this case, to reach the correct number |
6794 | of volatile memory references. */ |
6795 | |
6796 | if ((! rtx_equal_p (temp, target) |
6797 | || (temp != target && (side_effects_p (temp) |
6798 | || side_effects_p (target) |
6799 | || (MEM_P (temp) |
6800 | && !mems_same_for_tbaa_p (temp, target))))) |
6801 | && TREE_CODE (exp) != ERROR_MARK |
6802 | /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET, |
6803 | but TARGET is not valid memory reference, TEMP will differ |
6804 | from TARGET although it is really the same location. */ |
6805 | && !(alt_rtl |
6806 | && rtx_equal_p (alt_rtl, target) |
6807 | && !side_effects_p (alt_rtl) |
6808 | && !side_effects_p (target)) |
6809 | /* If there's nothing to copy, don't bother. Don't call |
6810 | expr_size unless necessary, because some front-ends (C++) |
6811 | expr_size-hook must not be given objects that are not |
6812 | supposed to be bit-copied or bit-initialized. */ |
6813 | && expr_size (exp) != const0_rtx) |
6814 | { |
6815 | if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode) |
6816 | { |
6817 | gcc_assert (!shortened_string_cst); |
6818 | if (GET_MODE (target) == BLKmode) |
6819 | { |
6820 | /* Handle calls that return BLKmode values in registers. */ |
6821 | if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) |
6822 | copy_blkmode_from_reg (target, srcreg: temp, TREE_TYPE (exp)); |
6823 | else |
6824 | store_bit_field (target, |
6825 | rtx_to_poly_int64 (x: expr_size (exp)) |
6826 | * BITS_PER_UNIT, |
6827 | 0, 0, 0, GET_MODE (temp), temp, reverse, |
6828 | false); |
6829 | } |
6830 | else |
6831 | convert_move (to: target, from: temp, TYPE_UNSIGNED (TREE_TYPE (exp))); |
6832 | } |
6833 | |
6834 | else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST) |
6835 | { |
6836 | /* Handle copying a string constant into an array. The string |
6837 | constant may be shorter than the array. So copy just the string's |
6838 | actual length, and clear the rest. First get the size of the data |
6839 | type of the string, which is actually the size of the target. */ |
6840 | rtx size = expr_size (exp); |
6841 | |
6842 | if (CONST_INT_P (size) |
6843 | && INTVAL (size) < TREE_STRING_LENGTH (exp)) |
6844 | emit_block_move (x: target, y: temp, size, |
6845 | method: (call_param_p |
6846 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
6847 | else |
6848 | { |
6849 | machine_mode pointer_mode |
6850 | = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target)); |
6851 | machine_mode address_mode = get_address_mode (mem: target); |
6852 | |
6853 | /* Compute the size of the data to copy from the string. */ |
6854 | tree copy_size |
6855 | = size_binop_loc (loc, MIN_EXPR, |
6856 | make_tree (sizetype, size), |
6857 | size_int (TREE_STRING_LENGTH (exp))); |
6858 | rtx copy_size_rtx |
6859 | = expand_expr (exp: copy_size, NULL_RTX, VOIDmode, |
6860 | modifier: (call_param_p |
6861 | ? EXPAND_STACK_PARM : EXPAND_NORMAL)); |
6862 | rtx_code_label *label = 0; |
6863 | |
6864 | /* Copy that much. */ |
6865 | copy_size_rtx = convert_to_mode (mode: pointer_mode, x: copy_size_rtx, |
6866 | TYPE_UNSIGNED (sizetype)); |
6867 | emit_block_move (x: target, y: temp, size: copy_size_rtx, |
6868 | method: (call_param_p |
6869 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
6870 | |
6871 | /* Figure out how much is left in TARGET that we have to clear. |
6872 | Do all calculations in pointer_mode. */ |
6873 | poly_int64 const_copy_size; |
6874 | if (poly_int_rtx_p (x: copy_size_rtx, res: &const_copy_size)) |
6875 | { |
6876 | size = plus_constant (address_mode, size, -const_copy_size); |
6877 | target = adjust_address (target, BLKmode, const_copy_size); |
6878 | } |
6879 | else |
6880 | { |
6881 | size = expand_binop (TYPE_MODE (sizetype), sub_optab, size, |
6882 | copy_size_rtx, NULL_RTX, 0, |
6883 | OPTAB_LIB_WIDEN); |
6884 | |
6885 | if (GET_MODE (copy_size_rtx) != address_mode) |
6886 | copy_size_rtx = convert_to_mode (mode: address_mode, |
6887 | x: copy_size_rtx, |
6888 | TYPE_UNSIGNED (sizetype)); |
6889 | |
6890 | target = offset_address (target, copy_size_rtx, |
6891 | highest_pow2_factor (copy_size)); |
6892 | label = gen_label_rtx (); |
6893 | emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX, |
6894 | GET_MODE (size), 0, label); |
6895 | } |
6896 | |
6897 | if (size != const0_rtx) |
6898 | clear_storage (object: target, size, method: BLOCK_OP_NORMAL); |
6899 | |
6900 | if (label) |
6901 | emit_label (label); |
6902 | } |
6903 | } |
6904 | else if (shortened_string_cst) |
6905 | gcc_unreachable (); |
6906 | /* Handle calls that return values in multiple non-contiguous locations. |
6907 | The Irix 6 ABI has examples of this. */ |
6908 | else if (GET_CODE (target) == PARALLEL) |
6909 | { |
6910 | if (GET_CODE (temp) == PARALLEL) |
6911 | emit_group_move (dst: target, src: temp); |
6912 | else |
6913 | emit_group_load (dst: target, src: temp, TREE_TYPE (exp), |
6914 | ssize: int_size_in_bytes (TREE_TYPE (exp))); |
6915 | } |
6916 | else if (GET_CODE (temp) == PARALLEL) |
6917 | emit_group_store (orig_dst: target, src: temp, TREE_TYPE (exp), |
6918 | ssize: int_size_in_bytes (TREE_TYPE (exp))); |
6919 | else if (GET_MODE (temp) == BLKmode) |
6920 | emit_block_move (x: target, y: temp, size: expr_size (exp), |
6921 | method: (call_param_p |
6922 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
6923 | /* If we emit a nontemporal store, there is nothing else to do. */ |
6924 | else if (nontemporal && emit_storent_insn (to: target, from: temp)) |
6925 | ; |
6926 | else |
6927 | { |
6928 | if (reverse) |
6929 | temp = flip_storage_order (GET_MODE (target), temp); |
6930 | temp = force_operand (temp, target); |
6931 | if (temp != target) |
6932 | emit_move_insn (x: target, y: temp); |
6933 | } |
6934 | } |
6935 | else |
6936 | gcc_assert (!shortened_string_cst); |
6937 | |
6938 | return NULL_RTX; |
6939 | } |
6940 | |
6941 | /* Return true if field F of structure TYPE is a flexible array. */ |
6942 | |
6943 | static bool |
6944 | flexible_array_member_p (const_tree f, const_tree type) |
6945 | { |
6946 | const_tree tf; |
6947 | |
6948 | tf = TREE_TYPE (f); |
6949 | return (DECL_CHAIN (f) == NULL |
6950 | && TREE_CODE (tf) == ARRAY_TYPE |
6951 | && TYPE_DOMAIN (tf) |
6952 | && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) |
6953 | && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) |
6954 | && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) |
6955 | && int_size_in_bytes (type) >= 0); |
6956 | } |
6957 | |
6958 | /* If FOR_CTOR_P, return the number of top-level elements that a constructor |
6959 | must have in order for it to completely initialize a value of type TYPE. |
6960 | Return -1 if the number isn't known. |
6961 | |
6962 | If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */ |
6963 | |
6964 | static HOST_WIDE_INT |
6965 | count_type_elements (const_tree type, bool for_ctor_p) |
6966 | { |
6967 | switch (TREE_CODE (type)) |
6968 | { |
6969 | case ARRAY_TYPE: |
6970 | { |
6971 | tree nelts; |
6972 | |
6973 | nelts = array_type_nelts (type); |
6974 | if (nelts && tree_fits_uhwi_p (nelts)) |
6975 | { |
6976 | unsigned HOST_WIDE_INT n; |
6977 | |
6978 | n = tree_to_uhwi (nelts) + 1; |
6979 | if (n == 0 || for_ctor_p) |
6980 | return n; |
6981 | else |
6982 | return n * count_type_elements (TREE_TYPE (type), for_ctor_p: false); |
6983 | } |
6984 | return for_ctor_p ? -1 : 1; |
6985 | } |
6986 | |
6987 | case RECORD_TYPE: |
6988 | { |
6989 | unsigned HOST_WIDE_INT n; |
6990 | tree f; |
6991 | |
6992 | n = 0; |
6993 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) |
6994 | if (TREE_CODE (f) == FIELD_DECL) |
6995 | { |
6996 | if (!for_ctor_p) |
6997 | n += count_type_elements (TREE_TYPE (f), for_ctor_p: false); |
6998 | else if (!flexible_array_member_p (f, type)) |
6999 | /* Don't count flexible arrays, which are not supposed |
7000 | to be initialized. */ |
7001 | n += 1; |
7002 | } |
7003 | |
7004 | return n; |
7005 | } |
7006 | |
7007 | case UNION_TYPE: |
7008 | case QUAL_UNION_TYPE: |
7009 | { |
7010 | tree f; |
7011 | HOST_WIDE_INT n, m; |
7012 | |
7013 | gcc_assert (!for_ctor_p); |
7014 | /* Estimate the number of scalars in each field and pick the |
7015 | maximum. Other estimates would do instead; the idea is simply |
7016 | to make sure that the estimate is not sensitive to the ordering |
7017 | of the fields. */ |
7018 | n = 1; |
7019 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) |
7020 | if (TREE_CODE (f) == FIELD_DECL) |
7021 | { |
7022 | m = count_type_elements (TREE_TYPE (f), for_ctor_p: false); |
7023 | /* If the field doesn't span the whole union, add an extra |
7024 | scalar for the rest. */ |
7025 | if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)), |
7026 | TYPE_SIZE (type)) != 1) |
7027 | m++; |
7028 | if (n < m) |
7029 | n = m; |
7030 | } |
7031 | return n; |
7032 | } |
7033 | |
7034 | case COMPLEX_TYPE: |
7035 | return 2; |
7036 | |
7037 | case VECTOR_TYPE: |
7038 | { |
7039 | unsigned HOST_WIDE_INT nelts; |
7040 | if (TYPE_VECTOR_SUBPARTS (node: type).is_constant (const_value: &nelts)) |
7041 | return nelts; |
7042 | else |
7043 | return -1; |
7044 | } |
7045 | |
7046 | case INTEGER_TYPE: |
7047 | case REAL_TYPE: |
7048 | case FIXED_POINT_TYPE: |
7049 | case ENUMERAL_TYPE: |
7050 | case BOOLEAN_TYPE: |
7051 | case POINTER_TYPE: |
7052 | case OFFSET_TYPE: |
7053 | case REFERENCE_TYPE: |
7054 | case NULLPTR_TYPE: |
7055 | case OPAQUE_TYPE: |
7056 | case BITINT_TYPE: |
7057 | return 1; |
7058 | |
7059 | case ERROR_MARK: |
7060 | return 0; |
7061 | |
7062 | case VOID_TYPE: |
7063 | case METHOD_TYPE: |
7064 | case FUNCTION_TYPE: |
7065 | case LANG_TYPE: |
7066 | default: |
7067 | gcc_unreachable (); |
7068 | } |
7069 | } |
7070 | |
7071 | /* Helper for categorize_ctor_elements. Identical interface. */ |
7072 | |
7073 | static bool |
7074 | categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
7075 | HOST_WIDE_INT *p_unique_nz_elts, |
7076 | HOST_WIDE_INT *p_init_elts, bool *p_complete) |
7077 | { |
7078 | unsigned HOST_WIDE_INT idx; |
7079 | HOST_WIDE_INT nz_elts, unique_nz_elts, init_elts, num_fields; |
7080 | tree value, purpose, elt_type; |
7081 | |
7082 | /* Whether CTOR is a valid constant initializer, in accordance with what |
7083 | initializer_constant_valid_p does. If inferred from the constructor |
7084 | elements, true until proven otherwise. */ |
7085 | bool const_from_elts_p = constructor_static_from_elts_p (ctor); |
7086 | bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor); |
7087 | |
7088 | nz_elts = 0; |
7089 | unique_nz_elts = 0; |
7090 | init_elts = 0; |
7091 | num_fields = 0; |
7092 | elt_type = NULL_TREE; |
7093 | |
7094 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value) |
7095 | { |
7096 | HOST_WIDE_INT mult = 1; |
7097 | |
7098 | if (purpose && TREE_CODE (purpose) == RANGE_EXPR) |
7099 | { |
7100 | tree lo_index = TREE_OPERAND (purpose, 0); |
7101 | tree hi_index = TREE_OPERAND (purpose, 1); |
7102 | |
7103 | if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index)) |
7104 | mult = (tree_to_uhwi (hi_index) |
7105 | - tree_to_uhwi (lo_index) + 1); |
7106 | } |
7107 | num_fields += mult; |
7108 | elt_type = TREE_TYPE (value); |
7109 | |
7110 | switch (TREE_CODE (value)) |
7111 | { |
7112 | case CONSTRUCTOR: |
7113 | { |
7114 | HOST_WIDE_INT nz = 0, unz = 0, ic = 0; |
7115 | |
7116 | bool const_elt_p = categorize_ctor_elements_1 (ctor: value, p_nz_elts: &nz, p_unique_nz_elts: &unz, |
7117 | p_init_elts: &ic, p_complete); |
7118 | |
7119 | nz_elts += mult * nz; |
7120 | unique_nz_elts += unz; |
7121 | init_elts += mult * ic; |
7122 | |
7123 | if (const_from_elts_p && const_p) |
7124 | const_p = const_elt_p; |
7125 | } |
7126 | break; |
7127 | |
7128 | case INTEGER_CST: |
7129 | case REAL_CST: |
7130 | case FIXED_CST: |
7131 | if (!initializer_zerop (value)) |
7132 | { |
7133 | nz_elts += mult; |
7134 | unique_nz_elts++; |
7135 | } |
7136 | init_elts += mult; |
7137 | break; |
7138 | |
7139 | case STRING_CST: |
7140 | nz_elts += mult * TREE_STRING_LENGTH (value); |
7141 | unique_nz_elts += TREE_STRING_LENGTH (value); |
7142 | init_elts += mult * TREE_STRING_LENGTH (value); |
7143 | break; |
7144 | |
7145 | case COMPLEX_CST: |
7146 | if (!initializer_zerop (TREE_REALPART (value))) |
7147 | { |
7148 | nz_elts += mult; |
7149 | unique_nz_elts++; |
7150 | } |
7151 | if (!initializer_zerop (TREE_IMAGPART (value))) |
7152 | { |
7153 | nz_elts += mult; |
7154 | unique_nz_elts++; |
7155 | } |
7156 | init_elts += 2 * mult; |
7157 | break; |
7158 | |
7159 | case VECTOR_CST: |
7160 | { |
7161 | /* We can only construct constant-length vectors using |
7162 | CONSTRUCTOR. */ |
7163 | unsigned int nunits = VECTOR_CST_NELTS (value).to_constant (); |
7164 | for (unsigned int i = 0; i < nunits; ++i) |
7165 | { |
7166 | tree v = VECTOR_CST_ELT (value, i); |
7167 | if (!initializer_zerop (v)) |
7168 | { |
7169 | nz_elts += mult; |
7170 | unique_nz_elts++; |
7171 | } |
7172 | init_elts += mult; |
7173 | } |
7174 | } |
7175 | break; |
7176 | |
7177 | default: |
7178 | { |
7179 | HOST_WIDE_INT tc = count_type_elements (type: elt_type, for_ctor_p: false); |
7180 | nz_elts += mult * tc; |
7181 | unique_nz_elts += tc; |
7182 | init_elts += mult * tc; |
7183 | |
7184 | if (const_from_elts_p && const_p) |
7185 | const_p |
7186 | = initializer_constant_valid_p (value, |
7187 | elt_type, |
7188 | TYPE_REVERSE_STORAGE_ORDER |
7189 | (TREE_TYPE (ctor))) |
7190 | != NULL_TREE; |
7191 | } |
7192 | break; |
7193 | } |
7194 | } |
7195 | |
7196 | if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor), |
7197 | num_fields, elt_type)) |
7198 | *p_complete = false; |
7199 | |
7200 | *p_nz_elts += nz_elts; |
7201 | *p_unique_nz_elts += unique_nz_elts; |
7202 | *p_init_elts += init_elts; |
7203 | |
7204 | return const_p; |
7205 | } |
7206 | |
7207 | /* Examine CTOR to discover: |
7208 | * how many scalar fields are set to nonzero values, |
7209 | and place it in *P_NZ_ELTS; |
7210 | * the same, but counting RANGE_EXPRs as multiplier of 1 instead of |
7211 | high - low + 1 (this can be useful for callers to determine ctors |
7212 | that could be cheaply initialized with - perhaps nested - loops |
7213 | compared to copied from huge read-only data), |
7214 | and place it in *P_UNIQUE_NZ_ELTS; |
7215 | * how many scalar fields in total are in CTOR, |
7216 | and place it in *P_ELT_COUNT. |
7217 | * whether the constructor is complete -- in the sense that every |
7218 | meaningful byte is explicitly given a value -- |
7219 | and place it in *P_COMPLETE. |
7220 | |
7221 | Return whether or not CTOR is a valid static constant initializer, the same |
7222 | as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ |
7223 | |
7224 | bool |
7225 | categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts, |
7226 | HOST_WIDE_INT *p_unique_nz_elts, |
7227 | HOST_WIDE_INT *p_init_elts, bool *p_complete) |
7228 | { |
7229 | *p_nz_elts = 0; |
7230 | *p_unique_nz_elts = 0; |
7231 | *p_init_elts = 0; |
7232 | *p_complete = true; |
7233 | |
7234 | return categorize_ctor_elements_1 (ctor, p_nz_elts, p_unique_nz_elts, |
7235 | p_init_elts, p_complete); |
7236 | } |
7237 | |
7238 | /* Return true if constructor CTOR is simple enough to be materialized |
7239 | in an integer mode register. Limit the size to WORDS words, which |
7240 | is 1 by default. */ |
7241 | |
7242 | bool |
7243 | immediate_const_ctor_p (const_tree ctor, unsigned int words) |
7244 | { |
7245 | /* Allow function to be called with a VAR_DECL's DECL_INITIAL. */ |
7246 | if (!ctor || TREE_CODE (ctor) != CONSTRUCTOR) |
7247 | return false; |
7248 | |
7249 | return TREE_CONSTANT (ctor) |
7250 | && !TREE_ADDRESSABLE (ctor) |
7251 | && CONSTRUCTOR_NELTS (ctor) |
7252 | && TREE_CODE (TREE_TYPE (ctor)) != ARRAY_TYPE |
7253 | && int_expr_size (exp: ctor) <= words * UNITS_PER_WORD |
7254 | && initializer_constant_valid_for_bitfield_p (ctor); |
7255 | } |
7256 | |
7257 | /* TYPE is initialized by a constructor with NUM_ELTS elements, the last |
7258 | of which had type LAST_TYPE. Each element was itself a complete |
7259 | initializer, in the sense that every meaningful byte was explicitly |
7260 | given a value. Return true if the same is true for the constructor |
7261 | as a whole. */ |
7262 | |
7263 | bool |
7264 | complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts, |
7265 | const_tree last_type) |
7266 | { |
7267 | if (TREE_CODE (type) == UNION_TYPE |
7268 | || TREE_CODE (type) == QUAL_UNION_TYPE) |
7269 | { |
7270 | if (num_elts == 0) |
7271 | return false; |
7272 | |
7273 | gcc_assert (num_elts == 1 && last_type); |
7274 | |
7275 | /* ??? We could look at each element of the union, and find the |
7276 | largest element. Which would avoid comparing the size of the |
7277 | initialized element against any tail padding in the union. |
7278 | Doesn't seem worth the effort... */ |
7279 | return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1; |
7280 | } |
7281 | |
7282 | return count_type_elements (type, for_ctor_p: true) == num_elts; |
7283 | } |
7284 | |
7285 | /* Return true if EXP contains mostly (3/4) zeros. */ |
7286 | |
7287 | static bool |
7288 | mostly_zeros_p (const_tree exp) |
7289 | { |
7290 | if (TREE_CODE (exp) == CONSTRUCTOR) |
7291 | { |
7292 | HOST_WIDE_INT nz_elts, unz_elts, init_elts; |
7293 | bool complete_p; |
7294 | |
7295 | categorize_ctor_elements (ctor: exp, p_nz_elts: &nz_elts, p_unique_nz_elts: &unz_elts, p_init_elts: &init_elts, |
7296 | p_complete: &complete_p); |
7297 | return !complete_p || nz_elts < init_elts / 4; |
7298 | } |
7299 | |
7300 | return initializer_zerop (exp); |
7301 | } |
7302 | |
7303 | /* Return true if EXP contains all zeros. */ |
7304 | |
7305 | static bool |
7306 | all_zeros_p (const_tree exp) |
7307 | { |
7308 | if (TREE_CODE (exp) == CONSTRUCTOR) |
7309 | { |
7310 | HOST_WIDE_INT nz_elts, unz_elts, init_elts; |
7311 | bool complete_p; |
7312 | |
7313 | categorize_ctor_elements (ctor: exp, p_nz_elts: &nz_elts, p_unique_nz_elts: &unz_elts, p_init_elts: &init_elts, |
7314 | p_complete: &complete_p); |
7315 | return nz_elts == 0; |
7316 | } |
7317 | |
7318 | return initializer_zerop (exp); |
7319 | } |
7320 | |
7321 | /* Helper function for store_constructor. |
7322 | TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field. |
7323 | CLEARED is as for store_constructor. |
7324 | ALIAS_SET is the alias set to use for any stores. |
7325 | If REVERSE is true, the store is to be done in reverse order. |
7326 | |
7327 | This provides a recursive shortcut back to store_constructor when it isn't |
7328 | necessary to go through store_field. This is so that we can pass through |
7329 | the cleared field to let store_constructor know that we may not have to |
7330 | clear a substructure if the outer structure has already been cleared. */ |
7331 | |
7332 | static void |
7333 | store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos, |
7334 | poly_uint64 bitregion_start, |
7335 | poly_uint64 bitregion_end, |
7336 | machine_mode mode, |
7337 | tree exp, int cleared, |
7338 | alias_set_type alias_set, bool reverse) |
7339 | { |
7340 | poly_int64 bytepos; |
7341 | poly_uint64 bytesize; |
7342 | if (TREE_CODE (exp) == CONSTRUCTOR |
7343 | /* We can only call store_constructor recursively if the size and |
7344 | bit position are on a byte boundary. */ |
7345 | && multiple_p (a: bitpos, BITS_PER_UNIT, multiple: &bytepos) |
7346 | && maybe_ne (a: bitsize, b: 0U) |
7347 | && multiple_p (a: bitsize, BITS_PER_UNIT, multiple: &bytesize) |
7348 | /* If we have a nonzero bitpos for a register target, then we just |
7349 | let store_field do the bitfield handling. This is unlikely to |
7350 | generate unnecessary clear instructions anyways. */ |
7351 | && (known_eq (bitpos, 0) || MEM_P (target))) |
7352 | { |
7353 | if (MEM_P (target)) |
7354 | { |
7355 | machine_mode target_mode = GET_MODE (target); |
7356 | if (target_mode != BLKmode |
7357 | && !multiple_p (a: bitpos, GET_MODE_ALIGNMENT (target_mode))) |
7358 | target_mode = BLKmode; |
7359 | target = adjust_address (target, target_mode, bytepos); |
7360 | } |
7361 | |
7362 | |
7363 | /* Update the alias set, if required. */ |
7364 | if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target) |
7365 | && MEM_ALIAS_SET (target) != 0) |
7366 | { |
7367 | target = copy_rtx (target); |
7368 | set_mem_alias_set (target, alias_set); |
7369 | } |
7370 | |
7371 | store_constructor (exp, target, cleared, bytesize, reverse); |
7372 | } |
7373 | else |
7374 | store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode, |
7375 | exp, alias_set, false, reverse); |
7376 | } |
7377 | |
7378 | |
7379 | /* Returns the number of FIELD_DECLs in TYPE. */ |
7380 | |
7381 | static int |
7382 | fields_length (const_tree type) |
7383 | { |
7384 | tree t = TYPE_FIELDS (type); |
7385 | int count = 0; |
7386 | |
7387 | for (; t; t = DECL_CHAIN (t)) |
7388 | if (TREE_CODE (t) == FIELD_DECL) |
7389 | ++count; |
7390 | |
7391 | return count; |
7392 | } |
7393 | |
7394 | |
7395 | /* Store the value of constructor EXP into the rtx TARGET. |
7396 | TARGET is either a REG or a MEM; we know it cannot conflict, since |
7397 | safe_from_p has been called. |
7398 | CLEARED is true if TARGET is known to have been zero'd. |
7399 | SIZE is the number of bytes of TARGET we are allowed to modify: this |
7400 | may not be the same as the size of EXP if we are assigning to a field |
7401 | which has been packed to exclude padding bits. |
7402 | If REVERSE is true, the store is to be done in reverse order. */ |
7403 | |
7404 | void |
7405 | store_constructor (tree exp, rtx target, int cleared, poly_int64 size, |
7406 | bool reverse) |
7407 | { |
7408 | tree type = TREE_TYPE (exp); |
7409 | HOST_WIDE_INT exp_size = int_size_in_bytes (type); |
7410 | poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0; |
7411 | |
7412 | switch (TREE_CODE (type)) |
7413 | { |
7414 | case RECORD_TYPE: |
7415 | case UNION_TYPE: |
7416 | case QUAL_UNION_TYPE: |
7417 | { |
7418 | unsigned HOST_WIDE_INT idx; |
7419 | tree field, value; |
7420 | |
7421 | /* The storage order is specified for every aggregate type. */ |
7422 | reverse = TYPE_REVERSE_STORAGE_ORDER (type); |
7423 | |
7424 | /* If size is zero or the target is already cleared, do nothing. */ |
7425 | if (known_eq (size, 0) || cleared) |
7426 | cleared = 1; |
7427 | /* We either clear the aggregate or indicate the value is dead. */ |
7428 | else if ((TREE_CODE (type) == UNION_TYPE |
7429 | || TREE_CODE (type) == QUAL_UNION_TYPE) |
7430 | && ! CONSTRUCTOR_ELTS (exp)) |
7431 | /* If the constructor is empty, clear the union. */ |
7432 | { |
7433 | clear_storage (object: target, size: expr_size (exp), method: BLOCK_OP_NORMAL); |
7434 | cleared = 1; |
7435 | } |
7436 | |
7437 | /* If we are building a static constructor into a register, |
7438 | set the initial value as zero so we can fold the value into |
7439 | a constant. But if more than one register is involved, |
7440 | this probably loses. */ |
7441 | else if (REG_P (target) && TREE_STATIC (exp) |
7442 | && known_le (GET_MODE_SIZE (GET_MODE (target)), |
7443 | REGMODE_NATURAL_SIZE (GET_MODE (target)))) |
7444 | { |
7445 | emit_move_insn (x: target, CONST0_RTX (GET_MODE (target))); |
7446 | cleared = 1; |
7447 | } |
7448 | |
7449 | /* If the constructor has fewer fields than the structure or |
7450 | if we are initializing the structure to mostly zeros, clear |
7451 | the whole structure first. Don't do this if TARGET is a |
7452 | register whose mode size isn't equal to SIZE since |
7453 | clear_storage can't handle this case. */ |
7454 | else if (known_size_p (a: size) |
7455 | && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type)) |
7456 | || mostly_zeros_p (exp)) |
7457 | && (!REG_P (target) |
7458 | || known_eq (GET_MODE_SIZE (GET_MODE (target)), size))) |
7459 | { |
7460 | clear_storage (object: target, size: gen_int_mode (size, Pmode), |
7461 | method: BLOCK_OP_NORMAL); |
7462 | cleared = 1; |
7463 | } |
7464 | |
7465 | if (REG_P (target) && !cleared) |
7466 | emit_clobber (target); |
7467 | |
7468 | /* Store each element of the constructor into the |
7469 | corresponding field of TARGET. */ |
7470 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value) |
7471 | { |
7472 | machine_mode mode; |
7473 | HOST_WIDE_INT bitsize; |
7474 | HOST_WIDE_INT bitpos = 0; |
7475 | tree offset; |
7476 | rtx to_rtx = target; |
7477 | |
7478 | /* Just ignore missing fields. We cleared the whole |
7479 | structure, above, if any fields are missing. */ |
7480 | if (field == 0) |
7481 | continue; |
7482 | |
7483 | if (cleared && initializer_zerop (value)) |
7484 | continue; |
7485 | |
7486 | if (tree_fits_uhwi_p (DECL_SIZE (field))) |
7487 | bitsize = tree_to_uhwi (DECL_SIZE (field)); |
7488 | else |
7489 | gcc_unreachable (); |
7490 | |
7491 | mode = DECL_MODE (field); |
7492 | if (DECL_BIT_FIELD (field)) |
7493 | mode = VOIDmode; |
7494 | |
7495 | offset = DECL_FIELD_OFFSET (field); |
7496 | if (tree_fits_shwi_p (offset) |
7497 | && tree_fits_shwi_p (bit_position (field))) |
7498 | { |
7499 | bitpos = int_bit_position (field); |
7500 | offset = NULL_TREE; |
7501 | } |
7502 | else |
7503 | gcc_unreachable (); |
7504 | |
7505 | /* If this initializes a field that is smaller than a |
7506 | word, at the start of a word, try to widen it to a full |
7507 | word. This special case allows us to output C++ member |
7508 | function initializations in a form that the optimizers |
7509 | can understand. */ |
7510 | if (WORD_REGISTER_OPERATIONS |
7511 | && REG_P (target) |
7512 | && bitsize < BITS_PER_WORD |
7513 | && bitpos % BITS_PER_WORD == 0 |
7514 | && GET_MODE_CLASS (mode) == MODE_INT |
7515 | && TREE_CODE (value) == INTEGER_CST |
7516 | && exp_size >= 0 |
7517 | && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT) |
7518 | { |
7519 | type = TREE_TYPE (value); |
7520 | |
7521 | if (TYPE_PRECISION (type) < BITS_PER_WORD) |
7522 | { |
7523 | type = lang_hooks.types.type_for_mode |
7524 | (word_mode, TYPE_UNSIGNED (type)); |
7525 | value = fold_convert (type, value); |
7526 | /* Make sure the bits beyond the original bitsize are zero |
7527 | so that we can correctly avoid extra zeroing stores in |
7528 | later constructor elements. */ |
7529 | tree bitsize_mask |
7530 | = wide_int_to_tree (type, cst: wi::mask (width: bitsize, negate_p: false, |
7531 | BITS_PER_WORD)); |
7532 | value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask); |
7533 | } |
7534 | |
7535 | if (BYTES_BIG_ENDIAN) |
7536 | value |
7537 | = fold_build2 (LSHIFT_EXPR, type, value, |
7538 | build_int_cst (type, |
7539 | BITS_PER_WORD - bitsize)); |
7540 | bitsize = BITS_PER_WORD; |
7541 | mode = word_mode; |
7542 | } |
7543 | |
7544 | if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx) |
7545 | && DECL_NONADDRESSABLE_P (field)) |
7546 | { |
7547 | to_rtx = copy_rtx (to_rtx); |
7548 | MEM_KEEP_ALIAS_SET_P (to_rtx) = 1; |
7549 | } |
7550 | |
7551 | store_constructor_field (target: to_rtx, bitsize, bitpos, |
7552 | bitregion_start: 0, bitregion_end, mode, |
7553 | exp: value, cleared, |
7554 | alias_set: get_alias_set (TREE_TYPE (field)), |
7555 | reverse); |
7556 | } |
7557 | break; |
7558 | } |
7559 | case ARRAY_TYPE: |
7560 | { |
7561 | tree value, index; |
7562 | unsigned HOST_WIDE_INT i; |
7563 | bool need_to_clear; |
7564 | tree domain; |
7565 | tree elttype = TREE_TYPE (type); |
7566 | bool const_bounds_p; |
7567 | HOST_WIDE_INT minelt = 0; |
7568 | HOST_WIDE_INT maxelt = 0; |
7569 | |
7570 | /* The storage order is specified for every aggregate type. */ |
7571 | reverse = TYPE_REVERSE_STORAGE_ORDER (type); |
7572 | |
7573 | domain = TYPE_DOMAIN (type); |
7574 | const_bounds_p = (TYPE_MIN_VALUE (domain) |
7575 | && TYPE_MAX_VALUE (domain) |
7576 | && tree_fits_shwi_p (TYPE_MIN_VALUE (domain)) |
7577 | && tree_fits_shwi_p (TYPE_MAX_VALUE (domain))); |
7578 | |
7579 | /* If we have constant bounds for the range of the type, get them. */ |
7580 | if (const_bounds_p) |
7581 | { |
7582 | minelt = tree_to_shwi (TYPE_MIN_VALUE (domain)); |
7583 | maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain)); |
7584 | } |
7585 | |
7586 | /* If the constructor has fewer elements than the array, clear |
7587 | the whole array first. Similarly if this is static |
7588 | constructor of a non-BLKmode object. */ |
7589 | if (cleared) |
7590 | need_to_clear = false; |
7591 | else if (REG_P (target) && TREE_STATIC (exp)) |
7592 | need_to_clear = true; |
7593 | else |
7594 | { |
7595 | unsigned HOST_WIDE_INT idx; |
7596 | HOST_WIDE_INT count = 0, zero_count = 0; |
7597 | need_to_clear = ! const_bounds_p; |
7598 | |
7599 | /* This loop is a more accurate version of the loop in |
7600 | mostly_zeros_p (it handles RANGE_EXPR in an index). It |
7601 | is also needed to check for missing elements. */ |
7602 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value) |
7603 | { |
7604 | HOST_WIDE_INT this_node_count; |
7605 | |
7606 | if (need_to_clear) |
7607 | break; |
7608 | |
7609 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
7610 | { |
7611 | tree lo_index = TREE_OPERAND (index, 0); |
7612 | tree hi_index = TREE_OPERAND (index, 1); |
7613 | |
7614 | if (! tree_fits_uhwi_p (lo_index) |
7615 | || ! tree_fits_uhwi_p (hi_index)) |
7616 | { |
7617 | need_to_clear = true; |
7618 | break; |
7619 | } |
7620 | |
7621 | this_node_count = (tree_to_uhwi (hi_index) |
7622 | - tree_to_uhwi (lo_index) + 1); |
7623 | } |
7624 | else |
7625 | this_node_count = 1; |
7626 | |
7627 | count += this_node_count; |
7628 | if (mostly_zeros_p (exp: value)) |
7629 | zero_count += this_node_count; |
7630 | } |
7631 | |
7632 | /* Clear the entire array first if there are any missing |
7633 | elements, or if the incidence of zero elements is >= |
7634 | 75%. */ |
7635 | if (! need_to_clear |
7636 | && (count < maxelt - minelt + 1 |
7637 | || 4 * zero_count >= 3 * count)) |
7638 | need_to_clear = true; |
7639 | } |
7640 | |
7641 | if (need_to_clear && maybe_gt (size, 0)) |
7642 | { |
7643 | if (REG_P (target)) |
7644 | emit_move_insn (x: target, CONST0_RTX (GET_MODE (target))); |
7645 | else |
7646 | clear_storage (object: target, size: gen_int_mode (size, Pmode), |
7647 | method: BLOCK_OP_NORMAL); |
7648 | cleared = 1; |
7649 | } |
7650 | |
7651 | if (!cleared && REG_P (target)) |
7652 | /* Inform later passes that the old value is dead. */ |
7653 | emit_clobber (target); |
7654 | |
7655 | /* Store each element of the constructor into the |
7656 | corresponding element of TARGET, determined by counting the |
7657 | elements. */ |
7658 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value) |
7659 | { |
7660 | machine_mode mode; |
7661 | poly_int64 bitsize; |
7662 | HOST_WIDE_INT bitpos; |
7663 | rtx xtarget = target; |
7664 | |
7665 | if (cleared && initializer_zerop (value)) |
7666 | continue; |
7667 | |
7668 | mode = TYPE_MODE (elttype); |
7669 | if (mode != BLKmode) |
7670 | bitsize = GET_MODE_BITSIZE (mode); |
7671 | else if (!poly_int_tree_p (TYPE_SIZE (elttype), value: &bitsize)) |
7672 | bitsize = -1; |
7673 | |
7674 | if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) |
7675 | { |
7676 | tree lo_index = TREE_OPERAND (index, 0); |
7677 | tree hi_index = TREE_OPERAND (index, 1); |
7678 | rtx index_r, pos_rtx; |
7679 | HOST_WIDE_INT lo, hi, count; |
7680 | tree position; |
7681 | |
7682 | /* If the range is constant and "small", unroll the loop. */ |
7683 | if (const_bounds_p |
7684 | && tree_fits_shwi_p (lo_index) |
7685 | && tree_fits_shwi_p (hi_index) |
7686 | && (lo = tree_to_shwi (lo_index), |
7687 | hi = tree_to_shwi (hi_index), |
7688 | count = hi - lo + 1, |
7689 | (!MEM_P (target) |
7690 | || count <= 2 |
7691 | || (tree_fits_uhwi_p (TYPE_SIZE (elttype)) |
7692 | && (tree_to_uhwi (TYPE_SIZE (elttype)) * count |
7693 | <= 40 * 8))))) |
7694 | { |
7695 | lo -= minelt; hi -= minelt; |
7696 | for (; lo <= hi; lo++) |
7697 | { |
7698 | bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype)); |
7699 | |
7700 | if (MEM_P (target) |
7701 | && !MEM_KEEP_ALIAS_SET_P (target) |
7702 | && TREE_CODE (type) == ARRAY_TYPE |
7703 | && TYPE_NONALIASED_COMPONENT (type)) |
7704 | { |
7705 | target = copy_rtx (target); |
7706 | MEM_KEEP_ALIAS_SET_P (target) = 1; |
7707 | } |
7708 | |
7709 | store_constructor_field |
7710 | (target, bitsize, bitpos, bitregion_start: 0, bitregion_end, |
7711 | mode, exp: value, cleared, |
7712 | alias_set: get_alias_set (elttype), reverse); |
7713 | } |
7714 | } |
7715 | else |
7716 | { |
7717 | rtx_code_label *loop_start = gen_label_rtx (); |
7718 | rtx_code_label *loop_end = gen_label_rtx (); |
7719 | tree exit_cond; |
7720 | |
7721 | expand_normal (exp: hi_index); |
7722 | |
7723 | index = build_decl (EXPR_LOCATION (exp), |
7724 | VAR_DECL, NULL_TREE, domain); |
7725 | index_r = gen_reg_rtx (promote_decl_mode (index, NULL)); |
7726 | SET_DECL_RTL (index, index_r); |
7727 | store_expr (exp: lo_index, target: index_r, call_param_p: 0, nontemporal: false, reverse); |
7728 | |
7729 | /* Build the head of the loop. */ |
7730 | do_pending_stack_adjust (); |
7731 | emit_label (loop_start); |
7732 | |
7733 | /* Assign value to element index. */ |
7734 | position = |
7735 | fold_convert (ssizetype, |
7736 | fold_build2 (MINUS_EXPR, |
7737 | TREE_TYPE (index), |
7738 | index, |
7739 | TYPE_MIN_VALUE (domain))); |
7740 | |
7741 | position = |
7742 | size_binop (MULT_EXPR, position, |
7743 | fold_convert (ssizetype, |
7744 | TYPE_SIZE_UNIT (elttype))); |
7745 | |
7746 | pos_rtx = expand_normal (exp: position); |
7747 | xtarget = offset_address (target, pos_rtx, |
7748 | highest_pow2_factor (position)); |
7749 | xtarget = adjust_address (xtarget, mode, 0); |
7750 | if (TREE_CODE (value) == CONSTRUCTOR) |
7751 | store_constructor (exp: value, target: xtarget, cleared, |
7752 | size: exact_div (a: bitsize, BITS_PER_UNIT), |
7753 | reverse); |
7754 | else |
7755 | store_expr (exp: value, target: xtarget, call_param_p: 0, nontemporal: false, reverse); |
7756 | |
7757 | /* Generate a conditional jump to exit the loop. */ |
7758 | exit_cond = build2 (LT_EXPR, integer_type_node, |
7759 | index, hi_index); |
7760 | jumpif (exp: exit_cond, label: loop_end, |
7761 | prob: profile_probability::uninitialized ()); |
7762 | |
7763 | /* Update the loop counter, and jump to the head of |
7764 | the loop. */ |
7765 | expand_assignment (to: index, |
7766 | from: build2 (PLUS_EXPR, TREE_TYPE (index), |
7767 | index, integer_one_node), |
7768 | nontemporal: false); |
7769 | |
7770 | emit_jump (loop_start); |
7771 | |
7772 | /* Build the end of the loop. */ |
7773 | emit_label (loop_end); |
7774 | } |
7775 | } |
7776 | else if ((index != 0 && ! tree_fits_shwi_p (index)) |
7777 | || ! tree_fits_uhwi_p (TYPE_SIZE (elttype))) |
7778 | { |
7779 | tree position; |
7780 | |
7781 | if (index == 0) |
7782 | index = ssize_int (1); |
7783 | |
7784 | if (minelt) |
7785 | index = fold_convert (ssizetype, |
7786 | fold_build2 (MINUS_EXPR, |
7787 | TREE_TYPE (index), |
7788 | index, |
7789 | TYPE_MIN_VALUE (domain))); |
7790 | |
7791 | position = |
7792 | size_binop (MULT_EXPR, index, |
7793 | fold_convert (ssizetype, |
7794 | TYPE_SIZE_UNIT (elttype))); |
7795 | xtarget = offset_address (target, |
7796 | expand_normal (exp: position), |
7797 | highest_pow2_factor (position)); |
7798 | xtarget = adjust_address (xtarget, mode, 0); |
7799 | store_expr (exp: value, target: xtarget, call_param_p: 0, nontemporal: false, reverse); |
7800 | } |
7801 | else |
7802 | { |
7803 | if (index != 0) |
7804 | bitpos = ((tree_to_shwi (index) - minelt) |
7805 | * tree_to_uhwi (TYPE_SIZE (elttype))); |
7806 | else |
7807 | bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype))); |
7808 | |
7809 | if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target) |
7810 | && TREE_CODE (type) == ARRAY_TYPE |
7811 | && TYPE_NONALIASED_COMPONENT (type)) |
7812 | { |
7813 | target = copy_rtx (target); |
7814 | MEM_KEEP_ALIAS_SET_P (target) = 1; |
7815 | } |
7816 | store_constructor_field (target, bitsize, bitpos, bitregion_start: 0, |
7817 | bitregion_end, mode, exp: value, |
7818 | cleared, alias_set: get_alias_set (elttype), |
7819 | reverse); |
7820 | } |
7821 | } |
7822 | break; |
7823 | } |
7824 | |
7825 | case VECTOR_TYPE: |
7826 | { |
7827 | unsigned HOST_WIDE_INT idx; |
7828 | constructor_elt *ce; |
7829 | int i; |
7830 | bool need_to_clear; |
7831 | insn_code icode = CODE_FOR_nothing; |
7832 | tree elt; |
7833 | tree elttype = TREE_TYPE (type); |
7834 | int elt_size = vector_element_bits (type); |
7835 | machine_mode eltmode = TYPE_MODE (elttype); |
7836 | HOST_WIDE_INT bitsize; |
7837 | HOST_WIDE_INT bitpos; |
7838 | rtvec vector = NULL; |
7839 | poly_uint64 n_elts; |
7840 | unsigned HOST_WIDE_INT const_n_elts; |
7841 | alias_set_type alias; |
7842 | bool vec_vec_init_p = false; |
7843 | machine_mode mode = GET_MODE (target); |
7844 | |
7845 | gcc_assert (eltmode != BLKmode); |
7846 | |
7847 | /* Try using vec_duplicate_optab for uniform vectors. */ |
7848 | if (!TREE_SIDE_EFFECTS (exp) |
7849 | && VECTOR_MODE_P (mode) |
7850 | && eltmode == GET_MODE_INNER (mode) |
7851 | && ((icode = optab_handler (op: vec_duplicate_optab, mode)) |
7852 | != CODE_FOR_nothing) |
7853 | && (elt = uniform_vector_p (exp)) |
7854 | && !VECTOR_TYPE_P (TREE_TYPE (elt))) |
7855 | { |
7856 | class expand_operand ops[2]; |
7857 | create_output_operand (op: &ops[0], x: target, mode); |
7858 | create_input_operand (op: &ops[1], value: expand_normal (exp: elt), mode: eltmode); |
7859 | expand_insn (icode, nops: 2, ops); |
7860 | if (!rtx_equal_p (target, ops[0].value)) |
7861 | emit_move_insn (x: target, y: ops[0].value); |
7862 | break; |
7863 | } |
7864 | /* Use sign-extension for uniform boolean vectors with |
7865 | integer modes and single-bit mask entries. |
7866 | Effectively "vec_duplicate" for bitmasks. */ |
7867 | if (elt_size == 1 |
7868 | && !TREE_SIDE_EFFECTS (exp) |
7869 | && VECTOR_BOOLEAN_TYPE_P (type) |
7870 | && SCALAR_INT_MODE_P (TYPE_MODE (type)) |
7871 | && (elt = uniform_vector_p (exp)) |
7872 | && !VECTOR_TYPE_P (TREE_TYPE (elt))) |
7873 | { |
7874 | rtx op0 = force_reg (TYPE_MODE (TREE_TYPE (elt)), |
7875 | expand_normal (exp: elt)); |
7876 | rtx tmp = gen_reg_rtx (mode); |
7877 | convert_move (to: tmp, from: op0, unsignedp: 0); |
7878 | |
7879 | /* Ensure no excess bits are set. |
7880 | GCN needs this for nunits < 64. |
7881 | x86 needs this for nunits < 8. */ |
7882 | auto nunits = TYPE_VECTOR_SUBPARTS (node: type).to_constant (); |
7883 | if (maybe_ne (a: GET_MODE_PRECISION (mode), b: nunits)) |
7884 | tmp = expand_binop (mode, and_optab, tmp, |
7885 | GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1), |
7886 | target, true, OPTAB_WIDEN); |
7887 | if (tmp != target) |
7888 | emit_move_insn (x: target, y: tmp); |
7889 | break; |
7890 | } |
7891 | |
7892 | n_elts = TYPE_VECTOR_SUBPARTS (node: type); |
7893 | if (REG_P (target) |
7894 | && VECTOR_MODE_P (mode) |
7895 | && n_elts.is_constant (const_value: &const_n_elts)) |
7896 | { |
7897 | machine_mode emode = eltmode; |
7898 | bool vector_typed_elts_p = false; |
7899 | |
7900 | if (CONSTRUCTOR_NELTS (exp) |
7901 | && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value)) |
7902 | == VECTOR_TYPE)) |
7903 | { |
7904 | tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value); |
7905 | gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp) |
7906 | * TYPE_VECTOR_SUBPARTS (etype), |
7907 | n_elts)); |
7908 | emode = TYPE_MODE (etype); |
7909 | vector_typed_elts_p = true; |
7910 | } |
7911 | icode = convert_optab_handler (op: vec_init_optab, to_mode: mode, from_mode: emode); |
7912 | if (icode != CODE_FOR_nothing) |
7913 | { |
7914 | unsigned int n = const_n_elts; |
7915 | |
7916 | if (vector_typed_elts_p) |
7917 | { |
7918 | n = CONSTRUCTOR_NELTS (exp); |
7919 | vec_vec_init_p = true; |
7920 | } |
7921 | vector = rtvec_alloc (n); |
7922 | for (unsigned int k = 0; k < n; k++) |
7923 | RTVEC_ELT (vector, k) = CONST0_RTX (emode); |
7924 | } |
7925 | } |
7926 | |
7927 | /* Compute the size of the elements in the CTOR. It differs |
7928 | from the size of the vector type elements only when the |
7929 | CTOR elements are vectors themselves. */ |
7930 | tree val_type = (CONSTRUCTOR_NELTS (exp) != 0 |
7931 | ? TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value) |
7932 | : elttype); |
7933 | if (VECTOR_TYPE_P (val_type)) |
7934 | bitsize = tree_to_uhwi (TYPE_SIZE (val_type)); |
7935 | else |
7936 | bitsize = elt_size; |
7937 | |
7938 | /* If the constructor has fewer elements than the vector, |
7939 | clear the whole array first. Similarly if this is static |
7940 | constructor of a non-BLKmode object. */ |
7941 | if (cleared) |
7942 | need_to_clear = false; |
7943 | else if (REG_P (target) && TREE_STATIC (exp)) |
7944 | need_to_clear = true; |
7945 | else |
7946 | { |
7947 | unsigned HOST_WIDE_INT count = 0, zero_count = 0; |
7948 | tree value; |
7949 | |
7950 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) |
7951 | { |
7952 | int n_elts_here = bitsize / elt_size; |
7953 | count += n_elts_here; |
7954 | if (mostly_zeros_p (exp: value)) |
7955 | zero_count += n_elts_here; |
7956 | } |
7957 | |
7958 | /* Clear the entire vector first if there are any missing elements, |
7959 | or if the incidence of zero elements is >= 75%. */ |
7960 | need_to_clear = (maybe_lt (a: count, b: n_elts) |
7961 | || 4 * zero_count >= 3 * count); |
7962 | } |
7963 | |
7964 | if (need_to_clear && maybe_gt (size, 0) && !vector) |
7965 | { |
7966 | if (REG_P (target)) |
7967 | emit_move_insn (x: target, CONST0_RTX (mode)); |
7968 | else |
7969 | clear_storage (object: target, size: gen_int_mode (size, Pmode), |
7970 | method: BLOCK_OP_NORMAL); |
7971 | cleared = 1; |
7972 | } |
7973 | |
7974 | /* Inform later passes that the old value is dead. */ |
7975 | if (!cleared && !vector && REG_P (target) && maybe_gt (n_elts, 1u)) |
7976 | { |
7977 | emit_move_insn (x: target, CONST0_RTX (mode)); |
7978 | cleared = 1; |
7979 | } |
7980 | |
7981 | if (MEM_P (target)) |
7982 | alias = MEM_ALIAS_SET (target); |
7983 | else |
7984 | alias = get_alias_set (elttype); |
7985 | |
7986 | /* Store each element of the constructor into the corresponding |
7987 | element of TARGET, determined by counting the elements. */ |
7988 | for (idx = 0, i = 0; |
7989 | vec_safe_iterate (CONSTRUCTOR_ELTS (exp), ix: idx, ptr: &ce); |
7990 | idx++, i += bitsize / elt_size) |
7991 | { |
7992 | HOST_WIDE_INT eltpos; |
7993 | tree value = ce->value; |
7994 | |
7995 | if (cleared && initializer_zerop (value)) |
7996 | continue; |
7997 | |
7998 | if (ce->index) |
7999 | eltpos = tree_to_uhwi (ce->index); |
8000 | else |
8001 | eltpos = i; |
8002 | |
8003 | if (vector) |
8004 | { |
8005 | if (vec_vec_init_p) |
8006 | { |
8007 | gcc_assert (ce->index == NULL_TREE); |
8008 | gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE); |
8009 | eltpos = idx; |
8010 | } |
8011 | else |
8012 | gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE); |
8013 | RTVEC_ELT (vector, eltpos) = expand_normal (exp: value); |
8014 | } |
8015 | else |
8016 | { |
8017 | machine_mode value_mode |
8018 | = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE |
8019 | ? TYPE_MODE (TREE_TYPE (value)) : eltmode); |
8020 | bitpos = eltpos * elt_size; |
8021 | store_constructor_field (target, bitsize, bitpos, bitregion_start: 0, |
8022 | bitregion_end, mode: value_mode, |
8023 | exp: value, cleared, alias_set: alias, reverse); |
8024 | } |
8025 | } |
8026 | |
8027 | if (vector) |
8028 | emit_insn (GEN_FCN (icode) (target, |
8029 | gen_rtx_PARALLEL (mode, vector))); |
8030 | break; |
8031 | } |
8032 | |
8033 | default: |
8034 | gcc_unreachable (); |
8035 | } |
8036 | } |
8037 | |
8038 | /* Store the value of EXP (an expression tree) |
8039 | into a subfield of TARGET which has mode MODE and occupies |
8040 | BITSIZE bits, starting BITPOS bits from the start of TARGET. |
8041 | If MODE is VOIDmode, it means that we are storing into a bit-field. |
8042 | |
8043 | BITREGION_START is bitpos of the first bitfield in this region. |
8044 | BITREGION_END is the bitpos of the ending bitfield in this region. |
8045 | These two fields are 0, if the C++ memory model does not apply, |
8046 | or we are not interested in keeping track of bitfield regions. |
8047 | |
8048 | Always return const0_rtx unless we have something particular to |
8049 | return. |
8050 | |
8051 | ALIAS_SET is the alias set for the destination. This value will |
8052 | (in general) be different from that for TARGET, since TARGET is a |
8053 | reference to the containing structure. |
8054 | |
8055 | If NONTEMPORAL is true, try generating a nontemporal store. |
8056 | |
8057 | If REVERSE is true, the store is to be done in reverse order. */ |
8058 | |
8059 | static rtx |
8060 | store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos, |
8061 | poly_uint64 bitregion_start, poly_uint64 bitregion_end, |
8062 | machine_mode mode, tree exp, |
8063 | alias_set_type alias_set, bool nontemporal, bool reverse) |
8064 | { |
8065 | if (TREE_CODE (exp) == ERROR_MARK) |
8066 | return const0_rtx; |
8067 | |
8068 | /* If we have nothing to store, do nothing unless the expression has |
8069 | side-effects. Don't do that for zero sized addressable lhs of |
8070 | calls. */ |
8071 | if (known_eq (bitsize, 0) |
8072 | && (!TREE_ADDRESSABLE (TREE_TYPE (exp)) |
8073 | || TREE_CODE (exp) != CALL_EXPR)) |
8074 | return expand_expr (exp, const0_rtx, VOIDmode, modifier: EXPAND_NORMAL); |
8075 | |
8076 | if (GET_CODE (target) == CONCAT) |
8077 | { |
8078 | /* We're storing into a struct containing a single __complex. */ |
8079 | |
8080 | gcc_assert (known_eq (bitpos, 0)); |
8081 | return store_expr (exp, target, call_param_p: 0, nontemporal, reverse); |
8082 | } |
8083 | |
8084 | /* If the structure is in a register or if the component |
8085 | is a bit field, we cannot use addressing to access it. |
8086 | Use bit-field techniques or SUBREG to store in it. */ |
8087 | |
8088 | poly_int64 decl_bitsize; |
8089 | if (mode == VOIDmode |
8090 | || (mode != BLKmode && ! direct_store[(int) mode] |
8091 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT |
8092 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) |
8093 | || REG_P (target) |
8094 | || GET_CODE (target) == SUBREG |
8095 | /* If the field isn't aligned enough to store as an ordinary memref, |
8096 | store it as a bit field. */ |
8097 | || (mode != BLKmode |
8098 | && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode)) |
8099 | || !multiple_p (a: bitpos, GET_MODE_ALIGNMENT (mode))) |
8100 | && targetm.slow_unaligned_access (mode, MEM_ALIGN (target))) |
8101 | || !multiple_p (a: bitpos, BITS_PER_UNIT))) |
8102 | || (known_size_p (a: bitsize) |
8103 | && mode != BLKmode |
8104 | && maybe_gt (GET_MODE_BITSIZE (mode), bitsize)) |
8105 | /* If the RHS and field are a constant size and the size of the |
8106 | RHS isn't the same size as the bitfield, we must use bitfield |
8107 | operations. */ |
8108 | || (known_size_p (a: bitsize) |
8109 | && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp))) |
8110 | && maybe_ne (a: wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))), |
8111 | b: bitsize) |
8112 | /* Except for initialization of full bytes from a CONSTRUCTOR, which |
8113 | we will handle specially below. */ |
8114 | && !(TREE_CODE (exp) == CONSTRUCTOR |
8115 | && multiple_p (a: bitsize, BITS_PER_UNIT)) |
8116 | /* And except for bitwise copying of TREE_ADDRESSABLE types, |
8117 | where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp) |
8118 | includes some extra padding. store_expr / expand_expr will in |
8119 | that case call get_inner_reference that will have the bitsize |
8120 | we check here and thus the block move will not clobber the |
8121 | padding that shouldn't be clobbered. In the future we could |
8122 | replace the TREE_ADDRESSABLE check with a check that |
8123 | get_base_address needs to live in memory. */ |
8124 | && (!TREE_ADDRESSABLE (TREE_TYPE (exp)) |
8125 | || TREE_CODE (exp) != COMPONENT_REF |
8126 | || !multiple_p (a: bitsize, BITS_PER_UNIT) |
8127 | || !multiple_p (a: bitpos, BITS_PER_UNIT) |
8128 | || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)), |
8129 | value: &decl_bitsize) |
8130 | || maybe_ne (a: decl_bitsize, b: bitsize)) |
8131 | /* A call with an addressable return type and return-slot |
8132 | optimization must not need bitfield operations but we must |
8133 | pass down the original target. */ |
8134 | && (TREE_CODE (exp) != CALL_EXPR |
8135 | || !TREE_ADDRESSABLE (TREE_TYPE (exp)) |
8136 | || !CALL_EXPR_RETURN_SLOT_OPT (exp))) |
8137 | /* If we are expanding a MEM_REF of a non-BLKmode non-addressable |
8138 | decl we must use bitfield operations. */ |
8139 | || (known_size_p (a: bitsize) |
8140 | && TREE_CODE (exp) == MEM_REF |
8141 | && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR |
8142 | && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) |
8143 | && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) |
8144 | && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode)) |
8145 | { |
8146 | rtx temp; |
8147 | gimple *nop_def; |
8148 | |
8149 | /* If EXP is a NOP_EXPR of precision less than its mode, then that |
8150 | implies a mask operation. If the precision is the same size as |
8151 | the field we're storing into, that mask is redundant. This is |
8152 | particularly common with bit field assignments generated by the |
8153 | C front end. */ |
8154 | nop_def = get_def_for_expr (name: exp, code: NOP_EXPR); |
8155 | if (nop_def) |
8156 | { |
8157 | tree type = TREE_TYPE (exp); |
8158 | if (INTEGRAL_TYPE_P (type) |
8159 | && maybe_ne (TYPE_PRECISION (type), |
8160 | b: GET_MODE_BITSIZE (TYPE_MODE (type))) |
8161 | && known_eq (bitsize, TYPE_PRECISION (type))) |
8162 | { |
8163 | tree op = gimple_assign_rhs1 (gs: nop_def); |
8164 | type = TREE_TYPE (op); |
8165 | if (INTEGRAL_TYPE_P (type) |
8166 | && known_ge (TYPE_PRECISION (type), bitsize)) |
8167 | exp = op; |
8168 | } |
8169 | } |
8170 | |
8171 | temp = expand_normal (exp); |
8172 | |
8173 | /* We don't support variable-sized BLKmode bitfields, since our |
8174 | handling of BLKmode is bound up with the ability to break |
8175 | things into words. */ |
8176 | gcc_assert (mode != BLKmode || bitsize.is_constant ()); |
8177 | |
8178 | /* Handle calls that return values in multiple non-contiguous locations. |
8179 | The Irix 6 ABI has examples of this. */ |
8180 | if (GET_CODE (temp) == PARALLEL) |
8181 | { |
8182 | HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); |
8183 | machine_mode temp_mode = GET_MODE (temp); |
8184 | if (temp_mode == BLKmode || temp_mode == VOIDmode) |
8185 | temp_mode = smallest_int_mode_for_size (size: size * BITS_PER_UNIT); |
8186 | rtx temp_target = gen_reg_rtx (temp_mode); |
8187 | emit_group_store (orig_dst: temp_target, src: temp, TREE_TYPE (exp), ssize: size); |
8188 | temp = temp_target; |
8189 | } |
8190 | |
8191 | /* Handle calls that return BLKmode values in registers. */ |
8192 | else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) |
8193 | { |
8194 | rtx temp_target = gen_reg_rtx (GET_MODE (temp)); |
8195 | copy_blkmode_from_reg (target: temp_target, srcreg: temp, TREE_TYPE (exp)); |
8196 | temp = temp_target; |
8197 | } |
8198 | |
8199 | /* If the value has aggregate type and an integral mode then, if BITSIZE |
8200 | is narrower than this mode and this is for big-endian data, we first |
8201 | need to put the value into the low-order bits for store_bit_field, |
8202 | except when MODE is BLKmode and BITSIZE larger than the word size |
8203 | (see the handling of fields larger than a word in store_bit_field). |
8204 | Moreover, the field may be not aligned on a byte boundary; in this |
8205 | case, if it has reverse storage order, it needs to be accessed as a |
8206 | scalar field with reverse storage order and we must first put the |
8207 | value into target order. */ |
8208 | scalar_int_mode temp_mode; |
8209 | if (AGGREGATE_TYPE_P (TREE_TYPE (exp)) |
8210 | && is_int_mode (GET_MODE (temp), int_mode: &temp_mode)) |
8211 | { |
8212 | HOST_WIDE_INT size = GET_MODE_BITSIZE (mode: temp_mode); |
8213 | |
8214 | reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp)); |
8215 | |
8216 | if (reverse) |
8217 | temp = flip_storage_order (temp_mode, temp); |
8218 | |
8219 | gcc_checking_assert (known_le (bitsize, size)); |
8220 | if (maybe_lt (a: bitsize, b: size) |
8221 | && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN |
8222 | /* Use of to_constant for BLKmode was checked above. */ |
8223 | && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD)) |
8224 | temp = expand_shift (RSHIFT_EXPR, temp_mode, temp, |
8225 | size - bitsize, NULL_RTX, 1); |
8226 | } |
8227 | |
8228 | /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */ |
8229 | if (mode != VOIDmode && mode != BLKmode |
8230 | && mode != TYPE_MODE (TREE_TYPE (exp))) |
8231 | temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), x: temp, unsignedp: 1); |
8232 | |
8233 | /* If the mode of TEMP and TARGET is BLKmode, both must be in memory |
8234 | and BITPOS must be aligned on a byte boundary. If so, we simply do |
8235 | a block copy. Likewise for a BLKmode-like TARGET. */ |
8236 | if (GET_MODE (temp) == BLKmode |
8237 | && (GET_MODE (target) == BLKmode |
8238 | || (MEM_P (target) |
8239 | && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT |
8240 | && multiple_p (a: bitpos, BITS_PER_UNIT) |
8241 | && multiple_p (a: bitsize, BITS_PER_UNIT)))) |
8242 | { |
8243 | gcc_assert (MEM_P (target) && MEM_P (temp)); |
8244 | poly_int64 bytepos = exact_div (a: bitpos, BITS_PER_UNIT); |
8245 | poly_int64 bytesize = bits_to_bytes_round_up (bitsize); |
8246 | |
8247 | target = adjust_address (target, VOIDmode, bytepos); |
8248 | emit_block_move (x: target, y: temp, |
8249 | size: gen_int_mode (bytesize, Pmode), |
8250 | method: BLOCK_OP_NORMAL); |
8251 | |
8252 | return const0_rtx; |
8253 | } |
8254 | |
8255 | /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the |
8256 | word size, we need to load the value (see again store_bit_field). */ |
8257 | if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD)) |
8258 | { |
8259 | temp_mode = smallest_int_mode_for_size (size: bitsize); |
8260 | temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode, |
8261 | temp_mode, false, NULL); |
8262 | } |
8263 | |
8264 | /* Store the value in the bitfield. */ |
8265 | gcc_checking_assert (known_ge (bitpos, 0)); |
8266 | store_bit_field (target, bitsize, bitpos, |
8267 | bitregion_start, bitregion_end, |
8268 | mode, temp, reverse, false); |
8269 | |
8270 | return const0_rtx; |
8271 | } |
8272 | else |
8273 | { |
8274 | /* Now build a reference to just the desired component. */ |
8275 | rtx to_rtx = adjust_address (target, mode, |
8276 | exact_div (bitpos, BITS_PER_UNIT)); |
8277 | |
8278 | if (to_rtx == target) |
8279 | to_rtx = copy_rtx (to_rtx); |
8280 | |
8281 | if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0) |
8282 | set_mem_alias_set (to_rtx, alias_set); |
8283 | |
8284 | /* Above we avoided using bitfield operations for storing a CONSTRUCTOR |
8285 | into a target smaller than its type; handle that case now. */ |
8286 | if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (a: bitsize)) |
8287 | { |
8288 | poly_int64 bytesize = exact_div (a: bitsize, BITS_PER_UNIT); |
8289 | store_constructor (exp, target: to_rtx, cleared: 0, size: bytesize, reverse); |
8290 | return to_rtx; |
8291 | } |
8292 | |
8293 | return store_expr (exp, target: to_rtx, call_param_p: 0, nontemporal, reverse); |
8294 | } |
8295 | } |
8296 | |
8297 | /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF, |
8298 | an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these |
8299 | codes and find the ultimate containing object, which we return. |
8300 | |
8301 | We set *PBITSIZE to the size in bits that we want, *PBITPOS to the |
8302 | bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the |
8303 | storage order of the field. |
8304 | If the position of the field is variable, we store a tree |
8305 | giving the variable offset (in units) in *POFFSET. |
8306 | This offset is in addition to the bit position. |
8307 | If the position is not variable, we store 0 in *POFFSET. |
8308 | |
8309 | If any of the extraction expressions is volatile, |
8310 | we store 1 in *PVOLATILEP. Otherwise we don't change that. |
8311 | |
8312 | If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode. |
8313 | Otherwise, it is a mode that can be used to access the field. |
8314 | |
8315 | If the field describes a variable-sized object, *PMODE is set to |
8316 | BLKmode and *PBITSIZE is set to -1. An access cannot be made in |
8317 | this case, but the address of the object can be found. */ |
8318 | |
8319 | tree |
8320 | get_inner_reference (tree exp, poly_int64 *pbitsize, |
8321 | poly_int64 *pbitpos, tree *poffset, |
8322 | machine_mode *pmode, int *punsignedp, |
8323 | int *preversep, int *pvolatilep) |
8324 | { |
8325 | tree size_tree = 0; |
8326 | machine_mode mode = VOIDmode; |
8327 | bool blkmode_bitfield = false; |
8328 | tree offset = size_zero_node; |
8329 | poly_offset_int bit_offset = 0; |
8330 | |
8331 | /* First get the mode, signedness, storage order and size. We do this from |
8332 | just the outermost expression. */ |
8333 | *pbitsize = -1; |
8334 | if (TREE_CODE (exp) == COMPONENT_REF) |
8335 | { |
8336 | tree field = TREE_OPERAND (exp, 1); |
8337 | size_tree = DECL_SIZE (field); |
8338 | if (flag_strict_volatile_bitfields > 0 |
8339 | && TREE_THIS_VOLATILE (exp) |
8340 | && DECL_BIT_FIELD_TYPE (field) |
8341 | && DECL_MODE (field) != BLKmode) |
8342 | /* Volatile bitfields should be accessed in the mode of the |
8343 | field's type, not the mode computed based on the bit |
8344 | size. */ |
8345 | mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field)); |
8346 | else if (!DECL_BIT_FIELD (field)) |
8347 | { |
8348 | mode = DECL_MODE (field); |
8349 | /* For vector fields re-check the target flags, as DECL_MODE |
8350 | could have been set with different target flags than |
8351 | the current function has. */ |
8352 | if (VECTOR_TYPE_P (TREE_TYPE (field)) |
8353 | && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field)))) |
8354 | mode = TYPE_MODE (TREE_TYPE (field)); |
8355 | } |
8356 | else if (DECL_MODE (field) == BLKmode) |
8357 | blkmode_bitfield = true; |
8358 | |
8359 | *punsignedp = DECL_UNSIGNED (field); |
8360 | } |
8361 | else if (TREE_CODE (exp) == BIT_FIELD_REF) |
8362 | { |
8363 | size_tree = TREE_OPERAND (exp, 1); |
8364 | *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) |
8365 | || TYPE_UNSIGNED (TREE_TYPE (exp))); |
8366 | |
8367 | /* For vector element types with the correct size of access or for |
8368 | vector typed accesses use the mode of the access type. */ |
8369 | if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE |
8370 | && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) |
8371 | && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) |
8372 | || VECTOR_TYPE_P (TREE_TYPE (exp))) |
8373 | mode = TYPE_MODE (TREE_TYPE (exp)); |
8374 | } |
8375 | else |
8376 | { |
8377 | mode = TYPE_MODE (TREE_TYPE (exp)); |
8378 | *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); |
8379 | |
8380 | if (mode == BLKmode) |
8381 | size_tree = TYPE_SIZE (TREE_TYPE (exp)); |
8382 | else |
8383 | *pbitsize = GET_MODE_BITSIZE (mode); |
8384 | } |
8385 | |
8386 | if (size_tree != 0) |
8387 | { |
8388 | if (! tree_fits_uhwi_p (size_tree)) |
8389 | mode = BLKmode, *pbitsize = -1; |
8390 | else |
8391 | *pbitsize = tree_to_uhwi (size_tree); |
8392 | } |
8393 | |
8394 | *preversep = reverse_storage_order_for_component_p (t: exp); |
8395 | |
8396 | /* Compute cumulative bit-offset for nested component-refs and array-refs, |
8397 | and find the ultimate containing object. */ |
8398 | while (1) |
8399 | { |
8400 | switch (TREE_CODE (exp)) |
8401 | { |
8402 | case BIT_FIELD_REF: |
8403 | bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2)); |
8404 | break; |
8405 | |
8406 | case COMPONENT_REF: |
8407 | { |
8408 | tree field = TREE_OPERAND (exp, 1); |
8409 | tree this_offset = component_ref_field_offset (exp); |
8410 | |
8411 | /* If this field hasn't been filled in yet, don't go past it. |
8412 | This should only happen when folding expressions made during |
8413 | type construction. */ |
8414 | if (this_offset == 0) |
8415 | break; |
8416 | |
8417 | offset = size_binop (PLUS_EXPR, offset, this_offset); |
8418 | bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field)); |
8419 | |
8420 | /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */ |
8421 | } |
8422 | break; |
8423 | |
8424 | case ARRAY_REF: |
8425 | case ARRAY_RANGE_REF: |
8426 | { |
8427 | tree index = TREE_OPERAND (exp, 1); |
8428 | tree low_bound = array_ref_low_bound (exp); |
8429 | tree unit_size = array_ref_element_size (exp); |
8430 | |
8431 | /* We assume all arrays have sizes that are a multiple of a byte. |
8432 | First subtract the lower bound, if any, in the type of the |
8433 | index, then convert to sizetype and multiply by the size of |
8434 | the array element. */ |
8435 | if (! integer_zerop (low_bound)) |
8436 | index = fold_build2 (MINUS_EXPR, TREE_TYPE (index), |
8437 | index, low_bound); |
8438 | |
8439 | offset = size_binop (PLUS_EXPR, offset, |
8440 | size_binop (MULT_EXPR, |
8441 | fold_convert (sizetype, index), |
8442 | unit_size)); |
8443 | } |
8444 | break; |
8445 | |
8446 | case REALPART_EXPR: |
8447 | break; |
8448 | |
8449 | case IMAGPART_EXPR: |
8450 | bit_offset += *pbitsize; |
8451 | break; |
8452 | |
8453 | case VIEW_CONVERT_EXPR: |
8454 | break; |
8455 | |
8456 | case MEM_REF: |
8457 | /* Hand back the decl for MEM[&decl, off]. */ |
8458 | if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR) |
8459 | { |
8460 | tree off = TREE_OPERAND (exp, 1); |
8461 | if (!integer_zerop (off)) |
8462 | { |
8463 | poly_offset_int boff = mem_ref_offset (exp); |
8464 | boff <<= LOG2_BITS_PER_UNIT; |
8465 | bit_offset += boff; |
8466 | } |
8467 | exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0); |
8468 | } |
8469 | goto done; |
8470 | |
8471 | default: |
8472 | goto done; |
8473 | } |
8474 | |
8475 | /* If any reference in the chain is volatile, the effect is volatile. */ |
8476 | if (TREE_THIS_VOLATILE (exp)) |
8477 | *pvolatilep = 1; |
8478 | |
8479 | exp = TREE_OPERAND (exp, 0); |
8480 | } |
8481 | done: |
8482 | |
8483 | /* If OFFSET is constant, see if we can return the whole thing as a |
8484 | constant bit position. Make sure to handle overflow during |
8485 | this conversion. */ |
8486 | if (poly_int_tree_p (t: offset)) |
8487 | { |
8488 | poly_offset_int tem = wi::sext (a: wi::to_poly_offset (t: offset), |
8489 | TYPE_PRECISION (sizetype)); |
8490 | tem <<= LOG2_BITS_PER_UNIT; |
8491 | tem += bit_offset; |
8492 | if (tem.to_shwi (r: pbitpos)) |
8493 | *poffset = offset = NULL_TREE; |
8494 | } |
8495 | |
8496 | /* Otherwise, split it up. */ |
8497 | if (offset) |
8498 | { |
8499 | /* Avoid returning a negative bitpos as this may wreak havoc later. */ |
8500 | if (!bit_offset.to_shwi (r: pbitpos) || maybe_lt (a: *pbitpos, b: 0)) |
8501 | { |
8502 | *pbitpos = num_trailing_bits (bit_offset.force_shwi ()); |
8503 | poly_offset_int bytes = bits_to_bytes_round_down (bit_offset); |
8504 | offset = size_binop (PLUS_EXPR, offset, |
8505 | build_int_cst (sizetype, bytes.force_shwi ())); |
8506 | } |
8507 | |
8508 | *poffset = offset; |
8509 | } |
8510 | |
8511 | /* We can use BLKmode for a byte-aligned BLKmode bitfield. */ |
8512 | if (mode == VOIDmode |
8513 | && blkmode_bitfield |
8514 | && multiple_p (a: *pbitpos, BITS_PER_UNIT) |
8515 | && multiple_p (a: *pbitsize, BITS_PER_UNIT)) |
8516 | *pmode = BLKmode; |
8517 | else |
8518 | *pmode = mode; |
8519 | |
8520 | return exp; |
8521 | } |
8522 | |
8523 | /* Alignment in bits the TARGET of an assignment may be assumed to have. */ |
8524 | |
8525 | static unsigned HOST_WIDE_INT |
8526 | target_align (const_tree target) |
8527 | { |
8528 | /* We might have a chain of nested references with intermediate misaligning |
8529 | bitfields components, so need to recurse to find out. */ |
8530 | |
8531 | unsigned HOST_WIDE_INT this_align, outer_align; |
8532 | |
8533 | switch (TREE_CODE (target)) |
8534 | { |
8535 | case BIT_FIELD_REF: |
8536 | return 1; |
8537 | |
8538 | case COMPONENT_REF: |
8539 | this_align = DECL_ALIGN (TREE_OPERAND (target, 1)); |
8540 | outer_align = target_align (TREE_OPERAND (target, 0)); |
8541 | return MIN (this_align, outer_align); |
8542 | |
8543 | case ARRAY_REF: |
8544 | case ARRAY_RANGE_REF: |
8545 | this_align = TYPE_ALIGN (TREE_TYPE (target)); |
8546 | outer_align = target_align (TREE_OPERAND (target, 0)); |
8547 | return MIN (this_align, outer_align); |
8548 | |
8549 | CASE_CONVERT: |
8550 | case NON_LVALUE_EXPR: |
8551 | case VIEW_CONVERT_EXPR: |
8552 | this_align = TYPE_ALIGN (TREE_TYPE (target)); |
8553 | outer_align = target_align (TREE_OPERAND (target, 0)); |
8554 | return MAX (this_align, outer_align); |
8555 | |
8556 | default: |
8557 | return TYPE_ALIGN (TREE_TYPE (target)); |
8558 | } |
8559 | } |
8560 | |
8561 | |
8562 | /* Given an rtx VALUE that may contain additions and multiplications, return |
8563 | an equivalent value that just refers to a register, memory, or constant. |
8564 | This is done by generating instructions to perform the arithmetic and |
8565 | returning a pseudo-register containing the value. |
8566 | |
8567 | The returned value may be a REG, SUBREG, MEM or constant. */ |
8568 | |
8569 | rtx |
8570 | force_operand (rtx value, rtx target) |
8571 | { |
8572 | rtx op1, op2; |
8573 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
8574 | rtx subtarget = get_subtarget (x: target); |
8575 | enum rtx_code code = GET_CODE (value); |
8576 | |
8577 | /* Check for subreg applied to an expression produced by loop optimizer. */ |
8578 | if (code == SUBREG |
8579 | && !REG_P (SUBREG_REG (value)) |
8580 | && !MEM_P (SUBREG_REG (value))) |
8581 | { |
8582 | value |
8583 | = simplify_gen_subreg (GET_MODE (value), |
8584 | op: force_reg (GET_MODE (SUBREG_REG (value)), |
8585 | force_operand (SUBREG_REG (value), |
8586 | NULL_RTX)), |
8587 | GET_MODE (SUBREG_REG (value)), |
8588 | SUBREG_BYTE (value)); |
8589 | code = GET_CODE (value); |
8590 | } |
8591 | |
8592 | /* Check for a PIC address load. */ |
8593 | if ((code == PLUS || code == MINUS) |
8594 | && XEXP (value, 0) == pic_offset_table_rtx |
8595 | && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF |
8596 | || GET_CODE (XEXP (value, 1)) == LABEL_REF |
8597 | || GET_CODE (XEXP (value, 1)) == CONST)) |
8598 | { |
8599 | if (!subtarget) |
8600 | subtarget = gen_reg_rtx (GET_MODE (value)); |
8601 | emit_move_insn (x: subtarget, y: value); |
8602 | return subtarget; |
8603 | } |
8604 | |
8605 | if (ARITHMETIC_P (value)) |
8606 | { |
8607 | op2 = XEXP (value, 1); |
8608 | if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget)) |
8609 | subtarget = 0; |
8610 | if (code == MINUS && CONST_INT_P (op2)) |
8611 | { |
8612 | code = PLUS; |
8613 | op2 = negate_rtx (GET_MODE (value), op2); |
8614 | } |
8615 | |
8616 | /* Check for an addition with OP2 a constant integer and our first |
8617 | operand a PLUS of a virtual register and something else. In that |
8618 | case, we want to emit the sum of the virtual register and the |
8619 | constant first and then add the other value. This allows virtual |
8620 | register instantiation to simply modify the constant rather than |
8621 | creating another one around this addition. */ |
8622 | if (code == PLUS && CONST_INT_P (op2) |
8623 | && GET_CODE (XEXP (value, 0)) == PLUS |
8624 | && REG_P (XEXP (XEXP (value, 0), 0)) |
8625 | && VIRTUAL_REGISTER_P (XEXP (XEXP (value, 0), 0))) |
8626 | { |
8627 | rtx temp = expand_simple_binop (GET_MODE (value), code, |
8628 | XEXP (XEXP (value, 0), 0), op2, |
8629 | subtarget, 0, OPTAB_LIB_WIDEN); |
8630 | return expand_simple_binop (GET_MODE (value), code, temp, |
8631 | force_operand (XEXP (XEXP (value, |
8632 | 0), 1), target: 0), |
8633 | target, 0, OPTAB_LIB_WIDEN); |
8634 | } |
8635 | |
8636 | op1 = force_operand (XEXP (value, 0), target: subtarget); |
8637 | op2 = force_operand (value: op2, NULL_RTX); |
8638 | switch (code) |
8639 | { |
8640 | case MULT: |
8641 | return expand_mult (GET_MODE (value), op1, op2, target, 1); |
8642 | case DIV: |
8643 | if (!INTEGRAL_MODE_P (GET_MODE (value))) |
8644 | return expand_simple_binop (GET_MODE (value), code, op1, op2, |
8645 | target, 1, OPTAB_LIB_WIDEN); |
8646 | else |
8647 | return expand_divmod (0, |
8648 | FLOAT_MODE_P (GET_MODE (value)) |
8649 | ? RDIV_EXPR : TRUNC_DIV_EXPR, |
8650 | GET_MODE (value), op1, op2, target, 0); |
8651 | case MOD: |
8652 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, |
8653 | target, 0); |
8654 | case UDIV: |
8655 | return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2, |
8656 | target, 1); |
8657 | case UMOD: |
8658 | return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, |
8659 | target, 1); |
8660 | case ASHIFTRT: |
8661 | return expand_simple_binop (GET_MODE (value), code, op1, op2, |
8662 | target, 0, OPTAB_LIB_WIDEN); |
8663 | default: |
8664 | return expand_simple_binop (GET_MODE (value), code, op1, op2, |
8665 | target, 1, OPTAB_LIB_WIDEN); |
8666 | } |
8667 | } |
8668 | if (UNARY_P (value)) |
8669 | { |
8670 | if (!target) |
8671 | target = gen_reg_rtx (GET_MODE (value)); |
8672 | op1 = force_operand (XEXP (value, 0), NULL_RTX); |
8673 | switch (code) |
8674 | { |
8675 | case ZERO_EXTEND: |
8676 | case SIGN_EXTEND: |
8677 | case TRUNCATE: |
8678 | case FLOAT_EXTEND: |
8679 | case FLOAT_TRUNCATE: |
8680 | convert_move (to: target, from: op1, unsignedp: code == ZERO_EXTEND); |
8681 | return target; |
8682 | |
8683 | case FIX: |
8684 | case UNSIGNED_FIX: |
8685 | expand_fix (target, op1, code == UNSIGNED_FIX); |
8686 | return target; |
8687 | |
8688 | case FLOAT: |
8689 | case UNSIGNED_FLOAT: |
8690 | expand_float (target, op1, code == UNSIGNED_FLOAT); |
8691 | return target; |
8692 | |
8693 | default: |
8694 | return expand_simple_unop (GET_MODE (value), code, op1, target, 0); |
8695 | } |
8696 | } |
8697 | |
8698 | #ifdef INSN_SCHEDULING |
8699 | /* On machines that have insn scheduling, we want all memory reference to be |
8700 | explicit, so we need to deal with such paradoxical SUBREGs. */ |
8701 | if (paradoxical_subreg_p (x: value) && MEM_P (SUBREG_REG (value))) |
8702 | value |
8703 | = simplify_gen_subreg (GET_MODE (value), |
8704 | op: force_reg (GET_MODE (SUBREG_REG (value)), |
8705 | force_operand (SUBREG_REG (value), |
8706 | NULL_RTX)), |
8707 | GET_MODE (SUBREG_REG (value)), |
8708 | SUBREG_BYTE (value)); |
8709 | #endif |
8710 | |
8711 | return value; |
8712 | } |
8713 | |
8714 | /* Subroutine of expand_expr: return true iff there is no way that |
8715 | EXP can reference X, which is being modified. TOP_P is nonzero if this |
8716 | call is going to be used to determine whether we need a temporary |
8717 | for EXP, as opposed to a recursive call to this function. |
8718 | |
8719 | It is always safe for this routine to return false since it merely |
8720 | searches for optimization opportunities. */ |
8721 | |
8722 | bool |
8723 | safe_from_p (const_rtx x, tree exp, int top_p) |
8724 | { |
8725 | rtx exp_rtl = 0; |
8726 | int i, nops; |
8727 | |
8728 | if (x == 0 |
8729 | /* If EXP has varying size, we MUST use a target since we currently |
8730 | have no way of allocating temporaries of variable size |
8731 | (except for arrays that have TYPE_ARRAY_MAX_SIZE set). |
8732 | So we assume here that something at a higher level has prevented a |
8733 | clash. This is somewhat bogus, but the best we can do. Only |
8734 | do this when X is BLKmode and when we are at the top level. */ |
8735 | || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp)) |
8736 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST |
8737 | && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE |
8738 | || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE |
8739 | || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp))) |
8740 | != INTEGER_CST) |
8741 | && GET_MODE (x) == BLKmode) |
8742 | /* If X is in the outgoing argument area, it is always safe. */ |
8743 | || (MEM_P (x) |
8744 | && (XEXP (x, 0) == virtual_outgoing_args_rtx |
8745 | || (GET_CODE (XEXP (x, 0)) == PLUS |
8746 | && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx)))) |
8747 | return true; |
8748 | |
8749 | /* If this is a subreg of a hard register, declare it unsafe, otherwise, |
8750 | find the underlying pseudo. */ |
8751 | if (GET_CODE (x) == SUBREG) |
8752 | { |
8753 | x = SUBREG_REG (x); |
8754 | if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
8755 | return false; |
8756 | } |
8757 | |
8758 | /* Now look at our tree code and possibly recurse. */ |
8759 | switch (TREE_CODE_CLASS (TREE_CODE (exp))) |
8760 | { |
8761 | case tcc_declaration: |
8762 | exp_rtl = DECL_RTL_IF_SET (exp); |
8763 | break; |
8764 | |
8765 | case tcc_constant: |
8766 | return true; |
8767 | |
8768 | case tcc_exceptional: |
8769 | if (TREE_CODE (exp) == TREE_LIST) |
8770 | { |
8771 | while (1) |
8772 | { |
8773 | if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), top_p: 0)) |
8774 | return false; |
8775 | exp = TREE_CHAIN (exp); |
8776 | if (!exp) |
8777 | return true; |
8778 | if (TREE_CODE (exp) != TREE_LIST) |
8779 | return safe_from_p (x, exp, top_p: 0); |
8780 | } |
8781 | } |
8782 | else if (TREE_CODE (exp) == CONSTRUCTOR) |
8783 | { |
8784 | constructor_elt *ce; |
8785 | unsigned HOST_WIDE_INT idx; |
8786 | |
8787 | FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce) |
8788 | if ((ce->index != NULL_TREE && !safe_from_p (x, exp: ce->index, top_p: 0)) |
8789 | || !safe_from_p (x, exp: ce->value, top_p: 0)) |
8790 | return false; |
8791 | return true; |
8792 | } |
8793 | else if (TREE_CODE (exp) == ERROR_MARK) |
8794 | return true; /* An already-visited SAVE_EXPR? */ |
8795 | else |
8796 | return false; |
8797 | |
8798 | case tcc_statement: |
8799 | /* The only case we look at here is the DECL_INITIAL inside a |
8800 | DECL_EXPR. */ |
8801 | return (TREE_CODE (exp) != DECL_EXPR |
8802 | || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL |
8803 | || !DECL_INITIAL (DECL_EXPR_DECL (exp)) |
8804 | || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), top_p: 0)); |
8805 | |
8806 | case tcc_binary: |
8807 | case tcc_comparison: |
8808 | if (!safe_from_p (x, TREE_OPERAND (exp, 1), top_p: 0)) |
8809 | return false; |
8810 | /* Fall through. */ |
8811 | |
8812 | case tcc_unary: |
8813 | return safe_from_p (x, TREE_OPERAND (exp, 0), top_p: 0); |
8814 | |
8815 | case tcc_expression: |
8816 | case tcc_reference: |
8817 | case tcc_vl_exp: |
8818 | /* Now do code-specific tests. EXP_RTL is set to any rtx we find in |
8819 | the expression. If it is set, we conflict iff we are that rtx or |
8820 | both are in memory. Otherwise, we check all operands of the |
8821 | expression recursively. */ |
8822 | |
8823 | switch (TREE_CODE (exp)) |
8824 | { |
8825 | case ADDR_EXPR: |
8826 | /* If the operand is static or we are static, we can't conflict. |
8827 | Likewise if we don't conflict with the operand at all. */ |
8828 | if (staticp (TREE_OPERAND (exp, 0)) |
8829 | || TREE_STATIC (exp) |
8830 | || safe_from_p (x, TREE_OPERAND (exp, 0), top_p: 0)) |
8831 | return true; |
8832 | |
8833 | /* Otherwise, the only way this can conflict is if we are taking |
8834 | the address of a DECL a that address if part of X, which is |
8835 | very rare. */ |
8836 | exp = TREE_OPERAND (exp, 0); |
8837 | if (DECL_P (exp)) |
8838 | { |
8839 | if (!DECL_RTL_SET_P (exp) |
8840 | || !MEM_P (DECL_RTL (exp))) |
8841 | return false; |
8842 | else |
8843 | exp_rtl = XEXP (DECL_RTL (exp), 0); |
8844 | } |
8845 | break; |
8846 | |
8847 | case MEM_REF: |
8848 | if (MEM_P (x) |
8849 | && alias_sets_conflict_p (MEM_ALIAS_SET (x), |
8850 | get_alias_set (exp))) |
8851 | return false; |
8852 | break; |
8853 | |
8854 | case CALL_EXPR: |
8855 | /* Assume that the call will clobber all hard registers and |
8856 | all of memory. */ |
8857 | if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) |
8858 | || MEM_P (x)) |
8859 | return false; |
8860 | break; |
8861 | |
8862 | case WITH_CLEANUP_EXPR: |
8863 | case CLEANUP_POINT_EXPR: |
8864 | /* Lowered by gimplify.cc. */ |
8865 | gcc_unreachable (); |
8866 | |
8867 | case SAVE_EXPR: |
8868 | return safe_from_p (x, TREE_OPERAND (exp, 0), top_p: 0); |
8869 | |
8870 | default: |
8871 | break; |
8872 | } |
8873 | |
8874 | /* If we have an rtx, we do not need to scan our operands. */ |
8875 | if (exp_rtl) |
8876 | break; |
8877 | |
8878 | nops = TREE_OPERAND_LENGTH (exp); |
8879 | for (i = 0; i < nops; i++) |
8880 | if (TREE_OPERAND (exp, i) != 0 |
8881 | && ! safe_from_p (x, TREE_OPERAND (exp, i), top_p: 0)) |
8882 | return false; |
8883 | |
8884 | break; |
8885 | |
8886 | case tcc_type: |
8887 | /* Should never get a type here. */ |
8888 | gcc_unreachable (); |
8889 | } |
8890 | |
8891 | /* If we have an rtl, find any enclosed object. Then see if we conflict |
8892 | with it. */ |
8893 | if (exp_rtl) |
8894 | { |
8895 | if (GET_CODE (exp_rtl) == SUBREG) |
8896 | { |
8897 | exp_rtl = SUBREG_REG (exp_rtl); |
8898 | if (REG_P (exp_rtl) |
8899 | && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER) |
8900 | return false; |
8901 | } |
8902 | |
8903 | /* If the rtl is X, then it is not safe. Otherwise, it is unless both |
8904 | are memory and they conflict. */ |
8905 | return ! (rtx_equal_p (x, exp_rtl) |
8906 | || (MEM_P (x) && MEM_P (exp_rtl) |
8907 | && true_dependence (exp_rtl, VOIDmode, x))); |
8908 | } |
8909 | |
8910 | /* If we reach here, it is safe. */ |
8911 | return true; |
8912 | } |
8913 | |
8914 | |
8915 | /* Return the highest power of two that EXP is known to be a multiple of. |
8916 | This is used in updating alignment of MEMs in array references. */ |
8917 | |
8918 | unsigned HOST_WIDE_INT |
8919 | highest_pow2_factor (const_tree exp) |
8920 | { |
8921 | unsigned HOST_WIDE_INT ret; |
8922 | int trailing_zeros = tree_ctz (exp); |
8923 | if (trailing_zeros >= HOST_BITS_PER_WIDE_INT) |
8924 | return BIGGEST_ALIGNMENT; |
8925 | ret = HOST_WIDE_INT_1U << trailing_zeros; |
8926 | if (ret > BIGGEST_ALIGNMENT) |
8927 | return BIGGEST_ALIGNMENT; |
8928 | return ret; |
8929 | } |
8930 | |
8931 | /* Similar, except that the alignment requirements of TARGET are |
8932 | taken into account. Assume it is at least as aligned as its |
8933 | type, unless it is a COMPONENT_REF in which case the layout of |
8934 | the structure gives the alignment. */ |
8935 | |
8936 | static unsigned HOST_WIDE_INT |
8937 | highest_pow2_factor_for_target (const_tree target, const_tree exp) |
8938 | { |
8939 | unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT; |
8940 | unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp); |
8941 | |
8942 | return MAX (factor, talign); |
8943 | } |
8944 | |
8945 | /* Convert the tree comparison code TCODE to the rtl one where the |
8946 | signedness is UNSIGNEDP. */ |
8947 | |
8948 | static enum rtx_code |
8949 | convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp) |
8950 | { |
8951 | enum rtx_code code; |
8952 | switch (tcode) |
8953 | { |
8954 | case EQ_EXPR: |
8955 | code = EQ; |
8956 | break; |
8957 | case NE_EXPR: |
8958 | code = NE; |
8959 | break; |
8960 | case LT_EXPR: |
8961 | code = unsignedp ? LTU : LT; |
8962 | break; |
8963 | case LE_EXPR: |
8964 | code = unsignedp ? LEU : LE; |
8965 | break; |
8966 | case GT_EXPR: |
8967 | code = unsignedp ? GTU : GT; |
8968 | break; |
8969 | case GE_EXPR: |
8970 | code = unsignedp ? GEU : GE; |
8971 | break; |
8972 | case UNORDERED_EXPR: |
8973 | code = UNORDERED; |
8974 | break; |
8975 | case ORDERED_EXPR: |
8976 | code = ORDERED; |
8977 | break; |
8978 | case UNLT_EXPR: |
8979 | code = UNLT; |
8980 | break; |
8981 | case UNLE_EXPR: |
8982 | code = UNLE; |
8983 | break; |
8984 | case UNGT_EXPR: |
8985 | code = UNGT; |
8986 | break; |
8987 | case UNGE_EXPR: |
8988 | code = UNGE; |
8989 | break; |
8990 | case UNEQ_EXPR: |
8991 | code = UNEQ; |
8992 | break; |
8993 | case LTGT_EXPR: |
8994 | code = LTGT; |
8995 | break; |
8996 | |
8997 | default: |
8998 | gcc_unreachable (); |
8999 | } |
9000 | return code; |
9001 | } |
9002 | |
9003 | /* Subroutine of expand_expr. Expand the two operands of a binary |
9004 | expression EXP0 and EXP1 placing the results in OP0 and OP1. |
9005 | The value may be stored in TARGET if TARGET is nonzero. The |
9006 | MODIFIER argument is as documented by expand_expr. */ |
9007 | |
9008 | void |
9009 | expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1, |
9010 | enum expand_modifier modifier) |
9011 | { |
9012 | if (! safe_from_p (x: target, exp: exp1, top_p: 1)) |
9013 | target = 0; |
9014 | if (operand_equal_p (exp0, exp1, flags: 0)) |
9015 | { |
9016 | *op0 = expand_expr (exp: exp0, target, VOIDmode, modifier); |
9017 | *op1 = copy_rtx (*op0); |
9018 | } |
9019 | else |
9020 | { |
9021 | *op0 = expand_expr (exp: exp0, target, VOIDmode, modifier); |
9022 | *op1 = expand_expr (exp: exp1, NULL_RTX, VOIDmode, modifier); |
9023 | } |
9024 | } |
9025 | |
9026 | |
9027 | /* Return a MEM that contains constant EXP. DEFER is as for |
9028 | output_constant_def and MODIFIER is as for expand_expr. */ |
9029 | |
9030 | static rtx |
9031 | expand_expr_constant (tree exp, int defer, enum expand_modifier modifier) |
9032 | { |
9033 | rtx mem; |
9034 | |
9035 | mem = output_constant_def (exp, defer); |
9036 | if (modifier != EXPAND_INITIALIZER) |
9037 | mem = use_anchored_address (mem); |
9038 | return mem; |
9039 | } |
9040 | |
9041 | /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP. |
9042 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ |
9043 | |
9044 | static rtx |
9045 | expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode, |
9046 | enum expand_modifier modifier, addr_space_t as) |
9047 | { |
9048 | rtx result, subtarget; |
9049 | tree inner, offset; |
9050 | poly_int64 bitsize, bitpos; |
9051 | int unsignedp, reversep, volatilep = 0; |
9052 | machine_mode mode1; |
9053 | |
9054 | /* If we are taking the address of a constant and are at the top level, |
9055 | we have to use output_constant_def since we can't call force_const_mem |
9056 | at top level. */ |
9057 | /* ??? This should be considered a front-end bug. We should not be |
9058 | generating ADDR_EXPR of something that isn't an LVALUE. The only |
9059 | exception here is STRING_CST. */ |
9060 | if (CONSTANT_CLASS_P (exp)) |
9061 | { |
9062 | result = XEXP (expand_expr_constant (exp, 0, modifier), 0); |
9063 | if (modifier < EXPAND_SUM) |
9064 | result = force_operand (value: result, target); |
9065 | return result; |
9066 | } |
9067 | |
9068 | /* Everything must be something allowed by is_gimple_addressable. */ |
9069 | switch (TREE_CODE (exp)) |
9070 | { |
9071 | case INDIRECT_REF: |
9072 | /* This case will happen via recursion for &a->b. */ |
9073 | return expand_expr (TREE_OPERAND (exp, 0), target, mode: tmode, modifier); |
9074 | |
9075 | case MEM_REF: |
9076 | { |
9077 | tree tem = TREE_OPERAND (exp, 0); |
9078 | if (!integer_zerop (TREE_OPERAND (exp, 1))) |
9079 | tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1)); |
9080 | return expand_expr (exp: tem, target, mode: tmode, modifier); |
9081 | } |
9082 | |
9083 | case TARGET_MEM_REF: |
9084 | return addr_for_mem_ref (exp, as, really_expand: true); |
9085 | |
9086 | case CONST_DECL: |
9087 | /* Expand the initializer like constants above. */ |
9088 | result = XEXP (expand_expr_constant (DECL_INITIAL (exp), |
9089 | 0, modifier), 0); |
9090 | if (modifier < EXPAND_SUM) |
9091 | result = force_operand (value: result, target); |
9092 | return result; |
9093 | |
9094 | case REALPART_EXPR: |
9095 | /* The real part of the complex number is always first, therefore |
9096 | the address is the same as the address of the parent object. */ |
9097 | offset = 0; |
9098 | bitpos = 0; |
9099 | inner = TREE_OPERAND (exp, 0); |
9100 | break; |
9101 | |
9102 | case IMAGPART_EXPR: |
9103 | /* The imaginary part of the complex number is always second. |
9104 | The expression is therefore always offset by the size of the |
9105 | scalar type. */ |
9106 | offset = 0; |
9107 | bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp))); |
9108 | inner = TREE_OPERAND (exp, 0); |
9109 | break; |
9110 | |
9111 | case COMPOUND_LITERAL_EXPR: |
9112 | /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from |
9113 | initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL |
9114 | with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static |
9115 | array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL; |
9116 | the initializers aren't gimplified. */ |
9117 | if (COMPOUND_LITERAL_EXPR_DECL (exp) |
9118 | && is_global_var (COMPOUND_LITERAL_EXPR_DECL (exp))) |
9119 | return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp), |
9120 | target, tmode, modifier, as); |
9121 | /* FALLTHRU */ |
9122 | default: |
9123 | /* If the object is a DECL, then expand it for its rtl. Don't bypass |
9124 | expand_expr, as that can have various side effects; LABEL_DECLs for |
9125 | example, may not have their DECL_RTL set yet. Expand the rtl of |
9126 | CONSTRUCTORs too, which should yield a memory reference for the |
9127 | constructor's contents. Assume language specific tree nodes can |
9128 | be expanded in some interesting way. */ |
9129 | gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE); |
9130 | if (DECL_P (exp) |
9131 | || TREE_CODE (exp) == CONSTRUCTOR |
9132 | || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR) |
9133 | { |
9134 | result = expand_expr (exp, target, mode: tmode, |
9135 | modifier: modifier == EXPAND_INITIALIZER |
9136 | ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS); |
9137 | |
9138 | /* If the DECL isn't in memory, then the DECL wasn't properly |
9139 | marked TREE_ADDRESSABLE, which will be either a front-end |
9140 | or a tree optimizer bug. */ |
9141 | |
9142 | gcc_assert (MEM_P (result)); |
9143 | result = XEXP (result, 0); |
9144 | |
9145 | /* ??? Is this needed anymore? */ |
9146 | if (DECL_P (exp)) |
9147 | TREE_USED (exp) = 1; |
9148 | |
9149 | if (modifier != EXPAND_INITIALIZER |
9150 | && modifier != EXPAND_CONST_ADDRESS |
9151 | && modifier != EXPAND_SUM) |
9152 | result = force_operand (value: result, target); |
9153 | return result; |
9154 | } |
9155 | |
9156 | /* Pass FALSE as the last argument to get_inner_reference although |
9157 | we are expanding to RTL. The rationale is that we know how to |
9158 | handle "aligning nodes" here: we can just bypass them because |
9159 | they won't change the final object whose address will be returned |
9160 | (they actually exist only for that purpose). */ |
9161 | inner = get_inner_reference (exp, pbitsize: &bitsize, pbitpos: &bitpos, poffset: &offset, pmode: &mode1, |
9162 | punsignedp: &unsignedp, preversep: &reversep, pvolatilep: &volatilep); |
9163 | break; |
9164 | } |
9165 | |
9166 | /* We must have made progress. */ |
9167 | gcc_assert (inner != exp); |
9168 | |
9169 | subtarget = offset || maybe_ne (a: bitpos, b: 0) ? NULL_RTX : target; |
9170 | /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than |
9171 | inner alignment, force the inner to be sufficiently aligned. */ |
9172 | if (CONSTANT_CLASS_P (inner) |
9173 | && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp))) |
9174 | { |
9175 | inner = copy_node (inner); |
9176 | TREE_TYPE (inner) = copy_node (TREE_TYPE (inner)); |
9177 | SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp))); |
9178 | TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1; |
9179 | } |
9180 | result = expand_expr_addr_expr_1 (exp: inner, target: subtarget, tmode, modifier, as); |
9181 | |
9182 | if (offset) |
9183 | { |
9184 | rtx tmp; |
9185 | |
9186 | if (modifier != EXPAND_NORMAL) |
9187 | result = force_operand (value: result, NULL); |
9188 | tmp = expand_expr (exp: offset, NULL_RTX, mode: tmode, |
9189 | modifier: modifier == EXPAND_INITIALIZER |
9190 | ? EXPAND_INITIALIZER : EXPAND_NORMAL); |
9191 | |
9192 | /* expand_expr is allowed to return an object in a mode other |
9193 | than TMODE. If it did, we need to convert. */ |
9194 | if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp)) |
9195 | tmp = convert_modes (mode: tmode, GET_MODE (tmp), |
9196 | x: tmp, TYPE_UNSIGNED (TREE_TYPE (offset))); |
9197 | result = convert_memory_address_addr_space (tmode, result, as); |
9198 | tmp = convert_memory_address_addr_space (tmode, tmp, as); |
9199 | |
9200 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) |
9201 | result = simplify_gen_binary (code: PLUS, mode: tmode, op0: result, op1: tmp); |
9202 | else |
9203 | { |
9204 | subtarget = maybe_ne (a: bitpos, b: 0) ? NULL_RTX : target; |
9205 | result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget, |
9206 | 1, OPTAB_LIB_WIDEN); |
9207 | } |
9208 | } |
9209 | |
9210 | if (maybe_ne (a: bitpos, b: 0)) |
9211 | { |
9212 | /* Someone beforehand should have rejected taking the address |
9213 | of an object that isn't byte-aligned. */ |
9214 | poly_int64 bytepos = exact_div (a: bitpos, BITS_PER_UNIT); |
9215 | result = convert_memory_address_addr_space (tmode, result, as); |
9216 | result = plus_constant (tmode, result, bytepos); |
9217 | if (modifier < EXPAND_SUM) |
9218 | result = force_operand (value: result, target); |
9219 | } |
9220 | |
9221 | return result; |
9222 | } |
9223 | |
9224 | /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR. |
9225 | The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ |
9226 | |
9227 | static rtx |
9228 | expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode, |
9229 | enum expand_modifier modifier) |
9230 | { |
9231 | addr_space_t as = ADDR_SPACE_GENERIC; |
9232 | scalar_int_mode address_mode = Pmode; |
9233 | scalar_int_mode pointer_mode = ptr_mode; |
9234 | machine_mode rmode; |
9235 | rtx result; |
9236 | |
9237 | /* Target mode of VOIDmode says "whatever's natural". */ |
9238 | if (tmode == VOIDmode) |
9239 | tmode = TYPE_MODE (TREE_TYPE (exp)); |
9240 | |
9241 | if (POINTER_TYPE_P (TREE_TYPE (exp))) |
9242 | { |
9243 | as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp))); |
9244 | address_mode = targetm.addr_space.address_mode (as); |
9245 | pointer_mode = targetm.addr_space.pointer_mode (as); |
9246 | } |
9247 | |
9248 | /* We can get called with some Weird Things if the user does silliness |
9249 | like "(short) &a". In that case, convert_memory_address won't do |
9250 | the right thing, so ignore the given target mode. */ |
9251 | scalar_int_mode new_tmode = (tmode == pointer_mode |
9252 | ? pointer_mode |
9253 | : address_mode); |
9254 | |
9255 | result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target, |
9256 | tmode: new_tmode, modifier, as); |
9257 | |
9258 | /* Despite expand_expr claims concerning ignoring TMODE when not |
9259 | strictly convenient, stuff breaks if we don't honor it. Note |
9260 | that combined with the above, we only do this for pointer modes. */ |
9261 | rmode = GET_MODE (result); |
9262 | if (rmode == VOIDmode) |
9263 | rmode = new_tmode; |
9264 | if (rmode != new_tmode) |
9265 | result = convert_memory_address_addr_space (new_tmode, result, as); |
9266 | |
9267 | return result; |
9268 | } |
9269 | |
9270 | /* Generate code for computing CONSTRUCTOR EXP. |
9271 | An rtx for the computed value is returned. If AVOID_TEMP_MEM |
9272 | is TRUE, instead of creating a temporary variable in memory |
9273 | NULL is returned and the caller needs to handle it differently. */ |
9274 | |
9275 | static rtx |
9276 | expand_constructor (tree exp, rtx target, enum expand_modifier modifier, |
9277 | bool avoid_temp_mem) |
9278 | { |
9279 | tree type = TREE_TYPE (exp); |
9280 | machine_mode mode = TYPE_MODE (type); |
9281 | |
9282 | /* Try to avoid creating a temporary at all. This is possible |
9283 | if all of the initializer is zero. |
9284 | FIXME: try to handle all [0..255] initializers we can handle |
9285 | with memset. */ |
9286 | if (TREE_STATIC (exp) |
9287 | && !TREE_ADDRESSABLE (exp) |
9288 | && target != 0 && mode == BLKmode |
9289 | && all_zeros_p (exp)) |
9290 | { |
9291 | clear_storage (object: target, size: expr_size (exp), method: BLOCK_OP_NORMAL); |
9292 | return target; |
9293 | } |
9294 | |
9295 | /* All elts simple constants => refer to a constant in memory. But |
9296 | if this is a non-BLKmode mode, let it store a field at a time |
9297 | since that should make a CONST_INT, CONST_WIDE_INT or |
9298 | CONST_DOUBLE when we fold. Likewise, if we have a target we can |
9299 | use, it is best to store directly into the target unless the type |
9300 | is large enough that memcpy will be used. If we are making an |
9301 | initializer and all operands are constant, put it in memory as |
9302 | well. |
9303 | |
9304 | FIXME: Avoid trying to fill vector constructors piece-meal. |
9305 | Output them with output_constant_def below unless we're sure |
9306 | they're zeros. This should go away when vector initializers |
9307 | are treated like VECTOR_CST instead of arrays. */ |
9308 | if ((TREE_STATIC (exp) |
9309 | && ((mode == BLKmode |
9310 | && ! (target != 0 && safe_from_p (x: target, exp, top_p: 1))) |
9311 | || TREE_ADDRESSABLE (exp) |
9312 | || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)) |
9313 | && (! can_move_by_pieces |
9314 | (len: tree_to_uhwi (TYPE_SIZE_UNIT (type)), |
9315 | TYPE_ALIGN (type))) |
9316 | && ! mostly_zeros_p (exp)))) |
9317 | || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS) |
9318 | && TREE_CONSTANT (exp))) |
9319 | { |
9320 | rtx constructor; |
9321 | |
9322 | if (avoid_temp_mem) |
9323 | return NULL_RTX; |
9324 | |
9325 | constructor = expand_expr_constant (exp, defer: 1, modifier); |
9326 | |
9327 | if (modifier != EXPAND_CONST_ADDRESS |
9328 | && modifier != EXPAND_INITIALIZER |
9329 | && modifier != EXPAND_SUM) |
9330 | constructor = validize_mem (constructor); |
9331 | |
9332 | return constructor; |
9333 | } |
9334 | |
9335 | /* If the CTOR is available in static storage and not mostly |
9336 | zeros and we can move it by pieces prefer to do so since |
9337 | that's usually more efficient than performing a series of |
9338 | stores from immediates. */ |
9339 | if (avoid_temp_mem |
9340 | && TREE_STATIC (exp) |
9341 | && TREE_CONSTANT (exp) |
9342 | && tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)) |
9343 | && can_move_by_pieces (len: tree_to_uhwi (TYPE_SIZE_UNIT (type)), |
9344 | TYPE_ALIGN (type)) |
9345 | && ! mostly_zeros_p (exp)) |
9346 | return NULL_RTX; |
9347 | |
9348 | /* Handle calls that pass values in multiple non-contiguous |
9349 | locations. The Irix 6 ABI has examples of this. */ |
9350 | if (target == 0 || ! safe_from_p (x: target, exp, top_p: 1) |
9351 | || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM |
9352 | /* Also make a temporary if the store is to volatile memory, to |
9353 | avoid individual accesses to aggregate members. */ |
9354 | || (GET_CODE (target) == MEM |
9355 | && MEM_VOLATILE_P (target) |
9356 | && !TREE_ADDRESSABLE (TREE_TYPE (exp)))) |
9357 | { |
9358 | if (avoid_temp_mem) |
9359 | return NULL_RTX; |
9360 | |
9361 | target = assign_temp (type, TREE_ADDRESSABLE (exp), 1); |
9362 | } |
9363 | |
9364 | store_constructor (exp, target, cleared: 0, size: int_expr_size (exp), reverse: false); |
9365 | return target; |
9366 | } |
9367 | |
9368 | |
9369 | /* expand_expr: generate code for computing expression EXP. |
9370 | An rtx for the computed value is returned. The value is never null. |
9371 | In the case of a void EXP, const0_rtx is returned. |
9372 | |
9373 | The value may be stored in TARGET if TARGET is nonzero. |
9374 | TARGET is just a suggestion; callers must assume that |
9375 | the rtx returned may not be the same as TARGET. |
9376 | |
9377 | If TARGET is CONST0_RTX, it means that the value will be ignored. |
9378 | |
9379 | If TMODE is not VOIDmode, it suggests generating the |
9380 | result in mode TMODE. But this is done only when convenient. |
9381 | Otherwise, TMODE is ignored and the value generated in its natural mode. |
9382 | TMODE is just a suggestion; callers must assume that |
9383 | the rtx returned may not have mode TMODE. |
9384 | |
9385 | Note that TARGET may have neither TMODE nor MODE. In that case, it |
9386 | probably will not be used. |
9387 | |
9388 | If MODIFIER is EXPAND_SUM then when EXP is an addition |
9389 | we can return an rtx of the form (MULT (REG ...) (CONST_INT ...)) |
9390 | or a nest of (PLUS ...) and (MINUS ...) where the terms are |
9391 | products as above, or REG or MEM, or constant. |
9392 | Ordinarily in such cases we would output mul or add instructions |
9393 | and then return a pseudo reg containing the sum. |
9394 | |
9395 | EXPAND_INITIALIZER is much like EXPAND_SUM except that |
9396 | it also marks a label as absolutely required (it can't be dead). |
9397 | It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns. |
9398 | This is used for outputting expressions used in initializers. |
9399 | |
9400 | EXPAND_CONST_ADDRESS says that it is okay to return a MEM |
9401 | with a constant address even if that address is not normally legitimate. |
9402 | EXPAND_INITIALIZER and EXPAND_SUM also have this effect. |
9403 | |
9404 | EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for |
9405 | a call parameter. Such targets require special care as we haven't yet |
9406 | marked TARGET so that it's safe from being trashed by libcalls. We |
9407 | don't want to use TARGET for anything but the final result; |
9408 | Intermediate values must go elsewhere. Additionally, calls to |
9409 | emit_block_move will be flagged with BLOCK_OP_CALL_PARM. |
9410 | |
9411 | If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid |
9412 | address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the |
9413 | DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a |
9414 | COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on |
9415 | recursively. |
9416 | If the result can be stored at TARGET, and ALT_RTL is non-NULL, |
9417 | then *ALT_RTL is set to TARGET (before legitimziation). |
9418 | |
9419 | If INNER_REFERENCE_P is true, we are expanding an inner reference. |
9420 | In this case, we don't adjust a returned MEM rtx that wouldn't be |
9421 | sufficiently aligned for its mode; instead, it's up to the caller |
9422 | to deal with it afterwards. This is used to make sure that unaligned |
9423 | base objects for which out-of-bounds accesses are supported, for |
9424 | example record types with trailing arrays, aren't realigned behind |
9425 | the back of the caller. |
9426 | The normal operating mode is to pass FALSE for this parameter. */ |
9427 | |
9428 | rtx |
9429 | expand_expr_real (tree exp, rtx target, machine_mode tmode, |
9430 | enum expand_modifier modifier, rtx *alt_rtl, |
9431 | bool inner_reference_p) |
9432 | { |
9433 | rtx ret; |
9434 | |
9435 | /* Handle ERROR_MARK before anybody tries to access its type. */ |
9436 | if (TREE_CODE (exp) == ERROR_MARK |
9437 | || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)) |
9438 | { |
9439 | ret = CONST0_RTX (tmode); |
9440 | return ret ? ret : const0_rtx; |
9441 | } |
9442 | |
9443 | ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl, |
9444 | inner_reference_p); |
9445 | return ret; |
9446 | } |
9447 | |
9448 | /* Try to expand the conditional expression which is represented by |
9449 | TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds |
9450 | return the rtl reg which represents the result. Otherwise return |
9451 | NULL_RTX. */ |
9452 | |
9453 | static rtx |
9454 | expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, |
9455 | tree treeop1 ATTRIBUTE_UNUSED, |
9456 | tree treeop2 ATTRIBUTE_UNUSED) |
9457 | { |
9458 | rtx insn; |
9459 | rtx op00, op01, op1, op2; |
9460 | enum rtx_code comparison_code; |
9461 | machine_mode comparison_mode; |
9462 | gimple *srcstmt; |
9463 | rtx temp; |
9464 | tree type = TREE_TYPE (treeop1); |
9465 | int unsignedp = TYPE_UNSIGNED (type); |
9466 | machine_mode mode = TYPE_MODE (type); |
9467 | machine_mode orig_mode = mode; |
9468 | static bool expanding_cond_expr_using_cmove = false; |
9469 | |
9470 | /* Conditional move expansion can end up TERing two operands which, |
9471 | when recursively hitting conditional expressions can result in |
9472 | exponential behavior if the cmove expansion ultimatively fails. |
9473 | It's hardly profitable to TER a cmove into a cmove so avoid doing |
9474 | that by failing early if we end up recursing. */ |
9475 | if (expanding_cond_expr_using_cmove) |
9476 | return NULL_RTX; |
9477 | |
9478 | /* If we cannot do a conditional move on the mode, try doing it |
9479 | with the promoted mode. */ |
9480 | if (!can_conditionally_move_p (mode)) |
9481 | { |
9482 | mode = promote_mode (type, mode, &unsignedp); |
9483 | if (!can_conditionally_move_p (mode)) |
9484 | return NULL_RTX; |
9485 | temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */ |
9486 | } |
9487 | else |
9488 | temp = assign_temp (type, 0, 1); |
9489 | |
9490 | expanding_cond_expr_using_cmove = true; |
9491 | start_sequence (); |
9492 | expand_operands (exp0: treeop1, exp1: treeop2, |
9493 | target: mode == orig_mode ? temp : NULL_RTX, op0: &op1, op1: &op2, |
9494 | modifier: EXPAND_NORMAL); |
9495 | |
9496 | if (TREE_CODE (treeop0) == SSA_NAME |
9497 | && (srcstmt = get_def_for_expr_class (name: treeop0, tclass: tcc_comparison))) |
9498 | { |
9499 | type = TREE_TYPE (gimple_assign_rhs1 (srcstmt)); |
9500 | enum tree_code cmpcode = gimple_assign_rhs_code (gs: srcstmt); |
9501 | op00 = expand_normal (exp: gimple_assign_rhs1 (gs: srcstmt)); |
9502 | op01 = expand_normal (exp: gimple_assign_rhs2 (gs: srcstmt)); |
9503 | comparison_mode = TYPE_MODE (type); |
9504 | unsignedp = TYPE_UNSIGNED (type); |
9505 | comparison_code = convert_tree_comp_to_rtx (tcode: cmpcode, unsignedp); |
9506 | } |
9507 | else if (COMPARISON_CLASS_P (treeop0)) |
9508 | { |
9509 | type = TREE_TYPE (TREE_OPERAND (treeop0, 0)); |
9510 | enum tree_code cmpcode = TREE_CODE (treeop0); |
9511 | op00 = expand_normal (TREE_OPERAND (treeop0, 0)); |
9512 | op01 = expand_normal (TREE_OPERAND (treeop0, 1)); |
9513 | unsignedp = TYPE_UNSIGNED (type); |
9514 | comparison_mode = TYPE_MODE (type); |
9515 | comparison_code = convert_tree_comp_to_rtx (tcode: cmpcode, unsignedp); |
9516 | } |
9517 | else |
9518 | { |
9519 | op00 = expand_normal (exp: treeop0); |
9520 | op01 = const0_rtx; |
9521 | comparison_code = NE; |
9522 | comparison_mode = GET_MODE (op00); |
9523 | if (comparison_mode == VOIDmode) |
9524 | comparison_mode = TYPE_MODE (TREE_TYPE (treeop0)); |
9525 | } |
9526 | expanding_cond_expr_using_cmove = false; |
9527 | |
9528 | if (GET_MODE (op1) != mode) |
9529 | op1 = gen_lowpart (mode, op1); |
9530 | |
9531 | if (GET_MODE (op2) != mode) |
9532 | op2 = gen_lowpart (mode, op2); |
9533 | |
9534 | /* Try to emit the conditional move. */ |
9535 | insn = emit_conditional_move (temp, |
9536 | { .code: comparison_code, .op0: op00, .op1: op01, |
9537 | .mode: comparison_mode }, |
9538 | op1, op2, mode, |
9539 | unsignedp); |
9540 | |
9541 | /* If we could do the conditional move, emit the sequence, |
9542 | and return. */ |
9543 | if (insn) |
9544 | { |
9545 | rtx_insn *seq = get_insns (); |
9546 | end_sequence (); |
9547 | emit_insn (seq); |
9548 | return convert_modes (mode: orig_mode, oldmode: mode, x: temp, unsignedp: 0); |
9549 | } |
9550 | |
9551 | /* Otherwise discard the sequence and fall back to code with |
9552 | branches. */ |
9553 | end_sequence (); |
9554 | return NULL_RTX; |
9555 | } |
9556 | |
9557 | /* A helper function for expand_expr_real_2 to be used with a |
9558 | misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP |
9559 | is nonzero, with alignment ALIGN in bits. |
9560 | Store the value at TARGET if possible (if TARGET is nonzero). |
9561 | Regardless of TARGET, we return the rtx for where the value is placed. |
9562 | If the result can be stored at TARGET, and ALT_RTL is non-NULL, |
9563 | then *ALT_RTL is set to TARGET (before legitimziation). */ |
9564 | |
9565 | static rtx |
9566 | expand_misaligned_mem_ref (rtx temp, machine_mode mode, int unsignedp, |
9567 | unsigned int align, rtx target, rtx *alt_rtl) |
9568 | { |
9569 | enum insn_code icode; |
9570 | |
9571 | if ((icode = optab_handler (op: movmisalign_optab, mode)) |
9572 | != CODE_FOR_nothing) |
9573 | { |
9574 | class expand_operand ops[2]; |
9575 | |
9576 | /* We've already validated the memory, and we're creating a |
9577 | new pseudo destination. The predicates really can't fail, |
9578 | nor can the generator. */ |
9579 | create_output_operand (op: &ops[0], NULL_RTX, mode); |
9580 | create_fixed_operand (op: &ops[1], x: temp); |
9581 | expand_insn (icode, nops: 2, ops); |
9582 | temp = ops[0].value; |
9583 | } |
9584 | else if (targetm.slow_unaligned_access (mode, align)) |
9585 | temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), |
9586 | 0, unsignedp, target, |
9587 | mode, mode, false, alt_rtl); |
9588 | return temp; |
9589 | } |
9590 | |
9591 | /* Helper function of expand_expr_2, expand a division or modulo. |
9592 | op0 and op1 should be already expanded treeop0 and treeop1, using |
9593 | expand_operands. */ |
9594 | |
9595 | static rtx |
9596 | expand_expr_divmod (tree_code code, machine_mode mode, tree treeop0, |
9597 | tree treeop1, rtx op0, rtx op1, rtx target, int unsignedp) |
9598 | { |
9599 | bool mod_p = (code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR |
9600 | || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR); |
9601 | if (SCALAR_INT_MODE_P (mode) |
9602 | && optimize >= 2 |
9603 | && get_range_pos_neg (treeop0) == 1 |
9604 | && get_range_pos_neg (treeop1) == 1) |
9605 | { |
9606 | /* If both arguments are known to be positive when interpreted |
9607 | as signed, we can expand it as both signed and unsigned |
9608 | division or modulo. Choose the cheaper sequence in that case. */ |
9609 | bool speed_p = optimize_insn_for_speed_p (); |
9610 | do_pending_stack_adjust (); |
9611 | start_sequence (); |
9612 | rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1); |
9613 | rtx_insn *uns_insns = get_insns (); |
9614 | end_sequence (); |
9615 | start_sequence (); |
9616 | rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0); |
9617 | rtx_insn *sgn_insns = get_insns (); |
9618 | end_sequence (); |
9619 | unsigned uns_cost = seq_cost (uns_insns, speed_p); |
9620 | unsigned sgn_cost = seq_cost (sgn_insns, speed_p); |
9621 | |
9622 | /* If costs are the same then use as tie breaker the other other |
9623 | factor. */ |
9624 | if (uns_cost == sgn_cost) |
9625 | { |
9626 | uns_cost = seq_cost (uns_insns, !speed_p); |
9627 | sgn_cost = seq_cost (sgn_insns, !speed_p); |
9628 | } |
9629 | |
9630 | if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp)) |
9631 | { |
9632 | emit_insn (uns_insns); |
9633 | return uns_ret; |
9634 | } |
9635 | emit_insn (sgn_insns); |
9636 | return sgn_ret; |
9637 | } |
9638 | return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp); |
9639 | } |
9640 | |
9641 | rtx |
9642 | expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, |
9643 | enum expand_modifier modifier) |
9644 | { |
9645 | rtx op0, op1, op2, temp; |
9646 | rtx_code_label *lab; |
9647 | tree type; |
9648 | int unsignedp; |
9649 | machine_mode mode; |
9650 | scalar_int_mode int_mode; |
9651 | enum tree_code code = ops->code; |
9652 | optab this_optab; |
9653 | rtx subtarget, original_target; |
9654 | int ignore; |
9655 | bool reduce_bit_field; |
9656 | location_t loc = ops->location; |
9657 | tree treeop0, treeop1, treeop2; |
9658 | #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \ |
9659 | ? reduce_to_bit_field_precision ((expr), \ |
9660 | target, \ |
9661 | type) \ |
9662 | : (expr)) |
9663 | |
9664 | type = ops->type; |
9665 | mode = TYPE_MODE (type); |
9666 | unsignedp = TYPE_UNSIGNED (type); |
9667 | |
9668 | treeop0 = ops->op0; |
9669 | treeop1 = ops->op1; |
9670 | treeop2 = ops->op2; |
9671 | |
9672 | /* We should be called only on simple (binary or unary) expressions, |
9673 | exactly those that are valid in gimple expressions that aren't |
9674 | GIMPLE_SINGLE_RHS (or invalid). */ |
9675 | gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS |
9676 | || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS |
9677 | || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS); |
9678 | |
9679 | ignore = (target == const0_rtx |
9680 | || ((CONVERT_EXPR_CODE_P (code) |
9681 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) |
9682 | && TREE_CODE (type) == VOID_TYPE)); |
9683 | |
9684 | /* We should be called only if we need the result. */ |
9685 | gcc_assert (!ignore); |
9686 | |
9687 | /* An operation in what may be a bit-field type needs the |
9688 | result to be reduced to the precision of the bit-field type, |
9689 | which is narrower than that of the type's mode. */ |
9690 | reduce_bit_field = (INTEGRAL_TYPE_P (type) |
9691 | && !type_has_mode_precision_p (t: type)); |
9692 | |
9693 | if (reduce_bit_field |
9694 | && (modifier == EXPAND_STACK_PARM |
9695 | || (target && GET_MODE (target) != mode))) |
9696 | target = 0; |
9697 | |
9698 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
9699 | subtarget = get_subtarget (x: target); |
9700 | original_target = target; |
9701 | |
9702 | switch (code) |
9703 | { |
9704 | case NON_LVALUE_EXPR: |
9705 | case PAREN_EXPR: |
9706 | CASE_CONVERT: |
9707 | if (treeop0 == error_mark_node) |
9708 | return const0_rtx; |
9709 | |
9710 | if (TREE_CODE (type) == UNION_TYPE) |
9711 | { |
9712 | tree valtype = TREE_TYPE (treeop0); |
9713 | |
9714 | /* If both input and output are BLKmode, this conversion isn't doing |
9715 | anything except possibly changing memory attribute. */ |
9716 | if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode) |
9717 | { |
9718 | rtx result = expand_expr (exp: treeop0, target, mode: tmode, |
9719 | modifier); |
9720 | |
9721 | result = copy_rtx (result); |
9722 | set_mem_attributes (result, type, 0); |
9723 | return result; |
9724 | } |
9725 | |
9726 | if (target == 0) |
9727 | { |
9728 | if (TYPE_MODE (type) != BLKmode) |
9729 | target = gen_reg_rtx (TYPE_MODE (type)); |
9730 | else |
9731 | target = assign_temp (type, 1, 1); |
9732 | } |
9733 | |
9734 | if (MEM_P (target)) |
9735 | /* Store data into beginning of memory target. */ |
9736 | store_expr (exp: treeop0, |
9737 | adjust_address (target, TYPE_MODE (valtype), 0), |
9738 | call_param_p: modifier == EXPAND_STACK_PARM, |
9739 | nontemporal: false, TYPE_REVERSE_STORAGE_ORDER (type)); |
9740 | |
9741 | else |
9742 | { |
9743 | gcc_assert (REG_P (target) |
9744 | && !TYPE_REVERSE_STORAGE_ORDER (type)); |
9745 | |
9746 | /* Store this field into a union of the proper type. */ |
9747 | poly_uint64 op0_size |
9748 | = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0))); |
9749 | poly_uint64 union_size = GET_MODE_BITSIZE (mode); |
9750 | store_field (target, |
9751 | /* The conversion must be constructed so that |
9752 | we know at compile time how many bits |
9753 | to preserve. */ |
9754 | bitsize: ordered_min (a: op0_size, b: union_size), |
9755 | bitpos: 0, bitregion_start: 0, bitregion_end: 0, TYPE_MODE (valtype), exp: treeop0, alias_set: 0, |
9756 | nontemporal: false, reverse: false); |
9757 | } |
9758 | |
9759 | /* Return the entire union. */ |
9760 | return target; |
9761 | } |
9762 | |
9763 | if (mode == TYPE_MODE (TREE_TYPE (treeop0))) |
9764 | { |
9765 | op0 = expand_expr (exp: treeop0, target, VOIDmode, |
9766 | modifier); |
9767 | |
9768 | return REDUCE_BIT_FIELD (op0); |
9769 | } |
9770 | |
9771 | op0 = expand_expr (exp: treeop0, NULL_RTX, mode, |
9772 | modifier: modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier); |
9773 | if (GET_MODE (op0) == mode) |
9774 | ; |
9775 | |
9776 | /* If OP0 is a constant, just convert it into the proper mode. */ |
9777 | else if (CONSTANT_P (op0)) |
9778 | { |
9779 | tree inner_type = TREE_TYPE (treeop0); |
9780 | machine_mode inner_mode = GET_MODE (op0); |
9781 | |
9782 | if (inner_mode == VOIDmode) |
9783 | inner_mode = TYPE_MODE (inner_type); |
9784 | |
9785 | if (modifier == EXPAND_INITIALIZER) |
9786 | op0 = lowpart_subreg (outermode: mode, op: op0, innermode: inner_mode); |
9787 | else |
9788 | op0= convert_modes (mode, oldmode: inner_mode, x: op0, |
9789 | TYPE_UNSIGNED (inner_type)); |
9790 | } |
9791 | |
9792 | else if (modifier == EXPAND_INITIALIZER) |
9793 | op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0)) |
9794 | ? ZERO_EXTEND : SIGN_EXTEND, mode, op0); |
9795 | |
9796 | else if (target == 0) |
9797 | op0 = convert_to_mode (mode, x: op0, |
9798 | TYPE_UNSIGNED (TREE_TYPE |
9799 | (treeop0))); |
9800 | else |
9801 | { |
9802 | convert_move (to: target, from: op0, |
9803 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
9804 | op0 = target; |
9805 | } |
9806 | |
9807 | return REDUCE_BIT_FIELD (op0); |
9808 | |
9809 | case ADDR_SPACE_CONVERT_EXPR: |
9810 | { |
9811 | tree treeop0_type = TREE_TYPE (treeop0); |
9812 | |
9813 | gcc_assert (POINTER_TYPE_P (type)); |
9814 | gcc_assert (POINTER_TYPE_P (treeop0_type)); |
9815 | |
9816 | addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type)); |
9817 | addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type)); |
9818 | |
9819 | /* Conversions between pointers to the same address space should |
9820 | have been implemented via CONVERT_EXPR / NOP_EXPR. */ |
9821 | gcc_assert (as_to != as_from); |
9822 | |
9823 | op0 = expand_expr (exp: treeop0, NULL_RTX, VOIDmode, modifier); |
9824 | |
9825 | /* Ask target code to handle conversion between pointers |
9826 | to overlapping address spaces. */ |
9827 | if (targetm.addr_space.subset_p (as_to, as_from) |
9828 | || targetm.addr_space.subset_p (as_from, as_to)) |
9829 | { |
9830 | op0 = targetm.addr_space.convert (op0, treeop0_type, type); |
9831 | } |
9832 | else |
9833 | { |
9834 | /* For disjoint address spaces, converting anything but a null |
9835 | pointer invokes undefined behavior. We truncate or extend the |
9836 | value as if we'd converted via integers, which handles 0 as |
9837 | required, and all others as the programmer likely expects. */ |
9838 | #ifndef POINTERS_EXTEND_UNSIGNED |
9839 | const int POINTERS_EXTEND_UNSIGNED = 1; |
9840 | #endif |
9841 | op0 = convert_modes (mode, TYPE_MODE (treeop0_type), |
9842 | x: op0, POINTERS_EXTEND_UNSIGNED); |
9843 | } |
9844 | gcc_assert (op0); |
9845 | return op0; |
9846 | } |
9847 | |
9848 | case POINTER_PLUS_EXPR: |
9849 | /* Even though the sizetype mode and the pointer's mode can be different |
9850 | expand is able to handle this correctly and get the correct result out |
9851 | of the PLUS_EXPR code. */ |
9852 | /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR |
9853 | if sizetype precision is smaller than pointer precision. */ |
9854 | if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type)) |
9855 | treeop1 = fold_convert_loc (loc, type, |
9856 | fold_convert_loc (loc, ssizetype, |
9857 | treeop1)); |
9858 | /* If sizetype precision is larger than pointer precision, truncate the |
9859 | offset to have matching modes. */ |
9860 | else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type)) |
9861 | treeop1 = fold_convert_loc (loc, type, treeop1); |
9862 | /* FALLTHRU */ |
9863 | |
9864 | case PLUS_EXPR: |
9865 | /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and |
9866 | something else, make sure we add the register to the constant and |
9867 | then to the other thing. This case can occur during strength |
9868 | reduction and doing it this way will produce better code if the |
9869 | frame pointer or argument pointer is eliminated. |
9870 | |
9871 | fold-const.cc will ensure that the constant is always in the inner |
9872 | PLUS_EXPR, so the only case we need to do anything about is if |
9873 | sp, ap, or fp is our second argument, in which case we must swap |
9874 | the innermost first argument and our second argument. */ |
9875 | |
9876 | if (TREE_CODE (treeop0) == PLUS_EXPR |
9877 | && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST |
9878 | && VAR_P (treeop1) |
9879 | && (DECL_RTL (treeop1) == frame_pointer_rtx |
9880 | || DECL_RTL (treeop1) == stack_pointer_rtx |
9881 | || DECL_RTL (treeop1) == arg_pointer_rtx)) |
9882 | { |
9883 | gcc_unreachable (); |
9884 | } |
9885 | |
9886 | /* If the result is to be ptr_mode and we are adding an integer to |
9887 | something, we might be forming a constant. So try to use |
9888 | plus_constant. If it produces a sum and we can't accept it, |
9889 | use force_operand. This allows P = &ARR[const] to generate |
9890 | efficient code on machines where a SYMBOL_REF is not a valid |
9891 | address. |
9892 | |
9893 | If this is an EXPAND_SUM call, always return the sum. */ |
9894 | if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER |
9895 | || (mode == ptr_mode && (unsignedp || ! flag_trapv))) |
9896 | { |
9897 | if (modifier == EXPAND_STACK_PARM) |
9898 | target = 0; |
9899 | if (TREE_CODE (treeop0) == INTEGER_CST |
9900 | && HWI_COMPUTABLE_MODE_P (mode) |
9901 | && TREE_CONSTANT (treeop1)) |
9902 | { |
9903 | rtx constant_part; |
9904 | HOST_WIDE_INT wc; |
9905 | machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1)); |
9906 | |
9907 | op1 = expand_expr (exp: treeop1, target: subtarget, VOIDmode, |
9908 | modifier: EXPAND_SUM); |
9909 | /* Use wi::shwi to ensure that the constant is |
9910 | truncated according to the mode of OP1, then sign extended |
9911 | to a HOST_WIDE_INT. Using the constant directly can result |
9912 | in non-canonical RTL in a 64x32 cross compile. */ |
9913 | wc = TREE_INT_CST_LOW (treeop0); |
9914 | constant_part = |
9915 | immed_wide_int_const (wi::shwi (val: wc, mode: wmode), wmode); |
9916 | op1 = plus_constant (mode, op1, INTVAL (constant_part)); |
9917 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) |
9918 | op1 = force_operand (value: op1, target); |
9919 | return REDUCE_BIT_FIELD (op1); |
9920 | } |
9921 | |
9922 | else if (TREE_CODE (treeop1) == INTEGER_CST |
9923 | && HWI_COMPUTABLE_MODE_P (mode) |
9924 | && TREE_CONSTANT (treeop0)) |
9925 | { |
9926 | rtx constant_part; |
9927 | HOST_WIDE_INT wc; |
9928 | machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0)); |
9929 | |
9930 | op0 = expand_expr (exp: treeop0, target: subtarget, VOIDmode, |
9931 | modifier: (modifier == EXPAND_INITIALIZER |
9932 | ? EXPAND_INITIALIZER : EXPAND_SUM)); |
9933 | if (! CONSTANT_P (op0)) |
9934 | { |
9935 | op1 = expand_expr (exp: treeop1, NULL_RTX, |
9936 | VOIDmode, modifier); |
9937 | /* Return a PLUS if modifier says it's OK. */ |
9938 | if (modifier == EXPAND_SUM |
9939 | || modifier == EXPAND_INITIALIZER) |
9940 | return simplify_gen_binary (code: PLUS, mode, op0, op1); |
9941 | goto binop2; |
9942 | } |
9943 | /* Use wi::shwi to ensure that the constant is |
9944 | truncated according to the mode of OP1, then sign extended |
9945 | to a HOST_WIDE_INT. Using the constant directly can result |
9946 | in non-canonical RTL in a 64x32 cross compile. */ |
9947 | wc = TREE_INT_CST_LOW (treeop1); |
9948 | constant_part |
9949 | = immed_wide_int_const (wi::shwi (val: wc, mode: wmode), wmode); |
9950 | op0 = plus_constant (mode, op0, INTVAL (constant_part)); |
9951 | if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) |
9952 | op0 = force_operand (value: op0, target); |
9953 | return REDUCE_BIT_FIELD (op0); |
9954 | } |
9955 | } |
9956 | |
9957 | /* Use TER to expand pointer addition of a negated value |
9958 | as pointer subtraction. */ |
9959 | if ((POINTER_TYPE_P (TREE_TYPE (treeop0)) |
9960 | || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE |
9961 | && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0))))) |
9962 | && TREE_CODE (treeop1) == SSA_NAME |
9963 | && TYPE_MODE (TREE_TYPE (treeop0)) |
9964 | == TYPE_MODE (TREE_TYPE (treeop1))) |
9965 | { |
9966 | gimple *def = get_def_for_expr (name: treeop1, code: NEGATE_EXPR); |
9967 | if (def) |
9968 | { |
9969 | treeop1 = gimple_assign_rhs1 (gs: def); |
9970 | code = MINUS_EXPR; |
9971 | goto do_minus; |
9972 | } |
9973 | } |
9974 | |
9975 | /* No sense saving up arithmetic to be done |
9976 | if it's all in the wrong mode to form part of an address. |
9977 | And force_operand won't know whether to sign-extend or |
9978 | zero-extend. */ |
9979 | if (modifier != EXPAND_INITIALIZER |
9980 | && (modifier != EXPAND_SUM || mode != ptr_mode)) |
9981 | { |
9982 | expand_operands (exp0: treeop0, exp1: treeop1, |
9983 | target: subtarget, op0: &op0, op1: &op1, modifier); |
9984 | if (op0 == const0_rtx) |
9985 | return op1; |
9986 | if (op1 == const0_rtx) |
9987 | return op0; |
9988 | goto binop2; |
9989 | } |
9990 | |
9991 | expand_operands (exp0: treeop0, exp1: treeop1, |
9992 | target: subtarget, op0: &op0, op1: &op1, modifier); |
9993 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); |
9994 | |
9995 | case MINUS_EXPR: |
9996 | case POINTER_DIFF_EXPR: |
9997 | do_minus: |
9998 | /* For initializers, we are allowed to return a MINUS of two |
9999 | symbolic constants. Here we handle all cases when both operands |
10000 | are constant. */ |
10001 | /* Handle difference of two symbolic constants, |
10002 | for the sake of an initializer. */ |
10003 | if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) |
10004 | && really_constant_p (treeop0) |
10005 | && really_constant_p (treeop1)) |
10006 | { |
10007 | expand_operands (exp0: treeop0, exp1: treeop1, |
10008 | NULL_RTX, op0: &op0, op1: &op1, modifier); |
10009 | return simplify_gen_binary (code: MINUS, mode, op0, op1); |
10010 | } |
10011 | |
10012 | /* No sense saving up arithmetic to be done |
10013 | if it's all in the wrong mode to form part of an address. |
10014 | And force_operand won't know whether to sign-extend or |
10015 | zero-extend. */ |
10016 | if (modifier != EXPAND_INITIALIZER |
10017 | && (modifier != EXPAND_SUM || mode != ptr_mode)) |
10018 | goto binop; |
10019 | |
10020 | expand_operands (exp0: treeop0, exp1: treeop1, |
10021 | target: subtarget, op0: &op0, op1: &op1, modifier); |
10022 | |
10023 | /* Convert A - const to A + (-const). */ |
10024 | if (CONST_INT_P (op1)) |
10025 | { |
10026 | op1 = negate_rtx (mode, op1); |
10027 | return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); |
10028 | } |
10029 | |
10030 | goto binop2; |
10031 | |
10032 | case WIDEN_MULT_PLUS_EXPR: |
10033 | case WIDEN_MULT_MINUS_EXPR: |
10034 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10035 | op2 = expand_normal (exp: treeop2); |
10036 | target = expand_widen_pattern_expr (ops, op0, op1, op2, |
10037 | target, unsignedp); |
10038 | return target; |
10039 | |
10040 | case WIDEN_MULT_EXPR: |
10041 | /* If first operand is constant, swap them. |
10042 | Thus the following special case checks need only |
10043 | check the second operand. */ |
10044 | if (TREE_CODE (treeop0) == INTEGER_CST) |
10045 | std::swap (a&: treeop0, b&: treeop1); |
10046 | |
10047 | /* First, check if we have a multiplication of one signed and one |
10048 | unsigned operand. */ |
10049 | if (TREE_CODE (treeop1) != INTEGER_CST |
10050 | && (TYPE_UNSIGNED (TREE_TYPE (treeop0)) |
10051 | != TYPE_UNSIGNED (TREE_TYPE (treeop1)))) |
10052 | { |
10053 | machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); |
10054 | this_optab = usmul_widen_optab; |
10055 | if (find_widening_optab_handler (this_optab, mode, innermode) |
10056 | != CODE_FOR_nothing) |
10057 | { |
10058 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) |
10059 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op0, op1: &op1, |
10060 | modifier: EXPAND_NORMAL); |
10061 | else |
10062 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op1, op1: &op0, |
10063 | modifier: EXPAND_NORMAL); |
10064 | /* op0 and op1 might still be constant, despite the above |
10065 | != INTEGER_CST check. Handle it. */ |
10066 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) |
10067 | { |
10068 | op0 = convert_modes (mode, oldmode: innermode, x: op0, unsignedp: true); |
10069 | op1 = convert_modes (mode, oldmode: innermode, x: op1, unsignedp: false); |
10070 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, |
10071 | target, unsignedp)); |
10072 | } |
10073 | goto binop3; |
10074 | } |
10075 | } |
10076 | /* Check for a multiplication with matching signedness. */ |
10077 | else if ((TREE_CODE (treeop1) == INTEGER_CST |
10078 | && int_fits_type_p (treeop1, TREE_TYPE (treeop0))) |
10079 | || (TYPE_UNSIGNED (TREE_TYPE (treeop1)) |
10080 | == TYPE_UNSIGNED (TREE_TYPE (treeop0)))) |
10081 | { |
10082 | tree op0type = TREE_TYPE (treeop0); |
10083 | machine_mode innermode = TYPE_MODE (op0type); |
10084 | bool zextend_p = TYPE_UNSIGNED (op0type); |
10085 | optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; |
10086 | this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; |
10087 | |
10088 | if (TREE_CODE (treeop0) != INTEGER_CST) |
10089 | { |
10090 | if (find_widening_optab_handler (this_optab, mode, innermode) |
10091 | != CODE_FOR_nothing) |
10092 | { |
10093 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op0, op1: &op1, |
10094 | modifier: EXPAND_NORMAL); |
10095 | /* op0 and op1 might still be constant, despite the above |
10096 | != INTEGER_CST check. Handle it. */ |
10097 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) |
10098 | { |
10099 | widen_mult_const: |
10100 | op0 = convert_modes (mode, oldmode: innermode, x: op0, unsignedp: zextend_p); |
10101 | op1 |
10102 | = convert_modes (mode, oldmode: innermode, x: op1, |
10103 | TYPE_UNSIGNED (TREE_TYPE (treeop1))); |
10104 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, |
10105 | target, |
10106 | unsignedp)); |
10107 | } |
10108 | temp = expand_widening_mult (mode, op0, op1, target, |
10109 | unsignedp, this_optab); |
10110 | return REDUCE_BIT_FIELD (temp); |
10111 | } |
10112 | if (find_widening_optab_handler (other_optab, mode, innermode) |
10113 | != CODE_FOR_nothing |
10114 | && innermode == word_mode) |
10115 | { |
10116 | rtx htem, hipart; |
10117 | op0 = expand_normal (exp: treeop0); |
10118 | op1 = expand_normal (exp: treeop1); |
10119 | /* op0 and op1 might be constants, despite the above |
10120 | != INTEGER_CST check. Handle it. */ |
10121 | if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) |
10122 | goto widen_mult_const; |
10123 | temp = expand_binop (mode, other_optab, op0, op1, target, |
10124 | unsignedp, OPTAB_LIB_WIDEN); |
10125 | hipart = gen_highpart (word_mode, temp); |
10126 | htem = expand_mult_highpart_adjust (word_mode, hipart, |
10127 | op0, op1, hipart, |
10128 | zextend_p); |
10129 | if (htem != hipart) |
10130 | emit_move_insn (x: hipart, y: htem); |
10131 | return REDUCE_BIT_FIELD (temp); |
10132 | } |
10133 | } |
10134 | } |
10135 | treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0); |
10136 | treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1); |
10137 | expand_operands (exp0: treeop0, exp1: treeop1, target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10138 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); |
10139 | |
10140 | case MULT_EXPR: |
10141 | /* If this is a fixed-point operation, then we cannot use the code |
10142 | below because "expand_mult" doesn't support sat/no-sat fixed-point |
10143 | multiplications. */ |
10144 | if (ALL_FIXED_POINT_MODE_P (mode)) |
10145 | goto binop; |
10146 | |
10147 | /* If first operand is constant, swap them. |
10148 | Thus the following special case checks need only |
10149 | check the second operand. */ |
10150 | if (TREE_CODE (treeop0) == INTEGER_CST) |
10151 | std::swap (a&: treeop0, b&: treeop1); |
10152 | |
10153 | /* Attempt to return something suitable for generating an |
10154 | indexed address, for machines that support that. */ |
10155 | |
10156 | if (modifier == EXPAND_SUM && mode == ptr_mode |
10157 | && tree_fits_shwi_p (treeop1)) |
10158 | { |
10159 | tree exp1 = treeop1; |
10160 | |
10161 | op0 = expand_expr (exp: treeop0, target: subtarget, VOIDmode, |
10162 | modifier: EXPAND_SUM); |
10163 | |
10164 | if (!REG_P (op0)) |
10165 | op0 = force_operand (value: op0, NULL_RTX); |
10166 | if (!REG_P (op0)) |
10167 | op0 = copy_to_mode_reg (mode, op0); |
10168 | |
10169 | op1 = gen_int_mode (tree_to_shwi (exp1), |
10170 | TYPE_MODE (TREE_TYPE (exp1))); |
10171 | return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0, op1)); |
10172 | } |
10173 | |
10174 | if (modifier == EXPAND_STACK_PARM) |
10175 | target = 0; |
10176 | |
10177 | if (SCALAR_INT_MODE_P (mode) && optimize >= 2) |
10178 | { |
10179 | gimple *def_stmt0 = get_def_for_expr (name: treeop0, code: TRUNC_DIV_EXPR); |
10180 | gimple *def_stmt1 = get_def_for_expr (name: treeop1, code: TRUNC_DIV_EXPR); |
10181 | if (def_stmt0 |
10182 | && !operand_equal_p (treeop1, gimple_assign_rhs2 (gs: def_stmt0), flags: 0)) |
10183 | def_stmt0 = NULL; |
10184 | if (def_stmt1 |
10185 | && !operand_equal_p (treeop0, gimple_assign_rhs2 (gs: def_stmt1), flags: 0)) |
10186 | def_stmt1 = NULL; |
10187 | |
10188 | if (def_stmt0 || def_stmt1) |
10189 | { |
10190 | /* X / Y * Y can be expanded as X - X % Y too. |
10191 | Choose the cheaper sequence of those two. */ |
10192 | if (def_stmt0) |
10193 | treeop0 = gimple_assign_rhs1 (gs: def_stmt0); |
10194 | else |
10195 | { |
10196 | treeop1 = treeop0; |
10197 | treeop0 = gimple_assign_rhs1 (gs: def_stmt1); |
10198 | } |
10199 | expand_operands (exp0: treeop0, exp1: treeop1, target: subtarget, op0: &op0, op1: &op1, |
10200 | modifier: EXPAND_NORMAL); |
10201 | bool speed_p = optimize_insn_for_speed_p (); |
10202 | do_pending_stack_adjust (); |
10203 | start_sequence (); |
10204 | rtx divmul_ret |
10205 | = expand_expr_divmod (code: TRUNC_DIV_EXPR, mode, treeop0, treeop1, |
10206 | op0, op1, NULL_RTX, unsignedp); |
10207 | divmul_ret = expand_mult (mode, divmul_ret, op1, target, |
10208 | unsignedp); |
10209 | rtx_insn *divmul_insns = get_insns (); |
10210 | end_sequence (); |
10211 | start_sequence (); |
10212 | rtx modsub_ret |
10213 | = expand_expr_divmod (code: TRUNC_MOD_EXPR, mode, treeop0, treeop1, |
10214 | op0, op1, NULL_RTX, unsignedp); |
10215 | this_optab = optab_for_tree_code (MINUS_EXPR, type, |
10216 | optab_default); |
10217 | modsub_ret = expand_binop (mode, this_optab, op0, modsub_ret, |
10218 | target, unsignedp, OPTAB_LIB_WIDEN); |
10219 | rtx_insn *modsub_insns = get_insns (); |
10220 | end_sequence (); |
10221 | unsigned divmul_cost = seq_cost (divmul_insns, speed_p); |
10222 | unsigned modsub_cost = seq_cost (modsub_insns, speed_p); |
10223 | /* If costs are the same then use as tie breaker the other other |
10224 | factor. */ |
10225 | if (divmul_cost == modsub_cost) |
10226 | { |
10227 | divmul_cost = seq_cost (divmul_insns, !speed_p); |
10228 | modsub_cost = seq_cost (modsub_insns, !speed_p); |
10229 | } |
10230 | |
10231 | if (divmul_cost <= modsub_cost) |
10232 | { |
10233 | emit_insn (divmul_insns); |
10234 | return REDUCE_BIT_FIELD (divmul_ret); |
10235 | } |
10236 | emit_insn (modsub_insns); |
10237 | return REDUCE_BIT_FIELD (modsub_ret); |
10238 | } |
10239 | } |
10240 | |
10241 | expand_operands (exp0: treeop0, exp1: treeop1, target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10242 | |
10243 | /* Expand X*Y as X&-Y when Y must be zero or one. */ |
10244 | if (SCALAR_INT_MODE_P (mode)) |
10245 | { |
10246 | bool gimple_zero_one_valued_p (tree, tree (*)(tree)); |
10247 | bool bit0_p = gimple_zero_one_valued_p (treeop0, nullptr); |
10248 | bool bit1_p = gimple_zero_one_valued_p (treeop1, nullptr); |
10249 | |
10250 | /* Expand X*Y as X&Y when both X and Y must be zero or one. */ |
10251 | if (bit0_p && bit1_p) |
10252 | return REDUCE_BIT_FIELD (expand_and (mode, op0, op1, target)); |
10253 | |
10254 | if (bit0_p || bit1_p) |
10255 | { |
10256 | bool speed = optimize_insn_for_speed_p (); |
10257 | int cost = add_cost (speed, mode) + neg_cost (speed, mode); |
10258 | struct algorithm algorithm; |
10259 | enum mult_variant variant; |
10260 | if (CONST_INT_P (op1) |
10261 | ? !choose_mult_variant (mode, INTVAL (op1), |
10262 | &algorithm, &variant, cost) |
10263 | : cost < mul_cost (speed, mode)) |
10264 | { |
10265 | temp = bit0_p ? expand_and (mode, negate_rtx (mode, op0), |
10266 | op1, target) |
10267 | : expand_and (mode, op0, |
10268 | negate_rtx (mode, op1), |
10269 | target); |
10270 | return REDUCE_BIT_FIELD (temp); |
10271 | } |
10272 | } |
10273 | } |
10274 | |
10275 | return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); |
10276 | |
10277 | case TRUNC_MOD_EXPR: |
10278 | case FLOOR_MOD_EXPR: |
10279 | case CEIL_MOD_EXPR: |
10280 | case ROUND_MOD_EXPR: |
10281 | |
10282 | case TRUNC_DIV_EXPR: |
10283 | case FLOOR_DIV_EXPR: |
10284 | case CEIL_DIV_EXPR: |
10285 | case ROUND_DIV_EXPR: |
10286 | case EXACT_DIV_EXPR: |
10287 | /* If this is a fixed-point operation, then we cannot use the code |
10288 | below because "expand_divmod" doesn't support sat/no-sat fixed-point |
10289 | divisions. */ |
10290 | if (ALL_FIXED_POINT_MODE_P (mode)) |
10291 | goto binop; |
10292 | |
10293 | if (modifier == EXPAND_STACK_PARM) |
10294 | target = 0; |
10295 | /* Possible optimization: compute the dividend with EXPAND_SUM |
10296 | then if the divisor is constant can optimize the case |
10297 | where some terms of the dividend have coeffs divisible by it. */ |
10298 | expand_operands (exp0: treeop0, exp1: treeop1, target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10299 | return expand_expr_divmod (code, mode, treeop0, treeop1, op0, op1, |
10300 | target, unsignedp); |
10301 | |
10302 | case RDIV_EXPR: |
10303 | goto binop; |
10304 | |
10305 | case MULT_HIGHPART_EXPR: |
10306 | expand_operands (exp0: treeop0, exp1: treeop1, target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10307 | temp = expand_mult_highpart (mode, op0, op1, target, unsignedp); |
10308 | gcc_assert (temp); |
10309 | return temp; |
10310 | |
10311 | case FIXED_CONVERT_EXPR: |
10312 | op0 = expand_normal (exp: treeop0); |
10313 | if (target == 0 || modifier == EXPAND_STACK_PARM) |
10314 | target = gen_reg_rtx (mode); |
10315 | |
10316 | if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE |
10317 | && TYPE_UNSIGNED (TREE_TYPE (treeop0))) |
10318 | || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type))) |
10319 | expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type)); |
10320 | else |
10321 | expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type)); |
10322 | return target; |
10323 | |
10324 | case FIX_TRUNC_EXPR: |
10325 | op0 = expand_normal (exp: treeop0); |
10326 | if (target == 0 || modifier == EXPAND_STACK_PARM) |
10327 | target = gen_reg_rtx (mode); |
10328 | expand_fix (target, op0, unsignedp); |
10329 | return target; |
10330 | |
10331 | case FLOAT_EXPR: |
10332 | op0 = expand_normal (exp: treeop0); |
10333 | if (target == 0 || modifier == EXPAND_STACK_PARM) |
10334 | target = gen_reg_rtx (mode); |
10335 | /* expand_float can't figure out what to do if FROM has VOIDmode. |
10336 | So give it the correct mode. With -O, cse will optimize this. */ |
10337 | if (GET_MODE (op0) == VOIDmode) |
10338 | op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)), |
10339 | op0); |
10340 | expand_float (target, op0, |
10341 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
10342 | return target; |
10343 | |
10344 | case NEGATE_EXPR: |
10345 | op0 = expand_expr (exp: treeop0, target: subtarget, |
10346 | VOIDmode, modifier: EXPAND_NORMAL); |
10347 | if (modifier == EXPAND_STACK_PARM) |
10348 | target = 0; |
10349 | temp = expand_unop (mode, |
10350 | optab_for_tree_code (NEGATE_EXPR, type, |
10351 | optab_default), |
10352 | op0, target, 0); |
10353 | gcc_assert (temp); |
10354 | return REDUCE_BIT_FIELD (temp); |
10355 | |
10356 | case ABS_EXPR: |
10357 | case ABSU_EXPR: |
10358 | op0 = expand_expr (exp: treeop0, target: subtarget, |
10359 | VOIDmode, modifier: EXPAND_NORMAL); |
10360 | if (modifier == EXPAND_STACK_PARM) |
10361 | target = 0; |
10362 | |
10363 | /* ABS_EXPR is not valid for complex arguments. */ |
10364 | gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT |
10365 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT); |
10366 | |
10367 | /* Unsigned abs is simply the operand. Testing here means we don't |
10368 | risk generating incorrect code below. */ |
10369 | if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) |
10370 | return op0; |
10371 | |
10372 | return expand_abs (mode, op0, target, unsignedp, |
10373 | safe_from_p (x: target, exp: treeop0, top_p: 1)); |
10374 | |
10375 | case MAX_EXPR: |
10376 | case MIN_EXPR: |
10377 | target = original_target; |
10378 | if (target == 0 |
10379 | || modifier == EXPAND_STACK_PARM |
10380 | || (MEM_P (target) && MEM_VOLATILE_P (target)) |
10381 | || GET_MODE (target) != mode |
10382 | || (REG_P (target) |
10383 | && REGNO (target) < FIRST_PSEUDO_REGISTER)) |
10384 | target = gen_reg_rtx (mode); |
10385 | expand_operands (exp0: treeop0, exp1: treeop1, |
10386 | target, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10387 | |
10388 | /* First try to do it with a special MIN or MAX instruction. |
10389 | If that does not win, use a conditional jump to select the proper |
10390 | value. */ |
10391 | this_optab = optab_for_tree_code (code, type, optab_default); |
10392 | temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, |
10393 | OPTAB_WIDEN); |
10394 | if (temp != 0) |
10395 | return temp; |
10396 | |
10397 | if (VECTOR_TYPE_P (type)) |
10398 | gcc_unreachable (); |
10399 | |
10400 | /* At this point, a MEM target is no longer useful; we will get better |
10401 | code without it. */ |
10402 | |
10403 | if (! REG_P (target)) |
10404 | target = gen_reg_rtx (mode); |
10405 | |
10406 | /* If op1 was placed in target, swap op0 and op1. */ |
10407 | if (target != op0 && target == op1) |
10408 | std::swap (a&: op0, b&: op1); |
10409 | |
10410 | /* We generate better code and avoid problems with op1 mentioning |
10411 | target by forcing op1 into a pseudo if it isn't a constant. */ |
10412 | if (! CONSTANT_P (op1)) |
10413 | op1 = force_reg (mode, op1); |
10414 | |
10415 | { |
10416 | enum rtx_code comparison_code; |
10417 | rtx cmpop1 = op1; |
10418 | |
10419 | if (code == MAX_EXPR) |
10420 | comparison_code = unsignedp ? GEU : GE; |
10421 | else |
10422 | comparison_code = unsignedp ? LEU : LE; |
10423 | |
10424 | /* Canonicalize to comparisons against 0. */ |
10425 | if (op1 == const1_rtx) |
10426 | { |
10427 | /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1) |
10428 | or (a != 0 ? a : 1) for unsigned. |
10429 | For MIN we are safe converting (a <= 1 ? a : 1) |
10430 | into (a <= 0 ? a : 1) */ |
10431 | cmpop1 = const0_rtx; |
10432 | if (code == MAX_EXPR) |
10433 | comparison_code = unsignedp ? NE : GT; |
10434 | } |
10435 | if (op1 == constm1_rtx && !unsignedp) |
10436 | { |
10437 | /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1) |
10438 | and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */ |
10439 | cmpop1 = const0_rtx; |
10440 | if (code == MIN_EXPR) |
10441 | comparison_code = LT; |
10442 | } |
10443 | |
10444 | /* Use a conditional move if possible. */ |
10445 | if (can_conditionally_move_p (mode)) |
10446 | { |
10447 | rtx insn; |
10448 | |
10449 | start_sequence (); |
10450 | |
10451 | /* Try to emit the conditional move. */ |
10452 | insn = emit_conditional_move (target, |
10453 | { .code: comparison_code, |
10454 | .op0: op0, .op1: cmpop1, .mode: mode }, |
10455 | op0, op1, mode, |
10456 | unsignedp); |
10457 | |
10458 | /* If we could do the conditional move, emit the sequence, |
10459 | and return. */ |
10460 | if (insn) |
10461 | { |
10462 | rtx_insn *seq = get_insns (); |
10463 | end_sequence (); |
10464 | emit_insn (seq); |
10465 | return target; |
10466 | } |
10467 | |
10468 | /* Otherwise discard the sequence and fall back to code with |
10469 | branches. */ |
10470 | end_sequence (); |
10471 | } |
10472 | |
10473 | if (target != op0) |
10474 | emit_move_insn (x: target, y: op0); |
10475 | |
10476 | lab = gen_label_rtx (); |
10477 | do_compare_rtx_and_jump (target, cmpop1, comparison_code, |
10478 | unsignedp, mode, NULL_RTX, NULL, lab, |
10479 | profile_probability::uninitialized ()); |
10480 | } |
10481 | emit_move_insn (x: target, y: op1); |
10482 | emit_label (lab); |
10483 | return target; |
10484 | |
10485 | case BIT_NOT_EXPR: |
10486 | op0 = expand_expr (exp: treeop0, target: subtarget, |
10487 | VOIDmode, modifier: EXPAND_NORMAL); |
10488 | if (modifier == EXPAND_STACK_PARM) |
10489 | target = 0; |
10490 | /* In case we have to reduce the result to bitfield precision |
10491 | for unsigned bitfield expand this as XOR with a proper constant |
10492 | instead. */ |
10493 | if (reduce_bit_field && TYPE_UNSIGNED (type)) |
10494 | { |
10495 | int_mode = SCALAR_INT_TYPE_MODE (type); |
10496 | wide_int mask = wi::mask (TYPE_PRECISION (type), |
10497 | negate_p: false, precision: GET_MODE_PRECISION (mode: int_mode)); |
10498 | |
10499 | temp = expand_binop (int_mode, xor_optab, op0, |
10500 | immed_wide_int_const (mask, int_mode), |
10501 | target, 1, OPTAB_LIB_WIDEN); |
10502 | } |
10503 | else |
10504 | temp = expand_unop (mode, one_cmpl_optab, op0, target, 1); |
10505 | gcc_assert (temp); |
10506 | return temp; |
10507 | |
10508 | /* ??? Can optimize bitwise operations with one arg constant. |
10509 | Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b) |
10510 | and (a bitwise1 b) bitwise2 b (etc) |
10511 | but that is probably not worth while. */ |
10512 | |
10513 | case BIT_AND_EXPR: |
10514 | case BIT_IOR_EXPR: |
10515 | case BIT_XOR_EXPR: |
10516 | goto binop; |
10517 | |
10518 | case LROTATE_EXPR: |
10519 | case RROTATE_EXPR: |
10520 | gcc_assert (VECTOR_MODE_P (TYPE_MODE (type)) |
10521 | || type_has_mode_precision_p (type)); |
10522 | /* fall through */ |
10523 | |
10524 | case LSHIFT_EXPR: |
10525 | case RSHIFT_EXPR: |
10526 | { |
10527 | /* If this is a fixed-point operation, then we cannot use the code |
10528 | below because "expand_shift" doesn't support sat/no-sat fixed-point |
10529 | shifts. */ |
10530 | if (ALL_FIXED_POINT_MODE_P (mode)) |
10531 | goto binop; |
10532 | |
10533 | if (! safe_from_p (x: subtarget, exp: treeop1, top_p: 1)) |
10534 | subtarget = 0; |
10535 | if (modifier == EXPAND_STACK_PARM) |
10536 | target = 0; |
10537 | op0 = expand_expr (exp: treeop0, target: subtarget, |
10538 | VOIDmode, modifier: EXPAND_NORMAL); |
10539 | |
10540 | /* Left shift optimization when shifting across word_size boundary. |
10541 | |
10542 | If mode == GET_MODE_WIDER_MODE (word_mode), then normally |
10543 | there isn't native instruction to support this wide mode |
10544 | left shift. Given below scenario: |
10545 | |
10546 | Type A = (Type) B << C |
10547 | |
10548 | |< T >| |
10549 | | dest_high | dest_low | |
10550 | |
10551 | | word_size | |
10552 | |
10553 | If the shift amount C caused we shift B to across the word |
10554 | size boundary, i.e part of B shifted into high half of |
10555 | destination register, and part of B remains in the low |
10556 | half, then GCC will use the following left shift expand |
10557 | logic: |
10558 | |
10559 | 1. Initialize dest_low to B. |
10560 | 2. Initialize every bit of dest_high to the sign bit of B. |
10561 | 3. Logic left shift dest_low by C bit to finalize dest_low. |
10562 | The value of dest_low before this shift is kept in a temp D. |
10563 | 4. Logic left shift dest_high by C. |
10564 | 5. Logic right shift D by (word_size - C). |
10565 | 6. Or the result of 4 and 5 to finalize dest_high. |
10566 | |
10567 | While, by checking gimple statements, if operand B is |
10568 | coming from signed extension, then we can simplify above |
10569 | expand logic into: |
10570 | |
10571 | 1. dest_high = src_low >> (word_size - C). |
10572 | 2. dest_low = src_low << C. |
10573 | |
10574 | We can use one arithmetic right shift to finish all the |
10575 | purpose of steps 2, 4, 5, 6, thus we reduce the steps |
10576 | needed from 6 into 2. |
10577 | |
10578 | The case is similar for zero extension, except that we |
10579 | initialize dest_high to zero rather than copies of the sign |
10580 | bit from B. Furthermore, we need to use a logical right shift |
10581 | in this case. |
10582 | |
10583 | The choice of sign-extension versus zero-extension is |
10584 | determined entirely by whether or not B is signed and is |
10585 | independent of the current setting of unsignedp. */ |
10586 | |
10587 | temp = NULL_RTX; |
10588 | if (code == LSHIFT_EXPR |
10589 | && target |
10590 | && REG_P (target) |
10591 | && GET_MODE_2XWIDER_MODE (m: word_mode).exists (mode: &int_mode) |
10592 | && mode == int_mode |
10593 | && TREE_CONSTANT (treeop1) |
10594 | && TREE_CODE (treeop0) == SSA_NAME) |
10595 | { |
10596 | gimple *def = SSA_NAME_DEF_STMT (treeop0); |
10597 | if (is_gimple_assign (gs: def) |
10598 | && gimple_assign_rhs_code (gs: def) == NOP_EXPR) |
10599 | { |
10600 | scalar_int_mode rmode = SCALAR_INT_TYPE_MODE |
10601 | (TREE_TYPE (gimple_assign_rhs1 (def))); |
10602 | |
10603 | if (GET_MODE_SIZE (mode: rmode) < GET_MODE_SIZE (mode: int_mode) |
10604 | && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (mode: word_mode) |
10605 | && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (mode: rmode)) |
10606 | >= GET_MODE_BITSIZE (mode: word_mode))) |
10607 | { |
10608 | rtx_insn *seq, *seq_old; |
10609 | poly_uint64 high_off = subreg_highpart_offset (outermode: word_mode, |
10610 | innermode: int_mode); |
10611 | bool extend_unsigned |
10612 | = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def))); |
10613 | rtx low = lowpart_subreg (outermode: word_mode, op: op0, innermode: int_mode); |
10614 | rtx dest_low = lowpart_subreg (outermode: word_mode, op: target, innermode: int_mode); |
10615 | rtx dest_high = simplify_gen_subreg (outermode: word_mode, op: target, |
10616 | innermode: int_mode, byte: high_off); |
10617 | HOST_WIDE_INT ramount = (BITS_PER_WORD |
10618 | - TREE_INT_CST_LOW (treeop1)); |
10619 | tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount); |
10620 | |
10621 | start_sequence (); |
10622 | /* dest_high = src_low >> (word_size - C). */ |
10623 | temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low, |
10624 | rshift, dest_high, |
10625 | extend_unsigned); |
10626 | if (temp != dest_high) |
10627 | emit_move_insn (x: dest_high, y: temp); |
10628 | |
10629 | /* dest_low = src_low << C. */ |
10630 | temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low, |
10631 | treeop1, dest_low, unsignedp); |
10632 | if (temp != dest_low) |
10633 | emit_move_insn (x: dest_low, y: temp); |
10634 | |
10635 | seq = get_insns (); |
10636 | end_sequence (); |
10637 | temp = target ; |
10638 | |
10639 | if (have_insn_for (ASHIFT, int_mode)) |
10640 | { |
10641 | bool speed_p = optimize_insn_for_speed_p (); |
10642 | start_sequence (); |
10643 | rtx ret_old = expand_variable_shift (code, int_mode, |
10644 | op0, treeop1, |
10645 | target, |
10646 | unsignedp); |
10647 | |
10648 | seq_old = get_insns (); |
10649 | end_sequence (); |
10650 | if (seq_cost (seq, speed_p) |
10651 | >= seq_cost (seq_old, speed_p)) |
10652 | { |
10653 | seq = seq_old; |
10654 | temp = ret_old; |
10655 | } |
10656 | } |
10657 | emit_insn (seq); |
10658 | } |
10659 | } |
10660 | } |
10661 | |
10662 | if (temp == NULL_RTX) |
10663 | temp = expand_variable_shift (code, mode, op0, treeop1, target, |
10664 | unsignedp); |
10665 | if (code == LSHIFT_EXPR) |
10666 | temp = REDUCE_BIT_FIELD (temp); |
10667 | return temp; |
10668 | } |
10669 | |
10670 | /* Could determine the answer when only additive constants differ. Also, |
10671 | the addition of one can be handled by changing the condition. */ |
10672 | case LT_EXPR: |
10673 | case LE_EXPR: |
10674 | case GT_EXPR: |
10675 | case GE_EXPR: |
10676 | case EQ_EXPR: |
10677 | case NE_EXPR: |
10678 | case UNORDERED_EXPR: |
10679 | case ORDERED_EXPR: |
10680 | case UNLT_EXPR: |
10681 | case UNLE_EXPR: |
10682 | case UNGT_EXPR: |
10683 | case UNGE_EXPR: |
10684 | case UNEQ_EXPR: |
10685 | case LTGT_EXPR: |
10686 | { |
10687 | temp = do_store_flag (ops, |
10688 | modifier != EXPAND_STACK_PARM ? target : NULL_RTX, |
10689 | tmode != VOIDmode ? tmode : mode); |
10690 | if (temp) |
10691 | return temp; |
10692 | |
10693 | /* Use a compare and a jump for BLKmode comparisons, or for function |
10694 | type comparisons is have_canonicalize_funcptr_for_compare. */ |
10695 | |
10696 | if ((target == 0 |
10697 | || modifier == EXPAND_STACK_PARM |
10698 | || ! safe_from_p (x: target, exp: treeop0, top_p: 1) |
10699 | || ! safe_from_p (x: target, exp: treeop1, top_p: 1) |
10700 | /* Make sure we don't have a hard reg (such as function's return |
10701 | value) live across basic blocks, if not optimizing. */ |
10702 | || (!optimize && REG_P (target) |
10703 | && REGNO (target) < FIRST_PSEUDO_REGISTER))) |
10704 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); |
10705 | |
10706 | emit_move_insn (x: target, const0_rtx); |
10707 | |
10708 | rtx_code_label *lab1 = gen_label_rtx (); |
10709 | jumpifnot_1 (code, treeop0, treeop1, lab1, |
10710 | profile_probability::uninitialized ()); |
10711 | |
10712 | if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type)) |
10713 | emit_move_insn (x: target, constm1_rtx); |
10714 | else |
10715 | emit_move_insn (x: target, const1_rtx); |
10716 | |
10717 | emit_label (lab1); |
10718 | return target; |
10719 | } |
10720 | case COMPLEX_EXPR: |
10721 | /* Get the rtx code of the operands. */ |
10722 | op0 = expand_normal (exp: treeop0); |
10723 | op1 = expand_normal (exp: treeop1); |
10724 | |
10725 | if (!target) |
10726 | target = gen_reg_rtx (TYPE_MODE (type)); |
10727 | else |
10728 | /* If target overlaps with op1, then either we need to force |
10729 | op1 into a pseudo (if target also overlaps with op0), |
10730 | or write the complex parts in reverse order. */ |
10731 | switch (GET_CODE (target)) |
10732 | { |
10733 | case CONCAT: |
10734 | if (reg_overlap_mentioned_p (XEXP (target, 0), op1)) |
10735 | { |
10736 | if (reg_overlap_mentioned_p (XEXP (target, 1), op0)) |
10737 | { |
10738 | complex_expr_force_op1: |
10739 | temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target))); |
10740 | emit_move_insn (x: temp, y: op1); |
10741 | op1 = temp; |
10742 | break; |
10743 | } |
10744 | complex_expr_swap_order: |
10745 | /* Move the imaginary (op1) and real (op0) parts to their |
10746 | location. */ |
10747 | write_complex_part (cplx: target, val: op1, imag_p: true, undefined_p: true); |
10748 | write_complex_part (cplx: target, val: op0, imag_p: false, undefined_p: false); |
10749 | |
10750 | return target; |
10751 | } |
10752 | break; |
10753 | case MEM: |
10754 | temp = adjust_address_nv (target, |
10755 | GET_MODE_INNER (GET_MODE (target)), 0); |
10756 | if (reg_overlap_mentioned_p (temp, op1)) |
10757 | { |
10758 | scalar_mode imode = GET_MODE_INNER (GET_MODE (target)); |
10759 | temp = adjust_address_nv (target, imode, |
10760 | GET_MODE_SIZE (imode)); |
10761 | if (reg_overlap_mentioned_p (temp, op0)) |
10762 | goto complex_expr_force_op1; |
10763 | goto complex_expr_swap_order; |
10764 | } |
10765 | break; |
10766 | default: |
10767 | if (reg_overlap_mentioned_p (target, op1)) |
10768 | { |
10769 | if (reg_overlap_mentioned_p (target, op0)) |
10770 | goto complex_expr_force_op1; |
10771 | goto complex_expr_swap_order; |
10772 | } |
10773 | break; |
10774 | } |
10775 | |
10776 | /* Move the real (op0) and imaginary (op1) parts to their location. */ |
10777 | write_complex_part (cplx: target, val: op0, imag_p: false, undefined_p: true); |
10778 | write_complex_part (cplx: target, val: op1, imag_p: true, undefined_p: false); |
10779 | |
10780 | return target; |
10781 | |
10782 | case WIDEN_SUM_EXPR: |
10783 | { |
10784 | tree oprnd0 = treeop0; |
10785 | tree oprnd1 = treeop1; |
10786 | |
10787 | expand_operands (exp0: oprnd0, exp1: oprnd1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10788 | target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1, |
10789 | target, unsignedp); |
10790 | return target; |
10791 | } |
10792 | |
10793 | case VEC_UNPACK_HI_EXPR: |
10794 | case VEC_UNPACK_LO_EXPR: |
10795 | case VEC_UNPACK_FIX_TRUNC_HI_EXPR: |
10796 | case VEC_UNPACK_FIX_TRUNC_LO_EXPR: |
10797 | { |
10798 | op0 = expand_normal (exp: treeop0); |
10799 | temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX, |
10800 | target, unsignedp); |
10801 | gcc_assert (temp); |
10802 | return temp; |
10803 | } |
10804 | |
10805 | case VEC_UNPACK_FLOAT_HI_EXPR: |
10806 | case VEC_UNPACK_FLOAT_LO_EXPR: |
10807 | { |
10808 | op0 = expand_normal (exp: treeop0); |
10809 | /* The signedness is determined from input operand. */ |
10810 | temp = expand_widen_pattern_expr |
10811 | (ops, op0, NULL_RTX, NULL_RTX, |
10812 | target, TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
10813 | |
10814 | gcc_assert (temp); |
10815 | return temp; |
10816 | } |
10817 | |
10818 | case VEC_WIDEN_MULT_HI_EXPR: |
10819 | case VEC_WIDEN_MULT_LO_EXPR: |
10820 | case VEC_WIDEN_MULT_EVEN_EXPR: |
10821 | case VEC_WIDEN_MULT_ODD_EXPR: |
10822 | case VEC_WIDEN_LSHIFT_HI_EXPR: |
10823 | case VEC_WIDEN_LSHIFT_LO_EXPR: |
10824 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10825 | target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX, |
10826 | target, unsignedp); |
10827 | gcc_assert (target); |
10828 | return target; |
10829 | |
10830 | case VEC_PACK_SAT_EXPR: |
10831 | case VEC_PACK_FIX_TRUNC_EXPR: |
10832 | mode = TYPE_MODE (TREE_TYPE (treeop0)); |
10833 | subtarget = NULL_RTX; |
10834 | goto binop; |
10835 | |
10836 | case VEC_PACK_TRUNC_EXPR: |
10837 | if (VECTOR_BOOLEAN_TYPE_P (type) |
10838 | && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0)) |
10839 | && mode == TYPE_MODE (TREE_TYPE (treeop0)) |
10840 | && SCALAR_INT_MODE_P (mode)) |
10841 | { |
10842 | class expand_operand eops[4]; |
10843 | machine_mode imode = TYPE_MODE (TREE_TYPE (treeop0)); |
10844 | expand_operands (exp0: treeop0, exp1: treeop1, |
10845 | target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10846 | this_optab = vec_pack_sbool_trunc_optab; |
10847 | enum insn_code icode = optab_handler (op: this_optab, mode: imode); |
10848 | create_output_operand (op: &eops[0], x: target, mode); |
10849 | create_convert_operand_from (op: &eops[1], value: op0, mode: imode, unsigned_p: false); |
10850 | create_convert_operand_from (op: &eops[2], value: op1, mode: imode, unsigned_p: false); |
10851 | temp = GEN_INT (TYPE_VECTOR_SUBPARTS (type).to_constant ()); |
10852 | create_input_operand (op: &eops[3], value: temp, mode: imode); |
10853 | expand_insn (icode, nops: 4, ops: eops); |
10854 | return eops[0].value; |
10855 | } |
10856 | mode = TYPE_MODE (TREE_TYPE (treeop0)); |
10857 | subtarget = NULL_RTX; |
10858 | goto binop; |
10859 | |
10860 | case VEC_PACK_FLOAT_EXPR: |
10861 | mode = TYPE_MODE (TREE_TYPE (treeop0)); |
10862 | expand_operands (exp0: treeop0, exp1: treeop1, |
10863 | target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10864 | this_optab = optab_for_tree_code (code, TREE_TYPE (treeop0), |
10865 | optab_default); |
10866 | target = expand_binop (mode, this_optab, op0, op1, target, |
10867 | TYPE_UNSIGNED (TREE_TYPE (treeop0)), |
10868 | OPTAB_LIB_WIDEN); |
10869 | gcc_assert (target); |
10870 | return target; |
10871 | |
10872 | case VEC_PERM_EXPR: |
10873 | { |
10874 | expand_operands (exp0: treeop0, exp1: treeop1, target, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10875 | vec_perm_builder sel; |
10876 | if (TREE_CODE (treeop2) == VECTOR_CST |
10877 | && tree_to_vec_perm_builder (&sel, treeop2)) |
10878 | { |
10879 | machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2)); |
10880 | temp = expand_vec_perm_const (mode, op0, op1, sel, |
10881 | sel_mode, target); |
10882 | } |
10883 | else |
10884 | { |
10885 | op2 = expand_normal (exp: treeop2); |
10886 | temp = expand_vec_perm_var (mode, op0, op1, op2, target); |
10887 | } |
10888 | gcc_assert (temp); |
10889 | return temp; |
10890 | } |
10891 | |
10892 | case DOT_PROD_EXPR: |
10893 | { |
10894 | tree oprnd0 = treeop0; |
10895 | tree oprnd1 = treeop1; |
10896 | tree oprnd2 = treeop2; |
10897 | |
10898 | expand_operands (exp0: oprnd0, exp1: oprnd1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10899 | op2 = expand_normal (exp: oprnd2); |
10900 | target = expand_widen_pattern_expr (ops, op0, op1, op2, |
10901 | target, unsignedp); |
10902 | return target; |
10903 | } |
10904 | |
10905 | case SAD_EXPR: |
10906 | { |
10907 | tree oprnd0 = treeop0; |
10908 | tree oprnd1 = treeop1; |
10909 | tree oprnd2 = treeop2; |
10910 | |
10911 | expand_operands (exp0: oprnd0, exp1: oprnd1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10912 | op2 = expand_normal (exp: oprnd2); |
10913 | target = expand_widen_pattern_expr (ops, op0, op1, op2, |
10914 | target, unsignedp); |
10915 | return target; |
10916 | } |
10917 | |
10918 | case REALIGN_LOAD_EXPR: |
10919 | { |
10920 | tree oprnd0 = treeop0; |
10921 | tree oprnd1 = treeop1; |
10922 | tree oprnd2 = treeop2; |
10923 | |
10924 | this_optab = optab_for_tree_code (code, type, optab_default); |
10925 | expand_operands (exp0: oprnd0, exp1: oprnd1, NULL_RTX, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
10926 | op2 = expand_normal (exp: oprnd2); |
10927 | temp = expand_ternary_op (mode, ternary_optab: this_optab, op0, op1, op2, |
10928 | target, unsignedp); |
10929 | gcc_assert (temp); |
10930 | return temp; |
10931 | } |
10932 | |
10933 | case COND_EXPR: |
10934 | { |
10935 | /* A COND_EXPR with its type being VOID_TYPE represents a |
10936 | conditional jump and is handled in |
10937 | expand_gimple_cond_expr. */ |
10938 | gcc_assert (!VOID_TYPE_P (type)); |
10939 | |
10940 | /* Note that COND_EXPRs whose type is a structure or union |
10941 | are required to be constructed to contain assignments of |
10942 | a temporary variable, so that we can evaluate them here |
10943 | for side effect only. If type is void, we must do likewise. */ |
10944 | |
10945 | gcc_assert (!TREE_ADDRESSABLE (type) |
10946 | && !ignore |
10947 | && TREE_TYPE (treeop1) != void_type_node |
10948 | && TREE_TYPE (treeop2) != void_type_node); |
10949 | |
10950 | temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2); |
10951 | if (temp) |
10952 | return temp; |
10953 | |
10954 | /* If we are not to produce a result, we have no target. Otherwise, |
10955 | if a target was specified use it; it will not be used as an |
10956 | intermediate target unless it is safe. If no target, use a |
10957 | temporary. */ |
10958 | |
10959 | if (modifier != EXPAND_STACK_PARM |
10960 | && original_target |
10961 | && safe_from_p (x: original_target, exp: treeop0, top_p: 1) |
10962 | && GET_MODE (original_target) == mode |
10963 | && !MEM_P (original_target)) |
10964 | temp = original_target; |
10965 | else |
10966 | temp = assign_temp (type, 0, 1); |
10967 | |
10968 | do_pending_stack_adjust (); |
10969 | NO_DEFER_POP; |
10970 | rtx_code_label *lab0 = gen_label_rtx (); |
10971 | rtx_code_label *lab1 = gen_label_rtx (); |
10972 | jumpifnot (exp: treeop0, label: lab0, |
10973 | prob: profile_probability::uninitialized ()); |
10974 | store_expr (exp: treeop1, target: temp, |
10975 | call_param_p: modifier == EXPAND_STACK_PARM, |
10976 | nontemporal: false, reverse: false); |
10977 | |
10978 | emit_jump_insn (targetm.gen_jump (lab1)); |
10979 | emit_barrier (); |
10980 | emit_label (lab0); |
10981 | store_expr (exp: treeop2, target: temp, |
10982 | call_param_p: modifier == EXPAND_STACK_PARM, |
10983 | nontemporal: false, reverse: false); |
10984 | |
10985 | emit_label (lab1); |
10986 | OK_DEFER_POP; |
10987 | return temp; |
10988 | } |
10989 | |
10990 | case VEC_DUPLICATE_EXPR: |
10991 | op0 = expand_expr (exp: treeop0, NULL_RTX, VOIDmode, modifier); |
10992 | target = expand_vector_broadcast (mode, op0); |
10993 | gcc_assert (target); |
10994 | return target; |
10995 | |
10996 | case VEC_SERIES_EXPR: |
10997 | expand_operands (exp0: treeop0, exp1: treeop1, NULL_RTX, op0: &op0, op1: &op1, modifier); |
10998 | return expand_vec_series_expr (mode, op0, op1, target); |
10999 | |
11000 | case BIT_INSERT_EXPR: |
11001 | { |
11002 | unsigned bitpos = tree_to_uhwi (treeop2); |
11003 | unsigned bitsize; |
11004 | if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1))) |
11005 | bitsize = TYPE_PRECISION (TREE_TYPE (treeop1)); |
11006 | else |
11007 | bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1))); |
11008 | op0 = expand_normal (exp: treeop0); |
11009 | op1 = expand_normal (exp: treeop1); |
11010 | rtx dst = gen_reg_rtx (mode); |
11011 | emit_move_insn (x: dst, y: op0); |
11012 | store_bit_field (dst, bitsize, bitpos, 0, 0, |
11013 | TYPE_MODE (TREE_TYPE (treeop1)), op1, false, false); |
11014 | return dst; |
11015 | } |
11016 | |
11017 | default: |
11018 | gcc_unreachable (); |
11019 | } |
11020 | |
11021 | /* Here to do an ordinary binary operator. */ |
11022 | binop: |
11023 | expand_operands (exp0: treeop0, exp1: treeop1, |
11024 | target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
11025 | binop2: |
11026 | this_optab = optab_for_tree_code (code, type, optab_default); |
11027 | binop3: |
11028 | if (modifier == EXPAND_STACK_PARM) |
11029 | target = 0; |
11030 | temp = expand_binop (mode, this_optab, op0, op1, target, |
11031 | unsignedp, OPTAB_LIB_WIDEN); |
11032 | gcc_assert (temp); |
11033 | /* Bitwise operations do not need bitfield reduction as we expect their |
11034 | operands being properly truncated. */ |
11035 | if (code == BIT_XOR_EXPR |
11036 | || code == BIT_AND_EXPR |
11037 | || code == BIT_IOR_EXPR) |
11038 | return temp; |
11039 | return REDUCE_BIT_FIELD (temp); |
11040 | } |
11041 | #undef REDUCE_BIT_FIELD |
11042 | |
11043 | |
11044 | /* Return TRUE if expression STMT is suitable for replacement. |
11045 | Never consider memory loads as replaceable, because those don't ever lead |
11046 | into constant expressions. */ |
11047 | |
11048 | static bool |
11049 | stmt_is_replaceable_p (gimple *stmt) |
11050 | { |
11051 | if (ssa_is_replaceable_p (stmt)) |
11052 | { |
11053 | /* Don't move around loads. */ |
11054 | if (!gimple_assign_single_p (gs: stmt) |
11055 | || is_gimple_val (gimple_assign_rhs1 (gs: stmt))) |
11056 | return true; |
11057 | } |
11058 | return false; |
11059 | } |
11060 | |
11061 | /* A subroutine of expand_expr_real_1. Expand gimple assignment G, |
11062 | which is known to set an SSA_NAME result. The other arguments are |
11063 | as for expand_expr_real_1. */ |
11064 | |
11065 | rtx |
11066 | expand_expr_real_gassign (gassign *g, rtx target, machine_mode tmode, |
11067 | enum expand_modifier modifier, rtx *alt_rtl, |
11068 | bool inner_reference_p) |
11069 | { |
11070 | separate_ops ops; |
11071 | rtx r; |
11072 | location_t saved_loc = curr_insn_location (); |
11073 | auto loc = gimple_location (g); |
11074 | if (loc != UNKNOWN_LOCATION) |
11075 | set_curr_insn_location (loc); |
11076 | tree lhs = gimple_assign_lhs (gs: g); |
11077 | ops.code = gimple_assign_rhs_code (gs: g); |
11078 | ops.type = TREE_TYPE (lhs); |
11079 | switch (get_gimple_rhs_class (code: ops.code)) |
11080 | { |
11081 | case GIMPLE_TERNARY_RHS: |
11082 | ops.op2 = gimple_assign_rhs3 (gs: g); |
11083 | /* Fallthru */ |
11084 | case GIMPLE_BINARY_RHS: |
11085 | ops.op1 = gimple_assign_rhs2 (gs: g); |
11086 | |
11087 | /* Try to expand conditonal compare. */ |
11088 | if (targetm.gen_ccmp_first) |
11089 | { |
11090 | gcc_checking_assert (targetm.gen_ccmp_next != NULL); |
11091 | r = expand_ccmp_expr (g, TYPE_MODE (ops.type)); |
11092 | if (r) |
11093 | break; |
11094 | } |
11095 | /* Fallthru */ |
11096 | case GIMPLE_UNARY_RHS: |
11097 | ops.op0 = gimple_assign_rhs1 (gs: g); |
11098 | ops.location = loc; |
11099 | r = expand_expr_real_2 (ops: &ops, target, tmode, modifier); |
11100 | break; |
11101 | case GIMPLE_SINGLE_RHS: |
11102 | { |
11103 | r = expand_expr_real (exp: gimple_assign_rhs1 (gs: g), target, |
11104 | tmode, modifier, alt_rtl, |
11105 | inner_reference_p); |
11106 | break; |
11107 | } |
11108 | default: |
11109 | gcc_unreachable (); |
11110 | } |
11111 | set_curr_insn_location (saved_loc); |
11112 | if (REG_P (r) && !REG_EXPR (r)) |
11113 | set_reg_attrs_for_decl_rtl (t: lhs, x: r); |
11114 | return r; |
11115 | } |
11116 | |
11117 | rtx |
11118 | expand_expr_real_1 (tree exp, rtx target, machine_mode tmode, |
11119 | enum expand_modifier modifier, rtx *alt_rtl, |
11120 | bool inner_reference_p) |
11121 | { |
11122 | rtx op0, op1, temp, decl_rtl; |
11123 | tree type; |
11124 | int unsignedp; |
11125 | machine_mode mode, dmode; |
11126 | enum tree_code code = TREE_CODE (exp); |
11127 | rtx subtarget, original_target; |
11128 | int ignore; |
11129 | bool reduce_bit_field; |
11130 | location_t loc = EXPR_LOCATION (exp); |
11131 | struct separate_ops ops; |
11132 | tree treeop0, treeop1, treeop2; |
11133 | tree ssa_name = NULL_TREE; |
11134 | gimple *g; |
11135 | |
11136 | /* Some ABIs define padding bits in _BitInt uninitialized. Normally, RTL |
11137 | expansion sign/zero extends integral types with less than mode precision |
11138 | when reading from bit-fields and after arithmetic operations (see |
11139 | REDUCE_BIT_FIELD in expand_expr_real_2) and on subsequent loads relies |
11140 | on those extensions to have been already performed, but because of the |
11141 | above for _BitInt they need to be sign/zero extended when reading from |
11142 | locations that could be exposed to ABI boundaries (when loading from |
11143 | objects in memory, or function arguments, return value). Because we |
11144 | internally extend after arithmetic operations, we can avoid doing that |
11145 | when reading from SSA_NAMEs of vars. */ |
11146 | #define EXTEND_BITINT(expr) \ |
11147 | ((TREE_CODE (type) == BITINT_TYPE \ |
11148 | && reduce_bit_field \ |
11149 | && mode != BLKmode \ |
11150 | && modifier != EXPAND_MEMORY \ |
11151 | && modifier != EXPAND_WRITE \ |
11152 | && modifier != EXPAND_INITIALIZER \ |
11153 | && modifier != EXPAND_CONST_ADDRESS) \ |
11154 | ? reduce_to_bit_field_precision ((expr), NULL_RTX, type) : (expr)) |
11155 | |
11156 | type = TREE_TYPE (exp); |
11157 | mode = TYPE_MODE (type); |
11158 | unsignedp = TYPE_UNSIGNED (type); |
11159 | |
11160 | treeop0 = treeop1 = treeop2 = NULL_TREE; |
11161 | if (!VL_EXP_CLASS_P (exp)) |
11162 | switch (TREE_CODE_LENGTH (code)) |
11163 | { |
11164 | default: |
11165 | case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */ |
11166 | case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */ |
11167 | case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */ |
11168 | case 0: break; |
11169 | } |
11170 | ops.code = code; |
11171 | ops.type = type; |
11172 | ops.op0 = treeop0; |
11173 | ops.op1 = treeop1; |
11174 | ops.op2 = treeop2; |
11175 | ops.location = loc; |
11176 | |
11177 | ignore = (target == const0_rtx |
11178 | || ((CONVERT_EXPR_CODE_P (code) |
11179 | || code == COND_EXPR || code == VIEW_CONVERT_EXPR) |
11180 | && TREE_CODE (type) == VOID_TYPE)); |
11181 | |
11182 | /* An operation in what may be a bit-field type needs the |
11183 | result to be reduced to the precision of the bit-field type, |
11184 | which is narrower than that of the type's mode. */ |
11185 | reduce_bit_field = (!ignore |
11186 | && INTEGRAL_TYPE_P (type) |
11187 | && !type_has_mode_precision_p (t: type)); |
11188 | |
11189 | /* If we are going to ignore this result, we need only do something |
11190 | if there is a side-effect somewhere in the expression. If there |
11191 | is, short-circuit the most common cases here. Note that we must |
11192 | not call expand_expr with anything but const0_rtx in case this |
11193 | is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */ |
11194 | |
11195 | if (ignore) |
11196 | { |
11197 | if (! TREE_SIDE_EFFECTS (exp)) |
11198 | return const0_rtx; |
11199 | |
11200 | /* Ensure we reference a volatile object even if value is ignored, but |
11201 | don't do this if all we are doing is taking its address. */ |
11202 | if (TREE_THIS_VOLATILE (exp) |
11203 | && TREE_CODE (exp) != FUNCTION_DECL |
11204 | && mode != VOIDmode && mode != BLKmode |
11205 | && modifier != EXPAND_CONST_ADDRESS) |
11206 | { |
11207 | temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier); |
11208 | if (MEM_P (temp)) |
11209 | copy_to_reg (temp); |
11210 | return const0_rtx; |
11211 | } |
11212 | |
11213 | if (TREE_CODE_CLASS (code) == tcc_unary |
11214 | || code == BIT_FIELD_REF |
11215 | || code == COMPONENT_REF |
11216 | || code == INDIRECT_REF) |
11217 | return expand_expr (exp: treeop0, const0_rtx, VOIDmode, |
11218 | modifier); |
11219 | |
11220 | else if (TREE_CODE_CLASS (code) == tcc_binary |
11221 | || TREE_CODE_CLASS (code) == tcc_comparison |
11222 | || code == ARRAY_REF || code == ARRAY_RANGE_REF) |
11223 | { |
11224 | expand_expr (exp: treeop0, const0_rtx, VOIDmode, modifier); |
11225 | expand_expr (exp: treeop1, const0_rtx, VOIDmode, modifier); |
11226 | return const0_rtx; |
11227 | } |
11228 | |
11229 | target = 0; |
11230 | } |
11231 | |
11232 | if (reduce_bit_field && modifier == EXPAND_STACK_PARM) |
11233 | target = 0; |
11234 | |
11235 | /* Use subtarget as the target for operand 0 of a binary operation. */ |
11236 | subtarget = get_subtarget (x: target); |
11237 | original_target = target; |
11238 | |
11239 | switch (code) |
11240 | { |
11241 | case LABEL_DECL: |
11242 | { |
11243 | tree function = decl_function_context (exp); |
11244 | |
11245 | temp = label_rtx (exp); |
11246 | temp = gen_rtx_LABEL_REF (Pmode, temp); |
11247 | |
11248 | if (function != current_function_decl |
11249 | && function != 0) |
11250 | LABEL_REF_NONLOCAL_P (temp) = 1; |
11251 | |
11252 | temp = gen_rtx_MEM (FUNCTION_MODE, temp); |
11253 | return temp; |
11254 | } |
11255 | |
11256 | case SSA_NAME: |
11257 | /* ??? ivopts calls expander, without any preparation from |
11258 | out-of-ssa. So fake instructions as if this was an access to the |
11259 | base variable. This unnecessarily allocates a pseudo, see how we can |
11260 | reuse it, if partition base vars have it set already. */ |
11261 | if (!currently_expanding_to_rtl) |
11262 | { |
11263 | tree var = SSA_NAME_VAR (exp); |
11264 | if (var && DECL_RTL_SET_P (var)) |
11265 | return DECL_RTL (var); |
11266 | return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)), |
11267 | LAST_VIRTUAL_REGISTER + 1); |
11268 | } |
11269 | |
11270 | g = get_gimple_for_ssa_name (exp); |
11271 | /* For EXPAND_INITIALIZER try harder to get something simpler. */ |
11272 | if (g == NULL |
11273 | && modifier == EXPAND_INITIALIZER |
11274 | && !SSA_NAME_IS_DEFAULT_DEF (exp) |
11275 | && (optimize || !SSA_NAME_VAR (exp) |
11276 | || DECL_IGNORED_P (SSA_NAME_VAR (exp))) |
11277 | && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp))) |
11278 | g = SSA_NAME_DEF_STMT (exp); |
11279 | if (g) |
11280 | return expand_expr_real_gassign (g: as_a<gassign *> (p: g), target, tmode, |
11281 | modifier, alt_rtl, inner_reference_p); |
11282 | |
11283 | ssa_name = exp; |
11284 | decl_rtl = get_rtx_for_ssa_name (exp: ssa_name); |
11285 | exp = SSA_NAME_VAR (ssa_name); |
11286 | /* Optimize and avoid to EXTEND_BITINIT doing anything if it is an |
11287 | SSA_NAME computed within the current function. In such case the |
11288 | value have been already extended before. While if it is a function |
11289 | parameter, result or some memory location, we need to be prepared |
11290 | for some other compiler leaving the bits uninitialized. */ |
11291 | if (!exp || VAR_P (exp)) |
11292 | reduce_bit_field = false; |
11293 | goto expand_decl_rtl; |
11294 | |
11295 | case VAR_DECL: |
11296 | /* Allow accel compiler to handle variables that require special |
11297 | treatment, e.g. if they have been modified in some way earlier in |
11298 | compilation by the adjust_private_decl OpenACC hook. */ |
11299 | if (flag_openacc && targetm.goacc.expand_var_decl) |
11300 | { |
11301 | temp = targetm.goacc.expand_var_decl (exp); |
11302 | if (temp) |
11303 | return temp; |
11304 | } |
11305 | /* Expand const VAR_DECLs with CONSTRUCTOR initializers that |
11306 | have scalar integer modes to a reg via store_constructor. */ |
11307 | if (TREE_READONLY (exp) |
11308 | && !TREE_SIDE_EFFECTS (exp) |
11309 | && (modifier == EXPAND_NORMAL || modifier == EXPAND_STACK_PARM) |
11310 | && immediate_const_ctor_p (DECL_INITIAL (exp)) |
11311 | && SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (exp))) |
11312 | && crtl->emit.regno_pointer_align_length |
11313 | && !target) |
11314 | { |
11315 | target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp))); |
11316 | store_constructor (DECL_INITIAL (exp), target, cleared: 0, |
11317 | size: int_expr_size (DECL_INITIAL (exp)), reverse: false); |
11318 | return target; |
11319 | } |
11320 | /* ... fall through ... */ |
11321 | |
11322 | case PARM_DECL: |
11323 | /* If a static var's type was incomplete when the decl was written, |
11324 | but the type is complete now, lay out the decl now. */ |
11325 | if (DECL_SIZE (exp) == 0 |
11326 | && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp)) |
11327 | && (TREE_STATIC (exp) || DECL_EXTERNAL (exp))) |
11328 | layout_decl (exp, 0); |
11329 | |
11330 | /* fall through */ |
11331 | |
11332 | case FUNCTION_DECL: |
11333 | case RESULT_DECL: |
11334 | decl_rtl = DECL_RTL (exp); |
11335 | expand_decl_rtl: |
11336 | gcc_assert (decl_rtl); |
11337 | |
11338 | /* DECL_MODE might change when TYPE_MODE depends on attribute target |
11339 | settings for VECTOR_TYPE_P that might switch for the function. */ |
11340 | if (currently_expanding_to_rtl |
11341 | && code == VAR_DECL && MEM_P (decl_rtl) |
11342 | && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode) |
11343 | decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0); |
11344 | else |
11345 | decl_rtl = copy_rtx (decl_rtl); |
11346 | |
11347 | /* Record writes to register variables. */ |
11348 | if (modifier == EXPAND_WRITE |
11349 | && REG_P (decl_rtl) |
11350 | && HARD_REGISTER_P (decl_rtl)) |
11351 | add_to_hard_reg_set (regs: &crtl->asm_clobbers, |
11352 | GET_MODE (decl_rtl), REGNO (decl_rtl)); |
11353 | |
11354 | /* Ensure variable marked as used even if it doesn't go through |
11355 | a parser. If it hasn't be used yet, write out an external |
11356 | definition. */ |
11357 | if (exp) |
11358 | TREE_USED (exp) = 1; |
11359 | |
11360 | /* Show we haven't gotten RTL for this yet. */ |
11361 | temp = 0; |
11362 | |
11363 | /* Variables inherited from containing functions should have |
11364 | been lowered by this point. */ |
11365 | if (exp) |
11366 | { |
11367 | tree context = decl_function_context (exp); |
11368 | gcc_assert (SCOPE_FILE_SCOPE_P (context) |
11369 | || context == current_function_decl |
11370 | || TREE_STATIC (exp) |
11371 | || DECL_EXTERNAL (exp) |
11372 | /* ??? C++ creates functions that are not |
11373 | TREE_STATIC. */ |
11374 | || TREE_CODE (exp) == FUNCTION_DECL); |
11375 | } |
11376 | |
11377 | /* This is the case of an array whose size is to be determined |
11378 | from its initializer, while the initializer is still being parsed. |
11379 | ??? We aren't parsing while expanding anymore. */ |
11380 | |
11381 | if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0))) |
11382 | temp = validize_mem (decl_rtl); |
11383 | |
11384 | /* If DECL_RTL is memory, we are in the normal case and the |
11385 | address is not valid, get the address into a register. */ |
11386 | |
11387 | else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER) |
11388 | { |
11389 | if (alt_rtl) |
11390 | *alt_rtl = decl_rtl; |
11391 | decl_rtl = use_anchored_address (decl_rtl); |
11392 | if (modifier != EXPAND_CONST_ADDRESS |
11393 | && modifier != EXPAND_SUM |
11394 | && !memory_address_addr_space_p (exp ? DECL_MODE (exp) |
11395 | : GET_MODE (decl_rtl), |
11396 | XEXP (decl_rtl, 0), |
11397 | MEM_ADDR_SPACE (decl_rtl))) |
11398 | temp = replace_equiv_address (decl_rtl, |
11399 | copy_rtx (XEXP (decl_rtl, 0))); |
11400 | } |
11401 | |
11402 | /* If we got something, return it. But first, set the alignment |
11403 | if the address is a register. */ |
11404 | if (temp != 0) |
11405 | { |
11406 | if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0))) |
11407 | mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp)); |
11408 | } |
11409 | else if (MEM_P (decl_rtl)) |
11410 | temp = decl_rtl; |
11411 | |
11412 | if (temp != 0) |
11413 | { |
11414 | if (MEM_P (temp) |
11415 | && modifier != EXPAND_WRITE |
11416 | && modifier != EXPAND_MEMORY |
11417 | && modifier != EXPAND_INITIALIZER |
11418 | && modifier != EXPAND_CONST_ADDRESS |
11419 | && modifier != EXPAND_SUM |
11420 | && !inner_reference_p |
11421 | && mode != BLKmode |
11422 | && MEM_ALIGN (temp) < GET_MODE_ALIGNMENT (mode)) |
11423 | temp = expand_misaligned_mem_ref (temp, mode, unsignedp, |
11424 | MEM_ALIGN (temp), NULL_RTX, NULL); |
11425 | |
11426 | return EXTEND_BITINT (temp); |
11427 | } |
11428 | |
11429 | if (exp) |
11430 | dmode = DECL_MODE (exp); |
11431 | else |
11432 | dmode = TYPE_MODE (TREE_TYPE (ssa_name)); |
11433 | |
11434 | /* If the mode of DECL_RTL does not match that of the decl, |
11435 | there are two cases: we are dealing with a BLKmode value |
11436 | that is returned in a register, or we are dealing with |
11437 | a promoted value. In the latter case, return a SUBREG |
11438 | of the wanted mode, but mark it so that we know that it |
11439 | was already extended. */ |
11440 | if (REG_P (decl_rtl) |
11441 | && dmode != BLKmode |
11442 | && GET_MODE (decl_rtl) != dmode) |
11443 | { |
11444 | machine_mode pmode; |
11445 | |
11446 | /* Get the signedness to be used for this variable. Ensure we get |
11447 | the same mode we got when the variable was declared. */ |
11448 | if (code != SSA_NAME) |
11449 | pmode = promote_decl_mode (exp, &unsignedp); |
11450 | else if ((g = SSA_NAME_DEF_STMT (ssa_name)) |
11451 | && gimple_code (g) == GIMPLE_CALL |
11452 | && !gimple_call_internal_p (gs: g)) |
11453 | pmode = promote_function_mode (type, mode, &unsignedp, |
11454 | gimple_call_fntype (gs: g), |
11455 | 2); |
11456 | else |
11457 | pmode = promote_ssa_mode (ssa_name, &unsignedp); |
11458 | gcc_assert (GET_MODE (decl_rtl) == pmode); |
11459 | |
11460 | /* Some ABIs require scalar floating point modes to be passed |
11461 | in a wider scalar integer mode. We need to explicitly |
11462 | truncate to an integer mode of the correct precision before |
11463 | using a SUBREG to reinterpret as a floating point value. */ |
11464 | if (SCALAR_FLOAT_MODE_P (mode) |
11465 | && SCALAR_INT_MODE_P (pmode) |
11466 | && known_lt (GET_MODE_SIZE (mode), GET_MODE_SIZE (pmode))) |
11467 | return convert_wider_int_to_float (mode, imode: pmode, x: decl_rtl); |
11468 | |
11469 | temp = gen_lowpart_SUBREG (mode, decl_rtl); |
11470 | SUBREG_PROMOTED_VAR_P (temp) = 1; |
11471 | SUBREG_PROMOTED_SET (temp, unsignedp); |
11472 | return EXTEND_BITINT (temp); |
11473 | } |
11474 | |
11475 | return EXTEND_BITINT (decl_rtl); |
11476 | |
11477 | case INTEGER_CST: |
11478 | { |
11479 | if (TREE_CODE (type) == BITINT_TYPE) |
11480 | { |
11481 | unsigned int prec = TYPE_PRECISION (type); |
11482 | struct bitint_info info; |
11483 | bool ok = targetm.c.bitint_type_info (prec, &info); |
11484 | gcc_assert (ok); |
11485 | scalar_int_mode limb_mode |
11486 | = as_a <scalar_int_mode> (m: info.limb_mode); |
11487 | unsigned int limb_prec = GET_MODE_PRECISION (mode: limb_mode); |
11488 | if (prec > limb_prec && prec > MAX_FIXED_MODE_SIZE) |
11489 | { |
11490 | /* Emit large/huge _BitInt INTEGER_CSTs into memory. */ |
11491 | exp = tree_output_constant_def (exp); |
11492 | return expand_expr (exp, target, VOIDmode, modifier); |
11493 | } |
11494 | } |
11495 | |
11496 | /* Given that TYPE_PRECISION (type) is not always equal to |
11497 | GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from |
11498 | the former to the latter according to the signedness of the |
11499 | type. */ |
11500 | scalar_int_mode int_mode = SCALAR_INT_TYPE_MODE (type); |
11501 | temp = immed_wide_int_const |
11502 | (wi::to_wide (t: exp, prec: GET_MODE_PRECISION (mode: int_mode)), int_mode); |
11503 | return temp; |
11504 | } |
11505 | |
11506 | case VECTOR_CST: |
11507 | { |
11508 | tree tmp = NULL_TREE; |
11509 | if (VECTOR_MODE_P (mode)) |
11510 | return const_vector_from_tree (exp); |
11511 | scalar_int_mode int_mode; |
11512 | if (is_int_mode (mode, int_mode: &int_mode)) |
11513 | { |
11514 | tree type_for_mode = lang_hooks.types.type_for_mode (int_mode, 1); |
11515 | if (type_for_mode) |
11516 | tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, |
11517 | type_for_mode, exp); |
11518 | } |
11519 | if (!tmp) |
11520 | { |
11521 | vec<constructor_elt, va_gc> *v; |
11522 | /* Constructors need to be fixed-length. FIXME. */ |
11523 | unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant (); |
11524 | vec_alloc (v, nelems: nunits); |
11525 | for (unsigned int i = 0; i < nunits; ++i) |
11526 | CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i)); |
11527 | tmp = build_constructor (type, v); |
11528 | } |
11529 | return expand_expr (exp: tmp, target: ignore ? const0_rtx : target, |
11530 | mode: tmode, modifier); |
11531 | } |
11532 | |
11533 | case CONST_DECL: |
11534 | if (modifier == EXPAND_WRITE) |
11535 | { |
11536 | /* Writing into CONST_DECL is always invalid, but handle it |
11537 | gracefully. */ |
11538 | addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp)); |
11539 | scalar_int_mode address_mode = targetm.addr_space.address_mode (as); |
11540 | op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, tmode: address_mode, |
11541 | modifier: EXPAND_NORMAL, as); |
11542 | op0 = memory_address_addr_space (mode, op0, as); |
11543 | temp = gen_rtx_MEM (mode, op0); |
11544 | set_mem_addr_space (temp, as); |
11545 | return temp; |
11546 | } |
11547 | return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier); |
11548 | |
11549 | case REAL_CST: |
11550 | /* If optimized, generate immediate CONST_DOUBLE |
11551 | which will be turned into memory by reload if necessary. |
11552 | |
11553 | We used to force a register so that loop.c could see it. But |
11554 | this does not allow gen_* patterns to perform optimizations with |
11555 | the constants. It also produces two insns in cases like "x = 1.0;". |
11556 | On most machines, floating-point constants are not permitted in |
11557 | many insns, so we'd end up copying it to a register in any case. |
11558 | |
11559 | Now, we do the copying in expand_binop, if appropriate. */ |
11560 | return const_double_from_real_value (TREE_REAL_CST (exp), |
11561 | TYPE_MODE (TREE_TYPE (exp))); |
11562 | |
11563 | case FIXED_CST: |
11564 | return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp), |
11565 | TYPE_MODE (TREE_TYPE (exp))); |
11566 | |
11567 | case COMPLEX_CST: |
11568 | /* Handle evaluating a complex constant in a CONCAT target. */ |
11569 | if (original_target && GET_CODE (original_target) == CONCAT) |
11570 | { |
11571 | rtx rtarg, itarg; |
11572 | |
11573 | mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp))); |
11574 | rtarg = XEXP (original_target, 0); |
11575 | itarg = XEXP (original_target, 1); |
11576 | |
11577 | /* Move the real and imaginary parts separately. */ |
11578 | op0 = expand_expr (TREE_REALPART (exp), target: rtarg, mode, modifier: EXPAND_NORMAL); |
11579 | op1 = expand_expr (TREE_IMAGPART (exp), target: itarg, mode, modifier: EXPAND_NORMAL); |
11580 | |
11581 | if (op0 != rtarg) |
11582 | emit_move_insn (x: rtarg, y: op0); |
11583 | if (op1 != itarg) |
11584 | emit_move_insn (x: itarg, y: op1); |
11585 | |
11586 | return original_target; |
11587 | } |
11588 | |
11589 | /* fall through */ |
11590 | |
11591 | case STRING_CST: |
11592 | temp = expand_expr_constant (exp, defer: 1, modifier); |
11593 | |
11594 | /* temp contains a constant address. |
11595 | On RISC machines where a constant address isn't valid, |
11596 | make some insns to get that address into a register. */ |
11597 | if (modifier != EXPAND_CONST_ADDRESS |
11598 | && modifier != EXPAND_INITIALIZER |
11599 | && modifier != EXPAND_SUM |
11600 | && ! memory_address_addr_space_p (mode, XEXP (temp, 0), |
11601 | MEM_ADDR_SPACE (temp))) |
11602 | return replace_equiv_address (temp, |
11603 | copy_rtx (XEXP (temp, 0))); |
11604 | return temp; |
11605 | |
11606 | case POLY_INT_CST: |
11607 | return immed_wide_int_const (poly_int_cst_value (x: exp), mode); |
11608 | |
11609 | case SAVE_EXPR: |
11610 | { |
11611 | tree val = treeop0; |
11612 | rtx ret = expand_expr_real_1 (exp: val, target, tmode, modifier, alt_rtl, |
11613 | inner_reference_p); |
11614 | |
11615 | if (!SAVE_EXPR_RESOLVED_P (exp)) |
11616 | { |
11617 | /* We can indeed still hit this case, typically via builtin |
11618 | expanders calling save_expr immediately before expanding |
11619 | something. Assume this means that we only have to deal |
11620 | with non-BLKmode values. */ |
11621 | gcc_assert (GET_MODE (ret) != BLKmode); |
11622 | |
11623 | val = build_decl (curr_insn_location (), |
11624 | VAR_DECL, NULL, TREE_TYPE (exp)); |
11625 | DECL_ARTIFICIAL (val) = 1; |
11626 | DECL_IGNORED_P (val) = 1; |
11627 | treeop0 = val; |
11628 | TREE_OPERAND (exp, 0) = treeop0; |
11629 | SAVE_EXPR_RESOLVED_P (exp) = 1; |
11630 | |
11631 | if (!CONSTANT_P (ret)) |
11632 | ret = copy_to_reg (ret); |
11633 | SET_DECL_RTL (val, ret); |
11634 | } |
11635 | |
11636 | return ret; |
11637 | } |
11638 | |
11639 | |
11640 | case CONSTRUCTOR: |
11641 | /* If we don't need the result, just ensure we evaluate any |
11642 | subexpressions. */ |
11643 | if (ignore) |
11644 | { |
11645 | unsigned HOST_WIDE_INT idx; |
11646 | tree value; |
11647 | |
11648 | FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) |
11649 | expand_expr (exp: value, const0_rtx, VOIDmode, modifier: EXPAND_NORMAL); |
11650 | |
11651 | return const0_rtx; |
11652 | } |
11653 | |
11654 | return expand_constructor (exp, target, modifier, avoid_temp_mem: false); |
11655 | |
11656 | case TARGET_MEM_REF: |
11657 | { |
11658 | addr_space_t as |
11659 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); |
11660 | unsigned int align; |
11661 | |
11662 | op0 = addr_for_mem_ref (exp, as, really_expand: true); |
11663 | op0 = memory_address_addr_space (mode, op0, as); |
11664 | temp = gen_rtx_MEM (mode, op0); |
11665 | set_mem_attributes (temp, exp, 0); |
11666 | set_mem_addr_space (temp, as); |
11667 | align = get_object_alignment (exp); |
11668 | if (modifier != EXPAND_WRITE |
11669 | && modifier != EXPAND_MEMORY |
11670 | && mode != BLKmode |
11671 | && align < GET_MODE_ALIGNMENT (mode)) |
11672 | temp = expand_misaligned_mem_ref (temp, mode, unsignedp, |
11673 | align, NULL_RTX, NULL); |
11674 | return EXTEND_BITINT (temp); |
11675 | } |
11676 | |
11677 | case MEM_REF: |
11678 | { |
11679 | const bool reverse = REF_REVERSE_STORAGE_ORDER (exp); |
11680 | addr_space_t as |
11681 | = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); |
11682 | machine_mode address_mode; |
11683 | tree base = TREE_OPERAND (exp, 0); |
11684 | gimple *def_stmt; |
11685 | unsigned align; |
11686 | /* Handle expansion of non-aliased memory with non-BLKmode. That |
11687 | might end up in a register. */ |
11688 | if (mem_ref_refers_to_non_mem_p (ref: exp)) |
11689 | { |
11690 | poly_int64 offset = mem_ref_offset (exp).force_shwi (); |
11691 | base = TREE_OPERAND (base, 0); |
11692 | poly_uint64 type_size; |
11693 | if (known_eq (offset, 0) |
11694 | && !reverse |
11695 | && poly_int_tree_p (TYPE_SIZE (type), value: &type_size) |
11696 | && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)), type_size)) |
11697 | return expand_expr (exp: build1 (VIEW_CONVERT_EXPR, type, base), |
11698 | target, mode: tmode, modifier); |
11699 | if (TYPE_MODE (type) == BLKmode) |
11700 | { |
11701 | temp = assign_stack_temp (DECL_MODE (base), |
11702 | GET_MODE_SIZE (DECL_MODE (base))); |
11703 | store_expr (exp: base, target: temp, call_param_p: 0, nontemporal: false, reverse: false); |
11704 | temp = adjust_address (temp, BLKmode, offset); |
11705 | set_mem_size (temp, int_size_in_bytes (type)); |
11706 | return temp; |
11707 | } |
11708 | exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type), |
11709 | bitsize_int (offset * BITS_PER_UNIT)); |
11710 | REF_REVERSE_STORAGE_ORDER (exp) = reverse; |
11711 | return expand_expr (exp, target, mode: tmode, modifier); |
11712 | } |
11713 | address_mode = targetm.addr_space.address_mode (as); |
11714 | if ((def_stmt = get_def_for_expr (name: base, code: BIT_AND_EXPR))) |
11715 | { |
11716 | tree mask = gimple_assign_rhs2 (gs: def_stmt); |
11717 | base = build2 (BIT_AND_EXPR, TREE_TYPE (base), |
11718 | gimple_assign_rhs1 (gs: def_stmt), mask); |
11719 | TREE_OPERAND (exp, 0) = base; |
11720 | } |
11721 | align = get_object_alignment (exp); |
11722 | op0 = expand_expr (exp: base, NULL_RTX, VOIDmode, modifier: EXPAND_SUM); |
11723 | op0 = memory_address_addr_space (mode, op0, as); |
11724 | if (!integer_zerop (TREE_OPERAND (exp, 1))) |
11725 | { |
11726 | rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode); |
11727 | op0 = simplify_gen_binary (code: PLUS, mode: address_mode, op0, op1: off); |
11728 | op0 = memory_address_addr_space (mode, op0, as); |
11729 | } |
11730 | temp = gen_rtx_MEM (mode, op0); |
11731 | set_mem_attributes (temp, exp, 0); |
11732 | set_mem_addr_space (temp, as); |
11733 | if (TREE_THIS_VOLATILE (exp)) |
11734 | MEM_VOLATILE_P (temp) = 1; |
11735 | if (modifier == EXPAND_WRITE || modifier == EXPAND_MEMORY) |
11736 | return temp; |
11737 | if (!inner_reference_p |
11738 | && mode != BLKmode |
11739 | && align < GET_MODE_ALIGNMENT (mode)) |
11740 | temp = expand_misaligned_mem_ref (temp, mode, unsignedp, align, |
11741 | target: modifier == EXPAND_STACK_PARM |
11742 | ? NULL_RTX : target, alt_rtl); |
11743 | if (reverse) |
11744 | temp = flip_storage_order (mode, temp); |
11745 | return EXTEND_BITINT (temp); |
11746 | } |
11747 | |
11748 | case ARRAY_REF: |
11749 | |
11750 | { |
11751 | tree array = treeop0; |
11752 | tree index = treeop1; |
11753 | tree init; |
11754 | |
11755 | /* Fold an expression like: "foo"[2]. |
11756 | This is not done in fold so it won't happen inside &. |
11757 | Don't fold if this is for wide characters since it's too |
11758 | difficult to do correctly and this is a very rare case. */ |
11759 | |
11760 | if (modifier != EXPAND_CONST_ADDRESS |
11761 | && modifier != EXPAND_INITIALIZER |
11762 | && modifier != EXPAND_MEMORY) |
11763 | { |
11764 | tree t = fold_read_from_constant_string (exp); |
11765 | |
11766 | if (t) |
11767 | return expand_expr (exp: t, target, mode: tmode, modifier); |
11768 | } |
11769 | |
11770 | /* If this is a constant index into a constant array, |
11771 | just get the value from the array. Handle both the cases when |
11772 | we have an explicit constructor and when our operand is a variable |
11773 | that was declared const. */ |
11774 | |
11775 | if (modifier != EXPAND_CONST_ADDRESS |
11776 | && modifier != EXPAND_INITIALIZER |
11777 | && modifier != EXPAND_MEMORY |
11778 | && TREE_CODE (array) == CONSTRUCTOR |
11779 | && ! TREE_SIDE_EFFECTS (array) |
11780 | && TREE_CODE (index) == INTEGER_CST) |
11781 | { |
11782 | unsigned HOST_WIDE_INT ix; |
11783 | tree field, value; |
11784 | |
11785 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix, |
11786 | field, value) |
11787 | if (tree_int_cst_equal (field, index)) |
11788 | { |
11789 | if (!TREE_SIDE_EFFECTS (value)) |
11790 | return expand_expr (exp: fold (value), target, mode: tmode, modifier); |
11791 | break; |
11792 | } |
11793 | } |
11794 | |
11795 | else if (optimize >= 1 |
11796 | && modifier != EXPAND_CONST_ADDRESS |
11797 | && modifier != EXPAND_INITIALIZER |
11798 | && modifier != EXPAND_MEMORY |
11799 | && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array) |
11800 | && TREE_CODE (index) == INTEGER_CST |
11801 | && (VAR_P (array) || TREE_CODE (array) == CONST_DECL) |
11802 | && (init = ctor_for_folding (array)) != error_mark_node) |
11803 | { |
11804 | if (init == NULL_TREE) |
11805 | { |
11806 | tree value = build_zero_cst (type); |
11807 | if (TREE_CODE (value) == CONSTRUCTOR) |
11808 | { |
11809 | /* If VALUE is a CONSTRUCTOR, this optimization is only |
11810 | useful if this doesn't store the CONSTRUCTOR into |
11811 | memory. If it does, it is more efficient to just |
11812 | load the data from the array directly. */ |
11813 | rtx ret = expand_constructor (exp: value, target, |
11814 | modifier, avoid_temp_mem: true); |
11815 | if (ret == NULL_RTX) |
11816 | value = NULL_TREE; |
11817 | } |
11818 | |
11819 | if (value) |
11820 | return expand_expr (exp: value, target, mode: tmode, modifier); |
11821 | } |
11822 | else if (TREE_CODE (init) == CONSTRUCTOR) |
11823 | { |
11824 | unsigned HOST_WIDE_INT ix; |
11825 | tree field, value; |
11826 | |
11827 | FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix, |
11828 | field, value) |
11829 | if (tree_int_cst_equal (field, index)) |
11830 | { |
11831 | if (TREE_SIDE_EFFECTS (value)) |
11832 | break; |
11833 | |
11834 | if (TREE_CODE (value) == CONSTRUCTOR) |
11835 | { |
11836 | /* If VALUE is a CONSTRUCTOR, this |
11837 | optimization is only useful if |
11838 | this doesn't store the CONSTRUCTOR |
11839 | into memory. If it does, it is more |
11840 | efficient to just load the data from |
11841 | the array directly. */ |
11842 | rtx ret = expand_constructor (exp: value, target, |
11843 | modifier, avoid_temp_mem: true); |
11844 | if (ret == NULL_RTX) |
11845 | break; |
11846 | } |
11847 | |
11848 | return |
11849 | expand_expr (exp: fold (value), target, mode: tmode, modifier); |
11850 | } |
11851 | } |
11852 | else if (TREE_CODE (init) == STRING_CST) |
11853 | { |
11854 | tree low_bound = array_ref_low_bound (exp); |
11855 | tree index1 = fold_convert_loc (loc, sizetype, treeop1); |
11856 | |
11857 | /* Optimize the special case of a zero lower bound. |
11858 | |
11859 | We convert the lower bound to sizetype to avoid problems |
11860 | with constant folding. E.g. suppose the lower bound is |
11861 | 1 and its mode is QI. Without the conversion |
11862 | (ARRAY + (INDEX - (unsigned char)1)) |
11863 | becomes |
11864 | (ARRAY + (-(unsigned char)1) + INDEX) |
11865 | which becomes |
11866 | (ARRAY + 255 + INDEX). Oops! */ |
11867 | if (!integer_zerop (low_bound)) |
11868 | index1 = size_diffop_loc (loc, index1, |
11869 | fold_convert_loc (loc, sizetype, |
11870 | low_bound)); |
11871 | |
11872 | if (tree_fits_uhwi_p (index1) |
11873 | && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0) |
11874 | { |
11875 | tree char_type = TREE_TYPE (TREE_TYPE (init)); |
11876 | scalar_int_mode char_mode; |
11877 | |
11878 | if (is_int_mode (TYPE_MODE (char_type), int_mode: &char_mode) |
11879 | && GET_MODE_SIZE (mode: char_mode) == 1) |
11880 | return gen_int_mode (TREE_STRING_POINTER (init) |
11881 | [TREE_INT_CST_LOW (index1)], |
11882 | char_mode); |
11883 | } |
11884 | } |
11885 | } |
11886 | } |
11887 | goto normal_inner_ref; |
11888 | |
11889 | case COMPONENT_REF: |
11890 | gcc_assert (TREE_CODE (treeop0) != CONSTRUCTOR); |
11891 | /* Fall through. */ |
11892 | case BIT_FIELD_REF: |
11893 | case ARRAY_RANGE_REF: |
11894 | normal_inner_ref: |
11895 | { |
11896 | machine_mode mode1, mode2; |
11897 | poly_int64 bitsize, bitpos, bytepos; |
11898 | tree offset; |
11899 | int reversep, volatilep = 0; |
11900 | tree tem |
11901 | = get_inner_reference (exp, pbitsize: &bitsize, pbitpos: &bitpos, poffset: &offset, pmode: &mode1, |
11902 | punsignedp: &unsignedp, preversep: &reversep, pvolatilep: &volatilep); |
11903 | rtx orig_op0, memloc; |
11904 | bool clear_mem_expr = false; |
11905 | bool must_force_mem; |
11906 | |
11907 | /* If we got back the original object, something is wrong. Perhaps |
11908 | we are evaluating an expression too early. In any event, don't |
11909 | infinitely recurse. */ |
11910 | gcc_assert (tem != exp); |
11911 | |
11912 | /* Make sure bitpos is not negative, this can wreak havoc later. */ |
11913 | if (maybe_lt (a: bitpos, b: 0)) |
11914 | { |
11915 | gcc_checking_assert (offset == NULL_TREE); |
11916 | offset = size_int (bits_to_bytes_round_down (bitpos)); |
11917 | bitpos = num_trailing_bits (bitpos); |
11918 | } |
11919 | |
11920 | /* If we have either an offset, a BLKmode result, or a reference |
11921 | outside the underlying object, we must force it to memory. |
11922 | Such a case can occur in Ada if we have unchecked conversion |
11923 | of an expression from a scalar type to an aggregate type or |
11924 | for an ARRAY_RANGE_REF whose type is BLKmode, or if we were |
11925 | passed a partially uninitialized object or a view-conversion |
11926 | to a larger size. */ |
11927 | must_force_mem = offset != NULL_TREE |
11928 | || mode1 == BLKmode |
11929 | || (mode == BLKmode |
11930 | && !int_mode_for_size (size: bitsize, limit: 1).exists ()); |
11931 | |
11932 | const enum expand_modifier tem_modifier |
11933 | = must_force_mem |
11934 | ? EXPAND_MEMORY |
11935 | : modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier; |
11936 | |
11937 | /* If TEM's type is a union of variable size, pass TARGET to the inner |
11938 | computation, since it will need a temporary and TARGET is known |
11939 | to have to do. This occurs in unchecked conversion in Ada. */ |
11940 | const rtx tem_target |
11941 | = TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE |
11942 | && COMPLETE_TYPE_P (TREE_TYPE (tem)) |
11943 | && TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) != INTEGER_CST |
11944 | && modifier != EXPAND_STACK_PARM |
11945 | ? target |
11946 | : NULL_RTX; |
11947 | |
11948 | orig_op0 = op0 |
11949 | = expand_expr_real (exp: tem, target: tem_target, VOIDmode, modifier: tem_modifier, NULL, |
11950 | inner_reference_p: true); |
11951 | |
11952 | /* If the field has a mode, we want to access it in the |
11953 | field's mode, not the computed mode. |
11954 | If a MEM has VOIDmode (external with incomplete type), |
11955 | use BLKmode for it instead. */ |
11956 | if (MEM_P (op0)) |
11957 | { |
11958 | if (mode1 != VOIDmode) |
11959 | op0 = adjust_address (op0, mode1, 0); |
11960 | else if (GET_MODE (op0) == VOIDmode) |
11961 | op0 = adjust_address (op0, BLKmode, 0); |
11962 | } |
11963 | |
11964 | mode2 |
11965 | = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0); |
11966 | |
11967 | /* See above for the rationale. */ |
11968 | if (maybe_gt (bitpos + bitsize, GET_MODE_BITSIZE (mode2))) |
11969 | must_force_mem = true; |
11970 | |
11971 | /* Handle CONCAT first. */ |
11972 | if (GET_CODE (op0) == CONCAT && !must_force_mem) |
11973 | { |
11974 | if (known_eq (bitpos, 0) |
11975 | && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0))) |
11976 | && COMPLEX_MODE_P (mode1) |
11977 | && COMPLEX_MODE_P (GET_MODE (op0)) |
11978 | && (GET_MODE_PRECISION (GET_MODE_INNER (mode1)) |
11979 | == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0))))) |
11980 | { |
11981 | if (reversep) |
11982 | op0 = flip_storage_order (GET_MODE (op0), op0); |
11983 | if (mode1 != GET_MODE (op0)) |
11984 | { |
11985 | rtx parts[2]; |
11986 | for (int i = 0; i < 2; i++) |
11987 | { |
11988 | rtx op = read_complex_part (cplx: op0, imag_p: i != 0); |
11989 | if (GET_CODE (op) == SUBREG) |
11990 | op = force_reg (GET_MODE (op), op); |
11991 | temp = gen_lowpart_common (GET_MODE_INNER (mode1), op); |
11992 | if (temp) |
11993 | op = temp; |
11994 | else |
11995 | { |
11996 | if (!REG_P (op) && !MEM_P (op)) |
11997 | op = force_reg (GET_MODE (op), op); |
11998 | op = gen_lowpart (GET_MODE_INNER (mode1), op); |
11999 | } |
12000 | parts[i] = op; |
12001 | } |
12002 | op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]); |
12003 | } |
12004 | return op0; |
12005 | } |
12006 | if (known_eq (bitpos, 0) |
12007 | && known_eq (bitsize, |
12008 | GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))) |
12009 | && maybe_ne (a: bitsize, b: 0)) |
12010 | { |
12011 | op0 = XEXP (op0, 0); |
12012 | mode2 = GET_MODE (op0); |
12013 | } |
12014 | else if (known_eq (bitpos, |
12015 | GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))) |
12016 | && known_eq (bitsize, |
12017 | GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))) |
12018 | && maybe_ne (a: bitpos, b: 0) |
12019 | && maybe_ne (a: bitsize, b: 0)) |
12020 | { |
12021 | op0 = XEXP (op0, 1); |
12022 | bitpos = 0; |
12023 | mode2 = GET_MODE (op0); |
12024 | } |
12025 | else |
12026 | /* Otherwise force into memory. */ |
12027 | must_force_mem = true; |
12028 | } |
12029 | |
12030 | /* If this is a constant, put it in a register if it is a legitimate |
12031 | constant and we don't need a memory reference. */ |
12032 | if (CONSTANT_P (op0) |
12033 | && mode2 != BLKmode |
12034 | && targetm.legitimate_constant_p (mode2, op0) |
12035 | && !must_force_mem) |
12036 | op0 = force_reg (mode2, op0); |
12037 | |
12038 | /* Otherwise, if this is a constant, try to force it to the constant |
12039 | pool. Note that back-ends, e.g. MIPS, may refuse to do so if it |
12040 | is a legitimate constant. */ |
12041 | else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0))) |
12042 | op0 = validize_mem (memloc); |
12043 | |
12044 | /* Otherwise, if this is a constant or the object is not in memory |
12045 | and need be, put it there. */ |
12046 | else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem)) |
12047 | { |
12048 | memloc = assign_temp (TREE_TYPE (tem), 1, 1); |
12049 | emit_move_insn (x: memloc, y: op0); |
12050 | op0 = memloc; |
12051 | clear_mem_expr = true; |
12052 | } |
12053 | |
12054 | if (offset) |
12055 | { |
12056 | machine_mode address_mode; |
12057 | rtx offset_rtx = expand_expr (exp: offset, NULL_RTX, VOIDmode, |
12058 | modifier: EXPAND_SUM); |
12059 | |
12060 | gcc_assert (MEM_P (op0)); |
12061 | |
12062 | address_mode = get_address_mode (mem: op0); |
12063 | if (GET_MODE (offset_rtx) != address_mode) |
12064 | { |
12065 | /* We cannot be sure that the RTL in offset_rtx is valid outside |
12066 | of a memory address context, so force it into a register |
12067 | before attempting to convert it to the desired mode. */ |
12068 | offset_rtx = force_operand (value: offset_rtx, NULL_RTX); |
12069 | offset_rtx = convert_to_mode (mode: address_mode, x: offset_rtx, unsignedp: 0); |
12070 | } |
12071 | |
12072 | /* See the comment in expand_assignment for the rationale. */ |
12073 | if (mode1 != VOIDmode |
12074 | && maybe_ne (a: bitpos, b: 0) |
12075 | && maybe_gt (bitsize, 0) |
12076 | && multiple_p (a: bitpos, BITS_PER_UNIT, multiple: &bytepos) |
12077 | && multiple_p (a: bitpos, b: bitsize) |
12078 | && multiple_p (a: bitsize, GET_MODE_ALIGNMENT (mode1)) |
12079 | && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1)) |
12080 | { |
12081 | op0 = adjust_address (op0, mode1, bytepos); |
12082 | bitpos = 0; |
12083 | } |
12084 | |
12085 | op0 = offset_address (op0, offset_rtx, |
12086 | highest_pow2_factor (exp: offset)); |
12087 | } |
12088 | |
12089 | /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT, |
12090 | record its alignment as BIGGEST_ALIGNMENT. */ |
12091 | if (MEM_P (op0) |
12092 | && known_eq (bitpos, 0) |
12093 | && offset != 0 |
12094 | && is_aligning_offset (offset, tem)) |
12095 | set_mem_align (op0, BIGGEST_ALIGNMENT); |
12096 | |
12097 | /* Don't forget about volatility even if this is a bitfield. */ |
12098 | if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0)) |
12099 | { |
12100 | if (op0 == orig_op0) |
12101 | op0 = copy_rtx (op0); |
12102 | |
12103 | MEM_VOLATILE_P (op0) = 1; |
12104 | } |
12105 | |
12106 | if (MEM_P (op0) && TREE_CODE (tem) == FUNCTION_DECL) |
12107 | { |
12108 | if (op0 == orig_op0) |
12109 | op0 = copy_rtx (op0); |
12110 | |
12111 | set_mem_align (op0, BITS_PER_UNIT); |
12112 | } |
12113 | |
12114 | /* In cases where an aligned union has an unaligned object |
12115 | as a field, we might be extracting a BLKmode value from |
12116 | an integer-mode (e.g., SImode) object. Handle this case |
12117 | by doing the extract into an object as wide as the field |
12118 | (which we know to be the width of a basic mode), then |
12119 | storing into memory, and changing the mode to BLKmode. */ |
12120 | if (mode1 == VOIDmode |
12121 | || REG_P (op0) || GET_CODE (op0) == SUBREG |
12122 | || (mode1 != BLKmode && ! direct_load[(int) mode1] |
12123 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT |
12124 | && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT |
12125 | && modifier != EXPAND_CONST_ADDRESS |
12126 | && modifier != EXPAND_INITIALIZER |
12127 | && modifier != EXPAND_MEMORY) |
12128 | /* If the bitfield is volatile and the bitsize |
12129 | is narrower than the access size of the bitfield, |
12130 | we need to extract bitfields from the access. */ |
12131 | || (volatilep && TREE_CODE (exp) == COMPONENT_REF |
12132 | && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1)) |
12133 | && mode1 != BLKmode |
12134 | && maybe_lt (a: bitsize, b: GET_MODE_SIZE (mode: mode1) * BITS_PER_UNIT)) |
12135 | /* If the field isn't aligned enough to fetch as a memref, |
12136 | fetch it as a bit field. */ |
12137 | || (mode1 != BLKmode |
12138 | && (((MEM_P (op0) |
12139 | ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) |
12140 | || !multiple_p (a: bitpos, GET_MODE_ALIGNMENT (mode1)) |
12141 | : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) |
12142 | || !multiple_p (a: bitpos, GET_MODE_ALIGNMENT (mode))) |
12143 | && modifier != EXPAND_MEMORY |
12144 | && ((modifier == EXPAND_CONST_ADDRESS |
12145 | || modifier == EXPAND_INITIALIZER) |
12146 | ? STRICT_ALIGNMENT |
12147 | : targetm.slow_unaligned_access (mode1, |
12148 | MEM_ALIGN (op0)))) |
12149 | || !multiple_p (a: bitpos, BITS_PER_UNIT))) |
12150 | /* If the type and the field are a constant size and the |
12151 | size of the type isn't the same size as the bitfield, |
12152 | we must use bitfield operations. */ |
12153 | || (known_size_p (a: bitsize) |
12154 | && TYPE_SIZE (TREE_TYPE (exp)) |
12155 | && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp))) |
12156 | && maybe_ne (a: wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))), |
12157 | b: bitsize))) |
12158 | { |
12159 | machine_mode ext_mode = mode; |
12160 | |
12161 | if (ext_mode == BLKmode |
12162 | && ! (target != 0 && MEM_P (op0) |
12163 | && MEM_P (target) |
12164 | && multiple_p (a: bitpos, BITS_PER_UNIT))) |
12165 | ext_mode = int_mode_for_size (size: bitsize, limit: 1).else_blk (); |
12166 | |
12167 | if (ext_mode == BLKmode) |
12168 | { |
12169 | if (target == 0) |
12170 | target = assign_temp (type, 1, 1); |
12171 | |
12172 | /* ??? Unlike the similar test a few lines below, this one is |
12173 | very likely obsolete. */ |
12174 | if (known_eq (bitsize, 0)) |
12175 | return target; |
12176 | |
12177 | /* In this case, BITPOS must start at a byte boundary and |
12178 | TARGET, if specified, must be a MEM. */ |
12179 | gcc_assert (MEM_P (op0) |
12180 | && (!target || MEM_P (target))); |
12181 | |
12182 | bytepos = exact_div (a: bitpos, BITS_PER_UNIT); |
12183 | poly_int64 bytesize = bits_to_bytes_round_up (bitsize); |
12184 | emit_block_move (x: target, |
12185 | adjust_address (op0, VOIDmode, bytepos), |
12186 | size: gen_int_mode (bytesize, Pmode), |
12187 | method: (modifier == EXPAND_STACK_PARM |
12188 | ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); |
12189 | |
12190 | return target; |
12191 | } |
12192 | |
12193 | /* If we have nothing to extract, the result will be 0 for targets |
12194 | with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always |
12195 | return 0 for the sake of consistency, as reading a zero-sized |
12196 | bitfield is valid in Ada and the value is fully specified. */ |
12197 | if (known_eq (bitsize, 0)) |
12198 | return const0_rtx; |
12199 | |
12200 | op0 = validize_mem (op0); |
12201 | |
12202 | if (MEM_P (op0) && REG_P (XEXP (op0, 0))) |
12203 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); |
12204 | |
12205 | /* If the result has aggregate type and the extraction is done in |
12206 | an integral mode, then the field may be not aligned on a byte |
12207 | boundary; in this case, if it has reverse storage order, it |
12208 | needs to be extracted as a scalar field with reverse storage |
12209 | order and put back into memory order afterwards. */ |
12210 | if (AGGREGATE_TYPE_P (type) |
12211 | && GET_MODE_CLASS (ext_mode) == MODE_INT) |
12212 | reversep = TYPE_REVERSE_STORAGE_ORDER (type); |
12213 | |
12214 | gcc_checking_assert (known_ge (bitpos, 0)); |
12215 | op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, |
12216 | (modifier == EXPAND_STACK_PARM |
12217 | ? NULL_RTX : target), |
12218 | ext_mode, ext_mode, reversep, alt_rtl); |
12219 | |
12220 | /* If the result has aggregate type and the mode of OP0 is an |
12221 | integral mode then, if BITSIZE is narrower than this mode |
12222 | and this is for big-endian data, we must put the field |
12223 | into the high-order bits. And we must also put it back |
12224 | into memory order if it has been previously reversed. */ |
12225 | scalar_int_mode op0_mode; |
12226 | if (AGGREGATE_TYPE_P (type) |
12227 | && is_int_mode (GET_MODE (op0), int_mode: &op0_mode)) |
12228 | { |
12229 | HOST_WIDE_INT size = GET_MODE_BITSIZE (mode: op0_mode); |
12230 | |
12231 | gcc_checking_assert (known_le (bitsize, size)); |
12232 | if (maybe_lt (a: bitsize, b: size) |
12233 | && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) |
12234 | op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0, |
12235 | size - bitsize, op0, 1); |
12236 | |
12237 | if (reversep) |
12238 | op0 = flip_storage_order (op0_mode, op0); |
12239 | } |
12240 | |
12241 | /* If the result type is BLKmode, store the data into a temporary |
12242 | of the appropriate type, but with the mode corresponding to the |
12243 | mode for the data we have (op0's mode). */ |
12244 | if (mode == BLKmode) |
12245 | { |
12246 | rtx new_rtx |
12247 | = assign_stack_temp_for_type (ext_mode, |
12248 | GET_MODE_BITSIZE (mode: ext_mode), |
12249 | type); |
12250 | emit_move_insn (x: new_rtx, y: op0); |
12251 | op0 = copy_rtx (new_rtx); |
12252 | PUT_MODE (x: op0, BLKmode); |
12253 | } |
12254 | |
12255 | return op0; |
12256 | } |
12257 | |
12258 | /* If the result is BLKmode, use that to access the object |
12259 | now as well. */ |
12260 | if (mode == BLKmode) |
12261 | mode1 = BLKmode; |
12262 | |
12263 | /* Get a reference to just this component. */ |
12264 | bytepos = bits_to_bytes_round_down (bitpos); |
12265 | if (modifier == EXPAND_CONST_ADDRESS |
12266 | || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) |
12267 | op0 = adjust_address_nv (op0, mode1, bytepos); |
12268 | else |
12269 | op0 = adjust_address (op0, mode1, bytepos); |
12270 | |
12271 | if (op0 == orig_op0) |
12272 | op0 = copy_rtx (op0); |
12273 | |
12274 | /* Don't set memory attributes if the base expression is |
12275 | SSA_NAME that got expanded as a MEM or a CONSTANT. In that case, |
12276 | we should just honor its original memory attributes. */ |
12277 | if (!(TREE_CODE (tem) == SSA_NAME |
12278 | && (MEM_P (orig_op0) || CONSTANT_P (orig_op0)))) |
12279 | set_mem_attributes (op0, exp, 0); |
12280 | |
12281 | if (REG_P (XEXP (op0, 0))) |
12282 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); |
12283 | |
12284 | /* If op0 is a temporary because the original expressions was forced |
12285 | to memory, clear MEM_EXPR so that the original expression cannot |
12286 | be marked as addressable through MEM_EXPR of the temporary. */ |
12287 | if (clear_mem_expr) |
12288 | set_mem_expr (op0, NULL_TREE); |
12289 | |
12290 | MEM_VOLATILE_P (op0) |= volatilep; |
12291 | |
12292 | if (reversep |
12293 | && modifier != EXPAND_MEMORY |
12294 | && modifier != EXPAND_WRITE) |
12295 | op0 = flip_storage_order (mode1, op0); |
12296 | |
12297 | op0 = EXTEND_BITINT (op0); |
12298 | |
12299 | if (mode == mode1 || mode1 == BLKmode || mode1 == tmode |
12300 | || modifier == EXPAND_CONST_ADDRESS |
12301 | || modifier == EXPAND_INITIALIZER) |
12302 | return op0; |
12303 | |
12304 | if (target == 0) |
12305 | target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); |
12306 | |
12307 | convert_move (to: target, from: op0, unsignedp); |
12308 | return target; |
12309 | } |
12310 | |
12311 | case OBJ_TYPE_REF: |
12312 | return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, mode: tmode, modifier); |
12313 | |
12314 | case CALL_EXPR: |
12315 | /* All valid uses of __builtin_va_arg_pack () are removed during |
12316 | inlining. */ |
12317 | if (CALL_EXPR_VA_ARG_PACK (exp)) |
12318 | error ("invalid use of %<__builtin_va_arg_pack ()%>" ); |
12319 | { |
12320 | tree fndecl = get_callee_fndecl (exp), attr; |
12321 | |
12322 | if (fndecl |
12323 | /* Don't diagnose the error attribute in thunks, those are |
12324 | artificially created. */ |
12325 | && !CALL_FROM_THUNK_P (exp) |
12326 | && (attr = lookup_attribute (attr_name: "error" , |
12327 | DECL_ATTRIBUTES (fndecl))) != NULL) |
12328 | { |
12329 | const char *ident = lang_hooks.decl_printable_name (fndecl, 1); |
12330 | error ("call to %qs declared with attribute error: %s" , |
12331 | identifier_to_locale (ident), |
12332 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); |
12333 | } |
12334 | if (fndecl |
12335 | /* Don't diagnose the warning attribute in thunks, those are |
12336 | artificially created. */ |
12337 | && !CALL_FROM_THUNK_P (exp) |
12338 | && (attr = lookup_attribute (attr_name: "warning" , |
12339 | DECL_ATTRIBUTES (fndecl))) != NULL) |
12340 | { |
12341 | const char *ident = lang_hooks.decl_printable_name (fndecl, 1); |
12342 | warning_at (EXPR_LOCATION (exp), |
12343 | OPT_Wattribute_warning, |
12344 | "call to %qs declared with attribute warning: %s" , |
12345 | identifier_to_locale (ident), |
12346 | TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); |
12347 | } |
12348 | |
12349 | /* Check for a built-in function. */ |
12350 | if (fndecl && fndecl_built_in_p (node: fndecl)) |
12351 | { |
12352 | gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND); |
12353 | return expand_builtin (exp, target, subtarget, tmode, ignore); |
12354 | } |
12355 | } |
12356 | temp = expand_call (exp, target, ignore); |
12357 | return EXTEND_BITINT (temp); |
12358 | |
12359 | case VIEW_CONVERT_EXPR: |
12360 | op0 = NULL_RTX; |
12361 | |
12362 | /* If we are converting to BLKmode, try to avoid an intermediate |
12363 | temporary by fetching an inner memory reference. */ |
12364 | if (mode == BLKmode |
12365 | && poly_int_tree_p (TYPE_SIZE (type)) |
12366 | && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode |
12367 | && handled_component_p (t: treeop0)) |
12368 | { |
12369 | machine_mode mode1; |
12370 | poly_int64 bitsize, bitpos, bytepos; |
12371 | tree offset; |
12372 | int reversep, volatilep = 0; |
12373 | tree tem |
12374 | = get_inner_reference (exp: treeop0, pbitsize: &bitsize, pbitpos: &bitpos, poffset: &offset, pmode: &mode1, |
12375 | punsignedp: &unsignedp, preversep: &reversep, pvolatilep: &volatilep); |
12376 | |
12377 | /* ??? We should work harder and deal with non-zero offsets. */ |
12378 | if (!offset |
12379 | && multiple_p (a: bitpos, BITS_PER_UNIT, multiple: &bytepos) |
12380 | && !reversep |
12381 | && known_size_p (a: bitsize) |
12382 | && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize)) |
12383 | { |
12384 | /* See the normal_inner_ref case for the rationale. */ |
12385 | rtx orig_op0 |
12386 | = expand_expr_real (exp: tem, |
12387 | target: (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE |
12388 | && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) |
12389 | != INTEGER_CST) |
12390 | && modifier != EXPAND_STACK_PARM |
12391 | ? target : NULL_RTX), |
12392 | VOIDmode, |
12393 | modifier: modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier, |
12394 | NULL, inner_reference_p: true); |
12395 | |
12396 | if (MEM_P (orig_op0)) |
12397 | { |
12398 | op0 = orig_op0; |
12399 | |
12400 | /* Get a reference to just this component. */ |
12401 | if (modifier == EXPAND_CONST_ADDRESS |
12402 | || modifier == EXPAND_SUM |
12403 | || modifier == EXPAND_INITIALIZER) |
12404 | op0 = adjust_address_nv (op0, mode, bytepos); |
12405 | else |
12406 | op0 = adjust_address (op0, mode, bytepos); |
12407 | |
12408 | if (op0 == orig_op0) |
12409 | op0 = copy_rtx (op0); |
12410 | |
12411 | set_mem_attributes (op0, treeop0, 0); |
12412 | if (REG_P (XEXP (op0, 0))) |
12413 | mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); |
12414 | |
12415 | MEM_VOLATILE_P (op0) |= volatilep; |
12416 | } |
12417 | } |
12418 | } |
12419 | |
12420 | if (!op0) |
12421 | op0 = expand_expr_real (exp: treeop0, NULL_RTX, VOIDmode, modifier, |
12422 | NULL, inner_reference_p); |
12423 | |
12424 | /* If the input and output modes are both the same, we are done. */ |
12425 | if (mode == GET_MODE (op0)) |
12426 | ; |
12427 | /* Similarly if the output mode is BLKmode and input is a MEM, |
12428 | adjust_address done below is all we need. */ |
12429 | else if (mode == BLKmode && MEM_P (op0)) |
12430 | ; |
12431 | /* If neither mode is BLKmode, and both modes are the same size |
12432 | then we can use gen_lowpart. */ |
12433 | else if (mode != BLKmode |
12434 | && GET_MODE (op0) != BLKmode |
12435 | && known_eq (GET_MODE_PRECISION (mode), |
12436 | GET_MODE_PRECISION (GET_MODE (op0))) |
12437 | && !COMPLEX_MODE_P (GET_MODE (op0))) |
12438 | { |
12439 | if (GET_CODE (op0) == SUBREG) |
12440 | op0 = force_reg (GET_MODE (op0), op0); |
12441 | temp = gen_lowpart_common (mode, op0); |
12442 | if (temp) |
12443 | op0 = temp; |
12444 | else |
12445 | { |
12446 | if (!REG_P (op0) && !MEM_P (op0)) |
12447 | op0 = force_reg (GET_MODE (op0), op0); |
12448 | op0 = gen_lowpart (mode, op0); |
12449 | } |
12450 | } |
12451 | /* If both types are integral, convert from one mode to the other. */ |
12452 | else if (INTEGRAL_TYPE_P (type) |
12453 | && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)) |
12454 | && mode != BLKmode |
12455 | && GET_MODE (op0) != BLKmode) |
12456 | op0 = convert_modes (mode, GET_MODE (op0), x: op0, |
12457 | TYPE_UNSIGNED (TREE_TYPE (treeop0))); |
12458 | /* If the output type is a bit-field type, do an extraction. */ |
12459 | else if (reduce_bit_field) |
12460 | return extract_bit_field (op0, TYPE_PRECISION (type), 0, |
12461 | TYPE_UNSIGNED (type), NULL_RTX, |
12462 | mode, mode, false, NULL); |
12463 | /* As a last resort, spill op0 to memory, and reload it in a |
12464 | different mode. */ |
12465 | else if (!MEM_P (op0)) |
12466 | { |
12467 | /* If the operand is not a MEM, force it into memory. Since we |
12468 | are going to be changing the mode of the MEM, don't call |
12469 | force_const_mem for constants because we don't allow pool |
12470 | constants to change mode. */ |
12471 | tree inner_type = TREE_TYPE (treeop0); |
12472 | |
12473 | gcc_assert (!TREE_ADDRESSABLE (exp)); |
12474 | |
12475 | if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type)) |
12476 | target |
12477 | = assign_stack_temp_for_type |
12478 | (TYPE_MODE (inner_type), |
12479 | GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type); |
12480 | |
12481 | emit_move_insn (x: target, y: op0); |
12482 | op0 = target; |
12483 | } |
12484 | |
12485 | /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the |
12486 | output type is such that the operand is known to be aligned, indicate |
12487 | that it is. Otherwise, we need only be concerned about alignment for |
12488 | non-BLKmode results. */ |
12489 | if (MEM_P (op0)) |
12490 | { |
12491 | enum insn_code icode; |
12492 | |
12493 | if (modifier != EXPAND_WRITE |
12494 | && modifier != EXPAND_MEMORY |
12495 | && !inner_reference_p |
12496 | && mode != BLKmode |
12497 | && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) |
12498 | { |
12499 | /* If the target does have special handling for unaligned |
12500 | loads of mode then use them. */ |
12501 | if ((icode = optab_handler (op: movmisalign_optab, mode)) |
12502 | != CODE_FOR_nothing) |
12503 | { |
12504 | rtx reg; |
12505 | |
12506 | op0 = adjust_address (op0, mode, 0); |
12507 | /* We've already validated the memory, and we're creating a |
12508 | new pseudo destination. The predicates really can't |
12509 | fail. */ |
12510 | reg = gen_reg_rtx (mode); |
12511 | |
12512 | /* Nor can the insn generator. */ |
12513 | rtx_insn *insn = GEN_FCN (icode) (reg, op0); |
12514 | emit_insn (insn); |
12515 | return reg; |
12516 | } |
12517 | else if (STRICT_ALIGNMENT) |
12518 | { |
12519 | poly_uint64 mode_size = GET_MODE_SIZE (mode); |
12520 | poly_uint64 temp_size = mode_size; |
12521 | if (GET_MODE (op0) != BLKmode) |
12522 | temp_size = upper_bound (a: temp_size, |
12523 | b: GET_MODE_SIZE (GET_MODE (op0))); |
12524 | rtx new_rtx |
12525 | = assign_stack_temp_for_type (mode, temp_size, type); |
12526 | rtx new_with_op0_mode |
12527 | = adjust_address (new_rtx, GET_MODE (op0), 0); |
12528 | |
12529 | gcc_assert (!TREE_ADDRESSABLE (exp)); |
12530 | |
12531 | if (GET_MODE (op0) == BLKmode) |
12532 | { |
12533 | rtx size_rtx = gen_int_mode (mode_size, Pmode); |
12534 | emit_block_move (x: new_with_op0_mode, y: op0, size: size_rtx, |
12535 | method: (modifier == EXPAND_STACK_PARM |
12536 | ? BLOCK_OP_CALL_PARM |
12537 | : BLOCK_OP_NORMAL)); |
12538 | } |
12539 | else |
12540 | emit_move_insn (x: new_with_op0_mode, y: op0); |
12541 | |
12542 | op0 = new_rtx; |
12543 | } |
12544 | } |
12545 | |
12546 | op0 = adjust_address (op0, mode, 0); |
12547 | } |
12548 | |
12549 | return op0; |
12550 | |
12551 | case MODIFY_EXPR: |
12552 | { |
12553 | tree lhs = treeop0; |
12554 | tree rhs = treeop1; |
12555 | gcc_assert (ignore); |
12556 | |
12557 | /* Check for |= or &= of a bitfield of size one into another bitfield |
12558 | of size 1. In this case, (unless we need the result of the |
12559 | assignment) we can do this more efficiently with a |
12560 | test followed by an assignment, if necessary. |
12561 | |
12562 | ??? At this point, we can't get a BIT_FIELD_REF here. But if |
12563 | things change so we do, this code should be enhanced to |
12564 | support it. */ |
12565 | if (TREE_CODE (lhs) == COMPONENT_REF |
12566 | && (TREE_CODE (rhs) == BIT_IOR_EXPR |
12567 | || TREE_CODE (rhs) == BIT_AND_EXPR) |
12568 | && TREE_OPERAND (rhs, 0) == lhs |
12569 | && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF |
12570 | && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1))) |
12571 | && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1)))) |
12572 | { |
12573 | rtx_code_label *label = gen_label_rtx (); |
12574 | int value = TREE_CODE (rhs) == BIT_IOR_EXPR; |
12575 | profile_probability prob = profile_probability::uninitialized (); |
12576 | if (value) |
12577 | jumpifnot (TREE_OPERAND (rhs, 1), label, prob); |
12578 | else |
12579 | jumpif (TREE_OPERAND (rhs, 1), label, prob); |
12580 | expand_assignment (to: lhs, from: build_int_cst (TREE_TYPE (rhs), value), |
12581 | nontemporal: false); |
12582 | do_pending_stack_adjust (); |
12583 | emit_label (label); |
12584 | return const0_rtx; |
12585 | } |
12586 | |
12587 | expand_assignment (to: lhs, from: rhs, nontemporal: false); |
12588 | return const0_rtx; |
12589 | } |
12590 | |
12591 | case ADDR_EXPR: |
12592 | return expand_expr_addr_expr (exp, target, tmode, modifier); |
12593 | |
12594 | case REALPART_EXPR: |
12595 | op0 = expand_normal (exp: treeop0); |
12596 | return read_complex_part (cplx: op0, imag_p: false); |
12597 | |
12598 | case IMAGPART_EXPR: |
12599 | op0 = expand_normal (exp: treeop0); |
12600 | return read_complex_part (cplx: op0, imag_p: true); |
12601 | |
12602 | case RETURN_EXPR: |
12603 | case LABEL_EXPR: |
12604 | case GOTO_EXPR: |
12605 | case SWITCH_EXPR: |
12606 | case ASM_EXPR: |
12607 | /* Expanded in cfgexpand.cc. */ |
12608 | gcc_unreachable (); |
12609 | |
12610 | case TRY_CATCH_EXPR: |
12611 | case CATCH_EXPR: |
12612 | case EH_FILTER_EXPR: |
12613 | case TRY_FINALLY_EXPR: |
12614 | case EH_ELSE_EXPR: |
12615 | /* Lowered by tree-eh.cc. */ |
12616 | gcc_unreachable (); |
12617 | |
12618 | case WITH_CLEANUP_EXPR: |
12619 | case CLEANUP_POINT_EXPR: |
12620 | case TARGET_EXPR: |
12621 | case CASE_LABEL_EXPR: |
12622 | case VA_ARG_EXPR: |
12623 | case BIND_EXPR: |
12624 | case INIT_EXPR: |
12625 | case CONJ_EXPR: |
12626 | case COMPOUND_EXPR: |
12627 | case PREINCREMENT_EXPR: |
12628 | case PREDECREMENT_EXPR: |
12629 | case POSTINCREMENT_EXPR: |
12630 | case POSTDECREMENT_EXPR: |
12631 | case LOOP_EXPR: |
12632 | case EXIT_EXPR: |
12633 | case COMPOUND_LITERAL_EXPR: |
12634 | /* Lowered by gimplify.cc. */ |
12635 | gcc_unreachable (); |
12636 | |
12637 | case FDESC_EXPR: |
12638 | /* Function descriptors are not valid except for as |
12639 | initialization constants, and should not be expanded. */ |
12640 | gcc_unreachable (); |
12641 | |
12642 | case WITH_SIZE_EXPR: |
12643 | /* WITH_SIZE_EXPR expands to its first argument. The caller should |
12644 | have pulled out the size to use in whatever context it needed. */ |
12645 | return expand_expr_real (exp: treeop0, target: original_target, tmode, |
12646 | modifier, alt_rtl, inner_reference_p); |
12647 | |
12648 | default: |
12649 | return expand_expr_real_2 (ops: &ops, target, tmode, modifier); |
12650 | } |
12651 | } |
12652 | #undef EXTEND_BITINT |
12653 | |
12654 | /* Subroutine of above: reduce EXP to the precision of TYPE (in the |
12655 | signedness of TYPE), possibly returning the result in TARGET. |
12656 | TYPE is known to be a partial integer type. */ |
12657 | static rtx |
12658 | reduce_to_bit_field_precision (rtx exp, rtx target, tree type) |
12659 | { |
12660 | scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type); |
12661 | HOST_WIDE_INT prec = TYPE_PRECISION (type); |
12662 | gcc_assert ((GET_MODE (exp) == VOIDmode || GET_MODE (exp) == mode) |
12663 | && (!target || GET_MODE (target) == mode)); |
12664 | |
12665 | /* For constant values, reduce using wide_int_to_tree. */ |
12666 | if (poly_int_rtx_p (x: exp)) |
12667 | { |
12668 | auto value = wi::to_poly_wide (x: exp, mode); |
12669 | tree t = wide_int_to_tree (type, cst: value); |
12670 | return expand_expr (exp: t, target, VOIDmode, modifier: EXPAND_NORMAL); |
12671 | } |
12672 | else if (TYPE_UNSIGNED (type)) |
12673 | { |
12674 | rtx mask = immed_wide_int_const |
12675 | (wi::mask (width: prec, negate_p: false, precision: GET_MODE_PRECISION (mode)), mode); |
12676 | return expand_and (mode, exp, mask, target); |
12677 | } |
12678 | else |
12679 | { |
12680 | int count = GET_MODE_PRECISION (mode) - prec; |
12681 | exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0); |
12682 | return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0); |
12683 | } |
12684 | } |
12685 | |
12686 | /* Subroutine of above: returns true if OFFSET corresponds to an offset that |
12687 | when applied to the address of EXP produces an address known to be |
12688 | aligned more than BIGGEST_ALIGNMENT. */ |
12689 | |
12690 | static bool |
12691 | is_aligning_offset (const_tree offset, const_tree exp) |
12692 | { |
12693 | /* Strip off any conversions. */ |
12694 | while (CONVERT_EXPR_P (offset)) |
12695 | offset = TREE_OPERAND (offset, 0); |
12696 | |
12697 | /* We must now have a BIT_AND_EXPR with a constant that is one less than |
12698 | power of 2 and which is larger than BIGGEST_ALIGNMENT. */ |
12699 | if (TREE_CODE (offset) != BIT_AND_EXPR |
12700 | || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1)) |
12701 | || compare_tree_int (TREE_OPERAND (offset, 1), |
12702 | BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0 |
12703 | || !pow2p_hwi (x: tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1)) |
12704 | return false; |
12705 | |
12706 | /* Look at the first operand of BIT_AND_EXPR and strip any conversion. |
12707 | It must be NEGATE_EXPR. Then strip any more conversions. */ |
12708 | offset = TREE_OPERAND (offset, 0); |
12709 | while (CONVERT_EXPR_P (offset)) |
12710 | offset = TREE_OPERAND (offset, 0); |
12711 | |
12712 | if (TREE_CODE (offset) != NEGATE_EXPR) |
12713 | return false; |
12714 | |
12715 | offset = TREE_OPERAND (offset, 0); |
12716 | while (CONVERT_EXPR_P (offset)) |
12717 | offset = TREE_OPERAND (offset, 0); |
12718 | |
12719 | /* This must now be the address of EXP. */ |
12720 | return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp; |
12721 | } |
12722 | |
12723 | /* Return a STRING_CST corresponding to ARG's constant initializer either |
12724 | if it's a string constant, or, when VALREP is set, any other constant, |
12725 | or null otherwise. |
12726 | On success, set *PTR_OFFSET to the (possibly non-constant) byte offset |
12727 | within the byte string that ARG is references. If nonnull set *MEM_SIZE |
12728 | to the size of the byte string. If nonnull, set *DECL to the constant |
12729 | declaration ARG refers to. */ |
12730 | |
12731 | static tree |
12732 | constant_byte_string (tree arg, tree *ptr_offset, tree *mem_size, tree *decl, |
12733 | bool valrep = false) |
12734 | { |
12735 | tree dummy = NULL_TREE; |
12736 | if (!mem_size) |
12737 | mem_size = &dummy; |
12738 | |
12739 | /* Store the type of the original expression before conversions |
12740 | via NOP_EXPR or POINTER_PLUS_EXPR to other types have been |
12741 | removed. */ |
12742 | tree argtype = TREE_TYPE (arg); |
12743 | |
12744 | tree array; |
12745 | STRIP_NOPS (arg); |
12746 | |
12747 | /* Non-constant index into the character array in an ARRAY_REF |
12748 | expression or null. */ |
12749 | tree varidx = NULL_TREE; |
12750 | |
12751 | poly_int64 base_off = 0; |
12752 | |
12753 | if (TREE_CODE (arg) == ADDR_EXPR) |
12754 | { |
12755 | arg = TREE_OPERAND (arg, 0); |
12756 | tree ref = arg; |
12757 | if (TREE_CODE (arg) == ARRAY_REF) |
12758 | { |
12759 | tree idx = TREE_OPERAND (arg, 1); |
12760 | if (TREE_CODE (idx) != INTEGER_CST) |
12761 | { |
12762 | /* From a pointer (but not array) argument extract the variable |
12763 | index to prevent get_addr_base_and_unit_offset() from failing |
12764 | due to it. Use it later to compute the non-constant offset |
12765 | into the string and return it to the caller. */ |
12766 | varidx = idx; |
12767 | ref = TREE_OPERAND (arg, 0); |
12768 | |
12769 | if (TREE_CODE (TREE_TYPE (arg)) == ARRAY_TYPE) |
12770 | return NULL_TREE; |
12771 | |
12772 | if (!integer_zerop (array_ref_low_bound (arg))) |
12773 | return NULL_TREE; |
12774 | |
12775 | if (!integer_onep (array_ref_element_size (arg))) |
12776 | return NULL_TREE; |
12777 | } |
12778 | } |
12779 | array = get_addr_base_and_unit_offset (ref, &base_off); |
12780 | if (!array |
12781 | || (TREE_CODE (array) != VAR_DECL |
12782 | && TREE_CODE (array) != CONST_DECL |
12783 | && TREE_CODE (array) != STRING_CST)) |
12784 | return NULL_TREE; |
12785 | } |
12786 | else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR) |
12787 | { |
12788 | tree arg0 = TREE_OPERAND (arg, 0); |
12789 | tree arg1 = TREE_OPERAND (arg, 1); |
12790 | |
12791 | tree offset; |
12792 | tree str = string_constant (arg0, &offset, mem_size, decl); |
12793 | if (!str) |
12794 | { |
12795 | str = string_constant (arg1, &offset, mem_size, decl); |
12796 | arg1 = arg0; |
12797 | } |
12798 | |
12799 | if (str) |
12800 | { |
12801 | /* Avoid pointers to arrays (see bug 86622). */ |
12802 | if (POINTER_TYPE_P (TREE_TYPE (arg)) |
12803 | && TREE_CODE (TREE_TYPE (TREE_TYPE (arg))) == ARRAY_TYPE |
12804 | && !(decl && !*decl) |
12805 | && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl)) |
12806 | && tree_fits_uhwi_p (*mem_size) |
12807 | && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl)))) |
12808 | return NULL_TREE; |
12809 | |
12810 | tree type = TREE_TYPE (offset); |
12811 | arg1 = fold_convert (type, arg1); |
12812 | *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, arg1); |
12813 | return str; |
12814 | } |
12815 | return NULL_TREE; |
12816 | } |
12817 | else if (TREE_CODE (arg) == SSA_NAME) |
12818 | { |
12819 | gimple *stmt = SSA_NAME_DEF_STMT (arg); |
12820 | if (!is_gimple_assign (gs: stmt)) |
12821 | return NULL_TREE; |
12822 | |
12823 | tree rhs1 = gimple_assign_rhs1 (gs: stmt); |
12824 | tree_code code = gimple_assign_rhs_code (gs: stmt); |
12825 | if (code == ADDR_EXPR) |
12826 | return string_constant (rhs1, ptr_offset, mem_size, decl); |
12827 | else if (code != POINTER_PLUS_EXPR) |
12828 | return NULL_TREE; |
12829 | |
12830 | tree offset; |
12831 | if (tree str = string_constant (rhs1, &offset, mem_size, decl)) |
12832 | { |
12833 | /* Avoid pointers to arrays (see bug 86622). */ |
12834 | if (POINTER_TYPE_P (TREE_TYPE (rhs1)) |
12835 | && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1))) == ARRAY_TYPE |
12836 | && !(decl && !*decl) |
12837 | && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl)) |
12838 | && tree_fits_uhwi_p (*mem_size) |
12839 | && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl)))) |
12840 | return NULL_TREE; |
12841 | |
12842 | tree rhs2 = gimple_assign_rhs2 (gs: stmt); |
12843 | tree type = TREE_TYPE (offset); |
12844 | rhs2 = fold_convert (type, rhs2); |
12845 | *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, rhs2); |
12846 | return str; |
12847 | } |
12848 | return NULL_TREE; |
12849 | } |
12850 | else if (DECL_P (arg)) |
12851 | array = arg; |
12852 | else |
12853 | return NULL_TREE; |
12854 | |
12855 | tree offset = wide_int_to_tree (sizetype, cst: base_off); |
12856 | if (varidx) |
12857 | { |
12858 | if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE) |
12859 | return NULL_TREE; |
12860 | |
12861 | gcc_assert (TREE_CODE (arg) == ARRAY_REF); |
12862 | tree chartype = TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg, 0))); |
12863 | if (TREE_CODE (chartype) != INTEGER_TYPE) |
12864 | return NULL; |
12865 | |
12866 | offset = fold_convert (sizetype, varidx); |
12867 | } |
12868 | |
12869 | if (TREE_CODE (array) == STRING_CST) |
12870 | { |
12871 | *ptr_offset = fold_convert (sizetype, offset); |
12872 | *mem_size = TYPE_SIZE_UNIT (TREE_TYPE (array)); |
12873 | if (decl) |
12874 | *decl = NULL_TREE; |
12875 | gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array))) |
12876 | >= TREE_STRING_LENGTH (array)); |
12877 | return array; |
12878 | } |
12879 | |
12880 | tree init = ctor_for_folding (array); |
12881 | if (!init || init == error_mark_node) |
12882 | return NULL_TREE; |
12883 | |
12884 | if (valrep) |
12885 | { |
12886 | HOST_WIDE_INT cstoff; |
12887 | if (!base_off.is_constant (const_value: &cstoff)) |
12888 | return NULL_TREE; |
12889 | |
12890 | /* Check that the host and target are sane. */ |
12891 | if (CHAR_BIT != 8 || BITS_PER_UNIT != 8) |
12892 | return NULL_TREE; |
12893 | |
12894 | HOST_WIDE_INT typesz = int_size_in_bytes (TREE_TYPE (init)); |
12895 | if (typesz <= 0 || (int) typesz != typesz) |
12896 | return NULL_TREE; |
12897 | |
12898 | HOST_WIDE_INT size = typesz; |
12899 | if (VAR_P (array) |
12900 | && DECL_SIZE_UNIT (array) |
12901 | && tree_fits_shwi_p (DECL_SIZE_UNIT (array))) |
12902 | { |
12903 | size = tree_to_shwi (DECL_SIZE_UNIT (array)); |
12904 | gcc_checking_assert (size >= typesz); |
12905 | } |
12906 | |
12907 | /* If value representation was requested convert the initializer |
12908 | for the whole array or object into a string of bytes forming |
12909 | its value representation and return it. */ |
12910 | unsigned char *bytes = XNEWVEC (unsigned char, size); |
12911 | int r = native_encode_initializer (init, bytes, size); |
12912 | if (r < typesz) |
12913 | { |
12914 | XDELETEVEC (bytes); |
12915 | return NULL_TREE; |
12916 | } |
12917 | |
12918 | if (r < size) |
12919 | memset (s: bytes + r, c: '\0', n: size - r); |
12920 | |
12921 | const char *p = reinterpret_cast<const char *>(bytes); |
12922 | init = build_string_literal (size, p, char_type_node); |
12923 | init = TREE_OPERAND (init, 0); |
12924 | init = TREE_OPERAND (init, 0); |
12925 | XDELETE (bytes); |
12926 | |
12927 | *mem_size = size_int (TREE_STRING_LENGTH (init)); |
12928 | *ptr_offset = wide_int_to_tree (ssizetype, cst: base_off); |
12929 | |
12930 | if (decl) |
12931 | *decl = array; |
12932 | |
12933 | return init; |
12934 | } |
12935 | |
12936 | if (TREE_CODE (init) == CONSTRUCTOR) |
12937 | { |
12938 | /* Convert the 64-bit constant offset to a wider type to avoid |
12939 | overflow and use it to obtain the initializer for the subobject |
12940 | it points into. */ |
12941 | offset_int wioff; |
12942 | if (!base_off.is_constant (const_value: &wioff)) |
12943 | return NULL_TREE; |
12944 | |
12945 | wioff *= BITS_PER_UNIT; |
12946 | if (!wi::fits_uhwi_p (x: wioff)) |
12947 | return NULL_TREE; |
12948 | |
12949 | base_off = wioff.to_uhwi (); |
12950 | unsigned HOST_WIDE_INT fieldoff = 0; |
12951 | init = fold_ctor_reference (TREE_TYPE (arg), init, base_off, 0, array, |
12952 | &fieldoff); |
12953 | if (!init || init == error_mark_node) |
12954 | return NULL_TREE; |
12955 | |
12956 | HOST_WIDE_INT cstoff; |
12957 | if (!base_off.is_constant (const_value: &cstoff)) |
12958 | return NULL_TREE; |
12959 | |
12960 | cstoff = (cstoff - fieldoff) / BITS_PER_UNIT; |
12961 | tree off = build_int_cst (sizetype, cstoff); |
12962 | if (varidx) |
12963 | offset = fold_build2 (PLUS_EXPR, TREE_TYPE (offset), offset, off); |
12964 | else |
12965 | offset = off; |
12966 | } |
12967 | |
12968 | *ptr_offset = offset; |
12969 | |
12970 | tree inittype = TREE_TYPE (init); |
12971 | |
12972 | if (TREE_CODE (init) == INTEGER_CST |
12973 | && (TREE_CODE (TREE_TYPE (array)) == INTEGER_TYPE |
12974 | || TYPE_MAIN_VARIANT (inittype) == char_type_node)) |
12975 | { |
12976 | /* Check that the host and target are sane. */ |
12977 | if (CHAR_BIT != 8 || BITS_PER_UNIT != 8) |
12978 | return NULL_TREE; |
12979 | |
12980 | /* For a reference to (address of) a single constant character, |
12981 | store the native representation of the character in CHARBUF. |
12982 | If the reference is to an element of an array or a member |
12983 | of a struct, only consider narrow characters until ctors |
12984 | for wide character arrays are transformed to STRING_CSTs |
12985 | like those for narrow arrays. */ |
12986 | unsigned char charbuf[MAX_BITSIZE_MODE_ANY_MODE / BITS_PER_UNIT]; |
12987 | int len = native_encode_expr (init, charbuf, sizeof charbuf, off: 0); |
12988 | if (len > 0) |
12989 | { |
12990 | /* Construct a string literal with elements of INITTYPE and |
12991 | the representation above. Then strip |
12992 | the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */ |
12993 | init = build_string_literal (len, (char *)charbuf, inittype); |
12994 | init = TREE_OPERAND (TREE_OPERAND (init, 0), 0); |
12995 | } |
12996 | } |
12997 | |
12998 | tree initsize = TYPE_SIZE_UNIT (inittype); |
12999 | |
13000 | if (TREE_CODE (init) == CONSTRUCTOR && initializer_zerop (init)) |
13001 | { |
13002 | /* Fold an empty/zero constructor for an implicitly initialized |
13003 | object or subobject into the empty string. */ |
13004 | |
13005 | /* Determine the character type from that of the original |
13006 | expression. */ |
13007 | tree chartype = argtype; |
13008 | if (POINTER_TYPE_P (chartype)) |
13009 | chartype = TREE_TYPE (chartype); |
13010 | while (TREE_CODE (chartype) == ARRAY_TYPE) |
13011 | chartype = TREE_TYPE (chartype); |
13012 | |
13013 | if (INTEGRAL_TYPE_P (chartype) |
13014 | && TYPE_PRECISION (chartype) == TYPE_PRECISION (char_type_node)) |
13015 | { |
13016 | /* Convert a char array to an empty STRING_CST having an array |
13017 | of the expected type and size. */ |
13018 | if (!initsize) |
13019 | initsize = integer_zero_node; |
13020 | |
13021 | unsigned HOST_WIDE_INT size = tree_to_uhwi (initsize); |
13022 | if (size > (unsigned HOST_WIDE_INT) INT_MAX) |
13023 | return NULL_TREE; |
13024 | |
13025 | init = build_string_literal (size, NULL, chartype, size); |
13026 | init = TREE_OPERAND (init, 0); |
13027 | init = TREE_OPERAND (init, 0); |
13028 | |
13029 | *ptr_offset = integer_zero_node; |
13030 | } |
13031 | } |
13032 | |
13033 | if (decl) |
13034 | *decl = array; |
13035 | |
13036 | if (TREE_CODE (init) != STRING_CST) |
13037 | return NULL_TREE; |
13038 | |
13039 | *mem_size = initsize; |
13040 | |
13041 | gcc_checking_assert (tree_to_shwi (initsize) >= TREE_STRING_LENGTH (init)); |
13042 | |
13043 | return init; |
13044 | } |
13045 | |
13046 | /* Return STRING_CST if an ARG corresponds to a string constant or zero |
13047 | if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly |
13048 | non-constant) offset in bytes within the string that ARG is accessing. |
13049 | If MEM_SIZE is non-zero the storage size of the memory is returned. |
13050 | If DECL is non-zero the constant declaration is returned if available. */ |
13051 | |
13052 | tree |
13053 | string_constant (tree arg, tree *ptr_offset, tree *mem_size, tree *decl) |
13054 | { |
13055 | return constant_byte_string (arg, ptr_offset, mem_size, decl, valrep: false); |
13056 | } |
13057 | |
13058 | /* Similar to string_constant, return a STRING_CST corresponding |
13059 | to the value representation of the first argument if it's |
13060 | a constant. */ |
13061 | |
13062 | tree |
13063 | byte_representation (tree arg, tree *ptr_offset, tree *mem_size, tree *decl) |
13064 | { |
13065 | return constant_byte_string (arg, ptr_offset, mem_size, decl, valrep: true); |
13066 | } |
13067 | |
13068 | /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2 |
13069 | is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)): |
13070 | for C2 > 0 to x & C3 == C2 |
13071 | for C2 < 0 to x & C3 == (C2 & C3). */ |
13072 | enum tree_code |
13073 | maybe_optimize_pow2p_mod_cmp (enum tree_code code, tree *arg0, tree *arg1) |
13074 | { |
13075 | gimple *stmt = get_def_for_expr (name: *arg0, code: TRUNC_MOD_EXPR); |
13076 | tree treeop0 = gimple_assign_rhs1 (gs: stmt); |
13077 | tree treeop1 = gimple_assign_rhs2 (gs: stmt); |
13078 | tree type = TREE_TYPE (*arg0); |
13079 | scalar_int_mode mode; |
13080 | if (!is_a <scalar_int_mode> (TYPE_MODE (type), result: &mode)) |
13081 | return code; |
13082 | if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type) |
13083 | || TYPE_PRECISION (type) <= 1 |
13084 | || TYPE_UNSIGNED (type) |
13085 | /* Signed x % c == 0 should have been optimized into unsigned modulo |
13086 | earlier. */ |
13087 | || integer_zerop (*arg1) |
13088 | /* If c is known to be non-negative, modulo will be expanded as unsigned |
13089 | modulo. */ |
13090 | || get_range_pos_neg (treeop0) == 1) |
13091 | return code; |
13092 | |
13093 | /* x % c == d where d < 0 && d <= -c should be always false. */ |
13094 | if (tree_int_cst_sgn (*arg1) == -1 |
13095 | && -wi::to_widest (t: treeop1) >= wi::to_widest (t: *arg1)) |
13096 | return code; |
13097 | |
13098 | int prec = TYPE_PRECISION (type); |
13099 | wide_int w = wi::to_wide (t: treeop1) - 1; |
13100 | w |= wi::shifted_mask (start: 0, width: prec - 1, negate_p: true, precision: prec); |
13101 | tree c3 = wide_int_to_tree (type, cst: w); |
13102 | tree c4 = *arg1; |
13103 | if (tree_int_cst_sgn (*arg1) == -1) |
13104 | c4 = wide_int_to_tree (type, cst: w & wi::to_wide (t: *arg1)); |
13105 | |
13106 | rtx op0 = expand_normal (exp: treeop0); |
13107 | treeop0 = make_tree (TREE_TYPE (treeop0), op0); |
13108 | |
13109 | bool speed_p = optimize_insn_for_speed_p (); |
13110 | |
13111 | do_pending_stack_adjust (); |
13112 | |
13113 | location_t loc = gimple_location (g: stmt); |
13114 | struct separate_ops ops; |
13115 | ops.code = TRUNC_MOD_EXPR; |
13116 | ops.location = loc; |
13117 | ops.type = TREE_TYPE (treeop0); |
13118 | ops.op0 = treeop0; |
13119 | ops.op1 = treeop1; |
13120 | ops.op2 = NULL_TREE; |
13121 | start_sequence (); |
13122 | rtx mor = expand_expr_real_2 (ops: &ops, NULL_RTX, TYPE_MODE (ops.type), |
13123 | modifier: EXPAND_NORMAL); |
13124 | rtx_insn *moinsns = get_insns (); |
13125 | end_sequence (); |
13126 | |
13127 | unsigned mocost = seq_cost (moinsns, speed_p); |
13128 | mocost += rtx_cost (mor, mode, EQ, 0, speed_p); |
13129 | mocost += rtx_cost (expand_normal (exp: *arg1), mode, EQ, 1, speed_p); |
13130 | |
13131 | ops.code = BIT_AND_EXPR; |
13132 | ops.location = loc; |
13133 | ops.type = TREE_TYPE (treeop0); |
13134 | ops.op0 = treeop0; |
13135 | ops.op1 = c3; |
13136 | ops.op2 = NULL_TREE; |
13137 | start_sequence (); |
13138 | rtx mur = expand_expr_real_2 (ops: &ops, NULL_RTX, TYPE_MODE (ops.type), |
13139 | modifier: EXPAND_NORMAL); |
13140 | rtx_insn *muinsns = get_insns (); |
13141 | end_sequence (); |
13142 | |
13143 | unsigned mucost = seq_cost (muinsns, speed_p); |
13144 | mucost += rtx_cost (mur, mode, EQ, 0, speed_p); |
13145 | mucost += rtx_cost (expand_normal (exp: c4), mode, EQ, 1, speed_p); |
13146 | |
13147 | if (mocost <= mucost) |
13148 | { |
13149 | emit_insn (moinsns); |
13150 | *arg0 = make_tree (TREE_TYPE (*arg0), mor); |
13151 | return code; |
13152 | } |
13153 | |
13154 | emit_insn (muinsns); |
13155 | *arg0 = make_tree (TREE_TYPE (*arg0), mur); |
13156 | *arg1 = c4; |
13157 | return code; |
13158 | } |
13159 | |
13160 | /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2). |
13161 | If C1 is odd to: |
13162 | (X - C2) * C3 <= C4 (or >), where |
13163 | C3 is modular multiplicative inverse of C1 and 1<<prec and |
13164 | C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter |
13165 | if C2 > ((1<<prec) - 1) % C1). |
13166 | If C1 is even, S = ctz (C1) and C2 is 0, use |
13167 | ((X * C3) r>> S) <= C4, where C3 is modular multiplicative |
13168 | inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S. |
13169 | |
13170 | For signed (X % C1) == 0 if C1 is odd to (all operations in it |
13171 | unsigned): |
13172 | (X * C3) + C4 <= 2 * C4, where |
13173 | C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and |
13174 | C4 is ((1<<(prec - 1) - 1) / C1). |
13175 | If C1 is even, S = ctz(C1), use |
13176 | ((X * C3) + C4) r>> S <= (C4 >> (S - 1)) |
13177 | where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec |
13178 | and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S). |
13179 | |
13180 | See the Hacker's Delight book, section 10-17. */ |
13181 | enum tree_code |
13182 | maybe_optimize_mod_cmp (enum tree_code code, tree *arg0, tree *arg1) |
13183 | { |
13184 | gcc_checking_assert (code == EQ_EXPR || code == NE_EXPR); |
13185 | gcc_checking_assert (TREE_CODE (*arg1) == INTEGER_CST); |
13186 | |
13187 | if (optimize < 2) |
13188 | return code; |
13189 | |
13190 | gimple *stmt = get_def_for_expr (name: *arg0, code: TRUNC_MOD_EXPR); |
13191 | if (stmt == NULL) |
13192 | return code; |
13193 | |
13194 | tree treeop0 = gimple_assign_rhs1 (gs: stmt); |
13195 | tree treeop1 = gimple_assign_rhs2 (gs: stmt); |
13196 | if (TREE_CODE (treeop0) != SSA_NAME |
13197 | || TREE_CODE (treeop1) != INTEGER_CST |
13198 | /* Don't optimize the undefined behavior case x % 0; |
13199 | x % 1 should have been optimized into zero, punt if |
13200 | it makes it here for whatever reason; |
13201 | x % -c should have been optimized into x % c. */ |
13202 | || compare_tree_int (treeop1, 2) <= 0 |
13203 | /* Likewise x % c == d where d >= c should be always false. */ |
13204 | || tree_int_cst_le (t1: treeop1, t2: *arg1)) |
13205 | return code; |
13206 | |
13207 | /* Unsigned x % pow2 is handled right already, for signed |
13208 | modulo handle it in maybe_optimize_pow2p_mod_cmp. */ |
13209 | if (integer_pow2p (treeop1)) |
13210 | return maybe_optimize_pow2p_mod_cmp (code, arg0, arg1); |
13211 | |
13212 | tree type = TREE_TYPE (*arg0); |
13213 | scalar_int_mode mode; |
13214 | if (!is_a <scalar_int_mode> (TYPE_MODE (type), result: &mode)) |
13215 | return code; |
13216 | if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type) |
13217 | || TYPE_PRECISION (type) <= 1) |
13218 | return code; |
13219 | |
13220 | signop sgn = UNSIGNED; |
13221 | /* If both operands are known to have the sign bit clear, handle |
13222 | even the signed modulo case as unsigned. treeop1 is always |
13223 | positive >= 2, checked above. */ |
13224 | if (!TYPE_UNSIGNED (type) && get_range_pos_neg (treeop0) != 1) |
13225 | sgn = SIGNED; |
13226 | |
13227 | if (!TYPE_UNSIGNED (type)) |
13228 | { |
13229 | if (tree_int_cst_sgn (*arg1) == -1) |
13230 | return code; |
13231 | type = unsigned_type_for (type); |
13232 | if (!type || TYPE_MODE (type) != TYPE_MODE (TREE_TYPE (*arg0))) |
13233 | return code; |
13234 | } |
13235 | |
13236 | int prec = TYPE_PRECISION (type); |
13237 | wide_int w = wi::to_wide (t: treeop1); |
13238 | int shift = wi::ctz (w); |
13239 | /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if |
13240 | C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0. |
13241 | If C1 is odd, we can handle all cases by subtracting |
13242 | C4 below. We could handle even the even C1 and C2 > -1U % C1 cases |
13243 | e.g. by testing for overflow on the subtraction, punt on that for now |
13244 | though. */ |
13245 | if ((sgn == SIGNED || shift) && !integer_zerop (*arg1)) |
13246 | { |
13247 | if (sgn == SIGNED) |
13248 | return code; |
13249 | wide_int x = wi::umod_trunc (x: wi::mask (width: prec, negate_p: false, precision: prec), y: w); |
13250 | if (wi::gtu_p (x: wi::to_wide (t: *arg1), y: x)) |
13251 | return code; |
13252 | } |
13253 | |
13254 | imm_use_iterator imm_iter; |
13255 | use_operand_p use_p; |
13256 | FOR_EACH_IMM_USE_FAST (use_p, imm_iter, treeop0) |
13257 | { |
13258 | gimple *use_stmt = USE_STMT (use_p); |
13259 | /* Punt if treeop0 is used in the same bb in a division |
13260 | or another modulo with the same divisor. We should expect |
13261 | the division and modulo combined together. */ |
13262 | if (use_stmt == stmt |
13263 | || gimple_bb (g: use_stmt) != gimple_bb (g: stmt)) |
13264 | continue; |
13265 | if (!is_gimple_assign (gs: use_stmt) |
13266 | || (gimple_assign_rhs_code (gs: use_stmt) != TRUNC_DIV_EXPR |
13267 | && gimple_assign_rhs_code (gs: use_stmt) != TRUNC_MOD_EXPR)) |
13268 | continue; |
13269 | if (gimple_assign_rhs1 (gs: use_stmt) != treeop0 |
13270 | || !operand_equal_p (gimple_assign_rhs2 (gs: use_stmt), treeop1, flags: 0)) |
13271 | continue; |
13272 | return code; |
13273 | } |
13274 | |
13275 | w = wi::lrshift (x: w, y: shift); |
13276 | wide_int a = wide_int::from (x: w, precision: prec + 1, sgn: UNSIGNED); |
13277 | wide_int b = wi::shifted_mask (start: prec, width: 1, negate_p: false, precision: prec + 1); |
13278 | wide_int m = wide_int::from (x: wi::mod_inv (a, b), precision: prec, sgn: UNSIGNED); |
13279 | tree c3 = wide_int_to_tree (type, cst: m); |
13280 | tree c5 = NULL_TREE; |
13281 | wide_int d, e; |
13282 | if (sgn == UNSIGNED) |
13283 | { |
13284 | d = wi::divmod_trunc (x: wi::mask (width: prec, negate_p: false, precision: prec), y: w, sgn: UNSIGNED, remainder_ptr: &e); |
13285 | /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1, |
13286 | otherwise use < or subtract one from C4. E.g. for |
13287 | x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but |
13288 | x % 3U == 1 already needs to be |
13289 | (x - 1) * 0xaaaaaaabU <= 0x55555554. */ |
13290 | if (!shift && wi::gtu_p (x: wi::to_wide (t: *arg1), y: e)) |
13291 | d -= 1; |
13292 | if (shift) |
13293 | d = wi::lrshift (x: d, y: shift); |
13294 | } |
13295 | else |
13296 | { |
13297 | e = wi::udiv_trunc (x: wi::mask (width: prec - 1, negate_p: false, precision: prec), y: w); |
13298 | if (!shift) |
13299 | d = wi::lshift (x: e, y: 1); |
13300 | else |
13301 | { |
13302 | e = wi::bit_and (x: e, y: wi::mask (width: shift, negate_p: true, precision: prec)); |
13303 | d = wi::lrshift (x: e, y: shift - 1); |
13304 | } |
13305 | c5 = wide_int_to_tree (type, cst: e); |
13306 | } |
13307 | tree c4 = wide_int_to_tree (type, cst: d); |
13308 | |
13309 | rtx op0 = expand_normal (exp: treeop0); |
13310 | treeop0 = make_tree (TREE_TYPE (treeop0), op0); |
13311 | |
13312 | bool speed_p = optimize_insn_for_speed_p (); |
13313 | |
13314 | do_pending_stack_adjust (); |
13315 | |
13316 | location_t loc = gimple_location (g: stmt); |
13317 | struct separate_ops ops; |
13318 | ops.code = TRUNC_MOD_EXPR; |
13319 | ops.location = loc; |
13320 | ops.type = TREE_TYPE (treeop0); |
13321 | ops.op0 = treeop0; |
13322 | ops.op1 = treeop1; |
13323 | ops.op2 = NULL_TREE; |
13324 | start_sequence (); |
13325 | rtx mor = expand_expr_real_2 (ops: &ops, NULL_RTX, TYPE_MODE (ops.type), |
13326 | modifier: EXPAND_NORMAL); |
13327 | rtx_insn *moinsns = get_insns (); |
13328 | end_sequence (); |
13329 | |
13330 | unsigned mocost = seq_cost (moinsns, speed_p); |
13331 | mocost += rtx_cost (mor, mode, EQ, 0, speed_p); |
13332 | mocost += rtx_cost (expand_normal (exp: *arg1), mode, EQ, 1, speed_p); |
13333 | |
13334 | tree t = fold_convert_loc (loc, type, treeop0); |
13335 | if (!integer_zerop (*arg1)) |
13336 | t = fold_build2_loc (loc, MINUS_EXPR, type, t, fold_convert (type, *arg1)); |
13337 | t = fold_build2_loc (loc, MULT_EXPR, type, t, c3); |
13338 | if (sgn == SIGNED) |
13339 | t = fold_build2_loc (loc, PLUS_EXPR, type, t, c5); |
13340 | if (shift) |
13341 | { |
13342 | tree s = build_int_cst (NULL_TREE, shift); |
13343 | t = fold_build2_loc (loc, RROTATE_EXPR, type, t, s); |
13344 | } |
13345 | |
13346 | start_sequence (); |
13347 | rtx mur = expand_normal (exp: t); |
13348 | rtx_insn *muinsns = get_insns (); |
13349 | end_sequence (); |
13350 | |
13351 | unsigned mucost = seq_cost (muinsns, speed_p); |
13352 | mucost += rtx_cost (mur, mode, LE, 0, speed_p); |
13353 | mucost += rtx_cost (expand_normal (exp: c4), mode, LE, 1, speed_p); |
13354 | |
13355 | if (mocost <= mucost) |
13356 | { |
13357 | emit_insn (moinsns); |
13358 | *arg0 = make_tree (TREE_TYPE (*arg0), mor); |
13359 | return code; |
13360 | } |
13361 | |
13362 | emit_insn (muinsns); |
13363 | *arg0 = make_tree (type, mur); |
13364 | *arg1 = c4; |
13365 | return code == EQ_EXPR ? LE_EXPR : GT_EXPR; |
13366 | } |
13367 | |
13368 | /* Optimize x - y < 0 into x < 0 if x - y has undefined overflow. */ |
13369 | |
13370 | void |
13371 | maybe_optimize_sub_cmp_0 (enum tree_code code, tree *arg0, tree *arg1) |
13372 | { |
13373 | gcc_checking_assert (code == GT_EXPR || code == GE_EXPR |
13374 | || code == LT_EXPR || code == LE_EXPR); |
13375 | gcc_checking_assert (integer_zerop (*arg1)); |
13376 | |
13377 | if (!optimize) |
13378 | return; |
13379 | |
13380 | gimple *stmt = get_def_for_expr (name: *arg0, code: MINUS_EXPR); |
13381 | if (stmt == NULL) |
13382 | return; |
13383 | |
13384 | tree treeop0 = gimple_assign_rhs1 (gs: stmt); |
13385 | tree treeop1 = gimple_assign_rhs2 (gs: stmt); |
13386 | if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (treeop0))) |
13387 | return; |
13388 | |
13389 | if (issue_strict_overflow_warning (WARN_STRICT_OVERFLOW_COMPARISON)) |
13390 | warning_at (gimple_location (g: stmt), OPT_Wstrict_overflow, |
13391 | "assuming signed overflow does not occur when " |
13392 | "simplifying %<X - Y %s 0%> to %<X %s Y%>" , |
13393 | op_symbol_code (code), op_symbol_code (code)); |
13394 | |
13395 | *arg0 = treeop0; |
13396 | *arg1 = treeop1; |
13397 | } |
13398 | |
13399 | |
13400 | /* Expand CODE with arguments INNER & (1<<BITNUM) and 0 that represents |
13401 | a single bit equality/inequality test, returns where the result is located. */ |
13402 | |
13403 | static rtx |
13404 | expand_single_bit_test (location_t loc, enum tree_code code, |
13405 | tree inner, int bitnum, |
13406 | tree result_type, rtx target, |
13407 | machine_mode mode) |
13408 | { |
13409 | gcc_assert (code == NE_EXPR || code == EQ_EXPR); |
13410 | |
13411 | tree type = TREE_TYPE (inner); |
13412 | scalar_int_mode operand_mode = SCALAR_INT_TYPE_MODE (type); |
13413 | int ops_unsigned; |
13414 | tree signed_type, unsigned_type, intermediate_type; |
13415 | gimple *inner_def; |
13416 | |
13417 | /* First, see if we can fold the single bit test into a sign-bit |
13418 | test. */ |
13419 | if (bitnum == TYPE_PRECISION (type) - 1 |
13420 | && type_has_mode_precision_p (t: type)) |
13421 | { |
13422 | tree stype = signed_type_for (type); |
13423 | tree tmp = fold_build2_loc (loc, code == EQ_EXPR ? GE_EXPR : LT_EXPR, |
13424 | result_type, |
13425 | fold_convert_loc (loc, stype, inner), |
13426 | build_int_cst (stype, 0)); |
13427 | return expand_expr (exp: tmp, target, VOIDmode, modifier: EXPAND_NORMAL); |
13428 | } |
13429 | |
13430 | /* Otherwise we have (A & C) != 0 where C is a single bit, |
13431 | convert that into ((A >> C2) & 1). Where C2 = log2(C). |
13432 | Similarly for (A & C) == 0. */ |
13433 | |
13434 | /* If INNER is a right shift of a constant and it plus BITNUM does |
13435 | not overflow, adjust BITNUM and INNER. */ |
13436 | if ((inner_def = get_def_for_expr (name: inner, code: RSHIFT_EXPR)) |
13437 | && TREE_CODE (gimple_assign_rhs2 (inner_def)) == INTEGER_CST |
13438 | && bitnum < TYPE_PRECISION (type) |
13439 | && wi::ltu_p (x: wi::to_wide (t: gimple_assign_rhs2 (gs: inner_def)), |
13440 | TYPE_PRECISION (type) - bitnum)) |
13441 | { |
13442 | bitnum += tree_to_uhwi (gimple_assign_rhs2 (gs: inner_def)); |
13443 | inner = gimple_assign_rhs1 (gs: inner_def); |
13444 | } |
13445 | |
13446 | /* If we are going to be able to omit the AND below, we must do our |
13447 | operations as unsigned. If we must use the AND, we have a choice. |
13448 | Normally unsigned is faster, but for some machines signed is. */ |
13449 | ops_unsigned = (load_extend_op (mode: operand_mode) == SIGN_EXTEND |
13450 | && !flag_syntax_only) ? 0 : 1; |
13451 | |
13452 | signed_type = lang_hooks.types.type_for_mode (operand_mode, 0); |
13453 | unsigned_type = lang_hooks.types.type_for_mode (operand_mode, 1); |
13454 | intermediate_type = ops_unsigned ? unsigned_type : signed_type; |
13455 | inner = fold_convert_loc (loc, intermediate_type, inner); |
13456 | |
13457 | rtx inner0 = expand_expr (exp: inner, NULL_RTX, VOIDmode, modifier: EXPAND_NORMAL); |
13458 | |
13459 | if (CONST_SCALAR_INT_P (inner0)) |
13460 | { |
13461 | wide_int t = rtx_mode_t (inner0, operand_mode); |
13462 | bool setp = (wi::lrshift (x: t, y: bitnum) & 1) != 0; |
13463 | return (setp ^ (code == EQ_EXPR)) ? const1_rtx : const0_rtx; |
13464 | } |
13465 | int bitpos = bitnum; |
13466 | |
13467 | if (BYTES_BIG_ENDIAN) |
13468 | bitpos = GET_MODE_BITSIZE (mode: operand_mode) - 1 - bitpos; |
13469 | |
13470 | inner0 = extract_bit_field (inner0, 1, bitpos, 1, target, |
13471 | operand_mode, mode, 0, NULL); |
13472 | |
13473 | if (code == EQ_EXPR) |
13474 | inner0 = expand_binop (GET_MODE (inner0), xor_optab, inner0, const1_rtx, |
13475 | NULL_RTX, 1, OPTAB_LIB_WIDEN); |
13476 | if (GET_MODE (inner0) != mode) |
13477 | { |
13478 | rtx t = gen_reg_rtx (mode); |
13479 | convert_move (to: t, from: inner0, unsignedp: 0); |
13480 | return t; |
13481 | } |
13482 | return inner0; |
13483 | } |
13484 | |
13485 | /* Generate code to calculate OPS, and exploded expression |
13486 | using a store-flag instruction and return an rtx for the result. |
13487 | OPS reflects a comparison. |
13488 | |
13489 | If TARGET is nonzero, store the result there if convenient. |
13490 | |
13491 | Return zero if there is no suitable set-flag instruction |
13492 | available on this machine. |
13493 | |
13494 | Once expand_expr has been called on the arguments of the comparison, |
13495 | we are committed to doing the store flag, since it is not safe to |
13496 | re-evaluate the expression. We emit the store-flag insn by calling |
13497 | emit_store_flag, but only expand the arguments if we have a reason |
13498 | to believe that emit_store_flag will be successful. If we think that |
13499 | it will, but it isn't, we have to simulate the store-flag with a |
13500 | set/jump/set sequence. */ |
13501 | |
13502 | static rtx |
13503 | do_store_flag (sepops ops, rtx target, machine_mode mode) |
13504 | { |
13505 | enum rtx_code code; |
13506 | tree arg0, arg1, type; |
13507 | machine_mode operand_mode; |
13508 | int unsignedp; |
13509 | rtx op0, op1; |
13510 | rtx subtarget = target; |
13511 | location_t loc = ops->location; |
13512 | unsigned HOST_WIDE_INT nunits; |
13513 | |
13514 | arg0 = ops->op0; |
13515 | arg1 = ops->op1; |
13516 | |
13517 | /* Don't crash if the comparison was erroneous. */ |
13518 | if (arg0 == error_mark_node || arg1 == error_mark_node) |
13519 | return const0_rtx; |
13520 | |
13521 | type = TREE_TYPE (arg0); |
13522 | operand_mode = TYPE_MODE (type); |
13523 | unsignedp = TYPE_UNSIGNED (type); |
13524 | |
13525 | /* We won't bother with BLKmode store-flag operations because it would mean |
13526 | passing a lot of information to emit_store_flag. */ |
13527 | if (operand_mode == BLKmode) |
13528 | return 0; |
13529 | |
13530 | /* We won't bother with store-flag operations involving function pointers |
13531 | when function pointers must be canonicalized before comparisons. */ |
13532 | if (targetm.have_canonicalize_funcptr_for_compare () |
13533 | && ((POINTER_TYPE_P (TREE_TYPE (arg0)) |
13534 | && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0)))) |
13535 | || (POINTER_TYPE_P (TREE_TYPE (arg1)) |
13536 | && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1)))))) |
13537 | return 0; |
13538 | |
13539 | STRIP_NOPS (arg0); |
13540 | STRIP_NOPS (arg1); |
13541 | |
13542 | /* For vector typed comparisons emit code to generate the desired |
13543 | all-ones or all-zeros mask. */ |
13544 | if (VECTOR_TYPE_P (ops->type)) |
13545 | { |
13546 | tree ifexp = build2 (ops->code, ops->type, arg0, arg1); |
13547 | if (VECTOR_BOOLEAN_TYPE_P (ops->type) |
13548 | && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code)) |
13549 | return expand_vec_cmp_expr (ops->type, ifexp, target); |
13550 | else |
13551 | gcc_unreachable (); |
13552 | } |
13553 | |
13554 | /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial |
13555 | into (x - C2) * C3 < C4. */ |
13556 | if ((ops->code == EQ_EXPR || ops->code == NE_EXPR) |
13557 | && TREE_CODE (arg0) == SSA_NAME |
13558 | && TREE_CODE (arg1) == INTEGER_CST) |
13559 | { |
13560 | enum tree_code new_code = maybe_optimize_mod_cmp (code: ops->code, |
13561 | arg0: &arg0, arg1: &arg1); |
13562 | if (new_code != ops->code) |
13563 | { |
13564 | struct separate_ops nops = *ops; |
13565 | nops.code = ops->code = new_code; |
13566 | nops.op0 = arg0; |
13567 | nops.op1 = arg1; |
13568 | nops.type = TREE_TYPE (arg0); |
13569 | return do_store_flag (ops: &nops, target, mode); |
13570 | } |
13571 | } |
13572 | |
13573 | /* Optimize (x - y) < 0 into x < y if x - y has undefined overflow. */ |
13574 | if (!unsignedp |
13575 | && (ops->code == LT_EXPR || ops->code == LE_EXPR |
13576 | || ops->code == GT_EXPR || ops->code == GE_EXPR) |
13577 | && integer_zerop (arg1) |
13578 | && TREE_CODE (arg0) == SSA_NAME) |
13579 | maybe_optimize_sub_cmp_0 (code: ops->code, arg0: &arg0, arg1: &arg1); |
13580 | |
13581 | /* Get the rtx comparison code to use. We know that EXP is a comparison |
13582 | operation of some type. Some comparisons against 1 and -1 can be |
13583 | converted to comparisons with zero. Do so here so that the tests |
13584 | below will be aware that we have a comparison with zero. These |
13585 | tests will not catch constants in the first operand, but constants |
13586 | are rarely passed as the first operand. */ |
13587 | |
13588 | switch (ops->code) |
13589 | { |
13590 | case EQ_EXPR: |
13591 | code = EQ; |
13592 | break; |
13593 | case NE_EXPR: |
13594 | code = NE; |
13595 | break; |
13596 | case LT_EXPR: |
13597 | if (integer_onep (arg1)) |
13598 | arg1 = integer_zero_node, code = unsignedp ? LEU : LE; |
13599 | else |
13600 | code = unsignedp ? LTU : LT; |
13601 | break; |
13602 | case LE_EXPR: |
13603 | if (! unsignedp && integer_all_onesp (arg1)) |
13604 | arg1 = integer_zero_node, code = LT; |
13605 | else |
13606 | code = unsignedp ? LEU : LE; |
13607 | break; |
13608 | case GT_EXPR: |
13609 | if (! unsignedp && integer_all_onesp (arg1)) |
13610 | arg1 = integer_zero_node, code = GE; |
13611 | else |
13612 | code = unsignedp ? GTU : GT; |
13613 | break; |
13614 | case GE_EXPR: |
13615 | if (integer_onep (arg1)) |
13616 | arg1 = integer_zero_node, code = unsignedp ? GTU : GT; |
13617 | else |
13618 | code = unsignedp ? GEU : GE; |
13619 | break; |
13620 | |
13621 | case UNORDERED_EXPR: |
13622 | code = UNORDERED; |
13623 | break; |
13624 | case ORDERED_EXPR: |
13625 | code = ORDERED; |
13626 | break; |
13627 | case UNLT_EXPR: |
13628 | code = UNLT; |
13629 | break; |
13630 | case UNLE_EXPR: |
13631 | code = UNLE; |
13632 | break; |
13633 | case UNGT_EXPR: |
13634 | code = UNGT; |
13635 | break; |
13636 | case UNGE_EXPR: |
13637 | code = UNGE; |
13638 | break; |
13639 | case UNEQ_EXPR: |
13640 | code = UNEQ; |
13641 | break; |
13642 | case LTGT_EXPR: |
13643 | code = LTGT; |
13644 | break; |
13645 | |
13646 | default: |
13647 | gcc_unreachable (); |
13648 | } |
13649 | |
13650 | /* Put a constant second. */ |
13651 | if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST |
13652 | || TREE_CODE (arg0) == FIXED_CST) |
13653 | { |
13654 | std::swap (a&: arg0, b&: arg1); |
13655 | code = swap_condition (code); |
13656 | } |
13657 | |
13658 | /* If this is an equality or inequality test of a single bit, we can |
13659 | do this by shifting the bit being tested to the low-order bit and |
13660 | masking the result with the constant 1. If the condition was EQ, |
13661 | we xor it with 1. This does not require an scc insn and is faster |
13662 | than an scc insn even if we have it. */ |
13663 | |
13664 | if ((code == NE || code == EQ) |
13665 | && (integer_zerop (arg1) |
13666 | || integer_pow2p (arg1)) |
13667 | /* vector types are not handled here. */ |
13668 | && TREE_CODE (TREE_TYPE (arg1)) != VECTOR_TYPE |
13669 | && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type))) |
13670 | { |
13671 | tree narg0 = arg0; |
13672 | wide_int nz = tree_nonzero_bits (narg0); |
13673 | gimple *srcstmt = get_def_for_expr (name: narg0, code: BIT_AND_EXPR); |
13674 | /* If the defining statement was (x & POW2), then use that instead of |
13675 | the non-zero bits. */ |
13676 | if (srcstmt && integer_pow2p (gimple_assign_rhs2 (gs: srcstmt))) |
13677 | { |
13678 | nz = wi::to_wide (t: gimple_assign_rhs2 (gs: srcstmt)); |
13679 | narg0 = gimple_assign_rhs1 (gs: srcstmt); |
13680 | } |
13681 | |
13682 | if (wi::popcount (nz) == 1 |
13683 | && (integer_zerop (arg1) |
13684 | || wi::to_wide (t: arg1) == nz)) |
13685 | { |
13686 | int bitnum = wi::exact_log2 (nz); |
13687 | enum tree_code tcode = EQ_EXPR; |
13688 | if ((code == NE) ^ !integer_zerop (arg1)) |
13689 | tcode = NE_EXPR; |
13690 | |
13691 | type = lang_hooks.types.type_for_mode (mode, unsignedp); |
13692 | return expand_single_bit_test (loc, code: tcode, |
13693 | inner: narg0, |
13694 | bitnum, result_type: type, target, mode); |
13695 | } |
13696 | } |
13697 | |
13698 | |
13699 | if (! get_subtarget (x: target) |
13700 | || GET_MODE (subtarget) != operand_mode) |
13701 | subtarget = 0; |
13702 | |
13703 | expand_operands (exp0: arg0, exp1: arg1, target: subtarget, op0: &op0, op1: &op1, modifier: EXPAND_NORMAL); |
13704 | |
13705 | /* For boolean vectors with less than mode precision |
13706 | make sure to fill padding with consistent values. */ |
13707 | if (VECTOR_BOOLEAN_TYPE_P (type) |
13708 | && SCALAR_INT_MODE_P (operand_mode) |
13709 | && TYPE_VECTOR_SUBPARTS (node: type).is_constant (const_value: &nunits) |
13710 | && maybe_ne (a: GET_MODE_PRECISION (mode: operand_mode), b: nunits)) |
13711 | { |
13712 | gcc_assert (code == EQ || code == NE); |
13713 | op0 = expand_binop (mode, and_optab, op0, |
13714 | GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1), |
13715 | NULL_RTX, true, OPTAB_WIDEN); |
13716 | op1 = expand_binop (mode, and_optab, op1, |
13717 | GEN_INT ((HOST_WIDE_INT_1U << nunits) - 1), |
13718 | NULL_RTX, true, OPTAB_WIDEN); |
13719 | } |
13720 | |
13721 | if (target == 0) |
13722 | target = gen_reg_rtx (mode); |
13723 | |
13724 | /* Try a cstore if possible. */ |
13725 | return emit_store_flag_force (target, code, op0, op1, |
13726 | operand_mode, unsignedp, |
13727 | (TYPE_PRECISION (ops->type) == 1 |
13728 | && !TYPE_UNSIGNED (ops->type)) ? -1 : 1); |
13729 | } |
13730 | |
13731 | /* Attempt to generate a casesi instruction. Returns true if successful, |
13732 | false otherwise (i.e. if there is no casesi instruction). |
13733 | |
13734 | DEFAULT_PROBABILITY is the probability of jumping to the default |
13735 | label. */ |
13736 | bool |
13737 | try_casesi (tree index_type, tree index_expr, tree minval, tree range, |
13738 | rtx table_label, rtx default_label, rtx fallback_label, |
13739 | profile_probability default_probability) |
13740 | { |
13741 | class expand_operand ops[5]; |
13742 | scalar_int_mode index_mode = SImode; |
13743 | rtx op1, op2, index; |
13744 | |
13745 | if (! targetm.have_casesi ()) |
13746 | return false; |
13747 | |
13748 | /* The index must be some form of integer. Convert it to SImode. */ |
13749 | scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type); |
13750 | if (GET_MODE_BITSIZE (mode: omode) > GET_MODE_BITSIZE (mode: index_mode)) |
13751 | { |
13752 | rtx rangertx = expand_normal (exp: range); |
13753 | |
13754 | /* We must handle the endpoints in the original mode. */ |
13755 | index_expr = build2 (MINUS_EXPR, index_type, |
13756 | index_expr, minval); |
13757 | minval = integer_zero_node; |
13758 | index = expand_normal (exp: index_expr); |
13759 | if (default_label) |
13760 | emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX, |
13761 | omode, 1, default_label, |
13762 | prob: default_probability); |
13763 | /* Now we can safely truncate. */ |
13764 | index = convert_to_mode (mode: index_mode, x: index, unsignedp: 0); |
13765 | } |
13766 | else |
13767 | { |
13768 | if (omode != index_mode) |
13769 | { |
13770 | index_type = lang_hooks.types.type_for_mode (index_mode, 0); |
13771 | index_expr = fold_convert (index_type, index_expr); |
13772 | } |
13773 | |
13774 | index = expand_normal (exp: index_expr); |
13775 | } |
13776 | |
13777 | do_pending_stack_adjust (); |
13778 | |
13779 | op1 = expand_normal (exp: minval); |
13780 | op2 = expand_normal (exp: range); |
13781 | |
13782 | create_input_operand (op: &ops[0], value: index, mode: index_mode); |
13783 | create_convert_operand_from_type (op: &ops[1], value: op1, TREE_TYPE (minval)); |
13784 | create_convert_operand_from_type (op: &ops[2], value: op2, TREE_TYPE (range)); |
13785 | create_fixed_operand (op: &ops[3], x: table_label); |
13786 | create_fixed_operand (op: &ops[4], x: (default_label |
13787 | ? default_label |
13788 | : fallback_label)); |
13789 | expand_jump_insn (icode: targetm.code_for_casesi, nops: 5, ops); |
13790 | return true; |
13791 | } |
13792 | |
13793 | /* Attempt to generate a tablejump instruction; same concept. */ |
13794 | /* Subroutine of the next function. |
13795 | |
13796 | INDEX is the value being switched on, with the lowest value |
13797 | in the table already subtracted. |
13798 | MODE is its expected mode (needed if INDEX is constant). |
13799 | RANGE is the length of the jump table. |
13800 | TABLE_LABEL is a CODE_LABEL rtx for the table itself. |
13801 | |
13802 | DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the |
13803 | index value is out of range. |
13804 | DEFAULT_PROBABILITY is the probability of jumping to |
13805 | the default label. */ |
13806 | |
13807 | static void |
13808 | do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label, |
13809 | rtx default_label, profile_probability default_probability) |
13810 | { |
13811 | rtx temp, vector; |
13812 | |
13813 | if (INTVAL (range) > cfun->cfg->max_jumptable_ents) |
13814 | cfun->cfg->max_jumptable_ents = INTVAL (range); |
13815 | |
13816 | /* Do an unsigned comparison (in the proper mode) between the index |
13817 | expression and the value which represents the length of the range. |
13818 | Since we just finished subtracting the lower bound of the range |
13819 | from the index expression, this comparison allows us to simultaneously |
13820 | check that the original index expression value is both greater than |
13821 | or equal to the minimum value of the range and less than or equal to |
13822 | the maximum value of the range. */ |
13823 | |
13824 | if (default_label) |
13825 | emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1, |
13826 | default_label, prob: default_probability); |
13827 | |
13828 | /* If index is in range, it must fit in Pmode. |
13829 | Convert to Pmode so we can index with it. */ |
13830 | if (mode != Pmode) |
13831 | { |
13832 | unsigned int width; |
13833 | |
13834 | /* We know the value of INDEX is between 0 and RANGE. If we have a |
13835 | sign-extended subreg, and RANGE does not have the sign bit set, then |
13836 | we have a value that is valid for both sign and zero extension. In |
13837 | this case, we get better code if we sign extend. */ |
13838 | if (GET_CODE (index) == SUBREG |
13839 | && SUBREG_PROMOTED_VAR_P (index) |
13840 | && SUBREG_PROMOTED_SIGNED_P (index) |
13841 | && ((width = GET_MODE_PRECISION (mode: as_a <scalar_int_mode> (m: mode))) |
13842 | <= HOST_BITS_PER_WIDE_INT) |
13843 | && ! (UINTVAL (range) & (HOST_WIDE_INT_1U << (width - 1)))) |
13844 | index = convert_to_mode (Pmode, x: index, unsignedp: 0); |
13845 | else |
13846 | index = convert_to_mode (Pmode, x: index, unsignedp: 1); |
13847 | } |
13848 | |
13849 | /* Don't let a MEM slip through, because then INDEX that comes |
13850 | out of PIC_CASE_VECTOR_ADDRESS won't be a valid address, |
13851 | and break_out_memory_refs will go to work on it and mess it up. */ |
13852 | #ifdef PIC_CASE_VECTOR_ADDRESS |
13853 | if (flag_pic && !REG_P (index)) |
13854 | index = copy_to_mode_reg (Pmode, index); |
13855 | #endif |
13856 | |
13857 | /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the |
13858 | GET_MODE_SIZE, because this indicates how large insns are. The other |
13859 | uses should all be Pmode, because they are addresses. This code |
13860 | could fail if addresses and insns are not the same size. */ |
13861 | index = simplify_gen_binary (code: MULT, Pmode, op0: index, |
13862 | op1: gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), |
13863 | Pmode)); |
13864 | index = simplify_gen_binary (code: PLUS, Pmode, op0: index, |
13865 | gen_rtx_LABEL_REF (Pmode, table_label)); |
13866 | |
13867 | #ifdef PIC_CASE_VECTOR_ADDRESS |
13868 | if (flag_pic) |
13869 | index = PIC_CASE_VECTOR_ADDRESS (index); |
13870 | else |
13871 | #endif |
13872 | index = memory_address (CASE_VECTOR_MODE, index); |
13873 | temp = gen_reg_rtx (CASE_VECTOR_MODE); |
13874 | vector = gen_const_mem (CASE_VECTOR_MODE, index); |
13875 | convert_move (to: temp, from: vector, unsignedp: 0); |
13876 | |
13877 | emit_jump_insn (targetm.gen_tablejump (temp, table_label)); |
13878 | |
13879 | /* If we are generating PIC code or if the table is PC-relative, the |
13880 | table and JUMP_INSN must be adjacent, so don't output a BARRIER. */ |
13881 | if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic) |
13882 | emit_barrier (); |
13883 | } |
13884 | |
13885 | bool |
13886 | try_tablejump (tree index_type, tree index_expr, tree minval, tree range, |
13887 | rtx table_label, rtx default_label, |
13888 | profile_probability default_probability) |
13889 | { |
13890 | rtx index; |
13891 | |
13892 | if (! targetm.have_tablejump ()) |
13893 | return false; |
13894 | |
13895 | index_expr = fold_build2 (MINUS_EXPR, index_type, |
13896 | fold_convert (index_type, index_expr), |
13897 | fold_convert (index_type, minval)); |
13898 | index = expand_normal (exp: index_expr); |
13899 | do_pending_stack_adjust (); |
13900 | |
13901 | do_tablejump (index, TYPE_MODE (index_type), |
13902 | range: convert_modes (TYPE_MODE (index_type), |
13903 | TYPE_MODE (TREE_TYPE (range)), |
13904 | x: expand_normal (exp: range), |
13905 | TYPE_UNSIGNED (TREE_TYPE (range))), |
13906 | table_label, default_label, default_probability); |
13907 | return true; |
13908 | } |
13909 | |
13910 | /* Return a CONST_VECTOR rtx representing vector mask for |
13911 | a VECTOR_CST of booleans. */ |
13912 | static rtx |
13913 | const_vector_mask_from_tree (tree exp) |
13914 | { |
13915 | machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); |
13916 | machine_mode inner = GET_MODE_INNER (mode); |
13917 | |
13918 | rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp), |
13919 | VECTOR_CST_NELTS_PER_PATTERN (exp)); |
13920 | unsigned int count = builder.encoded_nelts (); |
13921 | for (unsigned int i = 0; i < count; ++i) |
13922 | { |
13923 | tree elt = VECTOR_CST_ELT (exp, i); |
13924 | gcc_assert (TREE_CODE (elt) == INTEGER_CST); |
13925 | if (integer_zerop (elt)) |
13926 | builder.quick_push (CONST0_RTX (inner)); |
13927 | else if (integer_onep (elt) |
13928 | || integer_minus_onep (elt)) |
13929 | builder.quick_push (CONSTM1_RTX (inner)); |
13930 | else |
13931 | gcc_unreachable (); |
13932 | } |
13933 | return builder.build (); |
13934 | } |
13935 | |
13936 | /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */ |
13937 | static rtx |
13938 | const_vector_from_tree (tree exp) |
13939 | { |
13940 | machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); |
13941 | |
13942 | if (initializer_zerop (exp)) |
13943 | return CONST0_RTX (mode); |
13944 | |
13945 | if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp))) |
13946 | return const_vector_mask_from_tree (exp); |
13947 | |
13948 | machine_mode inner = GET_MODE_INNER (mode); |
13949 | |
13950 | rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp), |
13951 | VECTOR_CST_NELTS_PER_PATTERN (exp)); |
13952 | unsigned int count = builder.encoded_nelts (); |
13953 | for (unsigned int i = 0; i < count; ++i) |
13954 | { |
13955 | tree elt = VECTOR_CST_ELT (exp, i); |
13956 | if (TREE_CODE (elt) == REAL_CST) |
13957 | builder.quick_push (obj: const_double_from_real_value (TREE_REAL_CST (elt), |
13958 | inner)); |
13959 | else if (TREE_CODE (elt) == FIXED_CST) |
13960 | builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt), |
13961 | inner)); |
13962 | else |
13963 | builder.quick_push (obj: immed_wide_int_const (wi::to_poly_wide (t: elt), |
13964 | inner)); |
13965 | } |
13966 | return builder.build (); |
13967 | } |
13968 | |
13969 | /* Build a decl for a personality function given a language prefix. */ |
13970 | |
13971 | tree |
13972 | build_personality_function (const char *lang) |
13973 | { |
13974 | const char *unwind_and_version; |
13975 | tree decl, type; |
13976 | char *name; |
13977 | |
13978 | switch (targetm_common.except_unwind_info (&global_options)) |
13979 | { |
13980 | case UI_NONE: |
13981 | return NULL; |
13982 | case UI_SJLJ: |
13983 | unwind_and_version = "_sj0" ; |
13984 | break; |
13985 | case UI_DWARF2: |
13986 | case UI_TARGET: |
13987 | unwind_and_version = "_v0" ; |
13988 | break; |
13989 | case UI_SEH: |
13990 | unwind_and_version = "_seh0" ; |
13991 | break; |
13992 | default: |
13993 | gcc_unreachable (); |
13994 | } |
13995 | |
13996 | name = ACONCAT (("__" , lang, "_personality" , unwind_and_version, NULL)); |
13997 | |
13998 | type = build_function_type_list (unsigned_type_node, |
13999 | integer_type_node, integer_type_node, |
14000 | long_long_unsigned_type_node, |
14001 | ptr_type_node, ptr_type_node, NULL_TREE); |
14002 | decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, |
14003 | get_identifier (name), type); |
14004 | DECL_ARTIFICIAL (decl) = 1; |
14005 | DECL_EXTERNAL (decl) = 1; |
14006 | TREE_PUBLIC (decl) = 1; |
14007 | |
14008 | /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with |
14009 | are the flags assigned by targetm.encode_section_info. */ |
14010 | SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL); |
14011 | |
14012 | return decl; |
14013 | } |
14014 | |
14015 | /* Extracts the personality function of DECL and returns the corresponding |
14016 | libfunc. */ |
14017 | |
14018 | rtx |
14019 | get_personality_function (tree decl) |
14020 | { |
14021 | tree personality = DECL_FUNCTION_PERSONALITY (decl); |
14022 | enum eh_personality_kind pk; |
14023 | |
14024 | pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl)); |
14025 | if (pk == eh_personality_none) |
14026 | return NULL; |
14027 | |
14028 | if (!personality |
14029 | && pk == eh_personality_any) |
14030 | personality = lang_hooks.eh_personality (); |
14031 | |
14032 | if (pk == eh_personality_lang) |
14033 | gcc_assert (personality != NULL_TREE); |
14034 | |
14035 | return XEXP (DECL_RTL (personality), 0); |
14036 | } |
14037 | |
14038 | /* Returns a tree for the size of EXP in bytes. */ |
14039 | |
14040 | static tree |
14041 | tree_expr_size (const_tree exp) |
14042 | { |
14043 | if (DECL_P (exp) |
14044 | && DECL_SIZE_UNIT (exp) != 0) |
14045 | return DECL_SIZE_UNIT (exp); |
14046 | else |
14047 | return size_in_bytes (TREE_TYPE (exp)); |
14048 | } |
14049 | |
14050 | /* Return an rtx for the size in bytes of the value of EXP. */ |
14051 | |
14052 | rtx |
14053 | expr_size (tree exp) |
14054 | { |
14055 | tree size; |
14056 | |
14057 | if (TREE_CODE (exp) == WITH_SIZE_EXPR) |
14058 | size = TREE_OPERAND (exp, 1); |
14059 | else |
14060 | { |
14061 | size = tree_expr_size (exp); |
14062 | gcc_assert (size); |
14063 | gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp)); |
14064 | } |
14065 | |
14066 | return expand_expr (exp: size, NULL_RTX, TYPE_MODE (sizetype), modifier: EXPAND_NORMAL); |
14067 | } |
14068 | |
14069 | /* Return a wide integer for the size in bytes of the value of EXP, or -1 |
14070 | if the size can vary or is larger than an integer. */ |
14071 | |
14072 | HOST_WIDE_INT |
14073 | int_expr_size (const_tree exp) |
14074 | { |
14075 | tree size; |
14076 | |
14077 | if (TREE_CODE (exp) == WITH_SIZE_EXPR) |
14078 | size = TREE_OPERAND (exp, 1); |
14079 | else |
14080 | { |
14081 | size = tree_expr_size (exp); |
14082 | gcc_assert (size); |
14083 | } |
14084 | |
14085 | if (size == 0 || !tree_fits_shwi_p (size)) |
14086 | return -1; |
14087 | |
14088 | return tree_to_shwi (size); |
14089 | } |
14090 | |