1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // |
3 | // Copyright 2011 Wolfson Microelectronics plc |
4 | // Mark Brown <broonie@opensource.wolfsonmicro.com> |
5 | // |
6 | // Copyright 2011 Simtec Electronics |
7 | // Ben Dooks <ben@simtec.co.uk> |
8 | |
9 | #include <linux/kernel.h> |
10 | #include <linux/list.h> |
11 | #include <linux/serial_core.h> |
12 | #include <linux/serial_s3c.h> |
13 | #include <linux/platform_device.h> |
14 | #include <linux/fb.h> |
15 | #include <linux/io.h> |
16 | #include <linux/init.h> |
17 | #include <linux/input-event-codes.h> |
18 | #include <linux/gpio.h> |
19 | #include <linux/gpio/machine.h> |
20 | #include <linux/leds.h> |
21 | #include <linux/delay.h> |
22 | #include <linux/mmc/host.h> |
23 | #include <linux/regulator/machine.h> |
24 | #include <linux/regulator/fixed.h> |
25 | #include <linux/pwm.h> |
26 | #include <linux/pwm_backlight.h> |
27 | #include <linux/dm9000.h> |
28 | #include <linux/gpio_keys.h> |
29 | #include <linux/gpio/driver.h> |
30 | #include <linux/spi/spi.h> |
31 | |
32 | #include <linux/platform_data/pca953x.h> |
33 | #include <linux/platform_data/s3c-hsotg.h> |
34 | |
35 | #include <video/platform_lcd.h> |
36 | |
37 | #include <linux/mfd/wm831x/core.h> |
38 | #include <linux/mfd/wm831x/pdata.h> |
39 | #include <linux/mfd/wm831x/irq.h> |
40 | #include <linux/mfd/wm831x/gpio.h> |
41 | |
42 | #include <sound/wm1250-ev1.h> |
43 | |
44 | #include <asm/mach/arch.h> |
45 | #include <asm/mach-types.h> |
46 | |
47 | #include <video/samsung_fimd.h> |
48 | #include "map.h" |
49 | #include "regs-gpio.h" |
50 | #include "gpio-samsung.h" |
51 | #include "irqs.h" |
52 | |
53 | #include "fb.h" |
54 | #include "sdhci.h" |
55 | #include "gpio-cfg.h" |
56 | #include <linux/platform_data/spi-s3c64xx.h> |
57 | |
58 | #include "keypad.h" |
59 | #include "devs.h" |
60 | #include "cpu.h" |
61 | #include <linux/platform_data/i2c-s3c2410.h> |
62 | #include "pm.h" |
63 | |
64 | #include "s3c64xx.h" |
65 | #include "crag6410.h" |
66 | #include "regs-gpio-memport-s3c64xx.h" |
67 | #include "regs-modem-s3c64xx.h" |
68 | #include "regs-sys-s3c64xx.h" |
69 | |
70 | /* serial port setup */ |
71 | |
72 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
73 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
74 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
75 | |
76 | static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { |
77 | [0] = { |
78 | .hwport = 0, |
79 | .flags = 0, |
80 | .ucon = UCON, |
81 | .ulcon = ULCON, |
82 | .ufcon = UFCON, |
83 | }, |
84 | [1] = { |
85 | .hwport = 1, |
86 | .flags = 0, |
87 | .ucon = UCON, |
88 | .ulcon = ULCON, |
89 | .ufcon = UFCON, |
90 | }, |
91 | [2] = { |
92 | .hwport = 2, |
93 | .flags = 0, |
94 | .ucon = UCON, |
95 | .ulcon = ULCON, |
96 | .ufcon = UFCON, |
97 | }, |
98 | [3] = { |
99 | .hwport = 3, |
100 | .flags = 0, |
101 | .ucon = UCON, |
102 | .ulcon = ULCON, |
103 | .ufcon = UFCON, |
104 | }, |
105 | }; |
106 | |
107 | static struct pwm_lookup crag6410_pwm_lookup[] = { |
108 | PWM_LOOKUP("samsung-pwm" , 0, "pwm-backlight" , NULL, 100000, |
109 | PWM_POLARITY_NORMAL), |
110 | }; |
111 | |
112 | static struct platform_pwm_backlight_data crag6410_backlight_data = { |
113 | .max_brightness = 1000, |
114 | .dft_brightness = 600, |
115 | }; |
116 | |
117 | static struct platform_device crag6410_backlight_device = { |
118 | .name = "pwm-backlight" , |
119 | .id = -1, |
120 | .dev = { |
121 | .parent = &samsung_device_pwm.dev, |
122 | .platform_data = &crag6410_backlight_data, |
123 | }, |
124 | }; |
125 | |
126 | static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) |
127 | { |
128 | pr_debug("%s: setting power %d\n" , __func__, power); |
129 | |
130 | if (power) { |
131 | gpio_set_value(gpio: S3C64XX_GPB(0), value: 1); |
132 | msleep(msecs: 1); |
133 | s3c_gpio_cfgpin(pin: S3C64XX_GPF(14), S3C_GPIO_SFN(2)); |
134 | } else { |
135 | gpio_direction_output(gpio: S3C64XX_GPF(14), value: 0); |
136 | gpio_set_value(gpio: S3C64XX_GPB(0), value: 0); |
137 | } |
138 | } |
139 | |
140 | static struct platform_device crag6410_lcd_powerdev = { |
141 | .name = "platform-lcd" , |
142 | .id = -1, |
143 | .dev.parent = &s3c_device_fb.dev, |
144 | .dev.platform_data = &(struct plat_lcd_data) { |
145 | .set_power = crag6410_lcd_power_set, |
146 | }, |
147 | }; |
148 | |
149 | /* 640x480 URT */ |
150 | static struct s3c_fb_pd_win crag6410_fb_win0 = { |
151 | .max_bpp = 32, |
152 | .default_bpp = 16, |
153 | .xres = 640, |
154 | .yres = 480, |
155 | .virtual_y = 480 * 2, |
156 | .virtual_x = 640, |
157 | }; |
158 | |
159 | static struct fb_videomode crag6410_lcd_timing = { |
160 | .left_margin = 150, |
161 | .right_margin = 80, |
162 | .upper_margin = 40, |
163 | .lower_margin = 5, |
164 | .hsync_len = 40, |
165 | .vsync_len = 5, |
166 | .xres = 640, |
167 | .yres = 480, |
168 | }; |
169 | |
170 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ |
171 | static struct s3c_fb_platdata crag6410_lcd_pdata = { |
172 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, |
173 | .vtiming = &crag6410_lcd_timing, |
174 | .win[0] = &crag6410_fb_win0, |
175 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, |
176 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, |
177 | }; |
178 | |
179 | /* 2x6 keypad */ |
180 | |
181 | static uint32_t crag6410_keymap[] = { |
182 | /* KEY(row, col, keycode) */ |
183 | KEY(0, 0, KEY_VOLUMEUP), |
184 | KEY(0, 1, KEY_HOME), |
185 | KEY(0, 2, KEY_VOLUMEDOWN), |
186 | KEY(0, 3, KEY_HELP), |
187 | KEY(0, 4, KEY_MENU), |
188 | KEY(0, 5, KEY_MEDIA), |
189 | KEY(1, 0, 232), |
190 | KEY(1, 1, KEY_DOWN), |
191 | KEY(1, 2, KEY_LEFT), |
192 | KEY(1, 3, KEY_UP), |
193 | KEY(1, 4, KEY_RIGHT), |
194 | KEY(1, 5, KEY_CAMERA), |
195 | }; |
196 | |
197 | static struct matrix_keymap_data crag6410_keymap_data = { |
198 | .keymap = crag6410_keymap, |
199 | .keymap_size = ARRAY_SIZE(crag6410_keymap), |
200 | }; |
201 | |
202 | static struct samsung_keypad_platdata crag6410_keypad_data = { |
203 | .keymap_data = &crag6410_keymap_data, |
204 | .rows = 2, |
205 | .cols = 6, |
206 | }; |
207 | |
208 | static struct gpio_keys_button crag6410_gpio_keys[] = { |
209 | [0] = { |
210 | .code = KEY_SUSPEND, |
211 | .gpio = S3C64XX_GPL(10), /* EINT 18 */ |
212 | .type = EV_KEY, |
213 | .wakeup = 1, |
214 | .active_low = 1, |
215 | }, |
216 | [1] = { |
217 | .code = SW_FRONT_PROXIMITY, |
218 | .gpio = S3C64XX_GPN(11), /* EINT 11 */ |
219 | .type = EV_SW, |
220 | }, |
221 | }; |
222 | |
223 | static struct gpio_keys_platform_data crag6410_gpio_keydata = { |
224 | .buttons = crag6410_gpio_keys, |
225 | .nbuttons = ARRAY_SIZE(crag6410_gpio_keys), |
226 | }; |
227 | |
228 | static struct platform_device crag6410_gpio_keydev = { |
229 | .name = "gpio-keys" , |
230 | .id = 0, |
231 | .dev.platform_data = &crag6410_gpio_keydata, |
232 | }; |
233 | |
234 | static struct resource crag6410_dm9k_resource[] = { |
235 | [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2), |
236 | [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2), |
237 | [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \ |
238 | | IORESOURCE_IRQ_HIGHLEVEL), |
239 | }; |
240 | |
241 | static struct dm9000_plat_data mini6410_dm9k_pdata = { |
242 | .flags = DM9000_PLATF_16BITONLY, |
243 | }; |
244 | |
245 | static struct platform_device crag6410_dm9k_device = { |
246 | .name = "dm9000" , |
247 | .id = -1, |
248 | .num_resources = ARRAY_SIZE(crag6410_dm9k_resource), |
249 | .resource = crag6410_dm9k_resource, |
250 | .dev.platform_data = &mini6410_dm9k_pdata, |
251 | }; |
252 | |
253 | static struct resource crag6410_mmgpio_resource[] = { |
254 | [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat" ), |
255 | }; |
256 | |
257 | static struct platform_device crag6410_mmgpio = { |
258 | .name = "basic-mmio-gpio" , |
259 | .id = -1, |
260 | .resource = crag6410_mmgpio_resource, |
261 | .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource), |
262 | .dev.platform_data = &(struct bgpio_pdata) { |
263 | .base = MMGPIO_GPIO_BASE, |
264 | }, |
265 | }; |
266 | |
267 | static struct platform_device speyside_device = { |
268 | .name = "speyside" , |
269 | .id = -1, |
270 | }; |
271 | |
272 | static struct platform_device lowland_device = { |
273 | .name = "lowland" , |
274 | .id = -1, |
275 | }; |
276 | |
277 | static struct platform_device tobermory_device = { |
278 | .name = "tobermory" , |
279 | .id = -1, |
280 | }; |
281 | |
282 | static struct platform_device littlemill_device = { |
283 | .name = "littlemill" , |
284 | .id = -1, |
285 | }; |
286 | |
287 | static struct platform_device bells_wm2200_device = { |
288 | .name = "bells" , |
289 | .id = 0, |
290 | }; |
291 | |
292 | static struct platform_device bells_wm5102_device = { |
293 | .name = "bells" , |
294 | .id = 1, |
295 | }; |
296 | |
297 | static struct platform_device bells_wm5110_device = { |
298 | .name = "bells" , |
299 | .id = 2, |
300 | }; |
301 | |
302 | static struct regulator_consumer_supply wallvdd_consumers[] = { |
303 | REGULATOR_SUPPLY("SPKVDD" , "1-001a" ), |
304 | REGULATOR_SUPPLY("SPKVDD1" , "1-001a" ), |
305 | REGULATOR_SUPPLY("SPKVDD2" , "1-001a" ), |
306 | REGULATOR_SUPPLY("SPKVDDL" , "1-001a" ), |
307 | REGULATOR_SUPPLY("SPKVDDR" , "1-001a" ), |
308 | |
309 | REGULATOR_SUPPLY("SPKVDDL" , "spi0.1" ), |
310 | REGULATOR_SUPPLY("SPKVDDR" , "spi0.1" ), |
311 | |
312 | REGULATOR_SUPPLY("DC1VDD" , "0-0034" ), |
313 | REGULATOR_SUPPLY("DC2VDD" , "0-0034" ), |
314 | REGULATOR_SUPPLY("DC3VDD" , "0-0034" ), |
315 | REGULATOR_SUPPLY("LDO1VDD" , "0-0034" ), |
316 | REGULATOR_SUPPLY("LDO2VDD" , "0-0034" ), |
317 | REGULATOR_SUPPLY("LDO4VDD" , "0-0034" ), |
318 | REGULATOR_SUPPLY("LDO5VDD" , "0-0034" ), |
319 | REGULATOR_SUPPLY("LDO6VDD" , "0-0034" ), |
320 | REGULATOR_SUPPLY("LDO7VDD" , "0-0034" ), |
321 | REGULATOR_SUPPLY("LDO8VDD" , "0-0034" ), |
322 | REGULATOR_SUPPLY("LDO9VDD" , "0-0034" ), |
323 | REGULATOR_SUPPLY("LDO10VDD" , "0-0034" ), |
324 | REGULATOR_SUPPLY("LDO11VDD" , "0-0034" ), |
325 | |
326 | REGULATOR_SUPPLY("DC1VDD" , "1-0034" ), |
327 | REGULATOR_SUPPLY("DC2VDD" , "1-0034" ), |
328 | REGULATOR_SUPPLY("DC3VDD" , "1-0034" ), |
329 | REGULATOR_SUPPLY("LDO1VDD" , "1-0034" ), |
330 | REGULATOR_SUPPLY("LDO2VDD" , "1-0034" ), |
331 | REGULATOR_SUPPLY("LDO4VDD" , "1-0034" ), |
332 | REGULATOR_SUPPLY("LDO5VDD" , "1-0034" ), |
333 | REGULATOR_SUPPLY("LDO6VDD" , "1-0034" ), |
334 | REGULATOR_SUPPLY("LDO7VDD" , "1-0034" ), |
335 | REGULATOR_SUPPLY("LDO8VDD" , "1-0034" ), |
336 | REGULATOR_SUPPLY("LDO9VDD" , "1-0034" ), |
337 | REGULATOR_SUPPLY("LDO10VDD" , "1-0034" ), |
338 | REGULATOR_SUPPLY("LDO11VDD" , "1-0034" ), |
339 | }; |
340 | |
341 | static struct regulator_init_data wallvdd_data = { |
342 | .constraints = { |
343 | .always_on = 1, |
344 | }, |
345 | .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers), |
346 | .consumer_supplies = wallvdd_consumers, |
347 | }; |
348 | |
349 | static struct fixed_voltage_config wallvdd_pdata = { |
350 | .supply_name = "WALLVDD" , |
351 | .microvolts = 5000000, |
352 | .init_data = &wallvdd_data, |
353 | }; |
354 | |
355 | static struct platform_device wallvdd_device = { |
356 | .name = "reg-fixed-voltage" , |
357 | .id = -1, |
358 | .dev = { |
359 | .platform_data = &wallvdd_pdata, |
360 | }, |
361 | }; |
362 | |
363 | static struct platform_device *crag6410_devices[] __initdata = { |
364 | &s3c_device_hsmmc0, |
365 | &s3c_device_hsmmc2, |
366 | &s3c_device_i2c0, |
367 | &s3c_device_i2c1, |
368 | &s3c_device_fb, |
369 | &s3c_device_ohci, |
370 | &s3c_device_usb_hsotg, |
371 | &samsung_device_pwm, |
372 | &s3c64xx_device_iis0, |
373 | &s3c64xx_device_iis1, |
374 | &samsung_device_keypad, |
375 | &crag6410_gpio_keydev, |
376 | &crag6410_dm9k_device, |
377 | &s3c64xx_device_spi0, |
378 | &crag6410_mmgpio, |
379 | &crag6410_lcd_powerdev, |
380 | &crag6410_backlight_device, |
381 | &speyside_device, |
382 | &tobermory_device, |
383 | &littlemill_device, |
384 | &lowland_device, |
385 | &bells_wm2200_device, |
386 | &bells_wm5102_device, |
387 | &bells_wm5110_device, |
388 | &wallvdd_device, |
389 | }; |
390 | |
391 | static struct pca953x_platform_data crag6410_pca_data = { |
392 | .gpio_base = PCA935X_GPIO_BASE, |
393 | .irq_base = -1, |
394 | }; |
395 | |
396 | /* VDDARM is controlled by DVS1 connected to GPK(0) */ |
397 | static struct wm831x_buckv_pdata vddarm_pdata = { |
398 | .dvs_control_src = 1, |
399 | }; |
400 | |
401 | static struct regulator_consumer_supply vddarm_consumers[] = { |
402 | REGULATOR_SUPPLY("vddarm" , NULL), |
403 | }; |
404 | |
405 | static struct regulator_init_data vddarm = { |
406 | .constraints = { |
407 | .name = "VDDARM" , |
408 | .min_uV = 1000000, |
409 | .max_uV = 1300000, |
410 | .always_on = 1, |
411 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
412 | }, |
413 | .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), |
414 | .consumer_supplies = vddarm_consumers, |
415 | .supply_regulator = "WALLVDD" , |
416 | .driver_data = &vddarm_pdata, |
417 | }; |
418 | |
419 | static struct regulator_consumer_supply vddint_consumers[] = { |
420 | REGULATOR_SUPPLY("vddint" , NULL), |
421 | }; |
422 | |
423 | static struct regulator_init_data vddint = { |
424 | .constraints = { |
425 | .name = "VDDINT" , |
426 | .min_uV = 1000000, |
427 | .max_uV = 1200000, |
428 | .always_on = 1, |
429 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
430 | }, |
431 | .num_consumer_supplies = ARRAY_SIZE(vddint_consumers), |
432 | .consumer_supplies = vddint_consumers, |
433 | .supply_regulator = "WALLVDD" , |
434 | }; |
435 | |
436 | static struct regulator_init_data vddmem = { |
437 | .constraints = { |
438 | .name = "VDDMEM" , |
439 | .always_on = 1, |
440 | }, |
441 | }; |
442 | |
443 | static struct regulator_init_data vddsys = { |
444 | .constraints = { |
445 | .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS" , |
446 | .always_on = 1, |
447 | }, |
448 | }; |
449 | |
450 | static struct regulator_consumer_supply vddmmc_consumers[] = { |
451 | REGULATOR_SUPPLY("vmmc" , "s3c-sdhci.0" ), |
452 | REGULATOR_SUPPLY("vmmc" , "s3c-sdhci.1" ), |
453 | REGULATOR_SUPPLY("vmmc" , "s3c-sdhci.2" ), |
454 | }; |
455 | |
456 | static struct regulator_init_data vddmmc = { |
457 | .constraints = { |
458 | .name = "VDDMMC,UH" , |
459 | .always_on = 1, |
460 | }, |
461 | .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers), |
462 | .consumer_supplies = vddmmc_consumers, |
463 | .supply_regulator = "WALLVDD" , |
464 | }; |
465 | |
466 | static struct regulator_init_data vddotgi = { |
467 | .constraints = { |
468 | .name = "VDDOTGi" , |
469 | .always_on = 1, |
470 | }, |
471 | .supply_regulator = "WALLVDD" , |
472 | }; |
473 | |
474 | static struct regulator_init_data vddotg = { |
475 | .constraints = { |
476 | .name = "VDDOTG" , |
477 | .always_on = 1, |
478 | }, |
479 | .supply_regulator = "WALLVDD" , |
480 | }; |
481 | |
482 | static struct regulator_init_data vddhi = { |
483 | .constraints = { |
484 | .name = "VDDHI" , |
485 | .always_on = 1, |
486 | }, |
487 | .supply_regulator = "WALLVDD" , |
488 | }; |
489 | |
490 | static struct regulator_init_data vddadc = { |
491 | .constraints = { |
492 | .name = "VDDADC,VDDDAC" , |
493 | .always_on = 1, |
494 | }, |
495 | .supply_regulator = "WALLVDD" , |
496 | }; |
497 | |
498 | static struct regulator_init_data vddmem0 = { |
499 | .constraints = { |
500 | .name = "VDDMEM0" , |
501 | .always_on = 1, |
502 | }, |
503 | .supply_regulator = "WALLVDD" , |
504 | }; |
505 | |
506 | static struct regulator_init_data vddpll = { |
507 | .constraints = { |
508 | .name = "VDDPLL" , |
509 | .always_on = 1, |
510 | }, |
511 | .supply_regulator = "WALLVDD" , |
512 | }; |
513 | |
514 | static struct regulator_init_data vddlcd = { |
515 | .constraints = { |
516 | .name = "VDDLCD" , |
517 | .always_on = 1, |
518 | }, |
519 | .supply_regulator = "WALLVDD" , |
520 | }; |
521 | |
522 | static struct regulator_init_data vddalive = { |
523 | .constraints = { |
524 | .name = "VDDALIVE" , |
525 | .always_on = 1, |
526 | }, |
527 | .supply_regulator = "WALLVDD" , |
528 | }; |
529 | |
530 | static struct wm831x_backup_pdata banff_backup_pdata = { |
531 | .charger_enable = 1, |
532 | .vlim = 2500, /* mV */ |
533 | .ilim = 200, /* uA */ |
534 | }; |
535 | |
536 | static struct wm831x_status_pdata banff_red_led = { |
537 | .name = "banff:red:" , |
538 | .default_src = WM831X_STATUS_MANUAL, |
539 | }; |
540 | |
541 | static struct wm831x_status_pdata banff_green_led = { |
542 | .name = "banff:green:" , |
543 | .default_src = WM831X_STATUS_MANUAL, |
544 | }; |
545 | |
546 | static struct wm831x_touch_pdata touch_pdata = { |
547 | .data_irq = S3C_EINT(26), |
548 | .pd_irq = S3C_EINT(27), |
549 | }; |
550 | |
551 | static struct wm831x_pdata crag_pmic_pdata = { |
552 | .wm831x_num = 1, |
553 | .irq_base = BANFF_PMIC_IRQ_BASE, |
554 | .gpio_base = BANFF_PMIC_GPIO_BASE, |
555 | .soft_shutdown = true, |
556 | |
557 | .backup = &banff_backup_pdata, |
558 | |
559 | .gpio_defaults = { |
560 | /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */ |
561 | [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8, |
562 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ |
563 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, |
564 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ |
565 | [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7, |
566 | }, |
567 | |
568 | .dcdc = { |
569 | &vddarm, /* DCDC1 */ |
570 | &vddint, /* DCDC2 */ |
571 | &vddmem, /* DCDC3 */ |
572 | }, |
573 | |
574 | .ldo = { |
575 | &vddsys, /* LDO1 */ |
576 | &vddmmc, /* LDO2 */ |
577 | NULL, /* LDO3 */ |
578 | &vddotgi, /* LDO4 */ |
579 | &vddotg, /* LDO5 */ |
580 | &vddhi, /* LDO6 */ |
581 | &vddadc, /* LDO7 */ |
582 | &vddmem0, /* LDO8 */ |
583 | &vddpll, /* LDO9 */ |
584 | &vddlcd, /* LDO10 */ |
585 | &vddalive, /* LDO11 */ |
586 | }, |
587 | |
588 | .status = { |
589 | &banff_green_led, |
590 | &banff_red_led, |
591 | }, |
592 | |
593 | .touch = &touch_pdata, |
594 | }; |
595 | |
596 | /* |
597 | * VDDARM is eventually ending up as a regulator hanging on the MFD cell device |
598 | * "wm831x-buckv.1" spawn from drivers/mfd/wm831x-core.c. |
599 | * |
600 | * From the note on the platform data we can see that this is clearly DVS1 |
601 | * and assigned as dcdc1 resource to the MFD core which sets .id of the cell |
602 | * spawning the DVS1 platform device to 1, then the cell platform device |
603 | * name is calculated from 10*instance + id resulting in the device name |
604 | * "wm831x-buckv.11" |
605 | */ |
606 | static struct gpiod_lookup_table crag_pmic_gpiod_table = { |
607 | .dev_id = "wm831x-buckv.11" , |
608 | .table = { |
609 | GPIO_LOOKUP("GPIOK" , 0, "dvs" , GPIO_ACTIVE_HIGH), |
610 | { }, |
611 | }, |
612 | }; |
613 | |
614 | static struct i2c_board_info i2c_devs0[] = { |
615 | { I2C_BOARD_INFO("24c08" , 0x50), }, |
616 | { I2C_BOARD_INFO("tca6408" , 0x20), |
617 | .platform_data = &crag6410_pca_data, |
618 | }, |
619 | { I2C_BOARD_INFO("wm8312" , 0x34), |
620 | .platform_data = &crag_pmic_pdata, |
621 | .irq = S3C_EINT(23), |
622 | }, |
623 | }; |
624 | |
625 | static struct s3c2410_platform_i2c i2c0_pdata = { |
626 | .frequency = 400000, |
627 | }; |
628 | |
629 | static struct regulator_consumer_supply pvdd_1v2_consumers[] = { |
630 | REGULATOR_SUPPLY("DCVDD" , "spi0.0" ), |
631 | REGULATOR_SUPPLY("AVDD" , "spi0.0" ), |
632 | REGULATOR_SUPPLY("AVDD" , "spi0.1" ), |
633 | }; |
634 | |
635 | static struct regulator_init_data pvdd_1v2 = { |
636 | .constraints = { |
637 | .name = "PVDD_1V2" , |
638 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
639 | }, |
640 | |
641 | .consumer_supplies = pvdd_1v2_consumers, |
642 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), |
643 | }; |
644 | |
645 | static struct regulator_consumer_supply pvdd_1v8_consumers[] = { |
646 | REGULATOR_SUPPLY("LDOVDD" , "1-001a" ), |
647 | REGULATOR_SUPPLY("PLLVDD" , "1-001a" ), |
648 | REGULATOR_SUPPLY("DBVDD" , "1-001a" ), |
649 | REGULATOR_SUPPLY("DBVDD1" , "1-001a" ), |
650 | REGULATOR_SUPPLY("DBVDD2" , "1-001a" ), |
651 | REGULATOR_SUPPLY("DBVDD3" , "1-001a" ), |
652 | REGULATOR_SUPPLY("CPVDD" , "1-001a" ), |
653 | REGULATOR_SUPPLY("AVDD2" , "1-001a" ), |
654 | REGULATOR_SUPPLY("DCVDD" , "1-001a" ), |
655 | REGULATOR_SUPPLY("AVDD" , "1-001a" ), |
656 | REGULATOR_SUPPLY("DBVDD" , "spi0.0" ), |
657 | |
658 | REGULATOR_SUPPLY("DBVDD" , "1-003a" ), |
659 | REGULATOR_SUPPLY("LDOVDD" , "1-003a" ), |
660 | REGULATOR_SUPPLY("CPVDD" , "1-003a" ), |
661 | REGULATOR_SUPPLY("AVDD" , "1-003a" ), |
662 | REGULATOR_SUPPLY("DBVDD1" , "spi0.1" ), |
663 | REGULATOR_SUPPLY("DBVDD2" , "spi0.1" ), |
664 | REGULATOR_SUPPLY("DBVDD3" , "spi0.1" ), |
665 | REGULATOR_SUPPLY("LDOVDD" , "spi0.1" ), |
666 | REGULATOR_SUPPLY("CPVDD" , "spi0.1" ), |
667 | }; |
668 | |
669 | static struct regulator_init_data pvdd_1v8 = { |
670 | .constraints = { |
671 | .name = "PVDD_1V8" , |
672 | .always_on = 1, |
673 | }, |
674 | |
675 | .consumer_supplies = pvdd_1v8_consumers, |
676 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), |
677 | }; |
678 | |
679 | static struct regulator_consumer_supply pvdd_3v3_consumers[] = { |
680 | REGULATOR_SUPPLY("MICVDD" , "1-001a" ), |
681 | REGULATOR_SUPPLY("AVDD1" , "1-001a" ), |
682 | }; |
683 | |
684 | static struct regulator_init_data pvdd_3v3 = { |
685 | .constraints = { |
686 | .name = "PVDD_3V3" , |
687 | .always_on = 1, |
688 | }, |
689 | |
690 | .consumer_supplies = pvdd_3v3_consumers, |
691 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), |
692 | }; |
693 | |
694 | static struct wm831x_pdata glenfarclas_pmic_pdata = { |
695 | .wm831x_num = 2, |
696 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, |
697 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, |
698 | .soft_shutdown = true, |
699 | |
700 | .gpio_defaults = { |
701 | /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ |
702 | [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
703 | [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
704 | [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, |
705 | }, |
706 | |
707 | .dcdc = { |
708 | &pvdd_1v2, /* DCDC1 */ |
709 | &pvdd_1v8, /* DCDC2 */ |
710 | &pvdd_3v3, /* DCDC3 */ |
711 | }, |
712 | |
713 | .disable_touch = true, |
714 | }; |
715 | |
716 | static struct wm1250_ev1_pdata wm1250_ev1_pdata = { |
717 | .gpios = { |
718 | [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12), |
719 | [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12), |
720 | [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13), |
721 | [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14), |
722 | [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8), |
723 | }, |
724 | }; |
725 | |
726 | static struct i2c_board_info i2c_devs1[] = { |
727 | { I2C_BOARD_INFO("wm8311" , 0x34), |
728 | .irq = S3C_EINT(0), |
729 | .platform_data = &glenfarclas_pmic_pdata }, |
730 | |
731 | { I2C_BOARD_INFO("wlf-gf-module" , 0x20) }, |
732 | { I2C_BOARD_INFO("wlf-gf-module" , 0x22) }, |
733 | { I2C_BOARD_INFO("wlf-gf-module" , 0x24) }, |
734 | { I2C_BOARD_INFO("wlf-gf-module" , 0x25) }, |
735 | { I2C_BOARD_INFO("wlf-gf-module" , 0x26) }, |
736 | |
737 | { I2C_BOARD_INFO("wm1250-ev1" , 0x27), |
738 | .platform_data = &wm1250_ev1_pdata }, |
739 | }; |
740 | |
741 | static struct s3c2410_platform_i2c i2c1_pdata = { |
742 | .frequency = 400000, |
743 | .bus_num = 1, |
744 | }; |
745 | |
746 | static void __init crag6410_map_io(void) |
747 | { |
748 | s3c64xx_init_io(NULL, size: 0); |
749 | s3c64xx_set_xtal_freq(freq: 12000000); |
750 | s3c24xx_init_uarts(cfg: crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs)); |
751 | s3c64xx_set_timer_source(event: S3C64XX_PWM3, source: S3C64XX_PWM4); |
752 | |
753 | /* LCD type and Bypass set by bootloader */ |
754 | } |
755 | |
756 | static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = { |
757 | .max_width = 4, |
758 | .cd_type = S3C_SDHCI_CD_PERMANENT, |
759 | .host_caps = MMC_CAP_POWER_OFF_CARD, |
760 | }; |
761 | |
762 | static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) |
763 | { |
764 | /* Set all the necessary GPG pins to special-function 2 */ |
765 | s3c_gpio_cfgrange_nopull(pin: S3C64XX_GPG(0), size: 2 + width, S3C_GPIO_SFN(2)); |
766 | |
767 | /* force card-detected for prototype 0 */ |
768 | s3c_gpio_setpull(pin: S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN); |
769 | } |
770 | |
771 | static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = { |
772 | .max_width = 4, |
773 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
774 | .cfg_gpio = crag6410_cfg_sdhci0, |
775 | .host_caps = MMC_CAP_POWER_OFF_CARD, |
776 | }; |
777 | |
778 | static const struct gpio_led gpio_leds[] = { |
779 | { |
780 | .name = "d13:green:" , |
781 | .gpio = MMGPIO_GPIO_BASE + 0, |
782 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
783 | }, |
784 | { |
785 | .name = "d14:green:" , |
786 | .gpio = MMGPIO_GPIO_BASE + 1, |
787 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
788 | }, |
789 | { |
790 | .name = "d15:green:" , |
791 | .gpio = MMGPIO_GPIO_BASE + 2, |
792 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
793 | }, |
794 | { |
795 | .name = "d16:green:" , |
796 | .gpio = MMGPIO_GPIO_BASE + 3, |
797 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
798 | }, |
799 | { |
800 | .name = "d17:green:" , |
801 | .gpio = MMGPIO_GPIO_BASE + 4, |
802 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
803 | }, |
804 | { |
805 | .name = "d18:green:" , |
806 | .gpio = MMGPIO_GPIO_BASE + 5, |
807 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
808 | }, |
809 | { |
810 | .name = "d19:green:" , |
811 | .gpio = MMGPIO_GPIO_BASE + 6, |
812 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
813 | }, |
814 | { |
815 | .name = "d20:green:" , |
816 | .gpio = MMGPIO_GPIO_BASE + 7, |
817 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
818 | }, |
819 | }; |
820 | |
821 | static const struct gpio_led_platform_data gpio_leds_pdata = { |
822 | .leds = gpio_leds, |
823 | .num_leds = ARRAY_SIZE(gpio_leds), |
824 | }; |
825 | |
826 | static struct dwc2_hsotg_plat crag6410_hsotg_pdata; |
827 | |
828 | static struct gpiod_lookup_table crag_spi0_gpiod_table = { |
829 | .dev_id = "s3c6410-spi.0" , |
830 | .table = { |
831 | GPIO_LOOKUP_IDX("GPIOC" , 3, "cs" , 0, GPIO_ACTIVE_LOW), |
832 | GPIO_LOOKUP_IDX("GPION" , 5, "cs" , 1, GPIO_ACTIVE_LOW), |
833 | { }, |
834 | }, |
835 | }; |
836 | |
837 | static void __init crag6410_machine_init(void) |
838 | { |
839 | /* Open drain IRQs need pullups */ |
840 | s3c_gpio_setpull(pin: S3C64XX_GPM(0), S3C_GPIO_PULL_UP); |
841 | s3c_gpio_setpull(pin: S3C64XX_GPN(0), S3C_GPIO_PULL_UP); |
842 | |
843 | gpio_request(gpio: S3C64XX_GPB(0), label: "LCD power" ); |
844 | gpio_direction_output(gpio: S3C64XX_GPB(0), value: 0); |
845 | |
846 | gpio_request(gpio: S3C64XX_GPF(14), label: "LCD PWM" ); |
847 | gpio_direction_output(gpio: S3C64XX_GPF(14), value: 0); /* turn off */ |
848 | |
849 | gpio_request(gpio: S3C64XX_GPB(1), label: "SD power" ); |
850 | gpio_direction_output(gpio: S3C64XX_GPB(1), value: 0); |
851 | |
852 | gpio_request(gpio: S3C64XX_GPF(10), label: "nRESETSEL" ); |
853 | gpio_direction_output(gpio: S3C64XX_GPF(10), value: 1); |
854 | |
855 | s3c_sdhci0_set_platdata(pd: &crag6410_hsmmc0_pdata); |
856 | s3c_sdhci2_set_platdata(pd: &crag6410_hsmmc2_pdata); |
857 | |
858 | s3c_i2c0_set_platdata(i2c: &i2c0_pdata); |
859 | s3c_i2c1_set_platdata(i2c: &i2c1_pdata); |
860 | s3c_fb_set_platdata(pd: &crag6410_lcd_pdata); |
861 | dwc2_hsotg_set_platdata(pd: &crag6410_hsotg_pdata); |
862 | |
863 | gpiod_add_lookup_table(table: &crag_pmic_gpiod_table); |
864 | i2c_register_board_info(busnum: 0, info: i2c_devs0, ARRAY_SIZE(i2c_devs0)); |
865 | i2c_register_board_info(busnum: 1, info: i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
866 | |
867 | samsung_keypad_set_platdata(pd: &crag6410_keypad_data); |
868 | |
869 | gpiod_add_lookup_table(table: &crag_spi0_gpiod_table); |
870 | s3c64xx_spi0_set_platdata(src_clk_nr: 0, num_cs: 2); |
871 | |
872 | pwm_add_table(table: crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup)); |
873 | platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); |
874 | |
875 | gpio_led_register_device(id: -1, pdata: &gpio_leds_pdata); |
876 | |
877 | regulator_has_full_constraints(); |
878 | |
879 | s3c64xx_pm_init(); |
880 | } |
881 | |
882 | MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410" ) |
883 | /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ |
884 | .atag_offset = 0x100, |
885 | .nr_irqs = S3C64XX_NR_IRQS, |
886 | .init_irq = s3c6410_init_irq, |
887 | .map_io = crag6410_map_io, |
888 | .init_machine = crag6410_machine_init, |
889 | .init_time = s3c64xx_timer_init, |
890 | MACHINE_END |
891 | |