1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __KVM_IO_APIC_H |
3 | #define __KVM_IO_APIC_H |
4 | |
5 | #include <linux/kvm_host.h> |
6 | #include <kvm/iodev.h> |
7 | #include "irq.h" |
8 | |
9 | struct kvm; |
10 | struct kvm_vcpu; |
11 | |
12 | #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS |
13 | #define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES |
14 | #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ |
15 | #define IOAPIC_EDGE_TRIG 0 |
16 | #define IOAPIC_LEVEL_TRIG 1 |
17 | |
18 | #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000 |
19 | #define IOAPIC_MEM_LENGTH 0x100 |
20 | |
21 | /* Direct registers. */ |
22 | #define IOAPIC_REG_SELECT 0x00 |
23 | #define IOAPIC_REG_WINDOW 0x10 |
24 | |
25 | /* Indirect registers. */ |
26 | #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */ |
27 | #define IOAPIC_REG_VERSION 0x01 |
28 | #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */ |
29 | |
30 | /*ioapic delivery mode*/ |
31 | #define IOAPIC_FIXED 0x0 |
32 | #define IOAPIC_LOWEST_PRIORITY 0x1 |
33 | #define IOAPIC_PMI 0x2 |
34 | #define IOAPIC_NMI 0x4 |
35 | #define IOAPIC_INIT 0x5 |
36 | #define IOAPIC_EXTINT 0x7 |
37 | |
38 | #define RTC_GSI 8 |
39 | |
40 | struct dest_map { |
41 | /* vcpu bitmap where IRQ has been sent */ |
42 | DECLARE_BITMAP(map, KVM_MAX_VCPU_IDS); |
43 | |
44 | /* |
45 | * Vector sent to a given vcpu, only valid when |
46 | * the vcpu's bit in map is set |
47 | */ |
48 | u8 vectors[KVM_MAX_VCPU_IDS]; |
49 | }; |
50 | |
51 | |
52 | struct rtc_status { |
53 | int pending_eoi; |
54 | struct dest_map dest_map; |
55 | }; |
56 | |
57 | union kvm_ioapic_redirect_entry { |
58 | u64 bits; |
59 | struct { |
60 | u8 vector; |
61 | u8 delivery_mode:3; |
62 | u8 dest_mode:1; |
63 | u8 delivery_status:1; |
64 | u8 polarity:1; |
65 | u8 remote_irr:1; |
66 | u8 trig_mode:1; |
67 | u8 mask:1; |
68 | u8 reserve:7; |
69 | u8 reserved[4]; |
70 | u8 dest_id; |
71 | } fields; |
72 | }; |
73 | |
74 | struct kvm_ioapic { |
75 | u64 base_address; |
76 | u32 ioregsel; |
77 | u32 id; |
78 | u32 irr; |
79 | u32 pad; |
80 | union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS]; |
81 | unsigned long irq_states[IOAPIC_NUM_PINS]; |
82 | struct kvm_io_device dev; |
83 | struct kvm *kvm; |
84 | spinlock_t lock; |
85 | struct rtc_status rtc_status; |
86 | struct delayed_work eoi_inject; |
87 | u32 irq_eoi[IOAPIC_NUM_PINS]; |
88 | u32 irr_delivered; |
89 | }; |
90 | |
91 | #ifdef DEBUG |
92 | #define ASSERT(x) \ |
93 | do { \ |
94 | if (!(x)) { \ |
95 | printk(KERN_EMERG "assertion failed %s: %d: %s\n", \ |
96 | __FILE__, __LINE__, #x); \ |
97 | BUG(); \ |
98 | } \ |
99 | } while (0) |
100 | #else |
101 | #define ASSERT(x) do { } while (0) |
102 | #endif |
103 | |
104 | static inline int ioapic_in_kernel(struct kvm *kvm) |
105 | { |
106 | return irqchip_kernel(kvm); |
107 | } |
108 | |
109 | void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu); |
110 | void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, |
111 | int trigger_mode); |
112 | int kvm_ioapic_init(struct kvm *kvm); |
113 | void kvm_ioapic_destroy(struct kvm *kvm); |
114 | int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id, |
115 | int level, bool line_status); |
116 | void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id); |
117 | void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); |
118 | void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); |
119 | void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, |
120 | ulong *ioapic_handled_vectors); |
121 | void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, |
122 | ulong *ioapic_handled_vectors); |
123 | #endif |
124 | |