1	// SPDX-License-Identifier: GPL-2.0-or-later
2	/*
3	* acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
4	* and other Tigon based cards.
5	*
6	* Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7	*
8	* Thanks to Alteon and 3Com for providing hardware and documentation
9	* enabling me to write this driver.
10	*
11	* A mailing list for discussing the use of this driver has been
12	* setup, please subscribe to the lists if you have any questions
13	* about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
14	* see how to subscribe.
15	*
16	* Additional credits:
17	* Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
18	* dump support. The trace dump support has not been
19	* integrated yet however.
20	* Troy Benjegerdes: Big Endian (PPC) patches.
21	* Nate Stahl: Better out of memory handling and stats support.
22	* Aman Singla: Nasty race between interrupt handler and tx code dealing
23	* with 'testing the tx_ret_csm and setting tx_full'
24	* David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
25	* infrastructure and Sparc support
26	* Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
27	* driver under Linux/Sparc64
28	* Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
29	* ETHTOOL_GDRVINFO support
30	* Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
31	* handler and close() cleanup.
32	* Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
33	* memory mapped IO is enabled to
34	* make the driver work on RS/6000.
35	* Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
36	* where the driver would disable
37	* bus master mode if it had to disable
38	* write and invalidate.
39	* Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
40	* endian systems.
41	* Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
42	* rx producer index when
43	* flushing the Jumbo ring.
44	* Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
45	* driver init path.
46	* Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
47	*/
48
49	#include <linux/module.h>
50	#include <linux/moduleparam.h>
51	#include <linux/types.h>
52	#include <linux/errno.h>
53	#include <linux/ioport.h>
54	#include <linux/pci.h>
55	#include <linux/dma-mapping.h>
56	#include <linux/kernel.h>
57	#include <linux/netdevice.h>
58	#include <linux/etherdevice.h>
59	#include <linux/skbuff.h>
60	#include <linux/delay.h>
61	#include <linux/mm.h>
62	#include <linux/highmem.h>
63	#include <linux/sockios.h>
64	#include <linux/firmware.h>
65	#include <linux/slab.h>
66	#include <linux/prefetch.h>
67	#include <linux/if_vlan.h>
68
69	#ifdef SIOCETHTOOL
70	#include <linux/ethtool.h>
71	#endif
72
73	#include <net/sock.h>
74	#include <net/ip.h>
75
76	#include <asm/io.h>
77	#include <asm/irq.h>
78	#include <asm/byteorder.h>
79	#include <linux/uaccess.h>
80
81
82	#define DRV_NAME "acenic"
83
84	#undef INDEX_DEBUG
85
86	#ifdef CONFIG_ACENIC_OMIT_TIGON_I
87	#define ACE_IS_TIGON_I(ap) 0
88	#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
89	#else
90	#define ACE_IS_TIGON_I(ap) (ap->version == 1)
91	#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
92	#endif
93
94	#ifndef PCI_VENDOR_ID_ALTEON
95	#define PCI_VENDOR_ID_ALTEON 0x12ae
96	#endif
97	#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
98	#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
99	#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
100	#endif
101	#ifndef PCI_DEVICE_ID_3COM_3C985
102	#define PCI_DEVICE_ID_3COM_3C985 0x0001
103	#endif
104	#ifndef PCI_VENDOR_ID_NETGEAR
105	#define PCI_VENDOR_ID_NETGEAR 0x1385
106	#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
107	#endif
108	#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
109	#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
110	#endif
111
112
113	/*
114	* Farallon used the DEC vendor ID by mistake and they seem not
115	* to care - stinky!
116	*/
117	#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
118	#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
119	#endif
120	#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
121	#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
122	#endif
123	#ifndef PCI_VENDOR_ID_SGI
124	#define PCI_VENDOR_ID_SGI 0x10a9
125	#endif
126	#ifndef PCI_DEVICE_ID_SGI_ACENIC
127	#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
128	#endif
129
130	static const struct pci_device_id acenic_pci_tbl[] = {
131	{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
132	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
133	{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
134	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
135	{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
136	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
137	{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
138	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139	{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
140	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141	/*
142	* Farallon used the DEC vendor ID on their cards incorrectly,
143	* then later Alteon's ID.
144	*/
145	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
146	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
147	{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
148	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149	{ PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
150	PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
151	{ }
152	};
153	MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
154
155	#define ace_sync_irq(irq) synchronize_irq(irq)
156
157	#ifndef offset_in_page
158	#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
159	#endif
160
161	#define ACE_MAX_MOD_PARMS 8
162	#define BOARD_IDX_STATIC 0
163	#define BOARD_IDX_OVERFLOW -1
164
165	#include "acenic.h"
166
167	/*
168	* These must be defined before the firmware is included.
169	*/
170	#define MAX_TEXT_LEN 96*1024
171	#define MAX_RODATA_LEN 8*1024
172	#define MAX_DATA_LEN 2*1024
173
174	#ifndef tigon2FwReleaseLocal
175	#define tigon2FwReleaseLocal 0
176	#endif
177
178	/*
179	* This driver currently supports Tigon I and Tigon II based cards
180	* including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
181	* GA620. The driver should also work on the SGI, DEC and Farallon
182	* versions of the card, however I have not been able to test that
183	* myself.
184	*
185	* This card is really neat, it supports receive hardware checksumming
186	* and jumbo frames (up to 9000 bytes) and does a lot of work in the
187	* firmware. Also the programming interface is quite neat, except for
188	* the parts dealing with the i2c eeprom on the card ;-)
189	*
190	* Using jumbo frames:
191	*
192	* To enable jumbo frames, simply specify an mtu between 1500 and 9000
193	* bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
194	* by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
195	* interface number and <MTU> being the MTU value.
196	*
197	* Module parameters:
198	*
199	* When compiled as a loadable module, the driver allows for a number
200	* of module parameters to be specified. The driver supports the
201	* following module parameters:
202	*
203	* trace=<val> - Firmware trace level. This requires special traced
204	* firmware to replace the firmware supplied with
205	* the driver - for debugging purposes only.
206	*
207	* link=<val> - Link state. Normally you want to use the default link
208	* parameters set by the driver. This can be used to
209	* override these in case your switch doesn't negotiate
210	* the link properly. Valid values are:
211	* 0x0001 - Force half duplex link.
212	* 0x0002 - Do not negotiate line speed with the other end.
213	* 0x0010 - 10Mbit/sec link.
214	* 0x0020 - 100Mbit/sec link.
215	* 0x0040 - 1000Mbit/sec link.
216	* 0x0100 - Do not negotiate flow control.
217	* 0x0200 - Enable RX flow control Y
218	* 0x0400 - Enable TX flow control Y (Tigon II NICs only).
219	* Default value is 0x0270, ie. enable link+flow
220	* control negotiation. Negotiating the highest
221	* possible link speed with RX flow control enabled.
222	*
223	* When disabling link speed negotiation, only one link
224	* speed is allowed to be specified!
225	*
226	* tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
227	* to wait for more packets to arive before
228	* interrupting the host, from the time the first
229	* packet arrives.
230	*
231	* rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
232	* to wait for more packets to arive in the transmit ring,
233	* before interrupting the host, after transmitting the
234	* first packet in the ring.
235	*
236	* max_tx_desc=<val> - maximum number of transmit descriptors
237	* (packets) transmitted before interrupting the host.
238	*
239	* max_rx_desc=<val> - maximum number of receive descriptors
240	* (packets) received before interrupting the host.
241	*
242	* tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
243	* increments of the NIC's on board memory to be used for
244	* transmit and receive buffers. For the 1MB NIC app. 800KB
245	* is available, on the 1/2MB NIC app. 300KB is available.
246	* 68KB will always be available as a minimum for both
247	* directions. The default value is a 50/50 split.
248	* dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
249	* operations, default (1) is to always disable this as
250	* that is what Alteon does on NT. I have not been able
251	* to measure any real performance differences with
252	* this on my systems. Set <val>=0 if you want to
253	* enable these operations.
254	*
255	* If you use more than one NIC, specify the parameters for the
256	* individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
257	* run tracing on NIC #2 but not on NIC #1 and #3.
258	*
259	* TODO:
260	*
261	* - Proper multicast support.
262	* - NIC dump support.
263	* - More tuning parameters.
264	*
265	* The mini ring is not used under Linux and I am not sure it makes sense
266	* to actually use it.
267	*
268	* New interrupt handler strategy:
269	*
270	* The old interrupt handler worked using the traditional method of
271	* replacing an skbuff with a new one when a packet arrives. However
272	* the rx rings do not need to contain a static number of buffer
273	* descriptors, thus it makes sense to move the memory allocation out
274	* of the main interrupt handler and do it in a bottom half handler
275	* and only allocate new buffers when the number of buffers in the
276	* ring is below a certain threshold. In order to avoid starving the
277	* NIC under heavy load it is however necessary to force allocation
278	* when hitting a minimum threshold. The strategy for alloction is as
279	* follows:
280	*
281	* RX_LOW_BUF_THRES - allocate buffers in the bottom half
282	* RX_PANIC_LOW_THRES - we are very low on buffers, allocate
283	* the buffers in the interrupt handler
284	* RX_RING_THRES - maximum number of buffers in the rx ring
285	* RX_MINI_THRES - maximum number of buffers in the mini ring
286	* RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
287	*
288	* One advantagous side effect of this allocation approach is that the
289	* entire rx processing can be done without holding any spin lock
290	* since the rx rings and registers are totally independent of the tx
291	* ring and its registers. This of course includes the kmalloc's of
292	* new skb's. Thus start_xmit can run in parallel with rx processing
293	* and the memory allocation on SMP systems.
294	*
295	* Note that running the skb reallocation in a bottom half opens up
296	* another can of races which needs to be handled properly. In
297	* particular it can happen that the interrupt handler tries to run
298	* the reallocation while the bottom half is either running on another
299	* CPU or was interrupted on the same CPU. To get around this the
300	* driver uses bitops to prevent the reallocation routines from being
301	* reentered.
302	*
303	* TX handling can also be done without holding any spin lock, wheee
304	* this is fun! since tx_ret_csm is only written to by the interrupt
305	* handler. The case to be aware of is when shutting down the device
306	* and cleaning up where it is necessary to make sure that
307	* start_xmit() is not running while this is happening. Well DaveM
308	* informs me that this case is already protected against ... bye bye
309	* Mr. Spin Lock, it was nice to know you.
310	*
311	* TX interrupts are now partly disabled so the NIC will only generate
312	* TX interrupts for the number of coal ticks, not for the number of
313	* TX packets in the queue. This should reduce the number of TX only,
314	* ie. when no RX processing is done, interrupts seen.
315	*/
316
317	/*
318	* Threshold values for RX buffer allocation - the low water marks for
319	* when to start refilling the rings are set to 75% of the ring
320	* sizes. It seems to make sense to refill the rings entirely from the
321	* intrrupt handler once it gets below the panic threshold, that way
322	* we don't risk that the refilling is moved to another CPU when the
323	* one running the interrupt handler just got the slab code hot in its
324	* cache.
325	*/
326	#define RX_RING_SIZE 72
327	#define RX_MINI_SIZE 64
328	#define RX_JUMBO_SIZE 48
329
330	#define RX_PANIC_STD_THRES 16
331	#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
332	#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
333	#define RX_PANIC_MINI_THRES 12
334	#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
335	#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
336	#define RX_PANIC_JUMBO_THRES 6
337	#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
338	#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
339
340
341	/*
342	* Size of the mini ring entries, basically these just should be big
343	* enough to take TCP ACKs
344	*/
345	#define ACE_MINI_SIZE 100
346
347	#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
348	#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
349	#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
350
351	/*
352	* There seems to be a magic difference in the effect between 995 and 996
353	* but little difference between 900 and 995 ... no idea why.
354	*
355	* There is now a default set of tuning parameters which is set, depending
356	* on whether or not the user enables Jumbo frames. It's assumed that if
357	* Jumbo frames are enabled, the user wants optimal tuning for that case.
358	*/
359	#define DEF_TX_COAL 400 /* 996 */
360	#define DEF_TX_MAX_DESC 60 /* was 40 */
361	#define DEF_RX_COAL 120 /* 1000 */
362	#define DEF_RX_MAX_DESC 25
363	#define DEF_TX_RATIO 21 /* 24 */
364
365	#define DEF_JUMBO_TX_COAL 20
366	#define DEF_JUMBO_TX_MAX_DESC 60
367	#define DEF_JUMBO_RX_COAL 30
368	#define DEF_JUMBO_RX_MAX_DESC 6
369	#define DEF_JUMBO_TX_RATIO 21
370
371	#if tigon2FwReleaseLocal < 20001118
372	/*
373	* Standard firmware and early modifications duplicate
374	* IRQ load without this flag (coal timer is never reset).
375	* Note that with this flag tx_coal should be less than
376	* time to xmit full tx ring.
377	* 400usec is not so bad for tx ring size of 128.
378	*/
379	#define TX_COAL_INTS_ONLY 1 /* worth it */
380	#else
381	/*
382	* With modified firmware, this is not necessary, but still useful.
383	*/
384	#define TX_COAL_INTS_ONLY 1
385	#endif
386
387	#define DEF_TRACE 0
388	#define DEF_STAT (2 * TICKS_PER_SEC)
389
390
391	static int link_state[ACE_MAX_MOD_PARMS];
392	static int trace[ACE_MAX_MOD_PARMS];
393	static int tx_coal_tick[ACE_MAX_MOD_PARMS];
394	static int rx_coal_tick[ACE_MAX_MOD_PARMS];
395	static int max_tx_desc[ACE_MAX_MOD_PARMS];
396	static int max_rx_desc[ACE_MAX_MOD_PARMS];
397	static int tx_ratio[ACE_MAX_MOD_PARMS];
398	static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
399
400	MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
401	MODULE_LICENSE("GPL");
402	MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
403	#ifndef CONFIG_ACENIC_OMIT_TIGON_I
404	MODULE_FIRMWARE("acenic/tg1.bin");
405	#endif
406	MODULE_FIRMWARE("acenic/tg2.bin");
407
408	module_param_array_named(link, link_state, int, NULL, 0);
409	module_param_array(trace, int, NULL, 0);
410	module_param_array(tx_coal_tick, int, NULL, 0);
411	module_param_array(max_tx_desc, int, NULL, 0);
412	module_param_array(rx_coal_tick, int, NULL, 0);
413	module_param_array(max_rx_desc, int, NULL, 0);
414	module_param_array(tx_ratio, int, NULL, 0);
415	MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
416	MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
417	MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
418	MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
419	MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
420	MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
421	MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
422
423
424	static const char version[] =
425	"acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
426	" http://home.cern.ch/~jes/gige/acenic.html\n";
427
428	static int ace_get_link_ksettings(struct net_device *,
429	struct ethtool_link_ksettings *);
430	static int ace_set_link_ksettings(struct net_device *,
431	const struct ethtool_link_ksettings *);
432	static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
433
434	static const struct ethtool_ops ace_ethtool_ops = {
435	.get_drvinfo = ace_get_drvinfo,
436	.get_link_ksettings = ace_get_link_ksettings,
437	.set_link_ksettings = ace_set_link_ksettings,
438	};
439
440	static void ace_watchdog(struct net_device *dev, unsigned int txqueue);
441
442	static const struct net_device_ops ace_netdev_ops = {
443	.ndo_open = ace_open,
444	.ndo_stop = ace_close,
445	.ndo_tx_timeout = ace_watchdog,
446	.ndo_get_stats = ace_get_stats,
447	.ndo_start_xmit = ace_start_xmit,
448	.ndo_set_rx_mode = ace_set_multicast_list,
449	.ndo_validate_addr = eth_validate_addr,
450	.ndo_set_mac_address = ace_set_mac_addr,
451	.ndo_change_mtu = ace_change_mtu,
452	};
453
454	static int acenic_probe_one(struct pci_dev *pdev,
455	const struct pci_device_id *id)
456	{
457	struct net_device *dev;
458	struct ace_private *ap;
459	static int boards_found;
460
461	dev = alloc_etherdev(sizeof(struct ace_private));
462	if (dev == NULL)
463	return -ENOMEM;
464
465	SET_NETDEV_DEV(dev, &pdev->dev);
466
467	ap = netdev_priv(dev);
468	ap->ndev = dev;
469	ap->pdev = pdev;
470	ap->name = pci_name(pdev);
471
472	dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
473	dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
474
475	dev->watchdog_timeo = 5*HZ;
476	dev->min_mtu = 0;
477	dev->max_mtu = ACE_JUMBO_MTU;
478
479	dev->netdev_ops = &ace_netdev_ops;
480	dev->ethtool_ops = &ace_ethtool_ops;
481
482	/* we only display this string ONCE */
483	if (!boards_found)
484	printk(version);
485
486	if (pci_enable_device(dev: pdev))
487	goto fail_free_netdev;
488
489	/*
490	* Enable master mode before we start playing with the
491	* pci_command word since pci_set_master() will modify
492	* it.
493	*/
494	pci_set_master(dev: pdev);
495
496	pci_read_config_word(dev: pdev, PCI_COMMAND, val: &ap->pci_command);
497
498	/* OpenFirmware on Mac's does not set this - DOH.. */
499	if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
500	printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
501	"access - was not enabled by BIOS/Firmware\n",
502	ap->name);
503	ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
504	pci_write_config_word(dev: ap->pdev, PCI_COMMAND,
505	val: ap->pci_command);
506	wmb();
507	}
508
509	pci_read_config_byte(dev: pdev, PCI_LATENCY_TIMER, val: &ap->pci_latency);
510	if (ap->pci_latency <= 0x40) {
511	ap->pci_latency = 0x40;
512	pci_write_config_byte(dev: pdev, PCI_LATENCY_TIMER, val: ap->pci_latency);
513	}
514
515	/*
516	* Remap the regs into kernel space - this is abuse of
517	* dev->base_addr since it was means for I/O port
518	* addresses but who gives a damn.
519	*/
520	dev->base_addr = pci_resource_start(pdev, 0);
521	ap->regs = ioremap(offset: dev->base_addr, size: 0x4000);
522	if (!ap->regs) {
523	printk(KERN_ERR "%s: Unable to map I/O register, "
524	"AceNIC %i will be disabled.\n",
525	ap->name, boards_found);
526	goto fail_free_netdev;
527	}
528
529	switch(pdev->vendor) {
530	case PCI_VENDOR_ID_ALTEON:
531	if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
532	printk(KERN_INFO "%s: Farallon PN9100-T ",
533	ap->name);
534	} else {
535	printk(KERN_INFO "%s: Alteon AceNIC ",
536	ap->name);
537	}
538	break;
539	case PCI_VENDOR_ID_3COM:
540	printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
541	break;
542	case PCI_VENDOR_ID_NETGEAR:
543	printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
544	break;
545	case PCI_VENDOR_ID_DEC:
546	if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
547	printk(KERN_INFO "%s: Farallon PN9000-SX ",
548	ap->name);
549	break;
550	}
551	fallthrough;
552	case PCI_VENDOR_ID_SGI:
553	printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
554	break;
555	default:
556	printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
557	break;
558	}
559
560	printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
561	printk("irq %d\n", pdev->irq);
562
563	#ifdef CONFIG_ACENIC_OMIT_TIGON_I
564	if ((readl(addr: &ap->regs->HostCtrl) >> 28) == 4) {
565	printk(KERN_ERR "%s: Driver compiled without Tigon I"
566	" support - NIC disabled\n", dev->name);
567	goto fail_uninit;
568	}
569	#endif
570
571	if (ace_allocate_descriptors(dev))
572	goto fail_free_netdev;
573
574	#ifdef MODULE
575	if (boards_found >= ACE_MAX_MOD_PARMS)
576	ap->board_idx = BOARD_IDX_OVERFLOW;
577	else
578	ap->board_idx = boards_found;
579	#else
580	ap->board_idx = BOARD_IDX_STATIC;
581	#endif
582
583	if (ace_init(dev))
584	goto fail_free_netdev;
585
586	if (register_netdev(dev)) {
587	printk(KERN_ERR "acenic: device registration failed\n");
588	goto fail_uninit;
589	}
590	ap->name = dev->name;
591
592	dev->features |= NETIF_F_HIGHDMA;
593
594	pci_set_drvdata(pdev, data: dev);
595
596	boards_found++;
597	return 0;
598
599	fail_uninit:
600	ace_init_cleanup(dev);
601	fail_free_netdev:
602	free_netdev(dev);
603	return -ENODEV;
604	}
605
606	static void acenic_remove_one(struct pci_dev *pdev)
607	{
608	struct net_device *dev = pci_get_drvdata(pdev);
609	struct ace_private *ap = netdev_priv(dev);
610	struct ace_regs __iomem *regs = ap->regs;
611	short i;
612
613	unregister_netdev(dev);
614
615	writel(readl(addr: &regs->CpuCtrl) | CPU_HALT, addr: &regs->CpuCtrl);
616	if (ap->version >= 2)
617	writel(readl(addr: &regs->CpuBCtrl) | CPU_HALT, addr: &regs->CpuBCtrl);
618
619	/*
620	* This clears any pending interrupts
621	*/
622	writel(val: 1, addr: &regs->Mb0Lo);
623	readl(addr: &regs->CpuCtrl); /* flush */
624
625	/*
626	* Make sure no other CPUs are processing interrupts
627	* on the card before the buffers are being released.
628	* Otherwise one might experience some `interesting'
629	* effects.
630	*
631	* Then release the RX buffers - jumbo buffers were
632	* already released in ace_close().
633	*/
634	ace_sync_irq(dev->irq);
635
636	for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
637	struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
638
639	if (skb) {
640	struct ring_info *ringp;
641	dma_addr_t mapping;
642
643	ringp = &ap->skb->rx_std_skbuff[i];
644	mapping = dma_unmap_addr(ringp, mapping);
645	dma_unmap_page(&ap->pdev->dev, mapping,
646	ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
647
648	ap->rx_std_ring[i].size = 0;
649	ap->skb->rx_std_skbuff[i].skb = NULL;
650	dev_kfree_skb(skb);
651	}
652	}
653
654	if (ap->version >= 2) {
655	for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
656	struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
657
658	if (skb) {
659	struct ring_info *ringp;
660	dma_addr_t mapping;
661
662	ringp = &ap->skb->rx_mini_skbuff[i];
663	mapping = dma_unmap_addr(ringp,mapping);
664	dma_unmap_page(&ap->pdev->dev, mapping,
665	ACE_MINI_BUFSIZE,
666	DMA_FROM_DEVICE);
667
668	ap->rx_mini_ring[i].size = 0;
669	ap->skb->rx_mini_skbuff[i].skb = NULL;
670	dev_kfree_skb(skb);
671	}
672	}
673	}
674
675	for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
676	struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
677	if (skb) {
678	struct ring_info *ringp;
679	dma_addr_t mapping;
680
681	ringp = &ap->skb->rx_jumbo_skbuff[i];
682	mapping = dma_unmap_addr(ringp, mapping);
683	dma_unmap_page(&ap->pdev->dev, mapping,
684	ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
685
686	ap->rx_jumbo_ring[i].size = 0;
687	ap->skb->rx_jumbo_skbuff[i].skb = NULL;
688	dev_kfree_skb(skb);
689	}
690	}
691
692	ace_init_cleanup(dev);
693	free_netdev(dev);
694	}
695
696	static struct pci_driver acenic_pci_driver = {
697	.name = "acenic",
698	.id_table = acenic_pci_tbl,
699	.probe = acenic_probe_one,
700	.remove = acenic_remove_one,
701	};
702
703	static void ace_free_descriptors(struct net_device *dev)
704	{
705	struct ace_private *ap = netdev_priv(dev);
706	int size;
707
708	if (ap->rx_std_ring != NULL) {
709	size = (sizeof(struct rx_desc) *
710	(RX_STD_RING_ENTRIES +
711	RX_JUMBO_RING_ENTRIES +
712	RX_MINI_RING_ENTRIES +
713	RX_RETURN_RING_ENTRIES));
714	dma_free_coherent(dev: &ap->pdev->dev, size, cpu_addr: ap->rx_std_ring,
715	dma_handle: ap->rx_ring_base_dma);
716	ap->rx_std_ring = NULL;
717	ap->rx_jumbo_ring = NULL;
718	ap->rx_mini_ring = NULL;
719	ap->rx_return_ring = NULL;
720	}
721	if (ap->evt_ring != NULL) {
722	size = (sizeof(struct event) * EVT_RING_ENTRIES);
723	dma_free_coherent(dev: &ap->pdev->dev, size, cpu_addr: ap->evt_ring,
724	dma_handle: ap->evt_ring_dma);
725	ap->evt_ring = NULL;
726	}
727	if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
728	size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
729	dma_free_coherent(dev: &ap->pdev->dev, size, cpu_addr: ap->tx_ring,
730	dma_handle: ap->tx_ring_dma);
731	}
732	ap->tx_ring = NULL;
733
734	if (ap->evt_prd != NULL) {
735	dma_free_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
736	cpu_addr: (void *)ap->evt_prd, dma_handle: ap->evt_prd_dma);
737	ap->evt_prd = NULL;
738	}
739	if (ap->rx_ret_prd != NULL) {
740	dma_free_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
741	cpu_addr: (void *)ap->rx_ret_prd, dma_handle: ap->rx_ret_prd_dma);
742	ap->rx_ret_prd = NULL;
743	}
744	if (ap->tx_csm != NULL) {
745	dma_free_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
746	cpu_addr: (void *)ap->tx_csm, dma_handle: ap->tx_csm_dma);
747	ap->tx_csm = NULL;
748	}
749	}
750
751
752	static int ace_allocate_descriptors(struct net_device *dev)
753	{
754	struct ace_private *ap = netdev_priv(dev);
755	int size;
756
757	size = (sizeof(struct rx_desc) *
758	(RX_STD_RING_ENTRIES +
759	RX_JUMBO_RING_ENTRIES +
760	RX_MINI_RING_ENTRIES +
761	RX_RETURN_RING_ENTRIES));
762
763	ap->rx_std_ring = dma_alloc_coherent(dev: &ap->pdev->dev, size,
764	dma_handle: &ap->rx_ring_base_dma, GFP_KERNEL);
765	if (ap->rx_std_ring == NULL)
766	goto fail;
767
768	ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
769	ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
770	ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
771
772	size = (sizeof(struct event) * EVT_RING_ENTRIES);
773
774	ap->evt_ring = dma_alloc_coherent(dev: &ap->pdev->dev, size,
775	dma_handle: &ap->evt_ring_dma, GFP_KERNEL);
776
777	if (ap->evt_ring == NULL)
778	goto fail;
779
780	/*
781	* Only allocate a host TX ring for the Tigon II, the Tigon I
782	* has to use PCI registers for this ;-(
783	*/
784	if (!ACE_IS_TIGON_I(ap)) {
785	size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
786
787	ap->tx_ring = dma_alloc_coherent(dev: &ap->pdev->dev, size,
788	dma_handle: &ap->tx_ring_dma, GFP_KERNEL);
789
790	if (ap->tx_ring == NULL)
791	goto fail;
792	}
793
794	ap->evt_prd = dma_alloc_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
795	dma_handle: &ap->evt_prd_dma, GFP_KERNEL);
796	if (ap->evt_prd == NULL)
797	goto fail;
798
799	ap->rx_ret_prd = dma_alloc_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
800	dma_handle: &ap->rx_ret_prd_dma, GFP_KERNEL);
801	if (ap->rx_ret_prd == NULL)
802	goto fail;
803
804	ap->tx_csm = dma_alloc_coherent(dev: &ap->pdev->dev, size: sizeof(u32),
805	dma_handle: &ap->tx_csm_dma, GFP_KERNEL);
806	if (ap->tx_csm == NULL)
807	goto fail;
808
809	return 0;
810
811	fail:
812	/* Clean up. */
813	ace_init_cleanup(dev);
814	return 1;
815	}
816
817
818	/*
819	* Generic cleanup handling data allocated during init. Used when the
820	* module is unloaded or if an error occurs during initialization
821	*/
822	static void ace_init_cleanup(struct net_device *dev)
823	{
824	struct ace_private *ap;
825
826	ap = netdev_priv(dev);
827
828	ace_free_descriptors(dev);
829
830	if (ap->info)
831	dma_free_coherent(dev: &ap->pdev->dev, size: sizeof(struct ace_info),
832	cpu_addr: ap->info, dma_handle: ap->info_dma);
833	kfree(objp: ap->skb);
834	kfree(objp: ap->trace_buf);
835
836	if (dev->irq)
837	free_irq(dev->irq, dev);
838
839	iounmap(addr: ap->regs);
840	}
841
842
843	/*
844	* Commands are considered to be slow.
845	*/
846	static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
847	{
848	u32 idx;
849
850	idx = readl(addr: &regs->CmdPrd);
851
852	writel(val: *(u32 *)(cmd), addr: &regs->CmdRng[idx]);
853	idx = (idx + 1) % CMD_RING_ENTRIES;
854
855	writel(val: idx, addr: &regs->CmdPrd);
856	}
857
858
859	static int ace_init(struct net_device *dev)
860	{
861	struct ace_private *ap;
862	struct ace_regs __iomem *regs;
863	struct ace_info *info = NULL;
864	struct pci_dev *pdev;
865	unsigned long myjif;
866	u64 tmp_ptr;
867	u32 tig_ver, mac1, mac2, tmp, pci_state;
868	int board_idx, ecode = 0;
869	short i;
870	unsigned char cache_size;
871	u8 addr[ETH_ALEN];
872
873	ap = netdev_priv(dev);
874	regs = ap->regs;
875
876	board_idx = ap->board_idx;
877
878	/*
879	* aman@sgi.com - its useful to do a NIC reset here to
880	* address the `Firmware not running' problem subsequent
881	* to any crashes involving the NIC
882	*/
883	writel(HW_RESET | (HW_RESET << 24), addr: &regs->HostCtrl);
884	readl(addr: &regs->HostCtrl); /* PCI write posting */
885	udelay(5);
886
887	/*
888	* Don't access any other registers before this point!
889	*/
890	#ifdef __BIG_ENDIAN
891	/*
892	* This will most likely need BYTE_SWAP once we switch
893	* to using __raw_writel()
894	*/
895	writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
896	&regs->HostCtrl);
897	#else
898	writel(val: (CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
899	addr: &regs->HostCtrl);
900	#endif
901	readl(addr: &regs->HostCtrl); /* PCI write posting */
902
903	/*
904	* Stop the NIC CPU and clear pending interrupts
905	*/
906	writel(readl(addr: &regs->CpuCtrl) | CPU_HALT, addr: &regs->CpuCtrl);
907	readl(addr: &regs->CpuCtrl); /* PCI write posting */
908	writel(val: 0, addr: &regs->Mb0Lo);
909
910	tig_ver = readl(addr: &regs->HostCtrl) >> 28;
911
912	switch(tig_ver){
913	#ifndef CONFIG_ACENIC_OMIT_TIGON_I
914	case 4:
915	case 5:
916	printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
917	tig_ver, ap->firmware_major, ap->firmware_minor,
918	ap->firmware_fix);
919	writel(0, &regs->LocalCtrl);
920	ap->version = 1;
921	ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
922	break;
923	#endif
924	case 6:
925	printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
926	tig_ver, ap->firmware_major, ap->firmware_minor,
927	ap->firmware_fix);
928	writel(readl(addr: &regs->CpuBCtrl) | CPU_HALT, addr: &regs->CpuBCtrl);
929	readl(addr: &regs->CpuBCtrl); /* PCI write posting */
930	/*
931	* The SRAM bank size does _not_ indicate the amount
932	* of memory on the card, it controls the _bank_ size!
933	* Ie. a 1MB AceNIC will have two banks of 512KB.
934	*/
935	writel(SRAM_BANK_512K, addr: &regs->LocalCtrl);
936	writel(SYNC_SRAM_TIMING, addr: &regs->MiscCfg);
937	ap->version = 2;
938	ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
939	break;
940	default:
941	printk(KERN_WARNING " Unsupported Tigon version detected "
942	"(%i)\n", tig_ver);
943	ecode = -ENODEV;
944	goto init_error;
945	}
946
947	/*
948	* ModeStat _must_ be set after the SRAM settings as this change
949	* seems to corrupt the ModeStat and possible other registers.
950	* The SRAM settings survive resets and setting it to the same
951	* value a second time works as well. This is what caused the
952	* `Firmware not running' problem on the Tigon II.
953	*/
954	#ifdef __BIG_ENDIAN
955	writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
956	ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
957	#else
958	writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
959	ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, addr: &regs->ModeStat);
960	#endif
961	readl(addr: &regs->ModeStat); /* PCI write posting */
962
963	mac1 = 0;
964	for(i = 0; i < 4; i++) {
965	int t;
966
967	mac1 = mac1 << 8;
968	t = read_eeprom_byte(dev, offset: 0x8c+i);
969	if (t < 0) {
970	ecode = -EIO;
971	goto init_error;
972	} else
973	mac1 |= (t & 0xff);
974	}
975	mac2 = 0;
976	for(i = 4; i < 8; i++) {
977	int t;
978
979	mac2 = mac2 << 8;
980	t = read_eeprom_byte(dev, offset: 0x8c+i);
981	if (t < 0) {
982	ecode = -EIO;
983	goto init_error;
984	} else
985	mac2 |= (t & 0xff);
986	}
987
988	writel(val: mac1, addr: &regs->MacAddrHi);
989	writel(val: mac2, addr: &regs->MacAddrLo);
990
991	addr[0] = (mac1 >> 8) & 0xff;
992	addr[1] = mac1 & 0xff;
993	addr[2] = (mac2 >> 24) & 0xff;
994	addr[3] = (mac2 >> 16) & 0xff;
995	addr[4] = (mac2 >> 8) & 0xff;
996	addr[5] = mac2 & 0xff;
997	eth_hw_addr_set(dev, addr);
998
999	printk("MAC: %pM\n", dev->dev_addr);
1000
1001	/*
1002	* Looks like this is necessary to deal with on all architectures,
1003	* even this %$#%$# N440BX Intel based thing doesn't get it right.
1004	* Ie. having two NICs in the machine, one will have the cache
1005	* line set at boot time, the other will not.
1006	*/
1007	pdev = ap->pdev;
1008	pci_read_config_byte(dev: pdev, PCI_CACHE_LINE_SIZE, val: &cache_size);
1009	cache_size <<= 2;
1010	if (cache_size != SMP_CACHE_BYTES) {
1011	printk(KERN_INFO " PCI cache line size set incorrectly "
1012	"(%i bytes) by BIOS/FW, ", cache_size);
1013	if (cache_size > SMP_CACHE_BYTES)
1014	printk("expecting %i\n", SMP_CACHE_BYTES);
1015	else {
1016	printk("correcting to %i\n", SMP_CACHE_BYTES);
1017	pci_write_config_byte(dev: pdev, PCI_CACHE_LINE_SIZE,
1018	SMP_CACHE_BYTES >> 2);
1019	}
1020	}
1021
1022	pci_state = readl(addr: &regs->PciState);
1023	printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1024	"latency: %i clks\n",
1025	(pci_state & PCI_32BIT) ? 32 : 64,
1026	(pci_state & PCI_66MHZ) ? 66 : 33,
1027	ap->pci_latency);
1028
1029	/*
1030	* Set the max DMA transfer size. Seems that for most systems
1031	* the performance is better when no MAX parameter is
1032	* set. However for systems enabling PCI write and invalidate,
1033	* DMA writes must be set to the L1 cache line size to get
1034	* optimal performance.
1035	*
1036	* The default is now to turn the PCI write and invalidate off
1037	* - that is what Alteon does for NT.
1038	*/
1039	tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1040	if (ap->version >= 2) {
1041	tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1042	/*
1043	* Tuning parameters only supported for 8 cards
1044	*/
1045	if (board_idx == BOARD_IDX_OVERFLOW ||
1046	dis_pci_mem_inval[board_idx]) {
1047	if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1048	ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1049	pci_write_config_word(dev: pdev, PCI_COMMAND,
1050	val: ap->pci_command);
1051	printk(KERN_INFO " Disabling PCI memory "
1052	"write and invalidate\n");
1053	}
1054	} else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1055	printk(KERN_INFO " PCI memory write & invalidate "
1056	"enabled by BIOS, enabling counter measures\n");
1057
1058	switch(SMP_CACHE_BYTES) {
1059	case 16:
1060	tmp |= DMA_WRITE_MAX_16;
1061	break;
1062	case 32:
1063	tmp |= DMA_WRITE_MAX_32;
1064	break;
1065	case 64:
1066	tmp |= DMA_WRITE_MAX_64;
1067	break;
1068	case 128:
1069	tmp |= DMA_WRITE_MAX_128;
1070	break;
1071	default:
1072	printk(KERN_INFO " Cache line size %i not "
1073	"supported, PCI write and invalidate "
1074	"disabled\n", SMP_CACHE_BYTES);
1075	ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1076	pci_write_config_word(dev: pdev, PCI_COMMAND,
1077	val: ap->pci_command);
1078	}
1079	}
1080	}
1081
1082	#ifdef __sparc__
1083	/*
1084	* On this platform, we know what the best dma settings
1085	* are. We use 64-byte maximum bursts, because if we
1086	* burst larger than the cache line size (or even cross
1087	* a 64byte boundary in a single burst) the UltraSparc
1088	* PCI controller will disconnect at 64-byte multiples.
1089	*
1090	* Read-multiple will be properly enabled above, and when
1091	* set will give the PCI controller proper hints about
1092	* prefetching.
1093	*/
1094	tmp &= ~DMA_READ_WRITE_MASK;
1095	tmp |= DMA_READ_MAX_64;
1096	tmp |= DMA_WRITE_MAX_64;
1097	#endif
1098	#ifdef __alpha__
1099	tmp &= ~DMA_READ_WRITE_MASK;
1100	tmp |= DMA_READ_MAX_128;
1101	/*
1102	* All the docs say MUST NOT. Well, I did.
1103	* Nothing terrible happens, if we load wrong size.
1104	* Bit w&i still works better!
1105	*/
1106	tmp |= DMA_WRITE_MAX_128;
1107	#endif
1108	writel(val: tmp, addr: &regs->PciState);
1109
1110	#if 0
1111	/*
1112	* The Host PCI bus controller driver has to set FBB.
1113	* If all devices on that PCI bus support FBB, then the controller
1114	* can enable FBB support in the Host PCI Bus controller (or on
1115	* the PCI-PCI bridge if that applies).
1116	* -ggg
1117	*/
1118	/*
1119	* I have received reports from people having problems when this
1120	* bit is enabled.
1121	*/
1122	if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1123	printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1124	ap->pci_command |= PCI_COMMAND_FAST_BACK;
1125	pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1126	}
1127	#endif
1128
1129	/*
1130	* Configure DMA attributes.
1131	*/
1132	if (dma_set_mask(dev: &pdev->dev, DMA_BIT_MASK(64))) {
1133	ecode = -ENODEV;
1134	goto init_error;
1135	}
1136
1137	/*
1138	* Initialize the generic info block and the command+event rings
1139	* and the control blocks for the transmit and receive rings
1140	* as they need to be setup once and for all.
1141	*/
1142	if (!(info = dma_alloc_coherent(dev: &ap->pdev->dev, size: sizeof(struct ace_info),
1143	dma_handle: &ap->info_dma, GFP_KERNEL))) {
1144	ecode = -EAGAIN;
1145	goto init_error;
1146	}
1147	ap->info = info;
1148
1149	/*
1150	* Get the memory for the skb rings.
1151	*/
1152	if (!(ap->skb = kzalloc(size: sizeof(struct ace_skb), GFP_KERNEL))) {
1153	ecode = -EAGAIN;
1154	goto init_error;
1155	}
1156
1157	ecode = request_irq(irq: pdev->irq, handler: ace_interrupt, IRQF_SHARED,
1158	DRV_NAME, dev);
1159	if (ecode) {
1160	printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1161	DRV_NAME, pdev->irq);
1162	goto init_error;
1163	} else
1164	dev->irq = pdev->irq;
1165
1166	#ifdef INDEX_DEBUG
1167	spin_lock_init(&ap->debug_lock);
1168	ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1169	ap->last_std_rx = 0;
1170	ap->last_mini_rx = 0;
1171	#endif
1172
1173	ecode = ace_load_firmware(dev);
1174	if (ecode)
1175	goto init_error;
1176
1177	ap->fw_running = 0;
1178
1179	tmp_ptr = ap->info_dma;
1180	writel(val: tmp_ptr >> 32, addr: &regs->InfoPtrHi);
1181	writel(val: tmp_ptr & 0xffffffff, addr: &regs->InfoPtrLo);
1182
1183	memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1184
1185	set_aceaddr(aa: &info->evt_ctrl.rngptr, addr: ap->evt_ring_dma);
1186	info->evt_ctrl.flags = 0;
1187
1188	*(ap->evt_prd) = 0;
1189	wmb();
1190	set_aceaddr(aa: &info->evt_prd_ptr, addr: ap->evt_prd_dma);
1191	writel(val: 0, addr: &regs->EvtCsm);
1192
1193	set_aceaddr(aa: &info->cmd_ctrl.rngptr, addr: 0x100);
1194	info->cmd_ctrl.flags = 0;
1195	info->cmd_ctrl.max_len = 0;
1196
1197	for (i = 0; i < CMD_RING_ENTRIES; i++)
1198	writel(val: 0, addr: &regs->CmdRng[i]);
1199
1200	writel(val: 0, addr: &regs->CmdPrd);
1201	writel(val: 0, addr: &regs->CmdCsm);
1202
1203	tmp_ptr = ap->info_dma;
1204	tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1205	set_aceaddr(aa: &info->stats2_ptr, addr: (dma_addr_t) tmp_ptr);
1206
1207	set_aceaddr(aa: &info->rx_std_ctrl.rngptr, addr: ap->rx_ring_base_dma);
1208	info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1209	info->rx_std_ctrl.flags =
1210	RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1211
1212	memset(ap->rx_std_ring, 0,
1213	RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1214
1215	for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1216	ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1217
1218	ap->rx_std_skbprd = 0;
1219	atomic_set(v: &ap->cur_rx_bufs, i: 0);
1220
1221	set_aceaddr(aa: &info->rx_jumbo_ctrl.rngptr,
1222	addr: (ap->rx_ring_base_dma +
1223	(sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1224	info->rx_jumbo_ctrl.max_len = 0;
1225	info->rx_jumbo_ctrl.flags =
1226	RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1227
1228	memset(ap->rx_jumbo_ring, 0,
1229	RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1230
1231	for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1232	ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1233
1234	ap->rx_jumbo_skbprd = 0;
1235	atomic_set(v: &ap->cur_jumbo_bufs, i: 0);
1236
1237	memset(ap->rx_mini_ring, 0,
1238	RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1239
1240	if (ap->version >= 2) {
1241	set_aceaddr(aa: &info->rx_mini_ctrl.rngptr,
1242	addr: (ap->rx_ring_base_dma +
1243	(sizeof(struct rx_desc) *
1244	(RX_STD_RING_ENTRIES +
1245	RX_JUMBO_RING_ENTRIES))));
1246	info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1247	info->rx_mini_ctrl.flags =
1248	RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST;
1249
1250	for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1251	ap->rx_mini_ring[i].flags =
1252	BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1253	} else {
1254	set_aceaddr(aa: &info->rx_mini_ctrl.rngptr, addr: 0);
1255	info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1256	info->rx_mini_ctrl.max_len = 0;
1257	}
1258
1259	ap->rx_mini_skbprd = 0;
1260	atomic_set(v: &ap->cur_mini_bufs, i: 0);
1261
1262	set_aceaddr(aa: &info->rx_return_ctrl.rngptr,
1263	addr: (ap->rx_ring_base_dma +
1264	(sizeof(struct rx_desc) *
1265	(RX_STD_RING_ENTRIES +
1266	RX_JUMBO_RING_ENTRIES +
1267	RX_MINI_RING_ENTRIES))));
1268	info->rx_return_ctrl.flags = 0;
1269	info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1270
1271	memset(ap->rx_return_ring, 0,
1272	RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1273
1274	set_aceaddr(aa: &info->rx_ret_prd_ptr, addr: ap->rx_ret_prd_dma);
1275	*(ap->rx_ret_prd) = 0;
1276
1277	writel(TX_RING_BASE, addr: &regs->WinBase);
1278
1279	if (ACE_IS_TIGON_I(ap)) {
1280	ap->tx_ring = (__force struct tx_desc *) regs->Window;
1281	for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1282	* sizeof(struct tx_desc)) / sizeof(u32); i++)
1283	writel(val: 0, addr: (__force void __iomem *)ap->tx_ring + i * 4);
1284
1285	set_aceaddr(aa: &info->tx_ctrl.rngptr, TX_RING_BASE);
1286	} else {
1287	memset(ap->tx_ring, 0,
1288	MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1289
1290	set_aceaddr(aa: &info->tx_ctrl.rngptr, addr: ap->tx_ring_dma);
1291	}
1292
1293	info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1294	tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1295
1296	/*
1297	* The Tigon I does not like having the TX ring in host memory ;-(
1298	*/
1299	if (!ACE_IS_TIGON_I(ap))
1300	tmp |= RCB_FLG_TX_HOST_RING;
1301	#if TX_COAL_INTS_ONLY
1302	tmp |= RCB_FLG_COAL_INT_ONLY;
1303	#endif
1304	info->tx_ctrl.flags = tmp;
1305
1306	set_aceaddr(aa: &info->tx_csm_ptr, addr: ap->tx_csm_dma);
1307
1308	/*
1309	* Potential item for tuning parameter
1310	*/
1311	#if 0 /* NO */
1312	writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1313	writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1314	#else
1315	writel(DMA_THRESH_8W, addr: &regs->DmaReadCfg);
1316	writel(DMA_THRESH_8W, addr: &regs->DmaWriteCfg);
1317	#endif
1318
1319	writel(val: 0, addr: &regs->MaskInt);
1320	writel(val: 1, addr: &regs->IfIdx);
1321	#if 0
1322	/*
1323	* McKinley boxes do not like us fiddling with AssistState
1324	* this early
1325	*/
1326	writel(1, &regs->AssistState);
1327	#endif
1328
1329	writel(DEF_STAT, addr: &regs->TuneStatTicks);
1330	writel(DEF_TRACE, addr: &regs->TuneTrace);
1331
1332	ace_set_rxtx_parms(dev, jumbo: 0);
1333
1334	if (board_idx == BOARD_IDX_OVERFLOW) {
1335	printk(KERN_WARNING "%s: more than %i NICs detected, "
1336	"ignoring module parameters!\n",
1337	ap->name, ACE_MAX_MOD_PARMS);
1338	} else if (board_idx >= 0) {
1339	if (tx_coal_tick[board_idx])
1340	writel(val: tx_coal_tick[board_idx],
1341	addr: &regs->TuneTxCoalTicks);
1342	if (max_tx_desc[board_idx])
1343	writel(val: max_tx_desc[board_idx], addr: &regs->TuneMaxTxDesc);
1344
1345	if (rx_coal_tick[board_idx])
1346	writel(val: rx_coal_tick[board_idx],
1347	addr: &regs->TuneRxCoalTicks);
1348	if (max_rx_desc[board_idx])
1349	writel(val: max_rx_desc[board_idx], addr: &regs->TuneMaxRxDesc);
1350
1351	if (trace[board_idx])
1352	writel(val: trace[board_idx], addr: &regs->TuneTrace);
1353
1354	if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1355	writel(val: tx_ratio[board_idx], addr: &regs->TxBufRat);
1356	}
1357
1358	/*
1359	* Default link parameters
1360	*/
1361	tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1362	LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1363	if(ap->version >= 2)
1364	tmp |= LNK_TX_FLOW_CTL_Y;
1365
1366	/*
1367	* Override link default parameters
1368	*/
1369	if ((board_idx >= 0) && link_state[board_idx]) {
1370	int option = link_state[board_idx];
1371
1372	tmp = LNK_ENABLE;
1373
1374	if (option & 0x01) {
1375	printk(KERN_INFO "%s: Setting half duplex link\n",
1376	ap->name);
1377	tmp &= ~LNK_FULL_DUPLEX;
1378	}
1379	if (option & 0x02)
1380	tmp &= ~LNK_NEGOTIATE;
1381	if (option & 0x10)
1382	tmp |= LNK_10MB;
1383	if (option & 0x20)
1384	tmp |= LNK_100MB;
1385	if (option & 0x40)
1386	tmp |= LNK_1000MB;
1387	if ((option & 0x70) == 0) {
1388	printk(KERN_WARNING "%s: No media speed specified, "
1389	"forcing auto negotiation\n", ap->name);
1390	tmp |= LNK_NEGOTIATE | LNK_1000MB |
1391	LNK_100MB | LNK_10MB;
1392	}
1393	if ((option & 0x100) == 0)
1394	tmp |= LNK_NEG_FCTL;
1395	else
1396	printk(KERN_INFO "%s: Disabling flow control "
1397	"negotiation\n", ap->name);
1398	if (option & 0x200)
1399	tmp |= LNK_RX_FLOW_CTL_Y;
1400	if ((option & 0x400) && (ap->version >= 2)) {
1401	printk(KERN_INFO "%s: Enabling TX flow control\n",
1402	ap->name);
1403	tmp |= LNK_TX_FLOW_CTL_Y;
1404	}
1405	}
1406
1407	ap->link = tmp;
1408	writel(val: tmp, addr: &regs->TuneLink);
1409	if (ap->version >= 2)
1410	writel(val: tmp, addr: &regs->TuneFastLink);
1411
1412	writel(val: ap->firmware_start, addr: &regs->Pc);
1413
1414	writel(val: 0, addr: &regs->Mb0Lo);
1415
1416	/*
1417	* Set tx_csm before we start receiving interrupts, otherwise
1418	* the interrupt handler might think it is supposed to process
1419	* tx ints before we are up and running, which may cause a null
1420	* pointer access in the int handler.
1421	*/
1422	ap->cur_rx = 0;
1423	ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1424
1425	wmb();
1426	ace_set_txprd(regs, ap, value: 0);
1427	writel(val: 0, addr: &regs->RxRetCsm);
1428
1429	/*
1430	* Enable DMA engine now.
1431	* If we do this sooner, Mckinley box pukes.
1432	* I assume it's because Tigon II DMA engine wants to check
1433	* *something* even before the CPU is started.
1434	*/
1435	writel(val: 1, addr: &regs->AssistState); /* enable DMA */
1436
1437	/*
1438	* Start the NIC CPU
1439	*/
1440	writel(readl(addr: &regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), addr: &regs->CpuCtrl);
1441	readl(addr: &regs->CpuCtrl);
1442
1443	/*
1444	* Wait for the firmware to spin up - max 3 seconds.
1445	*/
1446	myjif = jiffies + 3 * HZ;
1447	while (time_before(jiffies, myjif) && !ap->fw_running)
1448	cpu_relax();
1449
1450	if (!ap->fw_running) {
1451	printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1452
1453	ace_dump_trace(ap);
1454	writel(readl(addr: &regs->CpuCtrl) | CPU_HALT, addr: &regs->CpuCtrl);
1455	readl(addr: &regs->CpuCtrl);
1456
1457	/* aman@sgi.com - account for badly behaving firmware/NIC:
1458	* - have observed that the NIC may continue to generate
1459	* interrupts for some reason; attempt to stop it - halt
1460	* second CPU for Tigon II cards, and also clear Mb0
1461	* - if we're a module, we'll fail to load if this was
1462	* the only GbE card in the system => if the kernel does
1463	* see an interrupt from the NIC, code to handle it is
1464	* gone and OOps! - so free_irq also
1465	*/
1466	if (ap->version >= 2)
1467	writel(readl(addr: &regs->CpuBCtrl) | CPU_HALT,
1468	addr: &regs->CpuBCtrl);
1469	writel(val: 0, addr: &regs->Mb0Lo);
1470	readl(addr: &regs->Mb0Lo);
1471
1472	ecode = -EBUSY;
1473	goto init_error;
1474	}
1475
1476	/*
1477	* We load the ring here as there seem to be no way to tell the
1478	* firmware to wipe the ring without re-initializing it.
1479	*/
1480	if (!test_and_set_bit(nr: 0, addr: &ap->std_refill_busy))
1481	ace_load_std_rx_ring(dev, RX_RING_SIZE);
1482	else
1483	printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1484	ap->name);
1485	if (ap->version >= 2) {
1486	if (!test_and_set_bit(nr: 0, addr: &ap->mini_refill_busy))
1487	ace_load_mini_rx_ring(dev, RX_MINI_SIZE);
1488	else
1489	printk(KERN_ERR "%s: Someone is busy refilling "
1490	"the RX mini ring\n", ap->name);
1491	}
1492	return 0;
1493
1494	init_error:
1495	ace_init_cleanup(dev);
1496	return ecode;
1497	}
1498
1499
1500	static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1501	{
1502	struct ace_private *ap = netdev_priv(dev);
1503	struct ace_regs __iomem *regs = ap->regs;
1504	int board_idx = ap->board_idx;
1505
1506	if (board_idx >= 0) {
1507	if (!jumbo) {
1508	if (!tx_coal_tick[board_idx])
1509	writel(DEF_TX_COAL, addr: &regs->TuneTxCoalTicks);
1510	if (!max_tx_desc[board_idx])
1511	writel(DEF_TX_MAX_DESC, addr: &regs->TuneMaxTxDesc);
1512	if (!rx_coal_tick[board_idx])
1513	writel(DEF_RX_COAL, addr: &regs->TuneRxCoalTicks);
1514	if (!max_rx_desc[board_idx])
1515	writel(DEF_RX_MAX_DESC, addr: &regs->TuneMaxRxDesc);
1516	if (!tx_ratio[board_idx])
1517	writel(DEF_TX_RATIO, addr: &regs->TxBufRat);
1518	} else {
1519	if (!tx_coal_tick[board_idx])
1520	writel(DEF_JUMBO_TX_COAL,
1521	addr: &regs->TuneTxCoalTicks);
1522	if (!max_tx_desc[board_idx])
1523	writel(DEF_JUMBO_TX_MAX_DESC,
1524	addr: &regs->TuneMaxTxDesc);
1525	if (!rx_coal_tick[board_idx])
1526	writel(DEF_JUMBO_RX_COAL,
1527	addr: &regs->TuneRxCoalTicks);
1528	if (!max_rx_desc[board_idx])
1529	writel(DEF_JUMBO_RX_MAX_DESC,
1530	addr: &regs->TuneMaxRxDesc);
1531	if (!tx_ratio[board_idx])
1532	writel(DEF_JUMBO_TX_RATIO, addr: &regs->TxBufRat);
1533	}
1534	}
1535	}
1536
1537
1538	static void ace_watchdog(struct net_device *data, unsigned int txqueue)
1539	{
1540	struct net_device *dev = data;
1541	struct ace_private *ap = netdev_priv(dev);
1542	struct ace_regs __iomem *regs = ap->regs;
1543
1544	/*
1545	* We haven't received a stats update event for more than 2.5
1546	* seconds and there is data in the transmit queue, thus we
1547	* assume the card is stuck.
1548	*/
1549	if (*ap->tx_csm != ap->tx_ret_csm) {
1550	printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1551	dev->name, (unsigned int)readl(&regs->HostCtrl));
1552	/* This can happen due to ieee flow control. */
1553	} else {
1554	printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1555	dev->name);
1556	#if 0
1557	netif_wake_queue(dev);
1558	#endif
1559	}
1560	}
1561
1562
1563	static void ace_tasklet(struct tasklet_struct *t)
1564	{
1565	struct ace_private *ap = from_tasklet(ap, t, ace_tasklet);
1566	struct net_device *dev = ap->ndev;
1567	int cur_size;
1568
1569	cur_size = atomic_read(v: &ap->cur_rx_bufs);
1570	if ((cur_size < RX_LOW_STD_THRES) &&
1571	!test_and_set_bit(nr: 0, addr: &ap->std_refill_busy)) {
1572	#ifdef DEBUG
1573	printk("refilling buffers (current %i)\n", cur_size);
1574	#endif
1575	ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size);
1576	}
1577
1578	if (ap->version >= 2) {
1579	cur_size = atomic_read(v: &ap->cur_mini_bufs);
1580	if ((cur_size < RX_LOW_MINI_THRES) &&
1581	!test_and_set_bit(nr: 0, addr: &ap->mini_refill_busy)) {
1582	#ifdef DEBUG
1583	printk("refilling mini buffers (current %i)\n",
1584	cur_size);
1585	#endif
1586	ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size);
1587	}
1588	}
1589
1590	cur_size = atomic_read(v: &ap->cur_jumbo_bufs);
1591	if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1592	!test_and_set_bit(nr: 0, addr: &ap->jumbo_refill_busy)) {
1593	#ifdef DEBUG
1594	printk("refilling jumbo buffers (current %i)\n", cur_size);
1595	#endif
1596	ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);
1597	}
1598	ap->tasklet_pending = 0;
1599	}
1600
1601
1602	/*
1603	* Copy the contents of the NIC's trace buffer to kernel memory.
1604	*/
1605	static void ace_dump_trace(struct ace_private *ap)
1606	{
1607	#if 0
1608	if (!ap->trace_buf)
1609	if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1610	return;
1611	#endif
1612	}
1613
1614
1615	/*
1616	* Load the standard rx ring.
1617	*
1618	* Loading rings is safe without holding the spin lock since this is
1619	* done only before the device is enabled, thus no interrupts are
1620	* generated and by the interrupt handler/tasklet handler.
1621	*/
1622	static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)
1623	{
1624	struct ace_private *ap = netdev_priv(dev);
1625	struct ace_regs __iomem *regs = ap->regs;
1626	short i, idx;
1627
1628
1629	prefetchw(x: &ap->cur_rx_bufs);
1630
1631	idx = ap->rx_std_skbprd;
1632
1633	for (i = 0; i < nr_bufs; i++) {
1634	struct sk_buff *skb;
1635	struct rx_desc *rd;
1636	dma_addr_t mapping;
1637
1638	skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE);
1639	if (!skb)
1640	break;
1641
1642	mapping = dma_map_page(&ap->pdev->dev,
1643	virt_to_page(skb->data),
1644	offset_in_page(skb->data),
1645	ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
1646	ap->skb->rx_std_skbuff[idx].skb = skb;
1647	dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1648	mapping, mapping);
1649
1650	rd = &ap->rx_std_ring[idx];
1651	set_aceaddr(aa: &rd->addr, addr: mapping);
1652	rd->size = ACE_STD_BUFSIZE;
1653	rd->idx = idx;
1654	idx = (idx + 1) % RX_STD_RING_ENTRIES;
1655	}
1656
1657	if (!i)
1658	goto error_out;
1659
1660	atomic_add(i, v: &ap->cur_rx_bufs);
1661	ap->rx_std_skbprd = idx;
1662
1663	if (ACE_IS_TIGON_I(ap)) {
1664	struct cmd cmd;
1665	cmd.evt = C_SET_RX_PRD_IDX;
1666	cmd.code = 0;
1667	cmd.idx = ap->rx_std_skbprd;
1668	ace_issue_cmd(regs, cmd: &cmd);
1669	} else {
1670	writel(val: idx, addr: &regs->RxStdPrd);
1671	wmb();
1672	}
1673
1674	out:
1675	clear_bit(nr: 0, addr: &ap->std_refill_busy);
1676	return;
1677
1678	error_out:
1679	printk(KERN_INFO "Out of memory when allocating "
1680	"standard receive buffers\n");
1681	goto out;
1682	}
1683
1684
1685	static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)
1686	{
1687	struct ace_private *ap = netdev_priv(dev);
1688	struct ace_regs __iomem *regs = ap->regs;
1689	short i, idx;
1690
1691	prefetchw(x: &ap->cur_mini_bufs);
1692
1693	idx = ap->rx_mini_skbprd;
1694	for (i = 0; i < nr_bufs; i++) {
1695	struct sk_buff *skb;
1696	struct rx_desc *rd;
1697	dma_addr_t mapping;
1698
1699	skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE);
1700	if (!skb)
1701	break;
1702
1703	mapping = dma_map_page(&ap->pdev->dev,
1704	virt_to_page(skb->data),
1705	offset_in_page(skb->data),
1706	ACE_MINI_BUFSIZE, DMA_FROM_DEVICE);
1707	ap->skb->rx_mini_skbuff[idx].skb = skb;
1708	dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1709	mapping, mapping);
1710
1711	rd = &ap->rx_mini_ring[idx];
1712	set_aceaddr(aa: &rd->addr, addr: mapping);
1713	rd->size = ACE_MINI_BUFSIZE;
1714	rd->idx = idx;
1715	idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1716	}
1717
1718	if (!i)
1719	goto error_out;
1720
1721	atomic_add(i, v: &ap->cur_mini_bufs);
1722
1723	ap->rx_mini_skbprd = idx;
1724
1725	writel(val: idx, addr: &regs->RxMiniPrd);
1726	wmb();
1727
1728	out:
1729	clear_bit(nr: 0, addr: &ap->mini_refill_busy);
1730	return;
1731	error_out:
1732	printk(KERN_INFO "Out of memory when allocating "
1733	"mini receive buffers\n");
1734	goto out;
1735	}
1736
1737
1738	/*
1739	* Load the jumbo rx ring, this may happen at any time if the MTU
1740	* is changed to a value > 1500.
1741	*/
1742	static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)
1743	{
1744	struct ace_private *ap = netdev_priv(dev);
1745	struct ace_regs __iomem *regs = ap->regs;
1746	short i, idx;
1747
1748	idx = ap->rx_jumbo_skbprd;
1749
1750	for (i = 0; i < nr_bufs; i++) {
1751	struct sk_buff *skb;
1752	struct rx_desc *rd;
1753	dma_addr_t mapping;
1754
1755	skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE);
1756	if (!skb)
1757	break;
1758
1759	mapping = dma_map_page(&ap->pdev->dev,
1760	virt_to_page(skb->data),
1761	offset_in_page(skb->data),
1762	ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
1763	ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1764	dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1765	mapping, mapping);
1766
1767	rd = &ap->rx_jumbo_ring[idx];
1768	set_aceaddr(aa: &rd->addr, addr: mapping);
1769	rd->size = ACE_JUMBO_BUFSIZE;
1770	rd->idx = idx;
1771	idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1772	}
1773
1774	if (!i)
1775	goto error_out;
1776
1777	atomic_add(i, v: &ap->cur_jumbo_bufs);
1778	ap->rx_jumbo_skbprd = idx;
1779
1780	if (ACE_IS_TIGON_I(ap)) {
1781	struct cmd cmd;
1782	cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1783	cmd.code = 0;
1784	cmd.idx = ap->rx_jumbo_skbprd;
1785	ace_issue_cmd(regs, cmd: &cmd);
1786	} else {
1787	writel(val: idx, addr: &regs->RxJumboPrd);
1788	wmb();
1789	}
1790
1791	out:
1792	clear_bit(nr: 0, addr: &ap->jumbo_refill_busy);
1793	return;
1794	error_out:
1795	if (net_ratelimit())
1796	printk(KERN_INFO "Out of memory when allocating "
1797	"jumbo receive buffers\n");
1798	goto out;
1799	}
1800
1801
1802	/*
1803	* All events are considered to be slow (RX/TX ints do not generate
1804	* events) and are handled here, outside the main interrupt handler,
1805	* to reduce the size of the handler.
1806	*/
1807	static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1808	{
1809	struct ace_private *ap;
1810
1811	ap = netdev_priv(dev);
1812
1813	while (evtcsm != evtprd) {
1814	switch (ap->evt_ring[evtcsm].evt) {
1815	case E_FW_RUNNING:
1816	printk(KERN_INFO "%s: Firmware up and running\n",
1817	ap->name);
1818	ap->fw_running = 1;
1819	wmb();
1820	break;
1821	case E_STATS_UPDATED:
1822	break;
1823	case E_LNK_STATE:
1824	{
1825	u16 code = ap->evt_ring[evtcsm].code;
1826	switch (code) {
1827	case E_C_LINK_UP:
1828	{
1829	u32 state = readl(addr: &ap->regs->GigLnkState);
1830	printk(KERN_WARNING "%s: Optical link UP "
1831	"(%s Duplex, Flow Control: %s%s)\n",
1832	ap->name,
1833	state & LNK_FULL_DUPLEX ? "Full":"Half",
1834	state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1835	state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1836	break;
1837	}
1838	case E_C_LINK_DOWN:
1839	printk(KERN_WARNING "%s: Optical link DOWN\n",
1840	ap->name);
1841	break;
1842	case E_C_LINK_10_100:
1843	printk(KERN_WARNING "%s: 10/100BaseT link "
1844	"UP\n", ap->name);
1845	break;
1846	default:
1847	printk(KERN_ERR "%s: Unknown optical link "
1848	"state %02x\n", ap->name, code);
1849	}
1850	break;
1851	}
1852	case E_ERROR:
1853	switch(ap->evt_ring[evtcsm].code) {
1854	case E_C_ERR_INVAL_CMD:
1855	printk(KERN_ERR "%s: invalid command error\n",
1856	ap->name);
1857	break;
1858	case E_C_ERR_UNIMP_CMD:
1859	printk(KERN_ERR "%s: unimplemented command "
1860	"error\n", ap->name);
1861	break;
1862	case E_C_ERR_BAD_CFG:
1863	printk(KERN_ERR "%s: bad config error\n",
1864	ap->name);
1865	break;
1866	default:
1867	printk(KERN_ERR "%s: unknown error %02x\n",
1868	ap->name, ap->evt_ring[evtcsm].code);
1869	}
1870	break;
1871	case E_RESET_JUMBO_RNG:
1872	{
1873	int i;
1874	for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1875	if (ap->skb->rx_jumbo_skbuff[i].skb) {
1876	ap->rx_jumbo_ring[i].size = 0;
1877	set_aceaddr(aa: &ap->rx_jumbo_ring[i].addr, addr: 0);
1878	dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1879	ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1880	}
1881	}
1882
1883	if (ACE_IS_TIGON_I(ap)) {
1884	struct cmd cmd;
1885	cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1886	cmd.code = 0;
1887	cmd.idx = 0;
1888	ace_issue_cmd(regs: ap->regs, cmd: &cmd);
1889	} else {
1890	writel(val: 0, addr: &((ap->regs)->RxJumboPrd));
1891	wmb();
1892	}
1893
1894	ap->jumbo = 0;
1895	ap->rx_jumbo_skbprd = 0;
1896	printk(KERN_INFO "%s: Jumbo ring flushed\n",
1897	ap->name);
1898	clear_bit(nr: 0, addr: &ap->jumbo_refill_busy);
1899	break;
1900	}
1901	default:
1902	printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1903	ap->name, ap->evt_ring[evtcsm].evt);
1904	}
1905	evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1906	}
1907
1908	return evtcsm;
1909	}
1910
1911
1912	static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1913	{
1914	struct ace_private *ap = netdev_priv(dev);
1915	u32 idx;
1916	int mini_count = 0, std_count = 0;
1917
1918	idx = rxretcsm;
1919
1920	prefetchw(x: &ap->cur_rx_bufs);
1921	prefetchw(x: &ap->cur_mini_bufs);
1922
1923	while (idx != rxretprd) {
1924	struct ring_info *rip;
1925	struct sk_buff *skb;
1926	struct rx_desc *retdesc;
1927	u32 skbidx;
1928	int bd_flags, desc_type, mapsize;
1929	u16 csum;
1930
1931
1932	/* make sure the rx descriptor isn't read before rxretprd */
1933	if (idx == rxretcsm)
1934	rmb();
1935
1936	retdesc = &ap->rx_return_ring[idx];
1937	skbidx = retdesc->idx;
1938	bd_flags = retdesc->flags;
1939	desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1940
1941	switch(desc_type) {
1942	/*
1943	* Normal frames do not have any flags set
1944	*
1945	* Mini and normal frames arrive frequently,
1946	* so use a local counter to avoid doing
1947	* atomic operations for each packet arriving.
1948	*/
1949	case 0:
1950	rip = &ap->skb->rx_std_skbuff[skbidx];
1951	mapsize = ACE_STD_BUFSIZE;
1952	std_count++;
1953	break;
1954	case BD_FLG_JUMBO:
1955	rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1956	mapsize = ACE_JUMBO_BUFSIZE;
1957	atomic_dec(v: &ap->cur_jumbo_bufs);
1958	break;
1959	case BD_FLG_MINI:
1960	rip = &ap->skb->rx_mini_skbuff[skbidx];
1961	mapsize = ACE_MINI_BUFSIZE;
1962	mini_count++;
1963	break;
1964	default:
1965	printk(KERN_INFO "%s: unknown frame type (0x%02x) "
1966	"returned by NIC\n", dev->name,
1967	retdesc->flags);
1968	goto error;
1969	}
1970
1971	skb = rip->skb;
1972	rip->skb = NULL;
1973	dma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping),
1974	mapsize, DMA_FROM_DEVICE);
1975	skb_put(skb, len: retdesc->size);
1976
1977	/*
1978	* Fly baby, fly!
1979	*/
1980	csum = retdesc->tcp_udp_csum;
1981
1982	skb->protocol = eth_type_trans(skb, dev);
1983
1984	/*
1985	* Instead of forcing the poor tigon mips cpu to calculate
1986	* pseudo hdr checksum, we do this ourselves.
1987	*/
1988	if (bd_flags & BD_FLG_TCP_UDP_SUM) {
1989	skb->csum = htons(csum);
1990	skb->ip_summed = CHECKSUM_COMPLETE;
1991	} else {
1992	skb_checksum_none_assert(skb);
1993	}
1994
1995	/* send it up */
1996	if ((bd_flags & BD_FLG_VLAN_TAG))
1997	__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci: retdesc->vlan);
1998	netif_rx(skb);
1999
2000	dev->stats.rx_packets++;
2001	dev->stats.rx_bytes += retdesc->size;
2002
2003	idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2004	}
2005
2006	atomic_sub(i: std_count, v: &ap->cur_rx_bufs);
2007	if (!ACE_IS_TIGON_I(ap))
2008	atomic_sub(i: mini_count, v: &ap->cur_mini_bufs);
2009
2010	out:
2011	/*
2012	* According to the documentation RxRetCsm is obsolete with
2013	* the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2014	*/
2015	if (ACE_IS_TIGON_I(ap)) {
2016	writel(val: idx, addr: &ap->regs->RxRetCsm);
2017	}
2018	ap->cur_rx = idx;
2019
2020	return;
2021	error:
2022	idx = rxretprd;
2023	goto out;
2024	}
2025
2026
2027	static inline void ace_tx_int(struct net_device *dev,
2028	u32 txcsm, u32 idx)
2029	{
2030	struct ace_private *ap = netdev_priv(dev);
2031
2032	do {
2033	struct sk_buff *skb;
2034	struct tx_ring_info *info;
2035
2036	info = ap->skb->tx_skbuff + idx;
2037	skb = info->skb;
2038
2039	if (dma_unmap_len(info, maplen)) {
2040	dma_unmap_page(&ap->pdev->dev,
2041	dma_unmap_addr(info, mapping),
2042	dma_unmap_len(info, maplen),
2043	DMA_TO_DEVICE);
2044	dma_unmap_len_set(info, maplen, 0);
2045	}
2046
2047	if (skb) {
2048	dev->stats.tx_packets++;
2049	dev->stats.tx_bytes += skb->len;
2050	dev_consume_skb_irq(skb);
2051	info->skb = NULL;
2052	}
2053
2054	idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2055	} while (idx != txcsm);
2056
2057	if (netif_queue_stopped(dev))
2058	netif_wake_queue(dev);
2059
2060	wmb();
2061	ap->tx_ret_csm = txcsm;
2062
2063	/* So... tx_ret_csm is advanced _after_ check for device wakeup.
2064	*
2065	* We could try to make it before. In this case we would get
2066	* the following race condition: hard_start_xmit on other cpu
2067	* enters after we advanced tx_ret_csm and fills space,
2068	* which we have just freed, so that we make illegal device wakeup.
2069	* There is no good way to workaround this (at entry
2070	* to ace_start_xmit detects this condition and prevents
2071	* ring corruption, but it is not a good workaround.)
2072	*
2073	* When tx_ret_csm is advanced after, we wake up device _only_
2074	* if we really have some space in ring (though the core doing
2075	* hard_start_xmit can see full ring for some period and has to
2076	* synchronize.) Superb.
2077	* BUT! We get another subtle race condition. hard_start_xmit
2078	* may think that ring is full between wakeup and advancing
2079	* tx_ret_csm and will stop device instantly! It is not so bad.
2080	* We are guaranteed that there is something in ring, so that
2081	* the next irq will resume transmission. To speedup this we could
2082	* mark descriptor, which closes ring with BD_FLG_COAL_NOW
2083	* (see ace_start_xmit).
2084	*
2085	* Well, this dilemma exists in all lock-free devices.
2086	* We, following scheme used in drivers by Donald Becker,
2087	* select the least dangerous.
2088	* --ANK
2089	*/
2090	}
2091
2092
2093	static irqreturn_t ace_interrupt(int irq, void *dev_id)
2094	{
2095	struct net_device *dev = (struct net_device *)dev_id;
2096	struct ace_private *ap = netdev_priv(dev);
2097	struct ace_regs __iomem *regs = ap->regs;
2098	u32 idx;
2099	u32 txcsm, rxretcsm, rxretprd;
2100	u32 evtcsm, evtprd;
2101
2102	/*
2103	* In case of PCI shared interrupts or spurious interrupts,
2104	* we want to make sure it is actually our interrupt before
2105	* spending any time in here.
2106	*/
2107	if (!(readl(addr: &regs->HostCtrl) & IN_INT))
2108	return IRQ_NONE;
2109
2110	/*
2111	* ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2112	* which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2113	* writel(0, &regs->Mb0Lo).
2114	*
2115	* "IRQ avoidance" recommended in docs applies to IRQs served
2116	* threads and it is wrong even for that case.
2117	*/
2118	writel(val: 0, addr: &regs->Mb0Lo);
2119	readl(addr: &regs->Mb0Lo);
2120
2121	/*
2122	* There is no conflict between transmit handling in
2123	* start_xmit and receive processing, thus there is no reason
2124	* to take a spin lock for RX handling. Wait until we start
2125	* working on the other stuff - hey we don't need a spin lock
2126	* anymore.
2127	*/
2128	rxretprd = *ap->rx_ret_prd;
2129	rxretcsm = ap->cur_rx;
2130
2131	if (rxretprd != rxretcsm)
2132	ace_rx_int(dev, rxretprd, rxretcsm);
2133
2134	txcsm = *ap->tx_csm;
2135	idx = ap->tx_ret_csm;
2136
2137	if (txcsm != idx) {
2138	/*
2139	* If each skb takes only one descriptor this check degenerates
2140	* to identity, because new space has just been opened.
2141	* But if skbs are fragmented we must check that this index
2142	* update releases enough of space, otherwise we just
2143	* wait for device to make more work.
2144	*/
2145	if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2146	ace_tx_int(dev, txcsm, idx);
2147	}
2148
2149	evtcsm = readl(addr: &regs->EvtCsm);
2150	evtprd = *ap->evt_prd;
2151
2152	if (evtcsm != evtprd) {
2153	evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2154	writel(val: evtcsm, addr: &regs->EvtCsm);
2155	}
2156
2157	/*
2158	* This has to go last in the interrupt handler and run with
2159	* the spin lock released ... what lock?
2160	*/
2161	if (netif_running(dev)) {
2162	int cur_size;
2163	int run_tasklet = 0;
2164
2165	cur_size = atomic_read(v: &ap->cur_rx_bufs);
2166	if (cur_size < RX_LOW_STD_THRES) {
2167	if ((cur_size < RX_PANIC_STD_THRES) &&
2168	!test_and_set_bit(nr: 0, addr: &ap->std_refill_busy)) {
2169	#ifdef DEBUG
2170	printk("low on std buffers %i\n", cur_size);
2171	#endif
2172	ace_load_std_rx_ring(dev,
2173	RX_RING_SIZE - cur_size);
2174	} else
2175	run_tasklet = 1;
2176	}
2177
2178	if (!ACE_IS_TIGON_I(ap)) {
2179	cur_size = atomic_read(v: &ap->cur_mini_bufs);
2180	if (cur_size < RX_LOW_MINI_THRES) {
2181	if ((cur_size < RX_PANIC_MINI_THRES) &&
2182	!test_and_set_bit(nr: 0,
2183	addr: &ap->mini_refill_busy)) {
2184	#ifdef DEBUG
2185	printk("low on mini buffers %i\n",
2186	cur_size);
2187	#endif
2188	ace_load_mini_rx_ring(dev,
2189	RX_MINI_SIZE - cur_size);
2190	} else
2191	run_tasklet = 1;
2192	}
2193	}
2194
2195	if (ap->jumbo) {
2196	cur_size = atomic_read(v: &ap->cur_jumbo_bufs);
2197	if (cur_size < RX_LOW_JUMBO_THRES) {
2198	if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2199	!test_and_set_bit(nr: 0,
2200	addr: &ap->jumbo_refill_busy)){
2201	#ifdef DEBUG
2202	printk("low on jumbo buffers %i\n",
2203	cur_size);
2204	#endif
2205	ace_load_jumbo_rx_ring(dev,
2206	RX_JUMBO_SIZE - cur_size);
2207	} else
2208	run_tasklet = 1;
2209	}
2210	}
2211	if (run_tasklet && !ap->tasklet_pending) {
2212	ap->tasklet_pending = 1;
2213	tasklet_schedule(t: &ap->ace_tasklet);
2214	}
2215	}
2216
2217	return IRQ_HANDLED;
2218	}
2219
2220	static int ace_open(struct net_device *dev)
2221	{
2222	struct ace_private *ap = netdev_priv(dev);
2223	struct ace_regs __iomem *regs = ap->regs;
2224	struct cmd cmd;
2225
2226	if (!(ap->fw_running)) {
2227	printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2228	return -EBUSY;
2229	}
2230
2231	writel(val: dev->mtu + ETH_HLEN + 4, addr: &regs->IfMtu);
2232
2233	cmd.evt = C_CLEAR_STATS;
2234	cmd.code = 0;
2235	cmd.idx = 0;
2236	ace_issue_cmd(regs, cmd: &cmd);
2237
2238	cmd.evt = C_HOST_STATE;
2239	cmd.code = C_C_STACK_UP;
2240	cmd.idx = 0;
2241	ace_issue_cmd(regs, cmd: &cmd);
2242
2243	if (ap->jumbo &&
2244	!test_and_set_bit(nr: 0, addr: &ap->jumbo_refill_busy))
2245	ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2246
2247	if (dev->flags & IFF_PROMISC) {
2248	cmd.evt = C_SET_PROMISC_MODE;
2249	cmd.code = C_C_PROMISC_ENABLE;
2250	cmd.idx = 0;
2251	ace_issue_cmd(regs, cmd: &cmd);
2252
2253	ap->promisc = 1;
2254	}else
2255	ap->promisc = 0;
2256	ap->mcast_all = 0;
2257
2258	#if 0
2259	cmd.evt = C_LNK_NEGOTIATION;
2260	cmd.code = 0;
2261	cmd.idx = 0;
2262	ace_issue_cmd(regs, &cmd);
2263	#endif
2264
2265	netif_start_queue(dev);
2266
2267	/*
2268	* Setup the bottom half rx ring refill handler
2269	*/
2270	tasklet_setup(t: &ap->ace_tasklet, callback: ace_tasklet);
2271	return 0;
2272	}
2273
2274
2275	static int ace_close(struct net_device *dev)
2276	{
2277	struct ace_private *ap = netdev_priv(dev);
2278	struct ace_regs __iomem *regs = ap->regs;
2279	struct cmd cmd;
2280	unsigned long flags;
2281	short i;
2282
2283	/*
2284	* Without (or before) releasing irq and stopping hardware, this
2285	* is an absolute non-sense, by the way. It will be reset instantly
2286	* by the first irq.
2287	*/
2288	netif_stop_queue(dev);
2289
2290
2291	if (ap->promisc) {
2292	cmd.evt = C_SET_PROMISC_MODE;
2293	cmd.code = C_C_PROMISC_DISABLE;
2294	cmd.idx = 0;
2295	ace_issue_cmd(regs, cmd: &cmd);
2296	ap->promisc = 0;
2297	}
2298
2299	cmd.evt = C_HOST_STATE;
2300	cmd.code = C_C_STACK_DOWN;
2301	cmd.idx = 0;
2302	ace_issue_cmd(regs, cmd: &cmd);
2303
2304	tasklet_kill(t: &ap->ace_tasklet);
2305
2306	/*
2307	* Make sure one CPU is not processing packets while
2308	* buffers are being released by another.
2309	*/
2310
2311	local_irq_save(flags);
2312	ace_mask_irq(dev);
2313
2314	for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2315	struct sk_buff *skb;
2316	struct tx_ring_info *info;
2317
2318	info = ap->skb->tx_skbuff + i;
2319	skb = info->skb;
2320
2321	if (dma_unmap_len(info, maplen)) {
2322	if (ACE_IS_TIGON_I(ap)) {
2323	/* NB: TIGON_1 is special, tx_ring is in io space */
2324	struct tx_desc __iomem *tx;
2325	tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
2326	writel(val: 0, addr: &tx->addr.addrhi);
2327	writel(val: 0, addr: &tx->addr.addrlo);
2328	writel(val: 0, addr: &tx->flagsize);
2329	} else
2330	memset(ap->tx_ring + i, 0,
2331	sizeof(struct tx_desc));
2332	dma_unmap_page(&ap->pdev->dev,
2333	dma_unmap_addr(info, mapping),
2334	dma_unmap_len(info, maplen),
2335	DMA_TO_DEVICE);
2336	dma_unmap_len_set(info, maplen, 0);
2337	}
2338	if (skb) {
2339	dev_kfree_skb(skb);
2340	info->skb = NULL;
2341	}
2342	}
2343
2344	if (ap->jumbo) {
2345	cmd.evt = C_RESET_JUMBO_RNG;
2346	cmd.code = 0;
2347	cmd.idx = 0;
2348	ace_issue_cmd(regs, cmd: &cmd);
2349	}
2350
2351	ace_unmask_irq(dev);
2352	local_irq_restore(flags);
2353
2354	return 0;
2355	}
2356
2357
2358	static inline dma_addr_t
2359	ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2360	struct sk_buff *tail, u32 idx)
2361	{
2362	dma_addr_t mapping;
2363	struct tx_ring_info *info;
2364
2365	mapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data),
2366	offset_in_page(skb->data), skb->len,
2367	DMA_TO_DEVICE);
2368
2369	info = ap->skb->tx_skbuff + idx;
2370	info->skb = tail;
2371	dma_unmap_addr_set(info, mapping, mapping);
2372	dma_unmap_len_set(info, maplen, skb->len);
2373	return mapping;
2374	}
2375
2376
2377	static inline void
2378	ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2379	u32 flagsize, u32 vlan_tag)
2380	{
2381	#if !USE_TX_COAL_NOW
2382	flagsize &= ~BD_FLG_COAL_NOW;
2383	#endif
2384
2385	if (ACE_IS_TIGON_I(ap)) {
2386	struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
2387	writel(val: addr >> 32, addr: &io->addr.addrhi);
2388	writel(val: addr & 0xffffffff, addr: &io->addr.addrlo);
2389	writel(val: flagsize, addr: &io->flagsize);
2390	writel(val: vlan_tag, addr: &io->vlanres);
2391	} else {
2392	desc->addr.addrhi = addr >> 32;
2393	desc->addr.addrlo = addr;
2394	desc->flagsize = flagsize;
2395	desc->vlanres = vlan_tag;
2396	}
2397	}
2398
2399
2400	static netdev_tx_t ace_start_xmit(struct sk_buff *skb,
2401	struct net_device *dev)
2402	{
2403	struct ace_private *ap = netdev_priv(dev);
2404	struct ace_regs __iomem *regs = ap->regs;
2405	struct tx_desc *desc;
2406	u32 idx, flagsize;
2407	unsigned long maxjiff = jiffies + 3*HZ;
2408
2409	restart:
2410	idx = ap->tx_prd;
2411
2412	if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2413	goto overflow;
2414
2415	if (!skb_shinfo(skb)->nr_frags) {
2416	dma_addr_t mapping;
2417	u32 vlan_tag = 0;
2418
2419	mapping = ace_map_tx_skb(ap, skb, tail: skb, idx);
2420	flagsize = (skb->len << 16) | (BD_FLG_END);
2421	if (skb->ip_summed == CHECKSUM_PARTIAL)
2422	flagsize |= BD_FLG_TCP_UDP_SUM;
2423	if (skb_vlan_tag_present(skb)) {
2424	flagsize |= BD_FLG_VLAN_TAG;
2425	vlan_tag = skb_vlan_tag_get(skb);
2426	}
2427	desc = ap->tx_ring + idx;
2428	idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2429
2430	/* Look at ace_tx_int for explanations. */
2431	if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2432	flagsize |= BD_FLG_COAL_NOW;
2433
2434	ace_load_tx_bd(ap, desc, addr: mapping, flagsize, vlan_tag);
2435	} else {
2436	dma_addr_t mapping;
2437	u32 vlan_tag = 0;
2438	int i;
2439
2440	mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2441	flagsize = (skb_headlen(skb) << 16);
2442	if (skb->ip_summed == CHECKSUM_PARTIAL)
2443	flagsize |= BD_FLG_TCP_UDP_SUM;
2444	if (skb_vlan_tag_present(skb)) {
2445	flagsize |= BD_FLG_VLAN_TAG;
2446	vlan_tag = skb_vlan_tag_get(skb);
2447	}
2448
2449	ace_load_tx_bd(ap, desc: ap->tx_ring + idx, addr: mapping, flagsize, vlan_tag);
2450
2451	idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2452
2453	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2454	const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2455	struct tx_ring_info *info;
2456
2457	info = ap->skb->tx_skbuff + idx;
2458	desc = ap->tx_ring + idx;
2459
2460	mapping = skb_frag_dma_map(dev: &ap->pdev->dev, frag, offset: 0,
2461	size: skb_frag_size(frag),
2462	dir: DMA_TO_DEVICE);
2463
2464	flagsize = skb_frag_size(frag) << 16;
2465	if (skb->ip_summed == CHECKSUM_PARTIAL)
2466	flagsize |= BD_FLG_TCP_UDP_SUM;
2467	idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2468
2469	if (i == skb_shinfo(skb)->nr_frags - 1) {
2470	flagsize |= BD_FLG_END;
2471	if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2472	flagsize |= BD_FLG_COAL_NOW;
2473
2474	/*
2475	* Only the last fragment frees
2476	* the skb!
2477	*/
2478	info->skb = skb;
2479	} else {
2480	info->skb = NULL;
2481	}
2482	dma_unmap_addr_set(info, mapping, mapping);
2483	dma_unmap_len_set(info, maplen, skb_frag_size(frag));
2484	ace_load_tx_bd(ap, desc, addr: mapping, flagsize, vlan_tag);
2485	}
2486	}
2487
2488	wmb();
2489	ap->tx_prd = idx;
2490	ace_set_txprd(regs, ap, value: idx);
2491
2492	if (flagsize & BD_FLG_COAL_NOW) {
2493	netif_stop_queue(dev);
2494
2495	/*
2496	* A TX-descriptor producer (an IRQ) might have gotten
2497	* between, making the ring free again. Since xmit is
2498	* serialized, this is the only situation we have to
2499	* re-test.
2500	*/
2501	if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2502	netif_wake_queue(dev);
2503	}
2504
2505	return NETDEV_TX_OK;
2506
2507	overflow:
2508	/*
2509	* This race condition is unavoidable with lock-free drivers.
2510	* We wake up the queue _before_ tx_prd is advanced, so that we can
2511	* enter hard_start_xmit too early, while tx ring still looks closed.
2512	* This happens ~1-4 times per 100000 packets, so that we can allow
2513	* to loop syncing to other CPU. Probably, we need an additional
2514	* wmb() in ace_tx_intr as well.
2515	*
2516	* Note that this race is relieved by reserving one more entry
2517	* in tx ring than it is necessary (see original non-SG driver).
2518	* However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2519	* is already overkill.
2520	*
2521	* Alternative is to return with 1 not throttling queue. In this
2522	* case loop becomes longer, no more useful effects.
2523	*/
2524	if (time_before(jiffies, maxjiff)) {
2525	barrier();
2526	cpu_relax();
2527	goto restart;
2528	}
2529
2530	/* The ring is stuck full. */
2531	printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2532	return NETDEV_TX_BUSY;
2533	}
2534
2535
2536	static int ace_change_mtu(struct net_device *dev, int new_mtu)
2537	{
2538	struct ace_private *ap = netdev_priv(dev);
2539	struct ace_regs __iomem *regs = ap->regs;
2540
2541	writel(val: new_mtu + ETH_HLEN + 4, addr: &regs->IfMtu);
2542	dev->mtu = new_mtu;
2543
2544	if (new_mtu > ACE_STD_MTU) {
2545	if (!(ap->jumbo)) {
2546	printk(KERN_INFO "%s: Enabling Jumbo frame "
2547	"support\n", dev->name);
2548	ap->jumbo = 1;
2549	if (!test_and_set_bit(nr: 0, addr: &ap->jumbo_refill_busy))
2550	ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2551	ace_set_rxtx_parms(dev, jumbo: 1);
2552	}
2553	} else {
2554	while (test_and_set_bit(nr: 0, addr: &ap->jumbo_refill_busy));
2555	ace_sync_irq(dev->irq);
2556	ace_set_rxtx_parms(dev, jumbo: 0);
2557	if (ap->jumbo) {
2558	struct cmd cmd;
2559
2560	cmd.evt = C_RESET_JUMBO_RNG;
2561	cmd.code = 0;
2562	cmd.idx = 0;
2563	ace_issue_cmd(regs, cmd: &cmd);
2564	}
2565	}
2566
2567	return 0;
2568	}
2569
2570	static int ace_get_link_ksettings(struct net_device *dev,
2571	struct ethtool_link_ksettings *cmd)
2572	{
2573	struct ace_private *ap = netdev_priv(dev);
2574	struct ace_regs __iomem *regs = ap->regs;
2575	u32 link;
2576	u32 supported;
2577
2578	memset(cmd, 0, sizeof(struct ethtool_link_ksettings));
2579
2580	supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2581	SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2582	SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2583	SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2584
2585	cmd->base.port = PORT_FIBRE;
2586
2587	link = readl(addr: &regs->GigLnkState);
2588	if (link & LNK_1000MB) {
2589	cmd->base.speed = SPEED_1000;
2590	} else {
2591	link = readl(addr: &regs->FastLnkState);
2592	if (link & LNK_100MB)
2593	cmd->base.speed = SPEED_100;
2594	else if (link & LNK_10MB)
2595	cmd->base.speed = SPEED_10;
2596	else
2597	cmd->base.speed = 0;
2598	}
2599	if (link & LNK_FULL_DUPLEX)
2600	cmd->base.duplex = DUPLEX_FULL;
2601	else
2602	cmd->base.duplex = DUPLEX_HALF;
2603
2604	if (link & LNK_NEGOTIATE)
2605	cmd->base.autoneg = AUTONEG_ENABLE;
2606	else
2607	cmd->base.autoneg = AUTONEG_DISABLE;
2608
2609	#if 0
2610	/*
2611	* Current struct ethtool_cmd is insufficient
2612	*/
2613	ecmd->trace = readl(&regs->TuneTrace);
2614
2615	ecmd->txcoal = readl(&regs->TuneTxCoalTicks);
2616	ecmd->rxcoal = readl(&regs->TuneRxCoalTicks);
2617	#endif
2618
2619	ethtool_convert_legacy_u32_to_link_mode(dst: cmd->link_modes.supported,
2620	legacy_u32: supported);
2621
2622	return 0;
2623	}
2624
2625	static int ace_set_link_ksettings(struct net_device *dev,
2626	const struct ethtool_link_ksettings *cmd)
2627	{
2628	struct ace_private *ap = netdev_priv(dev);
2629	struct ace_regs __iomem *regs = ap->regs;
2630	u32 link, speed;
2631
2632	link = readl(addr: &regs->GigLnkState);
2633	if (link & LNK_1000MB)
2634	speed = SPEED_1000;
2635	else {
2636	link = readl(addr: &regs->FastLnkState);
2637	if (link & LNK_100MB)
2638	speed = SPEED_100;
2639	else if (link & LNK_10MB)
2640	speed = SPEED_10;
2641	else
2642	speed = SPEED_100;
2643	}
2644
2645	link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2646	LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2647	if (!ACE_IS_TIGON_I(ap))
2648	link |= LNK_TX_FLOW_CTL_Y;
2649	if (cmd->base.autoneg == AUTONEG_ENABLE)
2650	link |= LNK_NEGOTIATE;
2651	if (cmd->base.speed != speed) {
2652	link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2653	switch (cmd->base.speed) {
2654	case SPEED_1000:
2655	link |= LNK_1000MB;
2656	break;
2657	case SPEED_100:
2658	link |= LNK_100MB;
2659	break;
2660	case SPEED_10:
2661	link |= LNK_10MB;
2662	break;
2663	}
2664	}
2665
2666	if (cmd->base.duplex == DUPLEX_FULL)
2667	link |= LNK_FULL_DUPLEX;
2668
2669	if (link != ap->link) {
2670	struct cmd cmd;
2671	printk(KERN_INFO "%s: Renegotiating link state\n",
2672	dev->name);
2673
2674	ap->link = link;
2675	writel(val: link, addr: &regs->TuneLink);
2676	if (!ACE_IS_TIGON_I(ap))
2677	writel(val: link, addr: &regs->TuneFastLink);
2678	wmb();
2679
2680	cmd.evt = C_LNK_NEGOTIATION;
2681	cmd.code = 0;
2682	cmd.idx = 0;
2683	ace_issue_cmd(regs, cmd: &cmd);
2684	}
2685	return 0;
2686	}
2687
2688	static void ace_get_drvinfo(struct net_device *dev,
2689	struct ethtool_drvinfo *info)
2690	{
2691	struct ace_private *ap = netdev_priv(dev);
2692
2693	strscpy(p: info->driver, q: "acenic", size: sizeof(info->driver));
2694	snprintf(buf: info->fw_version, size: sizeof(info->version), fmt: "%i.%i.%i",
2695	ap->firmware_major, ap->firmware_minor, ap->firmware_fix);
2696
2697	if (ap->pdev)
2698	strscpy(p: info->bus_info, q: pci_name(pdev: ap->pdev),
2699	size: sizeof(info->bus_info));
2700
2701	}
2702
2703	/*
2704	* Set the hardware MAC address.
2705	*/
2706	static int ace_set_mac_addr(struct net_device *dev, void *p)
2707	{
2708	struct ace_private *ap = netdev_priv(dev);
2709	struct ace_regs __iomem *regs = ap->regs;
2710	struct sockaddr *addr=p;
2711	const u8 *da;
2712	struct cmd cmd;
2713
2714	if(netif_running(dev))
2715	return -EBUSY;
2716
2717	eth_hw_addr_set(dev, addr: addr->sa_data);
2718
2719	da = (const u8 *)dev->dev_addr;
2720
2721	writel(val: da[0] << 8 | da[1], addr: &regs->MacAddrHi);
2722	writel(val: (da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2723	addr: &regs->MacAddrLo);
2724
2725	cmd.evt = C_SET_MAC_ADDR;
2726	cmd.code = 0;
2727	cmd.idx = 0;
2728	ace_issue_cmd(regs, cmd: &cmd);
2729
2730	return 0;
2731	}
2732
2733
2734	static void ace_set_multicast_list(struct net_device *dev)
2735	{
2736	struct ace_private *ap = netdev_priv(dev);
2737	struct ace_regs __iomem *regs = ap->regs;
2738	struct cmd cmd;
2739
2740	if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2741	cmd.evt = C_SET_MULTICAST_MODE;
2742	cmd.code = C_C_MCAST_ENABLE;
2743	cmd.idx = 0;
2744	ace_issue_cmd(regs, cmd: &cmd);
2745	ap->mcast_all = 1;
2746	} else if (ap->mcast_all) {
2747	cmd.evt = C_SET_MULTICAST_MODE;
2748	cmd.code = C_C_MCAST_DISABLE;
2749	cmd.idx = 0;
2750	ace_issue_cmd(regs, cmd: &cmd);
2751	ap->mcast_all = 0;
2752	}
2753
2754	if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2755	cmd.evt = C_SET_PROMISC_MODE;
2756	cmd.code = C_C_PROMISC_ENABLE;
2757	cmd.idx = 0;
2758	ace_issue_cmd(regs, cmd: &cmd);
2759	ap->promisc = 1;
2760	}else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2761	cmd.evt = C_SET_PROMISC_MODE;
2762	cmd.code = C_C_PROMISC_DISABLE;
2763	cmd.idx = 0;
2764	ace_issue_cmd(regs, cmd: &cmd);
2765	ap->promisc = 0;
2766	}
2767
2768	/*
2769	* For the time being multicast relies on the upper layers
2770	* filtering it properly. The Firmware does not allow one to
2771	* set the entire multicast list at a time and keeping track of
2772	* it here is going to be messy.
2773	*/
2774	if (!netdev_mc_empty(dev) && !ap->mcast_all) {
2775	cmd.evt = C_SET_MULTICAST_MODE;
2776	cmd.code = C_C_MCAST_ENABLE;
2777	cmd.idx = 0;
2778	ace_issue_cmd(regs, cmd: &cmd);
2779	}else if (!ap->mcast_all) {
2780	cmd.evt = C_SET_MULTICAST_MODE;
2781	cmd.code = C_C_MCAST_DISABLE;
2782	cmd.idx = 0;
2783	ace_issue_cmd(regs, cmd: &cmd);
2784	}
2785	}
2786
2787
2788	static struct net_device_stats *ace_get_stats(struct net_device *dev)
2789	{
2790	struct ace_private *ap = netdev_priv(dev);
2791	struct ace_mac_stats __iomem *mac_stats =
2792	(struct ace_mac_stats __iomem *)ap->regs->Stats;
2793
2794	dev->stats.rx_missed_errors = readl(addr: &mac_stats->drop_space);
2795	dev->stats.multicast = readl(addr: &mac_stats->kept_mc);
2796	dev->stats.collisions = readl(addr: &mac_stats->coll);
2797
2798	return &dev->stats;
2799	}
2800
2801
2802	static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2803	u32 dest, int size)
2804	{
2805	void __iomem *tdest;
2806	short tsize, i;
2807
2808	if (size <= 0)
2809	return;
2810
2811	while (size > 0) {
2812	tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2813	min_t(u32, size, ACE_WINDOW_SIZE));
2814	tdest = (void __iomem *) &regs->Window +
2815	(dest & (ACE_WINDOW_SIZE - 1));
2816	writel(val: dest & ~(ACE_WINDOW_SIZE - 1), addr: &regs->WinBase);
2817	for (i = 0; i < (tsize / 4); i++) {
2818	/* Firmware is big-endian */
2819	writel(be32_to_cpup(p: src), addr: tdest);
2820	src++;
2821	tdest += 4;
2822	dest += 4;
2823	size -= 4;
2824	}
2825	}
2826	}
2827
2828
2829	static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2830	{
2831	void __iomem *tdest;
2832	short tsize = 0, i;
2833
2834	if (size <= 0)
2835	return;
2836
2837	while (size > 0) {
2838	tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2839	min_t(u32, size, ACE_WINDOW_SIZE));
2840	tdest = (void __iomem *) &regs->Window +
2841	(dest & (ACE_WINDOW_SIZE - 1));
2842	writel(val: dest & ~(ACE_WINDOW_SIZE - 1), addr: &regs->WinBase);
2843
2844	for (i = 0; i < (tsize / 4); i++) {
2845	writel(val: 0, addr: tdest + i*4);
2846	}
2847
2848	dest += tsize;
2849	size -= tsize;
2850	}
2851	}
2852
2853
2854	/*
2855	* Download the firmware into the SRAM on the NIC
2856	*
2857	* This operation requires the NIC to be halted and is performed with
2858	* interrupts disabled and with the spinlock hold.
2859	*/
2860	static int ace_load_firmware(struct net_device *dev)
2861	{
2862	const struct firmware *fw;
2863	const char *fw_name = "acenic/tg2.bin";
2864	struct ace_private *ap = netdev_priv(dev);
2865	struct ace_regs __iomem *regs = ap->regs;
2866	const __be32 *fw_data;
2867	u32 load_addr;
2868	int ret;
2869
2870	if (!(readl(addr: &regs->CpuCtrl) & CPU_HALTED)) {
2871	printk(KERN_ERR "%s: trying to download firmware while the "
2872	"CPU is running!\n", ap->name);
2873	return -EFAULT;
2874	}
2875
2876	if (ACE_IS_TIGON_I(ap))
2877	fw_name = "acenic/tg1.bin";
2878
2879	ret = request_firmware(fw: &fw, name: fw_name, device: &ap->pdev->dev);
2880	if (ret) {
2881	printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
2882	ap->name, fw_name);
2883	return ret;
2884	}
2885
2886	fw_data = (void *)fw->data;
2887
2888	/* Firmware blob starts with version numbers, followed by
2889	load and start address. Remainder is the blob to be loaded
2890	contiguously from load address. We don't bother to represent
2891	the BSS/SBSS sections any more, since we were clearing the
2892	whole thing anyway. */
2893	ap->firmware_major = fw->data[0];
2894	ap->firmware_minor = fw->data[1];
2895	ap->firmware_fix = fw->data[2];
2896
2897	ap->firmware_start = be32_to_cpu(fw_data[1]);
2898	if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
2899	printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2900	ap->name, ap->firmware_start, fw_name);
2901	ret = -EINVAL;
2902	goto out;
2903	}
2904
2905	load_addr = be32_to_cpu(fw_data[2]);
2906	if (load_addr < 0x4000 || load_addr >= 0x80000) {
2907	printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2908	ap->name, load_addr, fw_name);
2909	ret = -EINVAL;
2910	goto out;
2911	}
2912
2913	/*
2914	* Do not try to clear more than 512KiB or we end up seeing
2915	* funny things on NICs with only 512KiB SRAM
2916	*/
2917	ace_clear(regs, dest: 0x2000, size: 0x80000-0x2000);
2918	ace_copy(regs, src: &fw_data[3], dest: load_addr, size: fw->size-12);
2919	out:
2920	release_firmware(fw);
2921	return ret;
2922	}
2923
2924
2925	/*
2926	* The eeprom on the AceNIC is an Atmel i2c EEPROM.
2927	*
2928	* Accessing the EEPROM is `interesting' to say the least - don't read
2929	* this code right after dinner.
2930	*
2931	* This is all about black magic and bit-banging the device .... I
2932	* wonder in what hospital they have put the guy who designed the i2c
2933	* specs.
2934	*
2935	* Oh yes, this is only the beginning!
2936	*
2937	* Thanks to Stevarino Webinski for helping tracking down the bugs in the
2938	* code i2c readout code by beta testing all my hacks.
2939	*/
2940	static void eeprom_start(struct ace_regs __iomem *regs)
2941	{
2942	u32 local;
2943
2944	readl(addr: &regs->LocalCtrl);
2945	udelay(ACE_SHORT_DELAY);
2946	local = readl(addr: &regs->LocalCtrl);
2947	local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2948	writel(val: local, addr: &regs->LocalCtrl);
2949	readl(addr: &regs->LocalCtrl);
2950	mb();
2951	udelay(ACE_SHORT_DELAY);
2952	local |= EEPROM_CLK_OUT;
2953	writel(val: local, addr: &regs->LocalCtrl);
2954	readl(addr: &regs->LocalCtrl);
2955	mb();
2956	udelay(ACE_SHORT_DELAY);
2957	local &= ~EEPROM_DATA_OUT;
2958	writel(val: local, addr: &regs->LocalCtrl);
2959	readl(addr: &regs->LocalCtrl);
2960	mb();
2961	udelay(ACE_SHORT_DELAY);
2962	local &= ~EEPROM_CLK_OUT;
2963	writel(val: local, addr: &regs->LocalCtrl);
2964	readl(addr: &regs->LocalCtrl);
2965	mb();
2966	}
2967
2968
2969	static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
2970	{
2971	short i;
2972	u32 local;
2973
2974	udelay(ACE_SHORT_DELAY);
2975	local = readl(addr: &regs->LocalCtrl);
2976	local &= ~EEPROM_DATA_OUT;
2977	local |= EEPROM_WRITE_ENABLE;
2978	writel(val: local, addr: &regs->LocalCtrl);
2979	readl(addr: &regs->LocalCtrl);
2980	mb();
2981
2982	for (i = 0; i < 8; i++, magic <<= 1) {
2983	udelay(ACE_SHORT_DELAY);
2984	if (magic & 0x80)
2985	local |= EEPROM_DATA_OUT;
2986	else
2987	local &= ~EEPROM_DATA_OUT;
2988	writel(val: local, addr: &regs->LocalCtrl);
2989	readl(addr: &regs->LocalCtrl);
2990	mb();
2991
2992	udelay(ACE_SHORT_DELAY);
2993	local |= EEPROM_CLK_OUT;
2994	writel(val: local, addr: &regs->LocalCtrl);
2995	readl(addr: &regs->LocalCtrl);
2996	mb();
2997	udelay(ACE_SHORT_DELAY);
2998	local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
2999	writel(val: local, addr: &regs->LocalCtrl);
3000	readl(addr: &regs->LocalCtrl);
3001	mb();
3002	}
3003	}
3004
3005
3006	static int eeprom_check_ack(struct ace_regs __iomem *regs)
3007	{
3008	int state;
3009	u32 local;
3010
3011	local = readl(addr: &regs->LocalCtrl);
3012	local &= ~EEPROM_WRITE_ENABLE;
3013	writel(val: local, addr: &regs->LocalCtrl);
3014	readl(addr: &regs->LocalCtrl);
3015	mb();
3016	udelay(ACE_LONG_DELAY);
3017	local |= EEPROM_CLK_OUT;
3018	writel(val: local, addr: &regs->LocalCtrl);
3019	readl(addr: &regs->LocalCtrl);
3020	mb();
3021	udelay(ACE_SHORT_DELAY);
3022	/* sample data in middle of high clk */
3023	state = (readl(addr: &regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3024	udelay(ACE_SHORT_DELAY);
3025	mb();
3026	writel(readl(addr: &regs->LocalCtrl) & ~EEPROM_CLK_OUT, addr: &regs->LocalCtrl);
3027	readl(addr: &regs->LocalCtrl);
3028	mb();
3029
3030	return state;
3031	}
3032
3033
3034	static void eeprom_stop(struct ace_regs __iomem *regs)
3035	{
3036	u32 local;
3037
3038	udelay(ACE_SHORT_DELAY);
3039	local = readl(addr: &regs->LocalCtrl);
3040	local |= EEPROM_WRITE_ENABLE;
3041	writel(val: local, addr: &regs->LocalCtrl);
3042	readl(addr: &regs->LocalCtrl);
3043	mb();
3044	udelay(ACE_SHORT_DELAY);
3045	local &= ~EEPROM_DATA_OUT;
3046	writel(val: local, addr: &regs->LocalCtrl);
3047	readl(addr: &regs->LocalCtrl);
3048	mb();
3049	udelay(ACE_SHORT_DELAY);
3050	local |= EEPROM_CLK_OUT;
3051	writel(val: local, addr: &regs->LocalCtrl);
3052	readl(addr: &regs->LocalCtrl);
3053	mb();
3054	udelay(ACE_SHORT_DELAY);
3055	local |= EEPROM_DATA_OUT;
3056	writel(val: local, addr: &regs->LocalCtrl);
3057	readl(addr: &regs->LocalCtrl);
3058	mb();
3059	udelay(ACE_LONG_DELAY);
3060	local &= ~EEPROM_CLK_OUT;
3061	writel(val: local, addr: &regs->LocalCtrl);
3062	mb();
3063	}
3064
3065
3066	/*
3067	* Read a whole byte from the EEPROM.
3068	*/
3069	static int read_eeprom_byte(struct net_device *dev, unsigned long offset)
3070	{
3071	struct ace_private *ap = netdev_priv(dev);
3072	struct ace_regs __iomem *regs = ap->regs;
3073	unsigned long flags;
3074	u32 local;
3075	int result = 0;
3076	short i;
3077
3078	/*
3079	* Don't take interrupts on this CPU will bit banging
3080	* the %#%#@$ I2C device
3081	*/
3082	local_irq_save(flags);
3083
3084	eeprom_start(regs);
3085
3086	eeprom_prep(regs, EEPROM_WRITE_SELECT);
3087	if (eeprom_check_ack(regs)) {
3088	local_irq_restore(flags);
3089	printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3090	result = -EIO;
3091	goto eeprom_read_error;
3092	}
3093
3094	eeprom_prep(regs, magic: (offset >> 8) & 0xff);
3095	if (eeprom_check_ack(regs)) {
3096	local_irq_restore(flags);
3097	printk(KERN_ERR "%s: Unable to set address byte 0\n",
3098	ap->name);
3099	result = -EIO;
3100	goto eeprom_read_error;
3101	}
3102
3103	eeprom_prep(regs, magic: offset & 0xff);
3104	if (eeprom_check_ack(regs)) {
3105	local_irq_restore(flags);
3106	printk(KERN_ERR "%s: Unable to set address byte 1\n",
3107	ap->name);
3108	result = -EIO;
3109	goto eeprom_read_error;
3110	}
3111
3112	eeprom_start(regs);
3113	eeprom_prep(regs, EEPROM_READ_SELECT);
3114	if (eeprom_check_ack(regs)) {
3115	local_irq_restore(flags);
3116	printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3117	ap->name);
3118	result = -EIO;
3119	goto eeprom_read_error;
3120	}
3121
3122	for (i = 0; i < 8; i++) {
3123	local = readl(addr: &regs->LocalCtrl);
3124	local &= ~EEPROM_WRITE_ENABLE;
3125	writel(val: local, addr: &regs->LocalCtrl);
3126	readl(addr: &regs->LocalCtrl);
3127	udelay(ACE_LONG_DELAY);
3128	mb();
3129	local |= EEPROM_CLK_OUT;
3130	writel(val: local, addr: &regs->LocalCtrl);
3131	readl(addr: &regs->LocalCtrl);
3132	mb();
3133	udelay(ACE_SHORT_DELAY);
3134	/* sample data mid high clk */
3135	result = (result << 1) |
3136	((readl(addr: &regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3137	udelay(ACE_SHORT_DELAY);
3138	mb();
3139	local = readl(addr: &regs->LocalCtrl);
3140	local &= ~EEPROM_CLK_OUT;
3141	writel(val: local, addr: &regs->LocalCtrl);
3142	readl(addr: &regs->LocalCtrl);
3143	udelay(ACE_SHORT_DELAY);
3144	mb();
3145	if (i == 7) {
3146	local |= EEPROM_WRITE_ENABLE;
3147	writel(val: local, addr: &regs->LocalCtrl);
3148	readl(addr: &regs->LocalCtrl);
3149	mb();
3150	udelay(ACE_SHORT_DELAY);
3151	}
3152	}
3153
3154	local |= EEPROM_DATA_OUT;
3155	writel(val: local, addr: &regs->LocalCtrl);
3156	readl(addr: &regs->LocalCtrl);
3157	mb();
3158	udelay(ACE_SHORT_DELAY);
3159	writel(readl(addr: &regs->LocalCtrl) | EEPROM_CLK_OUT, addr: &regs->LocalCtrl);
3160	readl(addr: &regs->LocalCtrl);
3161	udelay(ACE_LONG_DELAY);
3162	writel(readl(addr: &regs->LocalCtrl) & ~EEPROM_CLK_OUT, addr: &regs->LocalCtrl);
3163	readl(addr: &regs->LocalCtrl);
3164	mb();
3165	udelay(ACE_SHORT_DELAY);
3166	eeprom_stop(regs);
3167
3168	local_irq_restore(flags);
3169	out:
3170	return result;
3171
3172	eeprom_read_error:
3173	printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3174	ap->name, offset);
3175	goto out;
3176	}
3177
3178	module_pci_driver(acenic_pci_driver);
3179