1 | //===- llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h -----------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | /// \file This file declares the GIMatchTableExecutor API, the opcodes supported |
10 | /// by the match table, and some associated data structures used by the |
11 | /// executor's implementation (see `GIMatchTableExecutorImpl.h`). |
12 | // |
13 | //===----------------------------------------------------------------------===// |
14 | |
15 | #ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H |
16 | #define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H |
17 | |
18 | #include "llvm/ADT/Bitset.h" |
19 | #include "llvm/ADT/DenseMap.h" |
20 | #include "llvm/ADT/SmallVector.h" |
21 | #include "llvm/CodeGen/GlobalISel/Utils.h" |
22 | #include "llvm/CodeGen/MachineFunction.h" |
23 | #include "llvm/CodeGenTypes/LowLevelType.h" |
24 | #include "llvm/IR/Function.h" |
25 | #include <bitset> |
26 | #include <cstddef> |
27 | #include <cstdint> |
28 | #include <functional> |
29 | #include <initializer_list> |
30 | #include <optional> |
31 | #include <vector> |
32 | |
33 | namespace llvm { |
34 | |
35 | class BlockFrequencyInfo; |
36 | class CodeGenCoverage; |
37 | class MachineBasicBlock; |
38 | class ProfileSummaryInfo; |
39 | class APInt; |
40 | class APFloat; |
41 | class GISelKnownBits; |
42 | class MachineInstr; |
43 | class MachineIRBuilder; |
44 | class MachineInstrBuilder; |
45 | class MachineFunction; |
46 | class MachineOperand; |
47 | class MachineRegisterInfo; |
48 | class RegisterBankInfo; |
49 | class TargetInstrInfo; |
50 | class TargetRegisterInfo; |
51 | |
52 | enum { |
53 | GICXXPred_Invalid = 0, |
54 | GICXXCustomAction_Invalid = 0, |
55 | }; |
56 | |
57 | /// The MatchTable is encoded as an array of bytes. |
58 | /// Thus, opcodes are expected to be <255. |
59 | /// |
60 | /// Operands can be variable-sized, their size is always after their name |
61 | /// in the docs, e.g. "Foo(4)" means that "Foo" takes 4 entries in the table, |
62 | /// so 4 bytes. "Foo()" |
63 | /// |
64 | /// As a general rule of thumb: |
65 | /// - Instruction & Operand IDs are ULEB128 |
66 | /// - LLT IDs are 1 byte |
67 | /// - Predicates and target opcodes, register and register class IDs are 2 |
68 | /// bytes. |
69 | /// - Indexes into the table are 4 bytes. |
70 | /// - Inline constants are 8 bytes |
71 | /// |
72 | /// Design notes: |
73 | /// - Inst/Op IDs have to be LEB128 because some targets generate |
74 | /// extremely long patterns which need more than 255 temporaries. |
75 | /// We could just use 2 bytes everytime, but then some targets like |
76 | /// X86/AMDGPU that have no need for it will pay the price all the time. |
77 | enum { |
78 | /// Begin a try-block to attempt a match and jump to OnFail if it is |
79 | /// unsuccessful. |
80 | /// - OnFail(4) - The MatchTable entry at which to resume if the match fails. |
81 | /// |
82 | /// FIXME: This ought to take an argument indicating the number of try-blocks |
83 | /// to exit on failure. It's usually one but the last match attempt of |
84 | /// a block will need more. The (implemented) alternative is to tack a |
85 | /// GIM_Reject on the end of each try-block which is simpler but |
86 | /// requires an extra opcode and iteration in the interpreter on each |
87 | /// failed match. |
88 | GIM_Try, |
89 | |
90 | /// Switch over the opcode on the specified instruction |
91 | /// - InsnID(ULEB128) - Instruction ID |
92 | /// - LowerBound(2) - numerically minimum opcode supported |
93 | /// - UpperBound(2) - numerically maximum + 1 opcode supported |
94 | /// - Default(4) - failure jump target |
95 | /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets |
96 | GIM_SwitchOpcode, |
97 | |
98 | /// Switch over the LLT on the specified instruction operand |
99 | /// - InsnID(ULEB128) - Instruction ID |
100 | /// - OpIdx(ULEB128) - Operand index |
101 | /// - LowerBound(2) - numerically minimum Type ID supported |
102 | /// - UpperBound(2) - numerically maximum + 1 Type ID supported |
103 | /// - Default(4) - failure jump target |
104 | /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets |
105 | GIM_SwitchType, |
106 | |
107 | /// Record the specified instruction. |
108 | /// The IgnoreCopies variant ignores COPY instructions. |
109 | /// - NewInsnID(ULEB128) - Instruction ID to define |
110 | /// - InsnID(ULEB128) - Instruction ID |
111 | /// - OpIdx(ULEB128) - Operand index |
112 | GIM_RecordInsn, |
113 | GIM_RecordInsnIgnoreCopies, |
114 | |
115 | /// Check the feature bits |
116 | /// Feature(2) - Expected features |
117 | GIM_CheckFeatures, |
118 | |
119 | /// Check the opcode on the specified instruction |
120 | /// - InsnID(ULEB128) - Instruction ID |
121 | /// - Opc(2) - Expected opcode |
122 | GIM_CheckOpcode, |
123 | |
124 | /// Check the opcode on the specified instruction, checking 2 acceptable |
125 | /// alternatives. |
126 | /// - InsnID(ULEB128) - Instruction ID |
127 | /// - Opc(2) - Expected opcode |
128 | /// - Opc(2) - Alternative expected opcode |
129 | GIM_CheckOpcodeIsEither, |
130 | |
131 | /// Check the instruction has the right number of operands |
132 | /// - InsnID(ULEB128) - Instruction ID |
133 | /// - Ops(ULEB128) - Expected number of operands |
134 | GIM_CheckNumOperands, |
135 | |
136 | /// Check an immediate predicate on the specified instruction |
137 | /// - InsnID(ULEB128) - Instruction ID |
138 | /// - Pred(2) - The predicate to test |
139 | GIM_CheckI64ImmPredicate, |
140 | /// Check an immediate predicate on the specified instruction via an APInt. |
141 | /// - InsnID(ULEB128) - Instruction ID |
142 | /// - Pred(2) - The predicate to test |
143 | GIM_CheckAPIntImmPredicate, |
144 | /// Check a floating point immediate predicate on the specified instruction. |
145 | /// - InsnID(ULEB128) - Instruction ID |
146 | /// - Pred(2) - The predicate to test |
147 | GIM_CheckAPFloatImmPredicate, |
148 | /// Check an immediate predicate on the specified instruction |
149 | /// - InsnID(ULEB128) - Instruction ID |
150 | /// - OpIdx(ULEB128) - Operand index |
151 | /// - Pred(2) - The predicate to test |
152 | GIM_CheckImmOperandPredicate, |
153 | |
154 | /// Check a memory operation has the specified atomic ordering. |
155 | /// - InsnID(ULEB128) - Instruction ID |
156 | /// - Ordering(ULEB128) - The AtomicOrdering value |
157 | GIM_CheckAtomicOrdering, |
158 | GIM_CheckAtomicOrderingOrStrongerThan, |
159 | GIM_CheckAtomicOrderingWeakerThan, |
160 | |
161 | /// Check the size of the memory access for the given machine memory operand. |
162 | /// - InsnID(ULEB128) - Instruction ID |
163 | /// - MMOIdx(ULEB128) - MMO index |
164 | /// - Size(4) - The size in bytes of the memory access |
165 | GIM_CheckMemorySizeEqualTo, |
166 | |
167 | /// Check the address space of the memory access for the given machine memory |
168 | /// operand. |
169 | /// - InsnID(ULEB128) - Instruction ID |
170 | /// - MMOIdx(ULEB128) - MMO index |
171 | /// - NumAddrSpace(ULEB128) - Number of valid address spaces |
172 | /// - AddrSpaceN(ULEB128) - An allowed space of the memory access |
173 | /// - AddrSpaceN+1 ... |
174 | GIM_CheckMemoryAddressSpace, |
175 | |
176 | /// Check the minimum alignment of the memory access for the given machine |
177 | /// memory operand. |
178 | /// - InsnID(ULEB128) - Instruction ID |
179 | /// - MMOIdx(ULEB128) - MMO index |
180 | /// - MinAlign(ULEB128) - Minimum acceptable alignment |
181 | GIM_CheckMemoryAlignment, |
182 | |
183 | /// Check the size of the memory access for the given machine memory operand |
184 | /// against the size of an operand. |
185 | /// - InsnID(ULEB128) - Instruction ID |
186 | /// - MMOIdx(ULEB128) - MMO index |
187 | /// - OpIdx(ULEB128) - The operand index to compare the MMO against |
188 | GIM_CheckMemorySizeEqualToLLT, |
189 | GIM_CheckMemorySizeLessThanLLT, |
190 | GIM_CheckMemorySizeGreaterThanLLT, |
191 | |
192 | /// Check if this is a vector that can be treated as a vector splat |
193 | /// constant. This is valid for both G_BUILD_VECTOR as well as |
194 | /// G_BUILD_VECTOR_TRUNC. For AllOnes refers to individual bits, so a -1 |
195 | /// element. |
196 | /// - InsnID(ULEB128) - Instruction ID |
197 | GIM_CheckIsBuildVectorAllOnes, |
198 | GIM_CheckIsBuildVectorAllZeros, |
199 | |
200 | /// Check a trivial predicate which takes no arguments. |
201 | /// This can be used by executors to implement custom flags that don't fit in |
202 | /// target features. |
203 | /// - Pred(2) - Predicate ID to check. |
204 | GIM_CheckSimplePredicate, |
205 | |
206 | /// Check a generic C++ instruction predicate |
207 | /// - InsnID(ULEB128) - Instruction ID |
208 | /// - PredicateID(2) - The ID of the predicate function to call |
209 | GIM_CheckCxxInsnPredicate, |
210 | |
211 | /// Check if there's no use of the first result. |
212 | /// - InsnID(ULEB128) - Instruction ID |
213 | GIM_CheckHasNoUse, |
214 | |
215 | /// Check the type for the specified operand |
216 | /// - InsnID(ULEB128) - Instruction ID |
217 | /// - OpIdx(ULEB128) - Operand index |
218 | /// - Ty(1) - Expected type |
219 | GIM_CheckType, |
220 | |
221 | /// Check the type of a pointer to any address space. |
222 | /// - InsnID(ULEB128) - Instruction ID |
223 | /// - OpIdx(ULEB128) - Operand index |
224 | /// - SizeInBits(ULEB128) - The size of the pointer value in bits. |
225 | GIM_CheckPointerToAny, |
226 | |
227 | /// Check the register bank for the specified operand |
228 | /// - InsnID(ULEB128) - Instruction ID |
229 | /// - OpIdx(ULEB128) - Operand index |
230 | /// - RC(2) - Expected register bank (specified as a register class) |
231 | GIM_CheckRegBankForClass, |
232 | |
233 | /// Check the operand matches a complex predicate |
234 | /// - InsnID(ULEB128) - Instruction ID |
235 | /// - OpIdx(ULEB128) - Operand index |
236 | /// - RendererID(2) - The renderer to hold the result |
237 | /// - Pred(2) - Complex predicate ID |
238 | GIM_CheckComplexPattern, |
239 | |
240 | /// Check the operand is a specific integer |
241 | /// - InsnID(ULEB128) - Instruction ID |
242 | /// - OpIdx(ULEB128) - Operand index |
243 | /// - Val(8) Expected integer |
244 | GIM_CheckConstantInt, |
245 | |
246 | /// Check the operand is a specific 8-bit signed integer |
247 | /// - InsnID(ULEB128) - Instruction ID |
248 | /// - OpIdx(ULEB128) - Operand index |
249 | /// - Val(1) Expected integer |
250 | GIM_CheckConstantInt8, |
251 | |
252 | /// Check the operand is a specific literal integer (i.e. MO.isImm() or |
253 | /// MO.isCImm() is true). |
254 | /// - InsnID(ULEB128) - Instruction ID |
255 | /// - OpIdx(ULEB128) - Operand index |
256 | /// - Val(8) - Expected integer |
257 | GIM_CheckLiteralInt, |
258 | |
259 | /// Check the operand is a specific intrinsic ID |
260 | /// - InsnID(ULEB128) - Instruction ID |
261 | /// - OpIdx(ULEB128) - Operand index |
262 | /// - IID(2) - Expected Intrinsic ID |
263 | GIM_CheckIntrinsicID, |
264 | |
265 | /// Check the operand is a specific predicate |
266 | /// - InsnID(ULEB128) - Instruction ID |
267 | /// - OpIdx(ULEB128) - Operand index |
268 | /// - Pred(2) - Expected predicate |
269 | GIM_CheckCmpPredicate, |
270 | |
271 | /// Check the specified operand is an MBB |
272 | /// - InsnID(ULEB128) - Instruction ID |
273 | /// - OpIdx(ULEB128) - Operand index |
274 | GIM_CheckIsMBB, |
275 | |
276 | /// Check the specified operand is an Imm |
277 | /// - InsnID(ULEB128) - Instruction ID |
278 | /// - OpIdx(ULEB128) - Operand index |
279 | GIM_CheckIsImm, |
280 | |
281 | /// Check if the specified operand is safe to fold into the current |
282 | /// instruction. |
283 | /// - InsnID(ULEB128) - Instruction ID |
284 | GIM_CheckIsSafeToFold, |
285 | |
286 | /// Check the specified operands are identical. |
287 | /// The IgnoreCopies variant looks through COPY instructions before |
288 | /// comparing the operands. |
289 | /// - InsnID(ULEB128) - Instruction ID |
290 | /// - OpIdx(ULEB128) - Operand index |
291 | /// - OtherInsnID(ULEB128) - Other instruction ID |
292 | /// - OtherOpIdx(ULEB128) - Other operand index |
293 | GIM_CheckIsSameOperand, |
294 | GIM_CheckIsSameOperandIgnoreCopies, |
295 | |
296 | /// Check we can replace all uses of a register with another. |
297 | /// - OldInsnID(ULEB128) |
298 | /// - OldOpIdx(ULEB128) |
299 | /// - NewInsnID(ULEB128) |
300 | /// - NewOpIdx(ULEB128) |
301 | GIM_CheckCanReplaceReg, |
302 | |
303 | /// Check that a matched instruction has, or doesn't have a MIFlag. |
304 | /// |
305 | /// - InsnID(ULEB128) - Instruction to check. |
306 | /// - Flags(4) - (can be one or more flags OR'd together) |
307 | GIM_MIFlags, |
308 | GIM_MIFlagsNot, |
309 | |
310 | /// Predicates with 'let PredicateCodeUsesOperands = 1' need to examine some |
311 | /// named operands that will be recorded in RecordedOperands. Names of these |
312 | /// operands are referenced in predicate argument list. Emitter determines |
313 | /// StoreIdx(corresponds to the order in which names appear in argument list). |
314 | /// - InsnID(ULEB128) - Instruction ID |
315 | /// - OpIdx(ULEB128) - Operand index |
316 | /// - StoreIdx(ULEB128) - Store location in RecordedOperands. |
317 | GIM_RecordNamedOperand, |
318 | |
319 | /// Records an operand's register type into the set of temporary types. |
320 | /// - InsnID(ULEB128) - Instruction ID |
321 | /// - OpIdx(ULEB128) - Operand index |
322 | /// - TempTypeIdx(1) - Temp Type Index, always negative. |
323 | GIM_RecordRegType, |
324 | |
325 | /// Fail the current try-block, or completely fail to match if there is no |
326 | /// current try-block. |
327 | GIM_Reject, |
328 | |
329 | //=== Renderers === |
330 | |
331 | /// Mutate an instruction |
332 | /// - NewInsnID(ULEB128) - Instruction ID to define |
333 | /// - OldInsnID(ULEB128) - Instruction ID to mutate |
334 | /// - NewOpcode(2) - The new opcode to use |
335 | GIR_MutateOpcode, |
336 | |
337 | /// Build a new instruction |
338 | /// - InsnID(ULEB128) - Instruction ID to define |
339 | /// - Opcode(2) - The new opcode to use |
340 | GIR_BuildMI, |
341 | |
342 | /// Builds a constant and stores its result in a TempReg. |
343 | /// - TempRegID(ULEB128) - Temp Register to define. |
344 | /// - Imm(8) - The immediate to add |
345 | GIR_BuildConstant, |
346 | |
347 | /// Copy an operand to the specified instruction |
348 | /// - NewInsnID(ULEB128) - Instruction ID to modify |
349 | /// - OldInsnID(ULEB128) - Instruction ID to copy from |
350 | /// - OpIdx(ULEB128) - The operand to copy |
351 | GIR_Copy, |
352 | |
353 | /// Copy an operand to the specified instruction or add a zero register if the |
354 | /// operand is a zero immediate. |
355 | /// - NewInsnID(ULEB128) - Instruction ID to modify |
356 | /// - OldInsnID(ULEB128) - Instruction ID to copy from |
357 | /// - OpIdx(ULEB128) - The operand to copy |
358 | /// - ZeroReg(2) - The zero register to use |
359 | GIR_CopyOrAddZeroReg, |
360 | /// Copy an operand to the specified instruction |
361 | /// - NewInsnID(ULEB128) - Instruction ID to modify |
362 | /// - OldInsnID(ULEB128) - Instruction ID to copy from |
363 | /// - OpIdx(ULEB128) - The operand to copy |
364 | /// - SubRegIdx(2) - The subregister to copy |
365 | GIR_CopySubReg, |
366 | |
367 | /// Add an implicit register def to the specified instruction |
368 | /// - InsnID(ULEB128) - Instruction ID to modify |
369 | /// - RegNum(2) - The register to add |
370 | /// - Flags(2) - Register Flags |
371 | GIR_AddImplicitDef, |
372 | /// Add an implicit register use to the specified instruction |
373 | /// - InsnID(ULEB128) - Instruction ID to modify |
374 | /// - RegNum(2) - The register to add |
375 | GIR_AddImplicitUse, |
376 | /// Add an register to the specified instruction |
377 | /// - InsnID(ULEB128) - Instruction ID to modify |
378 | /// - RegNum(2) - The register to add |
379 | /// - Flags(2) - Register Flags |
380 | GIR_AddRegister, |
381 | |
382 | /// Adds an intrinsic ID to the specified instruction. |
383 | /// - InsnID(ULEB128) - Instruction ID to modify |
384 | /// - IID(2) - Intrinsic ID |
385 | GIR_AddIntrinsicID, |
386 | |
387 | /// Marks the implicit def of a register as dead. |
388 | /// - InsnID(ULEB128) - Instruction ID to modify |
389 | /// - OpIdx(ULEB128) - The implicit def operand index |
390 | /// |
391 | /// OpIdx starts at 0 for the first implicit def. |
392 | GIR_SetImplicitDefDead, |
393 | |
394 | /// Set or unset a MIFlag on an instruction. |
395 | /// |
396 | /// - InsnID(ULEB128) - Instruction to modify. |
397 | /// - Flags(4) - (can be one or more flags OR'd together) |
398 | GIR_SetMIFlags, |
399 | GIR_UnsetMIFlags, |
400 | |
401 | /// Copy the MIFlags of a matched instruction into an |
402 | /// output instruction. The flags are OR'd together. |
403 | /// |
404 | /// - InsnID(ULEB128) - Instruction to modify. |
405 | /// - OldInsnID(ULEB128) - Matched instruction to copy flags from. |
406 | GIR_CopyMIFlags, |
407 | |
408 | /// Add a temporary register to the specified instruction |
409 | /// - InsnID(ULEB128) - Instruction ID to modify |
410 | /// - TempRegID(ULEB128) - The temporary register ID to add |
411 | /// - TempRegFlags(2) - The register flags to set |
412 | GIR_AddTempRegister, |
413 | |
414 | /// Add a temporary register to the specified instruction without |
415 | /// setting any flags. |
416 | /// - InsnID(ULEB128) - Instruction ID to modify |
417 | /// - TempRegID(ULEB128) - The temporary register ID to add |
418 | GIR_AddSimpleTempRegister, |
419 | |
420 | /// Add a temporary register to the specified instruction |
421 | /// - InsnID(ULEB128) - Instruction ID to modify |
422 | /// - TempRegID(ULEB128) - The temporary register ID to add |
423 | /// - TempRegFlags(2) - The register flags to set |
424 | /// - SubRegIndex(2) - The subregister index to set |
425 | GIR_AddTempSubRegister, |
426 | |
427 | /// Add an immediate to the specified instruction |
428 | /// - InsnID(ULEB128) - Instruction ID to modify |
429 | /// - Imm(8) - The immediate to add |
430 | GIR_AddImm, |
431 | |
432 | /// Add signed 8 bit immediate to the specified instruction |
433 | /// - InsnID(ULEB128) - Instruction ID to modify |
434 | /// - Imm(1) - The immediate to add |
435 | GIR_AddImm8, |
436 | |
437 | /// Add an CImm to the specified instruction |
438 | /// - InsnID(ULEB128) - Instruction ID to modify |
439 | /// - Ty(1) - Type of the constant immediate. |
440 | /// - Imm(8) - The immediate to add |
441 | GIR_AddCImm, |
442 | |
443 | /// Render complex operands to the specified instruction |
444 | /// - InsnID(ULEB128) - Instruction ID to modify |
445 | /// - RendererID(2) - The renderer to call |
446 | GIR_ComplexRenderer, |
447 | /// Render sub-operands of complex operands to the specified instruction |
448 | /// - InsnID(ULEB128) - Instruction ID to modify |
449 | /// - RendererID(2) - The renderer to call |
450 | /// - RenderOpID(ULEB128) - The suboperand to render. |
451 | GIR_ComplexSubOperandRenderer, |
452 | /// Render subregisters of suboperands of complex operands to the |
453 | /// specified instruction |
454 | /// - InsnID(ULEB128) - Instruction ID to modify |
455 | /// - RendererID(2) - The renderer to call |
456 | /// - RenderOpID(ULEB128) - The suboperand to render |
457 | /// - SubRegIdx(2) - The subregister to extract |
458 | GIR_ComplexSubOperandSubRegRenderer, |
459 | |
460 | /// Render operands to the specified instruction using a custom function |
461 | /// - InsnID(ULEB128) - Instruction ID to modify |
462 | /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from |
463 | /// - RendererFnID(2) - Custom renderer function to call |
464 | GIR_CustomRenderer, |
465 | |
466 | /// Calls a C++ function to perform an action when a match is complete. |
467 | /// The MatcherState is passed to the function to allow it to modify |
468 | /// instructions. |
469 | /// This is less constrained than a custom renderer and can update |
470 | /// instructions |
471 | /// in the state. |
472 | /// - FnID(2) - The function to call. |
473 | /// TODO: Remove this at some point when combiners aren't reliant on it. It's |
474 | /// a bit of a hack. |
475 | GIR_CustomAction, |
476 | |
477 | /// Render operands to the specified instruction using a custom function, |
478 | /// reading from a specific operand. |
479 | /// - InsnID(ULEB128) - Instruction ID to modify |
480 | /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from |
481 | /// - OpIdx(ULEB128) - Operand index in OldInsnID the render function should |
482 | /// read |
483 | /// from.. |
484 | /// - RendererFnID(2) - Custom renderer function to call |
485 | GIR_CustomOperandRenderer, |
486 | |
487 | /// Render a G_CONSTANT operator as a sign-extended immediate. |
488 | /// - NewInsnID(ULEB128) - Instruction ID to modify |
489 | /// - OldInsnID(ULEB128) - Instruction ID to copy from |
490 | /// The operand index is implicitly 1. |
491 | GIR_CopyConstantAsSImm, |
492 | |
493 | /// Render a G_FCONSTANT operator as a sign-extended immediate. |
494 | /// - NewInsnID(ULEB128) - Instruction ID to modify |
495 | /// - OldInsnID(ULEB128) - Instruction ID to copy from |
496 | /// The operand index is implicitly 1. |
497 | GIR_CopyFConstantAsFPImm, |
498 | |
499 | /// Constrain an instruction operand to a register class. |
500 | /// - InsnID(ULEB128) - Instruction ID to modify |
501 | /// - OpIdx(ULEB128) - Operand index |
502 | /// - RCEnum(2) - Register class enumeration value |
503 | GIR_ConstrainOperandRC, |
504 | |
505 | /// Constrain an instructions operands according to the instruction |
506 | /// description. |
507 | /// - InsnID(ULEB128) - Instruction ID to modify |
508 | GIR_ConstrainSelectedInstOperands, |
509 | |
510 | /// Merge all memory operands into instruction. |
511 | /// - InsnID(ULEB128) - Instruction ID to modify |
512 | /// - NumInsnID(1) - Number of instruction IDs following this argument |
513 | /// - MergeInsnID(ULEB128)... - One or more Instruction ID to merge into the |
514 | /// result. |
515 | GIR_MergeMemOperands, |
516 | |
517 | /// Erase from parent. |
518 | /// - InsnID(ULEB128) - Instruction ID to erase |
519 | GIR_EraseFromParent, |
520 | |
521 | /// Create a new temporary register that's not constrained. |
522 | /// - TempRegID(ULEB128) - The temporary register ID to initialize. |
523 | /// - Ty(1) - Expected type |
524 | GIR_MakeTempReg, |
525 | |
526 | /// Replaces all references to a register from an instruction |
527 | /// with another register from another instruction. |
528 | /// - OldInsnID(ULEB128) |
529 | /// - OldOpIdx(ULEB128) |
530 | /// - NewInsnID(ULEB128) |
531 | /// - NewOpIdx(ULEB128) |
532 | GIR_ReplaceReg, |
533 | |
534 | /// Replaces all references to a register with a temporary register. |
535 | /// - OldInsnID(ULEB128) |
536 | /// - OldOpIdx(ULEB128) |
537 | /// - TempRegIdx(ULEB128) |
538 | GIR_ReplaceRegWithTempReg, |
539 | |
540 | /// A successful emission |
541 | GIR_Done, |
542 | |
543 | /// Increment the rule coverage counter. |
544 | /// - RuleID(4) - The ID of the rule that was covered. |
545 | GIR_Coverage, |
546 | |
547 | /// Keeping track of the number of the GI opcodes. Must be the last entry. |
548 | GIU_NumOpcodes, |
549 | }; |
550 | |
551 | /// Provides the logic to execute GlobalISel match tables, which are used by the |
552 | /// instruction selector and instruction combiners as their engine to match and |
553 | /// apply MIR patterns. |
554 | class GIMatchTableExecutor { |
555 | public: |
556 | virtual ~GIMatchTableExecutor() = default; |
557 | |
558 | CodeGenCoverage *CoverageInfo = nullptr; |
559 | GISelKnownBits *KB = nullptr; |
560 | MachineFunction *MF = nullptr; |
561 | ProfileSummaryInfo *PSI = nullptr; |
562 | BlockFrequencyInfo *BFI = nullptr; |
563 | // For some predicates, we need to track the current MBB. |
564 | MachineBasicBlock *CurMBB = nullptr; |
565 | |
566 | virtual void setupGeneratedPerFunctionState(MachineFunction &MF) = 0; |
567 | |
568 | /// Setup per-MF executor state. |
569 | virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb, |
570 | CodeGenCoverage *covinfo = nullptr, |
571 | ProfileSummaryInfo *psi = nullptr, |
572 | BlockFrequencyInfo *bfi = nullptr) { |
573 | CoverageInfo = covinfo; |
574 | KB = kb; |
575 | MF = &mf; |
576 | PSI = psi; |
577 | BFI = bfi; |
578 | CurMBB = nullptr; |
579 | setupGeneratedPerFunctionState(mf); |
580 | } |
581 | |
582 | protected: |
583 | using ComplexRendererFns = |
584 | std::optional<SmallVector<std::function<void(MachineInstrBuilder &)>, 4>>; |
585 | using RecordedMIVector = SmallVector<MachineInstr *, 4>; |
586 | using NewMIVector = SmallVector<MachineInstrBuilder, 4>; |
587 | |
588 | struct MatcherState { |
589 | std::vector<ComplexRendererFns::value_type> Renderers; |
590 | RecordedMIVector MIs; |
591 | DenseMap<unsigned, unsigned> TempRegisters; |
592 | /// Named operands that predicate with 'let PredicateCodeUsesOperands = 1' |
593 | /// referenced in its argument list. Operands are inserted at index set by |
594 | /// emitter, it corresponds to the order in which names appear in argument |
595 | /// list. Currently such predicates don't have more then 3 arguments. |
596 | std::array<const MachineOperand *, 3> RecordedOperands; |
597 | |
598 | /// Types extracted from an instruction's operand. |
599 | /// Whenever a type index is negative, we look here instead. |
600 | SmallVector<LLT, 4> RecordedTypes; |
601 | |
602 | MatcherState(unsigned MaxRenderers); |
603 | }; |
604 | |
605 | bool shouldOptForSize(const MachineFunction *MF) const { |
606 | const auto &F = MF->getFunction(); |
607 | return F.hasOptSize() || F.hasMinSize() || |
608 | (PSI && BFI && CurMBB && llvm::shouldOptForSize(MBB: *CurMBB, PSI, BFI)); |
609 | } |
610 | |
611 | public: |
612 | template <class PredicateBitset, class ComplexMatcherMemFn, |
613 | class CustomRendererFn> |
614 | struct ExecInfoTy { |
615 | ExecInfoTy(const LLT *TypeObjects, size_t NumTypeObjects, |
616 | const PredicateBitset *FeatureBitsets, |
617 | const ComplexMatcherMemFn *ComplexPredicates, |
618 | const CustomRendererFn *CustomRenderers) |
619 | : TypeObjects(TypeObjects), FeatureBitsets(FeatureBitsets), |
620 | ComplexPredicates(ComplexPredicates), |
621 | CustomRenderers(CustomRenderers) { |
622 | |
623 | for (size_t I = 0; I < NumTypeObjects; ++I) |
624 | TypeIDMap[TypeObjects[I]] = I; |
625 | } |
626 | const LLT *TypeObjects; |
627 | const PredicateBitset *FeatureBitsets; |
628 | const ComplexMatcherMemFn *ComplexPredicates; |
629 | const CustomRendererFn *CustomRenderers; |
630 | |
631 | SmallDenseMap<LLT, unsigned, 64> TypeIDMap; |
632 | }; |
633 | |
634 | protected: |
635 | GIMatchTableExecutor(); |
636 | |
637 | /// Execute a given matcher table and return true if the match was successful |
638 | /// and false otherwise. |
639 | template <class TgtExecutor, class PredicateBitset, class ComplexMatcherMemFn, |
640 | class CustomRendererFn> |
641 | bool executeMatchTable(TgtExecutor &Exec, MatcherState &State, |
642 | const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, |
643 | CustomRendererFn> &ExecInfo, |
644 | MachineIRBuilder &Builder, const uint8_t *MatchTable, |
645 | const TargetInstrInfo &TII, MachineRegisterInfo &MRI, |
646 | const TargetRegisterInfo &TRI, |
647 | const RegisterBankInfo &RBI, |
648 | const PredicateBitset &AvailableFeatures, |
649 | CodeGenCoverage *CoverageInfo) const; |
650 | |
651 | virtual const uint8_t *getMatchTable() const { |
652 | llvm_unreachable("Should have been overridden by tablegen if used" ); |
653 | } |
654 | |
655 | virtual bool testImmPredicate_I64(unsigned, int64_t) const { |
656 | llvm_unreachable( |
657 | "Subclasses must override this with a tablegen-erated function" ); |
658 | } |
659 | virtual bool testImmPredicate_APInt(unsigned, const APInt &) const { |
660 | llvm_unreachable( |
661 | "Subclasses must override this with a tablegen-erated function" ); |
662 | } |
663 | virtual bool testImmPredicate_APFloat(unsigned, const APFloat &) const { |
664 | llvm_unreachable( |
665 | "Subclasses must override this with a tablegen-erated function" ); |
666 | } |
667 | virtual bool testMIPredicate_MI(unsigned, const MachineInstr &, |
668 | const MatcherState &State) const { |
669 | llvm_unreachable( |
670 | "Subclasses must override this with a tablegen-erated function" ); |
671 | } |
672 | |
673 | virtual bool testSimplePredicate(unsigned) const { |
674 | llvm_unreachable("Subclass does not implement testSimplePredicate!" ); |
675 | } |
676 | |
677 | virtual void runCustomAction(unsigned, const MatcherState &State, |
678 | NewMIVector &OutMIs) const { |
679 | llvm_unreachable("Subclass does not implement runCustomAction!" ); |
680 | } |
681 | |
682 | bool isOperandImmEqual(const MachineOperand &MO, int64_t Value, |
683 | const MachineRegisterInfo &MRI, |
684 | bool Splat = false) const; |
685 | |
686 | /// Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on |
687 | /// the right-hand side. GlobalISel's separation of pointer and integer types |
688 | /// means that we don't need to worry about G_OR with equivalent semantics. |
689 | bool isBaseWithConstantOffset(const MachineOperand &Root, |
690 | const MachineRegisterInfo &MRI) const; |
691 | |
692 | /// Return true if MI can obviously be folded into IntoMI. |
693 | /// MI and IntoMI do not need to be in the same basic blocks, but MI must |
694 | /// preceed IntoMI. |
695 | bool isObviouslySafeToFold(MachineInstr &MI, MachineInstr &IntoMI) const; |
696 | |
697 | template <typename Ty> static Ty readBytesAs(const uint8_t *MatchTable) { |
698 | Ty Ret; |
699 | memcpy(&Ret, MatchTable, sizeof(Ret)); |
700 | return Ret; |
701 | } |
702 | }; |
703 | |
704 | } // end namespace llvm |
705 | |
706 | #endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H |
707 | |